TW468112B - Arbitrating method of bus between control chipsets - Google Patents

Arbitrating method of bus between control chipsets Download PDF

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Publication number
TW468112B
TW468112B TW088121973A TW88121973A TW468112B TW 468112 B TW468112 B TW 468112B TW 088121973 A TW088121973 A TW 088121973A TW 88121973 A TW88121973 A TW 88121973A TW 468112 B TW468112 B TW 468112B
Authority
TW
Taiwan
Prior art keywords
bus
control chip
chip
control
data
Prior art date
Application number
TW088121973A
Other languages
English (en)
Chinese (zh)
Inventor
Jin Lai
Jau-Jiue Tsai
Sheng-Chang Peng
Chi-Je Tsai
Original Assignee
Via Tech Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Via Tech Inc filed Critical Via Tech Inc
Priority to TW088121973A priority Critical patent/TW468112B/zh
Priority to DE10061770A priority patent/DE10061770B4/de
Priority to US09/735,412 priority patent/US6721833B2/en
Priority to JP2000379455A priority patent/JP4583590B2/ja
Application granted granted Critical
Publication of TW468112B publication Critical patent/TW468112B/zh

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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Information Transfer Systems (AREA)
TW088121973A 1999-12-15 1999-12-15 Arbitrating method of bus between control chipsets TW468112B (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
TW088121973A TW468112B (en) 1999-12-15 1999-12-15 Arbitrating method of bus between control chipsets
DE10061770A DE10061770B4 (de) 1999-12-15 2000-12-12 Zugriffsregelung für Steuerchipsätzen bei Bustransaktion
US09/735,412 US6721833B2 (en) 1999-12-15 2000-12-12 Arbitration of control chipsets in bus transaction
JP2000379455A JP4583590B2 (ja) 1999-12-15 2000-12-13 バストランザクションにおける制御チップセットのアービトレーション

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW088121973A TW468112B (en) 1999-12-15 1999-12-15 Arbitrating method of bus between control chipsets

Publications (1)

Publication Number Publication Date
TW468112B true TW468112B (en) 2001-12-11

Family

ID=21643386

Family Applications (1)

Application Number Title Priority Date Filing Date
TW088121973A TW468112B (en) 1999-12-15 1999-12-15 Arbitrating method of bus between control chipsets

Country Status (4)

Country Link
US (1) US6721833B2 (enExample)
JP (1) JP4583590B2 (enExample)
DE (1) DE10061770B4 (enExample)
TW (1) TW468112B (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7945719B2 (en) 2006-09-20 2011-05-17 Intel Corporation Controller link for manageability engine
TWI399650B (zh) * 2005-02-24 2013-06-21 Qualcomm Inc 於每一週期中藉由較高頻率仲裁器之複數匯流排仲裁之系統及在一以一匯流排頻率操作之匯流排中仲裁多個匯流排處理請求的方法
TWI637269B (zh) * 2017-12-26 2018-10-01 奇景光電股份有限公司 電子裝置及其操作方法

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7085866B1 (en) * 2002-02-19 2006-08-01 Hobson Richard F Hierarchical bus structure and memory access protocol for multiprocessor systems
US6959372B1 (en) * 2002-02-19 2005-10-25 Cogent Chipware Inc. Processor cluster architecture and associated parallel processing methods
JP2005250671A (ja) * 2004-03-02 2005-09-15 Sony Corp 通信システム、通信装置、通信方法およびプログラム
CN100336045C (zh) * 2004-11-19 2007-09-05 威盛电子股份有限公司 多功能芯片组及相关方法
US20060277444A1 (en) * 2005-06-03 2006-12-07 Nicholas Holian Recordation of error information
US7467245B2 (en) * 2005-07-22 2008-12-16 Cisco Technology, Inc. PCI arbiter
US7757031B2 (en) * 2005-10-24 2010-07-13 Via Technologies, Inc. Data transmission coordinating method and system
CN104978302B (zh) * 2015-06-24 2018-02-23 山东超越数控电子股份有限公司 一种基于tcm芯片的智能安全usb接口控制方法

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05324544A (ja) * 1992-05-15 1993-12-07 Hitachi Ltd バス制御方法
TW242183B (en) * 1993-11-26 1995-03-01 United Microelectronics Corp Chip set architecture for personal computer
TW400483B (en) * 1994-03-01 2000-08-01 Intel Corp High performance symmetric arbitration protocol with support for I/O requirements
US5787264A (en) * 1995-05-08 1998-07-28 Apple Computer, Inc. Method and apparatus for arbitrating access to a shared bus
US6058443A (en) * 1997-02-18 2000-05-02 Advanced Micro Devices, Inc. System for partitioning PC chipset functions into logic and port integrated circuits
US6073199A (en) * 1997-10-06 2000-06-06 Cisco Technology, Inc. History-based bus arbitration with hidden re-arbitration during wait cycles
US6195722B1 (en) * 1998-01-26 2001-02-27 Intel Corporation Method and apparatus for deferring transactions on a host bus having a third party agent
US6202112B1 (en) * 1998-12-03 2001-03-13 Intel Corporation Arbitration methods to avoid deadlock and livelock when performing transactions across a bridge
US6223244B1 (en) * 1998-12-10 2001-04-24 International Business Machines Corporation Method for assuring device access to a bus having a fixed priority arbitration scheme
US6253270B1 (en) * 1998-12-30 2001-06-26 Intel Corporation Method and apparatus for arbitrating ownership of an interface between hub agents
US6347351B1 (en) * 1999-11-03 2002-02-12 Intel Corporation Method and apparatus for supporting multi-clock propagation in a computer system having a point to point half duplex interconnect

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI399650B (zh) * 2005-02-24 2013-06-21 Qualcomm Inc 於每一週期中藉由較高頻率仲裁器之複數匯流排仲裁之系統及在一以一匯流排頻率操作之匯流排中仲裁多個匯流排處理請求的方法
US7945719B2 (en) 2006-09-20 2011-05-17 Intel Corporation Controller link for manageability engine
TWI637269B (zh) * 2017-12-26 2018-10-01 奇景光電股份有限公司 電子裝置及其操作方法

Also Published As

Publication number Publication date
JP4583590B2 (ja) 2010-11-17
DE10061770A1 (de) 2001-08-09
US20010004749A1 (en) 2001-06-21
DE10061770B4 (de) 2007-11-08
US6721833B2 (en) 2004-04-13
JP2001216254A (ja) 2001-08-10

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