TW447050B - Correction of metal damascene wiring topography using oxide fill and selective oxide chemical mechanical polishing with polish-stop layer - Google Patents

Correction of metal damascene wiring topography using oxide fill and selective oxide chemical mechanical polishing with polish-stop layer Download PDF

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Publication number
TW447050B
TW447050B TW089105378A TW89105378A TW447050B TW 447050 B TW447050 B TW 447050B TW 089105378 A TW089105378 A TW 089105378A TW 89105378 A TW89105378 A TW 89105378A TW 447050 B TW447050 B TW 447050B
Authority
TW
Taiwan
Prior art keywords
layer
grinding
item
scope
patent application
Prior art date
Application number
TW089105378A
Other languages
English (en)
Chinese (zh)
Inventor
Susan G Bombardier
Eric J White
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Application granted granted Critical
Publication of TW447050B publication Critical patent/TW447050B/zh

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76819—Smoothing of the dielectric
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/31051—Planarisation of the insulating layers
    • H01L21/31053—Planarisation of the insulating layers involving a dielectric removal step
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
TW089105378A 1999-05-14 2000-03-23 Correction of metal damascene wiring topography using oxide fill and selective oxide chemical mechanical polishing with polish-stop layer TW447050B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US31356499A 1999-05-14 1999-05-14

Publications (1)

Publication Number Publication Date
TW447050B true TW447050B (en) 2001-07-21

Family

ID=23216243

Family Applications (1)

Application Number Title Priority Date Filing Date
TW089105378A TW447050B (en) 1999-05-14 2000-03-23 Correction of metal damascene wiring topography using oxide fill and selective oxide chemical mechanical polishing with polish-stop layer

Country Status (4)

Country Link
JP (1) JP2000357674A (ja)
KR (1) KR100368082B1 (ja)
CN (1) CN1168123C (ja)
TW (1) TW447050B (ja)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7132363B2 (en) * 2001-03-27 2006-11-07 Advanced Micro Devices, Inc. Stabilizing fluorine etching of low-k materials
JP2003059874A (ja) * 2001-08-10 2003-02-28 Hitachi Chem Co Ltd 基板の研磨方法
KR100664806B1 (ko) * 2005-09-13 2007-01-04 동부일렉트로닉스 주식회사 반도체 소자의 제조 방법
CN101459044B (zh) * 2007-12-13 2010-06-09 中芯国际集成电路制造(上海)有限公司 化学机械抛光中凹陷现象检测单元、制作方法及检测方法

Also Published As

Publication number Publication date
CN1274171A (zh) 2000-11-22
JP2000357674A (ja) 2000-12-26
KR100368082B1 (ko) 2003-01-15
KR20000077137A (ko) 2000-12-26
CN1168123C (zh) 2004-09-22

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GD4A Issue of patent certificate for granted invention patent
MM4A Annulment or lapse of patent due to non-payment of fees