TW393744B - A semicondutor packaging - Google Patents

A semicondutor packaging Download PDF

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Publication number
TW393744B
TW393744B TW087118651A TW87118651A TW393744B TW 393744 B TW393744 B TW 393744B TW 087118651 A TW087118651 A TW 087118651A TW 87118651 A TW87118651 A TW 87118651A TW 393744 B TW393744 B TW 393744B
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TW
Taiwan
Prior art keywords
horizontal plane
chip
level
wafer
substrate
Prior art date
Application number
TW087118651A
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English (en)
Inventor
Jian-Ping Huang
Jeng-Yuan Lai
Ruei-Meng Rau
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Siliconware Precision Industries Co Ltd
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Publication date
Application filed by Siliconware Precision Industries Co Ltd filed Critical Siliconware Precision Industries Co Ltd
Priority to TW087118651A priority Critical patent/TW393744B/zh
Priority to US09/382,742 priority patent/US6114752A/en
Application granted granted Critical
Publication of TW393744B publication Critical patent/TW393744B/zh

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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49503—Lead-frames or other flat leads characterised by the die pad
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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Description

經濟，邵中央標準局負工消費合作社印繁 1 A7 B7 五、發明説明（！） 發明領域 本發明係關於一種用於半導體封裝件，尤指一種具有 導線架以供晶片接著其上並具有散熱片之功效以提供晶片 散熱之直接途徑的半導體封裝件。 發明背景 隨著積體電路晶片上設有之如電晶體，電阻及電容等 電子元件數量的增加，積體電路晶片於運作時產生之熱量 即隨而大增，如何有效逸散積體電路晶片於運作時所產生 之熱量遂成爲半導體封裝業者在結構設計上的一大課題。 爲解決散熱問題，目前業者多係在半導體封裝件中加設一 散熱片（Heat Sink或Heat Slug),使該散熱片靠近或接抵至 積體電路晶片上，且令散熱片之一面外露出半導體封裝件， 以提供晶片產生之熱量由散熱片之傳遞而逸散至外界的途 徑。然而，散熱片之加裝會造成製程的增加，額外設備的 需要，以及製造成本的提高，同時，散熱片與晶片間易形 成有氣泡（Voids),使在烘烤步驟中之高溫環境下，往往有 因氣泡的存在而發生爆裂（Popcorn Crack)的現象。 由於加設散熱片於半導體封裝件中有上述之諸多缺點， 美國專利第5, 594, 23 4號案遂提出一種導線架以取代散熱 片之使用。該第5, 594, 234號之美國專利所揭示之導線架 10係示於第6(A)至6(C)圖，該導線架10係由位於第一水 平面A之導腳（Leadframe Leads)ll,位於低於該第一水平 面A之第二水平面B上之晶片座（Die Pad)12，以及連設於 該晶片座12邊緣並向上延伸之翼片14，15，17及18所構 本紙張尺度適用中國國家標率（CNS)A4^^ ( 2丨0Χ 297公;) 15645 (請先閱讀背面之注意事項再填寫本頁)
、1T 經濟部中央標準局員工消費合作社印聚 A7 H7 五、發明説明（2 ) 成。該晶片座12係供晶片30附著其上，且晶片座12之底 面12a在封裝完成後係外露出封裝膠體31，使該晶片30 所產生之熱量得藉該晶片座12向外界逸散。該種導線架1〇 之使用雖可免除散熱片之需要，惟晶片30係與晶片座12 完全密接，遂會因兩者接合之面積大，且兩者之熱膨脹係 數不同，而在高低溫交互出現之封裝製程中發生熱應力現 象，造成晶片30與晶片座12之接合面因有應力殘留而產 生脫層（Delamination)的問題，同時，由第6(A)圖可淸楚得 知，該晶片座12角端上位於兩相鄰翼片（如14及17)間之 部位具有縫隙，該縫隙之存在，會因晶片座12之底面12a 外露出封裝膠體31，而提供水氣浸入之通道，且因該水氣 侵入之通道甚短，故設有該導線架10之半導體封裝件在 表面黏著（SMT)之錫爐作業時，便易因高溫引發入侵水氣 之蒸發膨脹，而導致半導體封裝件產生龜裂（Crack)現象。 發明之槪沭 本發明之一目的即在提供一種能降低晶片與晶片座附 著區域發生脫層現象之機率的半導體封裝件。 本發明之另一目的在提供一種能避免水氣入侵而得避 免龜裂現象發生的半導體封裝件。 本發明之再一目的在提供一種毋須使用散熱片而仍具 有良好散熱率之半導體封裝件。 本發明之又一目的在提供一種晶片所產生之熱量得藉 由晶片座直接逸散至大氣中之半導體封裝件。 本發明之再一目的在提供一種得利用既有設備與製程 ---—---人-裝-------訂------Γ沐 > . (請先間讀背面之注意事項再填筠本頁) 本紙張尺度適用中國國家標準（CNS ) Λ4ΜΙ枯（210X297公筇） 2 15645 經濟部中央標準局負工消费合作社印製 A7 __H7 五、發明説明（3 ) 製成而無額外成本產生的半導體封裝件。 依據本發明上揭及其他目的所提供之半導體封裝件係 包括： 晶片； 供該晶片附著並與該晶片導電連接之導線架；以及包 覆該晶片與導線架之部份的封裝膠體；其中，該導線架係 具有： 多數位於第一水平面上之導腳； 位於與該第一水平面具有高度差之第二水平面上之晶 片座，以供該晶片附著其上，並在該晶片座爲晶片所附著 之區域內形成有至少一開孔，使該晶片部份附著於該晶片 座上，另一部份則裸露於該開孔中；以及 位於與該第二水平面具有高度差之第三水平面上之基 板，使該基板對應於該開孔並在其至少一對相向之側邊上 設有連接部以與該晶片座接連，且該第一水平面至第三水 平面之距離係設爲該導線架爲封裝膠體包覆後，該基板之 底面得外露出該封裝膠體外。 該第二水平面得低於或高於該第一水平面。當該第二 水平面低於第一水平面時，該第三水平面亦低於第二水平 面；反之，當該第二水平面高於第一水平面時，該第三水 平面亦高於第二水平面。 該開孔之總投影面積得大於或等於該基板之面積，並 無特定限制》 圖式簡單說明 (諳先閱讀背面之注意事項再填寫本頁)
本紙張尺度適用中國國家標準（CNS ) Λ4^格（210X297公筇） 3 15645 A 7 H7 五、發明説明（4 ) 第1圖係本發明第一實施例之導線架之正視圖； 第2圖係第1圖沿2-2線之剖面圖； 第3圖係本發明第一實施例之導線架設於半導體封裝 件中之剖面示意圖； 第4圖係本發明第二實施例之導線架設於半導體封裝 件中之剖面示意圖； 第5圖係本發明第三實施例之導線架之正視圖； 第6(A)圖係設有習用導線架之半導體封裝件之正視 圖； 第6(B)圖係第6(A)圖沿6(B)-6(B)線之剖面圖；以及 第6(C)圖係第6(A)圖沿6(C)-6(C)線之剖面圖。 官施例 經濟部中央標準局貝工消費合作社印裝 (請先閱讀背而之注意事項再填寫本頁) 如第1及2圖所示，本發明第一實施例所用之導線架 4係由多數位於第一水平面40之導腳41，位於第二水平面 42之晶片座43,以及位於第三水平面44之基板45所構成， 其中，該第二水平面42係低於第一水平面40，第三水平 面44低於第二水平面42，且該基板45係以設於相對側邊 450，452上之連接部454，455連接至該晶片座43上。同 時，該晶片座43之中間部位並開設有一方形開孔430，使 該方形開孔43 0之投影面積大於基板45之面積；且該晶片 座43鄰接該開孔43 0之部位，係形成晶片附著區域431 (如 第1圖虛線所框示之區域），以供晶片5附著其上，如第3 圖所示，由於晶片5之底面50僅有小部份面積與晶片座43 之晶片附著區域431接著，而晶片5之大部份面積得以裸 15645 4 本紙張尺度適用中國國家標準（CNS ) A4Tm ( 210Χ29^："Ηη 經濟部中央標準局負工消费合作社印聚 A7 B7 _ 五、發明説明（5 ) 露於該開孔43 0中，故使晶片5與晶片座43間之黏著處發 生脫層現象之可能性大幅降低。 如第3圖所示，晶片5以銀膠6附著至該晶片座43之 晶片附著區域431後，係以銲接至晶片5上之金線8與導 腳41之內導腳410導電地連接，接而以封裝樹脂包覆該晶 片5，內導腳410，及部份基板45，使基板45之底面458 得外露出由封裝樹脂固化成形之封裝膠體9，晶片5產生 之熱量遂得由晶片座43而基板45之途徑逸散至大氣中；因 而，本發明第一實施例之導線架4之深度，即大致相當於 第一水平面40至第三水平面44間之距離，須足以在封裝 完成後，該基板45之底面45 8得外露出封裝膠體9»同時， 晶片5係爲封裝膠體9所妥適包覆，其與導線架4之附著 部位亦不會直接與外界接觸，故在水氣入侵之路徑甚長的 情況下，入侵水氣因受熱蒸發膨脹而導致所製成半導體封 裝件發生龜裂的可能性遂得降低。 如第4圖所示者爲本發明第二實施例，其結構與前述 之第一實施例大致相同。其不同處在於該導線架4a之第 —水平面40a係低於第二水平面42a，而第二水平面42a 低於第三水平面44a，使晶片座43 a位於導腳41a之上方， 而基板45a位於晶片座43a之上方，故在以封裝樹脂包覆 導線架4a及晶片5a後，該基板45a之頂面459a係外露於 封裝膠體9外，換言之，該第二實施例之結構恰與第一實 施例所述者呈上下倒置之狀況。 如第5圖所示者爲本發明之第三實施例，其結構大致 本紙張尺度適用中國國家標準（CNS ) Λ4規格（210X297公H ~ 5 15645 (諳先閱讀背面之注意事項再填ϊ?τ本頁) 裝- *1Τ -Λ A7 H7 五、發明説明（6 ) 上係同於前述之第一實施例。其不同處在於該基板45b之 四側邊450b, 451b，452b及453b均連設有連接部454b，455b, 45 6b及457b，以藉之將基板45b連接至晶片座43b上。爲 使封裝樹脂得流入並充滿位於晶片座43b開孔430b至基 板45b間之空間，各連接部454b，455b，456b及457b彼此 間均不連結以形成供封裝樹脂流入之通道，同時，各連接 部454b, 455b，456b及457b上亦可開設有流通孔（未圖示） 以做爲封裝樹脂流通之孔道。 以上所述者，僅爲用以例釋本發明之特點及功效的部 份具體實施例，並非用以限制本發明之可實施範疇，舉凡 一切未背離本發明掲示之精神與原理下所完成之等效改變 或修飾，均應仍爲下述之專利範圍所涵蓋》 圖式符號說明 (請先閲讀背而之注意事項再填寫本頁) 經濟部中央標準局員工消费合作社印裝 4, 4a, 4b 導線架 5, 5a 晶片 6 銀膠 8 金線 9 封裝膠體 10 導線架 11 導線 12 晶片座 12a 底面 14, 15, 17, 18 翼片 30 晶片 本紙張尺度適用中國國家標準（CNS ) Λ4^彳Μ 210X297^^ , 6 15645 五、發明説明（7 ) A1 H7 經濟部中央標準局員工消費合作社印¾ 3 1 封裝膠體 40， 40a 第一水平面 41， 41a 導腳 42, 42a 第二水平面 43, 43a, 43b 晶片座 44, 44a 第三水平面 45, 45a, 45b 基板 50 底面 410 內導腳 430, 430b 開孔 431 晶片附著區域 450, 450b 側邊 451b, 452, 452b 側邊 453b 側邊 454, 454b 連接部 455, 455b 連接部 456b, 457b 連接部 458 底面 459a 頂面 A 第一水平面 B 第二水平面 (請先閱讀背面之注意事項再填寫本頁) 裝.
*1T 本紙張尺度適用中國國家標準（CNS )八4岘梢（210X297公疗） 7 15645

Claims (1)

  1. 393744 A8 B8 C8 D8 六、申請專利範圍 1. 一種用於半導體封裝件，係包栝： 晶片； (請先閱讀背面之注意事項再填寫本頁) 供該晶片附著與該晶片導電連接之導線架；以及 包覆該晶片與導線架之部份的封裝膠體；其中該心線 架係具有： 多數位於第一水平面上之導腳；‘ 位於與該第一水平面具有高度差之第二水平面上 之晶片座，以供該晶片附著其上，並在該晶片座爲晶片 所附著之區域內形成有至少一開孔，使該晶片一部份 附著於該晶片座上，另一部份則裸筚於該開孔中；以及 位於與該第二水平面具有高度差之第三水平面上 之基板，使該基板對應於該開孔並在其至少一對相向 之側邊上設有連接部以與該晶片座連接，且該第一水 平面至該第三水平面之距離係設爲該導線架爲封裝膝 體包覆後，該基板之底面得外露出該封裝膠體外。 2. 如申請專利範圍第1項之半導體封裝件，其中，該第二 水平面低於第一水平面時，該第三水平面亦低於第二 水平面。 經濟部中央標準局貝工消費合作社印製 3. 如申請專利範圍第1項之半導體封裝件，其中，該第二 水平面高於第一水平面時，該第三水平面亦高於第二 水平面。 4. 如申請專利範圍第1項之半導體封裝件，其中，該基板 得以連設於其各側邊上之連接部與該晶片座連接，且 任兩相鄰之連接部間形成有可供封裝樹脂流經之流通 15645 8 本紙張尺度逋用中國國家標準（CNS ) Λ4規格（210><29·?公缝） 393744 纟88 C8 D8 六、申請專利範圍 孔。 5.如申請專利範圍第4項之半導體封裝件，其中，該流通 孔 該 中 其 件 0 裝積 封面 體之. 。 導板 上半基 部之該 接項於 連 1 小 該第不 各圍係 於範積 設利面 開專影 可請投 復申總 孔如之 : { S ^^1 m ^^^1 ULr ^^^1 nn i ^^^1 ml nn In I 、mi 姿 - i h. (請先閱讀背面之注意事項再填寫本頁) 經濟部中央標準局員工消費合作社印製 本紙張尺度適用中國國家標準（CNS ) Λ4規格（210 X 297公釐） 9 15645
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