TW379305B - Two-type command length code processor and command code input device - Google Patents

Two-type command length code processor and command code input device Download PDF

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Publication number
TW379305B
TW379305B TW085114619A TW85114619A TW379305B TW 379305 B TW379305 B TW 379305B TW 085114619 A TW085114619 A TW 085114619A TW 85114619 A TW85114619 A TW 85114619A TW 379305 B TW379305 B TW 379305B
Authority
TW
Taiwan
Prior art keywords
instruction
code
bit
length
processor
Prior art date
Application number
TW085114619A
Other languages
English (en)
Chinese (zh)
Inventor
Sugako Ootani
Shunichi Iwata
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Application granted granted Critical
Publication of TW379305B publication Critical patent/TW379305B/zh

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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3005—Arrangements for executing specific machine instructions to perform operations for flow control
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/30149—Instruction analysis, e.g. decoding, instruction word fields of variable length instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/30149—Instruction analysis, e.g. decoding, instruction word fields of variable length instructions
    • G06F9/30152—Determining start or end of instruction; determining instruction length
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/3016—Decoding the operand specifier, e.g. specifier format
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/3016—Decoding the operand specifier, e.g. specifier format
    • G06F9/30167—Decoding the operand specifier, e.g. specifier format of immediate specifier, e.g. constants
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181—Instruction operation extension or modification
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/322—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)
TW085114619A 1996-09-13 1996-11-26 Two-type command length code processor and command code input device TW379305B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24337596A JP3658101B2 (ja) 1996-09-13 1996-09-13 データ処理装置

Publications (1)

Publication Number Publication Date
TW379305B true TW379305B (en) 2000-01-11

Family

ID=17102923

Family Applications (1)

Application Number Title Priority Date Filing Date
TW085114619A TW379305B (en) 1996-09-13 1996-11-26 Two-type command length code processor and command code input device

Country Status (5)

Country Link
US (2) US6463520B1 (enExample)
JP (1) JP3658101B2 (enExample)
KR (1) KR100260353B1 (enExample)
CN (1) CN1095116C (enExample)
TW (1) TW379305B (enExample)

Families Citing this family (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3490007B2 (ja) * 1998-12-17 2004-01-26 富士通株式会社 命令制御装置
EP1050801B1 (en) * 1999-05-03 2006-12-13 STMicroelectronics S.A. An instruction supply mechanism
EP1050798A1 (en) * 1999-05-03 2000-11-08 STMicroelectronics SA Decoding instructions
US20020144235A1 (en) * 2001-03-30 2002-10-03 Charles Simmers Debugging embedded systems
DE10120522A1 (de) * 2001-04-26 2002-11-07 Infineon Technologies Ag Verfahren zum Erkennen einer korrekten Befehls-Einsprung-Adresse bei Verwendung unterschiedlich langer Befehlsworte
US7493470B1 (en) 2001-12-07 2009-02-17 Arc International, Plc Processor apparatus and methods optimized for control applications
US7278137B1 (en) * 2001-12-26 2007-10-02 Arc International Methods and apparatus for compiling instructions for a data processor
EP1470476A4 (en) * 2002-01-31 2007-05-30 Arc Int CONFIGURABLE DATA PROCESSOR WITH MULTI-LENGTH INSTRUCTION KIT ARCHITECTURE
DE10204038B4 (de) * 2002-02-01 2005-03-03 Infineon Technologies Ag Verfahren zum Erkennen einer korrekten Befehls-Einsprung-Adresse bei Verwendung unterschiedlich langer Befehlsworte
GB2393270B (en) 2002-09-19 2005-07-27 Advanced Risc Mach Ltd Executing variable length instructions stored within a plurality of discrete memory address regions
TWI230899B (en) * 2003-03-10 2005-04-11 Sunplus Technology Co Ltd Processor and method using parity check to proceed command mode switch
CN100595731C (zh) * 2003-03-21 2010-03-24 凌阳科技股份有限公司 利用同位检查以进行指令模式切换的处理器及方法
DE102004004561B4 (de) * 2004-01-29 2006-09-14 Infineon Technologies Ag Mikroprozessor mit einer energieeinsparenden Hol- und Dekodiereinheit zum Holen und Decodieren von komprimierten Programmbefehlen und mit einer Programmbefehlsfolgesteuerung
US8006071B2 (en) * 2004-03-31 2011-08-23 Altera Corporation Processors operable to allow flexible instruction alignment
US20060174089A1 (en) * 2005-02-01 2006-08-03 International Business Machines Corporation Method and apparatus for embedding wide instruction words in a fixed-length instruction set architecture
US7526633B2 (en) * 2005-03-23 2009-04-28 Qualcomm Incorporated Method and system for encoding variable length packets with variable instruction sizes
US7581082B2 (en) * 2005-05-13 2009-08-25 Texas Instruments Incorporated Software source transfer selects instruction word sizes
US8325768B2 (en) 2005-08-24 2012-12-04 Intel Corporation Interleaving data packets in a packet-based communication system
CN100346291C (zh) * 2005-12-02 2007-10-31 浙江大学 多地址空间的块传输指令的控制方法及其装置
US7908463B2 (en) * 2007-06-26 2011-03-15 Globalfoundries Inc. Immediate and displacement extraction and decode mechanism
CN101344840B (zh) * 2007-07-10 2011-08-31 苏州简约纳电子有限公司 一种微处理器及在微处理器中执行指令的方法
TW200910195A (en) 2007-08-20 2009-03-01 Sunplus Technology Co Ltd A device of using serial bits to determine instruction length at a multi-mode processor and the method thereof
CN101377735B (zh) * 2007-08-28 2011-09-28 凌阳科技股份有限公司 于多模处理器中以串行位决定指令长度的装置及方法
CN101482809B (zh) * 2008-01-11 2011-10-26 凌阳科技股份有限公司 在多模处理器中用指令终止位决定指令长度的装置及方法
US7849243B2 (en) * 2008-01-23 2010-12-07 Intel Corporation Enabling flexibility of packet length in a communication protocol
CN101833437B (zh) * 2009-05-19 2013-06-26 威盛电子股份有限公司 适用于微处理器的装置及方法
US10055227B2 (en) * 2012-02-07 2018-08-21 Qualcomm Incorporated Using the least significant bits of a called function's address to switch processor modes
GB2501299A (en) 2012-04-19 2013-10-23 Ibm Analysing computer program instructions to determine if an instruction can be replaced with a trap or break point.
US9223714B2 (en) 2013-03-15 2015-12-29 Intel Corporation Instruction boundary prediction for variable length instruction set
US11204768B2 (en) 2019-11-06 2021-12-21 Onnivation Llc Instruction length based parallel instruction demarcator
US20230342152A1 (en) * 2020-09-09 2023-10-26 Ascenium, Inc. Parallel processing architecture with split control word caches
US11775305B2 (en) * 2021-12-23 2023-10-03 Arm Limited Speculative usage of parallel decode units

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3678467A (en) * 1970-10-20 1972-07-18 Bell Telephone Labor Inc Multiprocessor with cooperative program execution
US4447878A (en) * 1978-05-30 1984-05-08 Intel Corporation Apparatus and method for providing byte and word compatible information transfers
US4408271A (en) * 1979-01-02 1983-10-04 Honeywell Information Systems Inc. Circuit for implementing a digital computer instruction
US4250548A (en) * 1979-01-02 1981-02-10 Honeywell Information Systems Inc. Computer apparatus
JPS5856164A (ja) * 1981-09-30 1983-04-02 Toshiba Corp デ−タ処理装置
JP2635057B2 (ja) 1987-11-04 1997-07-30 株式会社日立製作所 マイクロプロセッサ
JPH0415826A (ja) 1990-05-08 1992-01-21 Rohm Co Ltd ワンチップマイクロコンピュータ
US5452423A (en) 1991-06-13 1995-09-19 Chips And Technologies, Inc. Two-ROM multibyte microcode address selection method and apparatus
JPH05313894A (ja) 1992-05-11 1993-11-26 Fuji Xerox Co Ltd 情報処理装置
JPH06119253A (ja) * 1992-10-02 1994-04-28 Toshiba Corp 二重化メモリ制御装置

Also Published As

Publication number Publication date
JPH1091435A (ja) 1998-04-10
JP3658101B2 (ja) 2005-06-08
KR100260353B1 (ko) 2000-07-01
CN1095116C (zh) 2002-11-27
KR19980023918A (ko) 1998-07-06
US6209079B1 (en) 2001-03-27
CN1177140A (zh) 1998-03-25
US6463520B1 (en) 2002-10-08

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