TW373328B - Method to produce an electronic writable and erasable read-only-memory cell arrangement - Google Patents
Method to produce an electronic writable and erasable read-only-memory cell arrangementInfo
- Publication number
- TW373328B TW373328B TW086116333A TW86116333A TW373328B TW 373328 B TW373328 B TW 373328B TW 086116333 A TW086116333 A TW 086116333A TW 86116333 A TW86116333 A TW 86116333A TW 373328 B TW373328 B TW 373328B
- Authority
- TW
- Taiwan
- Prior art keywords
- memory
- cell
- memory cell
- cell arrangement
- produce
- Prior art date
Links
- 238000000034 method Methods 0.000 title abstract 2
- 230000008878 coupling Effects 0.000 abstract 1
- 238000010168 coupling process Methods 0.000 abstract 1
- 238000005859 coupling reaction Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8221—Three dimensional integrated circuits stacked in different levels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Non-Volatile Memory (AREA)
- Semiconductor Memories (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19646419A DE19646419C1 (de) | 1996-11-11 | 1996-11-11 | Verfahren zur Herstellung einer elektrisch schreib- und löschbaren Festwertspeicherzellenanordnung |
Publications (1)
Publication Number | Publication Date |
---|---|
TW373328B true TW373328B (en) | 1999-11-01 |
Family
ID=7811228
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW086116333A TW373328B (en) | 1996-11-11 | 1997-11-04 | Method to produce an electronic writable and erasable read-only-memory cell arrangement |
Country Status (6)
Country | Link |
---|---|
US (1) | US5882969A (zh) |
EP (1) | EP0843353A1 (zh) |
JP (1) | JPH10150174A (zh) |
KR (1) | KR19980042259A (zh) |
DE (1) | DE19646419C1 (zh) |
TW (1) | TW373328B (zh) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0396786B1 (de) * | 1989-05-08 | 1994-01-26 | Siemens Aktiengesellschaft | Integrierbarer Sigma-Delta-Modulator in Switched-Capacitor-Technik |
DE19603810C1 (de) * | 1996-02-02 | 1997-08-28 | Siemens Ag | Speicherzellenanordnung und Verfahren zu deren Herstellung |
US6326263B1 (en) * | 2000-08-11 | 2001-12-04 | United Microelectronics Corp. | Method of fabricating a flash memory cell |
GB0101695D0 (en) * | 2001-01-23 | 2001-03-07 | Koninkl Philips Electronics Nv | Manufacture of trench-gate semiconductor devices |
US6599813B2 (en) * | 2001-06-29 | 2003-07-29 | International Business Machines Corporation | Method of forming shallow trench isolation for thin silicon-on-insulator substrates |
TW527652B (en) * | 2002-02-06 | 2003-04-11 | Taiwan Semiconductor Mfg | Manufacturing method of selection gate for the split gate flash memory cell and its structure |
DE10220923B4 (de) * | 2002-05-10 | 2006-10-26 | Infineon Technologies Ag | Verfahren zur Herstellung eines nicht-flüchtigen Flash-Halbleiterspeichers |
KR101044773B1 (ko) * | 2003-07-16 | 2011-06-27 | 매그나칩 반도체 유한회사 | 증가된 채널 폭을 갖는 mos 트랜지스터 및 제조 방법 |
KR101004814B1 (ko) * | 2003-10-22 | 2011-01-04 | 매그나칩 반도체 유한회사 | 비휘발성 메모리 소자의 제조 방법 |
TWI701770B (zh) * | 2018-07-24 | 2020-08-11 | 華邦電子股份有限公司 | 非揮發性記憶體裝置及其製造方法 |
CN110828465B (zh) * | 2018-08-10 | 2023-04-07 | 华邦电子股份有限公司 | 非易失性存储器装置及其制造方法 |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07254651A (ja) * | 1994-03-16 | 1995-10-03 | Toshiba Corp | 半導体集積回路装置 |
US5498560A (en) * | 1994-09-16 | 1996-03-12 | Motorola, Inc. | Process for forming an electrically programmable read-only memory cell |
-
1996
- 1996-11-11 DE DE19646419A patent/DE19646419C1/de not_active Expired - Fee Related
-
1997
- 1997-10-31 EP EP97119060A patent/EP0843353A1/de not_active Withdrawn
- 1997-11-04 TW TW086116333A patent/TW373328B/zh active
- 1997-11-05 JP JP9317737A patent/JPH10150174A/ja active Pending
- 1997-11-11 US US08/967,419 patent/US5882969A/en not_active Expired - Fee Related
- 1997-11-11 KR KR1019970059125A patent/KR19980042259A/ko active IP Right Grant
Also Published As
Publication number | Publication date |
---|---|
US5882969A (en) | 1999-03-16 |
KR19980042259A (ko) | 1998-08-17 |
EP0843353A1 (de) | 1998-05-20 |
JPH10150174A (ja) | 1998-06-02 |
DE19646419C1 (de) | 1998-04-30 |
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