TW371762B - A semiconductor memory device for reducing a static current - Google Patents

A semiconductor memory device for reducing a static current

Info

Publication number
TW371762B
TW371762B TW086107222A TW86107222A TW371762B TW 371762 B TW371762 B TW 371762B TW 086107222 A TW086107222 A TW 086107222A TW 86107222 A TW86107222 A TW 86107222A TW 371762 B TW371762 B TW 371762B
Authority
TW
Taiwan
Prior art keywords
pull
bit
static current
reducing
semiconductor memory
Prior art date
Application number
TW086107222A
Other languages
English (en)
Inventor
Yong-Chul Cho
Original Assignee
Hyundai Electronics Ind
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hyundai Electronics Ind filed Critical Hyundai Electronics Ind
Application granted granted Critical
Publication of TW371762B publication Critical patent/TW371762B/zh

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G11C11/419Read-write [R-W] circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
TW086107222A 1996-06-27 1997-05-28 A semiconductor memory device for reducing a static current TW371762B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019960024655A KR100206411B1 (ko) 1996-06-27 1996-06-27 정적전류 감소를 위한 반도체 메모리 장치

Publications (1)

Publication Number Publication Date
TW371762B true TW371762B (en) 1999-10-11

Family

ID=19463978

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086107222A TW371762B (en) 1996-06-27 1997-05-28 A semiconductor memory device for reducing a static current

Country Status (4)

Country Link
US (1) US5831911A (zh)
JP (1) JPH1064272A (zh)
KR (1) KR100206411B1 (zh)
TW (1) TW371762B (zh)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100569713B1 (ko) * 1998-10-21 2006-09-18 삼성전자주식회사 듀얼 스캔 방식에서 소비 전력을 감소시키는 회로
KR100365425B1 (ko) * 1999-06-28 2002-12-18 주식회사 하이닉스반도체 정적 전류를 줄이고 고속 동작이 가능한 레퍼런스 신호 발생 회로
US7113433B2 (en) * 2005-02-09 2006-09-26 International Business Machines Corporation Local bit select with suppression of fast read before write

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06215576A (ja) * 1993-01-18 1994-08-05 Mitsubishi Electric Corp 半導体記憶装置
US5574695A (en) * 1994-03-04 1996-11-12 Kabushiki Kaisha Toshiba Semiconductor memory device with bit line load circuit for high speed operation
KR0144402B1 (ko) * 1994-12-30 1998-08-17 김주용 동작전류 소모를 줄인 반도체 메모리 소자
KR0147712B1 (ko) * 1995-06-30 1998-11-02 김주용 에스램의 저전압 동작용 비트 라인 회로

Also Published As

Publication number Publication date
US5831911A (en) 1998-11-03
JPH1064272A (ja) 1998-03-06
KR980004994A (ko) 1998-03-30
KR100206411B1 (ko) 1999-07-01

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees