TW358180B - A method and apparatus for providing concurrent access by a plurality of agents to a shared memory - Google Patents

A method and apparatus for providing concurrent access by a plurality of agents to a shared memory

Info

Publication number
TW358180B
TW358180B TW086108862A TW86108862A TW358180B TW 358180 B TW358180 B TW 358180B TW 086108862 A TW086108862 A TW 086108862A TW 86108862 A TW86108862 A TW 86108862A TW 358180 B TW358180 B TW 358180B
Authority
TW
Taiwan
Prior art keywords
memory
shared
controller
access
graphics
Prior art date
Application number
TW086108862A
Other languages
English (en)
Inventor
Manish Muthal
Nilesh V Shah
Kuljit Bains
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Application granted granted Critical
Publication of TW358180B publication Critical patent/TW358180B/zh

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/167—Interprocessor communication using a common memory, e.g. mailbox
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/1647—Handling requests for interconnection or transfer for access to memory bus based on arbitration with interleaved bank access

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Multi Processors (AREA)
  • Dram (AREA)
TW086108862A 1996-06-27 1997-06-25 A method and apparatus for providing concurrent access by a plurality of agents to a shared memory TW358180B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/672,099 US5815167A (en) 1996-06-27 1996-06-27 Method and apparatus for providing concurrent access by a plurality of agents to a shared memory

Publications (1)

Publication Number Publication Date
TW358180B true TW358180B (en) 1999-05-11

Family

ID=24697142

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086108862A TW358180B (en) 1996-06-27 1997-06-25 A method and apparatus for providing concurrent access by a plurality of agents to a shared memory

Country Status (8)

Country Link
US (1) US5815167A (zh)
EP (1) EP0972251B1 (zh)
JP (1) JP3976342B2 (zh)
KR (1) KR100317517B1 (zh)
AU (1) AU3397697A (zh)
DE (1) DE69724463T2 (zh)
TW (1) TW358180B (zh)
WO (1) WO1997050042A1 (zh)

Families Citing this family (60)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6058459A (en) * 1996-08-26 2000-05-02 Stmicroelectronics, Inc. Video/audio decompression/compression device including an arbiter and method for accessing a shared memory
TW360823B (en) * 1996-09-30 1999-06-11 Hitachi Ltd Data processor and graphic processor
US5941968A (en) * 1997-04-14 1999-08-24 Advanced Micro Devices, Inc. Computer system for concurrent data transferring between graphic controller and unified system memory and between CPU and expansion bus device
US6249853B1 (en) 1997-06-25 2001-06-19 Micron Electronics, Inc. GART and PTES defined by configuration registers
US6282625B1 (en) 1997-06-25 2001-08-28 Micron Electronics, Inc. GART and PTES defined by configuration registers
US6057862A (en) * 1997-07-01 2000-05-02 Memtrax Llc Computer system having a common display memory and main memory
US6118462A (en) 1997-07-01 2000-09-12 Memtrax Llc Computer system controller having internal memory and external memory control
JPH11120156A (ja) * 1997-10-17 1999-04-30 Nec Corp マルチプロセッサシステムにおけるデータ通信方式
US6965974B1 (en) * 1997-11-14 2005-11-15 Agere Systems Inc. Dynamic partitioning of memory banks among multiple agents
US6091431A (en) * 1997-12-18 2000-07-18 Intel Corporation Method and apparatus for improving processor to graphics device local memory performance
US6157398A (en) * 1997-12-30 2000-12-05 Micron Technology, Inc. Method of implementing an accelerated graphics port for a multiple memory controller computer system
US7071946B2 (en) * 1997-12-30 2006-07-04 Micron Technology, Inc. Accelerated graphics port for a multiple memory controller computer system
US6252612B1 (en) * 1997-12-30 2001-06-26 Micron Electronics, Inc. Accelerated graphics port for multiple memory controller computer system
US6272584B1 (en) * 1998-09-10 2001-08-07 Compaq Computer Corporation System board with consolidated EEPROM module
WO2000052564A2 (en) * 1999-03-05 2000-09-08 Amulet Technologies, Llc Graphical user interface engine for embedded systems
US6601147B1 (en) * 1999-03-31 2003-07-29 International Business Machines Corporation Computer system and method for maintaining an integrated shared buffer memory in a group of interconnected hosts
DE69919992T2 (de) * 1999-06-09 2005-01-20 Texas Instruments Inc., Dallas Verteilter Speicher mit programmierbarer Grösse
US6469703B1 (en) 1999-07-02 2002-10-22 Ati International Srl System of accessing data in a graphics system and method thereof
US6526462B1 (en) * 1999-11-19 2003-02-25 Hammam Elabd Programmable multi-tasking memory management system
US6774903B1 (en) * 2000-11-06 2004-08-10 Ati International Srl Palette anti-sparkle enhancement
US6801204B2 (en) * 2001-02-15 2004-10-05 Sony Corporation, A Japanese Corporation Checkerboard buffer using memory blocks
US7379069B2 (en) * 2001-02-15 2008-05-27 Sony Corporation Checkerboard buffer using two-dimensional buffer pages
US7038691B2 (en) * 2001-02-15 2006-05-02 Sony Corporation Two-dimensional buffer pages using memory bank alternation
US6791557B2 (en) * 2001-02-15 2004-09-14 Sony Corporation Two-dimensional buffer pages using bit-field addressing
US6795079B2 (en) * 2001-02-15 2004-09-21 Sony Corporation Two-dimensional buffer pages
US6768490B2 (en) * 2001-02-15 2004-07-27 Sony Corporation Checkerboard buffer using more than two memory devices
US7088369B2 (en) * 2001-02-15 2006-08-08 Sony Corporation Checkerboard buffer using two-dimensional buffer pages and using bit-field addressing
US6831649B2 (en) * 2001-02-15 2004-12-14 Sony Corporation Two-dimensional buffer pages using state addressing
US6850241B2 (en) * 2001-02-15 2005-02-01 Sony Corporation Swapped pixel pages
US6831650B2 (en) * 2001-02-15 2004-12-14 Sony Corporation Checkerboard buffer using sequential memory locations
US6831651B2 (en) * 2001-02-15 2004-12-14 Sony Corporation Checkerboard buffer
US6803917B2 (en) * 2001-02-15 2004-10-12 Sony Corporation Checkerboard buffer using memory bank alternation
US6765580B2 (en) * 2001-02-15 2004-07-20 Sony Corporation Pixel pages optimized for GLV
US6765579B2 (en) * 2001-02-15 2004-07-20 Sony Corporation Pixel pages using combined addressing
US6992674B2 (en) * 2001-02-15 2006-01-31 Sony Corporation Checkerboard buffer using two-dimensional buffer pages and using state addressing
US6828977B2 (en) * 2001-02-15 2004-12-07 Sony Corporation Dynamic buffer pages
US7205993B2 (en) * 2001-02-15 2007-04-17 Sony Corporation Checkerboard buffer using two-dimensional buffer pages and using memory bank alternation
US6622203B2 (en) * 2001-05-29 2003-09-16 Agilent Technologies, Inc. Embedded memory access method and system for application specific integrated circuits
IL150149A (en) * 2001-06-11 2008-08-07 Zoran Microelectronics Ltd Special memory device
US20030058368A1 (en) * 2001-09-24 2003-03-27 Mark Champion Image warping using pixel pages
US6965980B2 (en) * 2002-02-14 2005-11-15 Sony Corporation Multi-sequence burst accessing for SDRAM
US6959355B2 (en) * 2003-02-24 2005-10-25 Standard Microsystems Corporation Universal serial bus hub with shared high speed handler
US7185126B2 (en) * 2003-02-24 2007-02-27 Standard Microsystems Corporation Universal serial bus hub with shared transaction translator memory
US6874042B2 (en) * 2003-03-11 2005-03-29 Dell Products L.P. System and method for using a switch to route peripheral and graphics data on an interconnect
JP2005165592A (ja) * 2003-12-02 2005-06-23 Matsushita Electric Ind Co Ltd データ転送装置
JP2005222245A (ja) * 2004-02-04 2005-08-18 Renasas Northern Japan Semiconductor Inc プロセッサ
JP4500610B2 (ja) * 2004-07-07 2010-07-14 キヤノン株式会社 映像信号処理装置、メモリ制御方法、及びプログラム
US20060059293A1 (en) * 2004-09-14 2006-03-16 Henry Wurzburg Universal serial bus switching hub
US20060227759A1 (en) * 2004-09-14 2006-10-12 Bohm Mark R Peripheral Sharing USB Hub
US7433990B2 (en) * 2006-01-24 2008-10-07 Standard Microsystems Corporation Transferring system information via universal serial bus (USB)
US7523243B2 (en) * 2006-04-14 2009-04-21 Standard Microsystems Corporation Multi-host USB device controller
US7480753B2 (en) * 2006-04-27 2009-01-20 Standard Microsystems Corporation Switching upstream and downstream logic between ports in a universal serial bus hub
US20080005262A1 (en) * 2006-06-16 2008-01-03 Henry Wurzburg Peripheral Sharing USB Hub for a Wireless Host
KR100888427B1 (ko) * 2006-09-15 2009-03-11 엠텍비젼 주식회사 공유 메모리를 구비한 디지털 처리 장치 및 데이터 출력방법
US7949815B2 (en) * 2006-09-27 2011-05-24 Intel Corporation Virtual heterogeneous channel for message passing
US20090063717A1 (en) * 2007-08-28 2009-03-05 Bohm Mark R Rate Adaptation for Support of Full-Speed USB Transactions Over a High-Speed USB Interface
US8180975B2 (en) * 2008-02-26 2012-05-15 Microsoft Corporation Controlling interference in shared memory systems using parallelism-aware batch scheduling
KR101283482B1 (ko) * 2009-12-11 2013-07-12 한국전자통신연구원 Ｐｃｉ 익스프레스 프로토콜 처리 장치
US8397006B2 (en) * 2010-01-28 2013-03-12 Freescale Semiconductor, Inc. Arbitration scheme for accessing a shared resource
US8799532B2 (en) 2011-07-07 2014-08-05 Smsc Holdings S.A.R.L. High speed USB hub with full speed to high speed transaction translator

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5459846A (en) * 1988-12-02 1995-10-17 Hyatt; Gilbert P. Computer architecture system having an imporved memory
JPS5326539A (en) * 1976-08-25 1978-03-11 Hitachi Ltd Data exchenge system
US4980828A (en) * 1988-11-25 1990-12-25 Picker International, Inc. Medical imaging system including use of DMA control for selective bit mapping of DRAM and VRAM memories
US5450542A (en) * 1993-11-30 1995-09-12 Vlsi Technology, Inc. Bus interface with graphics and system paths for an integrated memory system
WO1995015528A1 (en) * 1993-11-30 1995-06-08 Vlsi Technology, Inc. A reallocatable memory subsystem enabling transparent transfer of memory function during upgrade

Also Published As

Publication number Publication date
JP2001523361A (ja) 2001-11-20
US5815167A (en) 1998-09-29
KR20000022251A (ko) 2000-04-25
DE69724463D1 (de) 2003-10-02
JP3976342B2 (ja) 2007-09-19
WO1997050042A1 (en) 1997-12-31
DE69724463T2 (de) 2004-07-08
EP0972251A4 (en) 2000-01-19
EP0972251A1 (en) 2000-01-19
EP0972251B1 (en) 2003-08-27
KR100317517B1 (ko) 2002-02-19
AU3397697A (en) 1998-01-14

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MM4A Annulment or lapse of patent due to non-payment of fees