TW345726B - Semiconductor chip, semiconductor device having such semiconductor chip installed therein, and method for making the semiconductor device - Google Patents

Semiconductor chip, semiconductor device having such semiconductor chip installed therein, and method for making the semiconductor device

Info

Publication number
TW345726B
TW345726B TW085108871A TW85108871A TW345726B TW 345726 B TW345726 B TW 345726B TW 085108871 A TW085108871 A TW 085108871A TW 85108871 A TW85108871 A TW 85108871A TW 345726 B TW345726 B TW 345726B
Authority
TW
Taiwan
Prior art keywords
semiconductor
semiconductor device
semiconductor chip
making
chip
Prior art date
Application number
TW085108871A
Other languages
English (en)
Inventor
Kazutaka Shibata
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=16328208&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=TW345726(B) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Application granted granted Critical
Publication of TW345726B publication Critical patent/TW345726B/zh

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
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    • H01L2224/0554External layer
    • H01L2224/0555Shape
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    • H01L2224/02Bonding areas; Manufacturing methods related thereto
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    • H01L2224/05599Material
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    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
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    • H01L2224/061Disposition
    • H01L2224/0612Layout
    • H01L2224/0615Mirror array, i.e. array having only a reflection symmetry, i.e. bilateral symmetry
    • H01L2224/06153Mirror array, i.e. array having only a reflection symmetry, i.e. bilateral symmetry with a staggered arrangement, e.g. depopulated array
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
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    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49177Combinations of different arrangements
    • H01L2224/49179Corner adaptations, i.e. disposition of the wire connectors at the corners of the semiconductor or solid-state body
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    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/494Connecting portions
    • H01L2224/4943Connecting portions the connecting portions being staggered
    • H01L2224/49431Connecting portions the connecting portions being staggered on the semiconductor or solid-state body
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
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    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
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    • H01L2924/01Chemical elements
    • H01L2924/01015Phosphorus [P]
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    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Wire Bonding (AREA)
TW085108871A 1995-07-31 1996-07-20 Semiconductor chip, semiconductor device having such semiconductor chip installed therein, and method for making the semiconductor device TW345726B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7194660A JPH0945723A (ja) 1995-07-31 1995-07-31 半導体チップおよびこの半導体チップを組み込んだ半導体装置ならびにその製造方法

Publications (1)

Publication Number Publication Date
TW345726B true TW345726B (en) 1998-11-21

Family

ID=16328208

Family Applications (1)

Application Number Title Priority Date Filing Date
TW085108871A TW345726B (en) 1995-07-31 1996-07-20 Semiconductor chip, semiconductor device having such semiconductor chip installed therein, and method for making the semiconductor device

Country Status (4)

Country Link
US (1) US5757082A (zh)
JP (1) JPH0945723A (zh)
KR (1) KR970008520A (zh)
TW (1) TW345726B (zh)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5751015A (en) * 1995-11-17 1998-05-12 Micron Technology, Inc. Semiconductor reliability test chip
JPH09312375A (ja) * 1996-03-18 1997-12-02 Hitachi Ltd リードフレーム、半導体装置及び半導体装置の製造方法
US6909179B2 (en) * 1996-03-18 2005-06-21 Renesas Technology Corp. Lead frame and semiconductor device using the lead frame and method of manufacturing the same
JPH1022299A (ja) * 1996-07-08 1998-01-23 Oki Electric Ind Co Ltd 半導体集積回路
JPH1050750A (ja) * 1996-07-30 1998-02-20 Nec Kyushu Ltd 半導体装置およびその製造方法
US6692989B2 (en) * 1999-10-20 2004-02-17 Renesas Technology Corporation Plastic molded type semiconductor device and fabrication process thereof
JP3274633B2 (ja) * 1997-09-29 2002-04-15 ローム株式会社 半導体集積回路装置
EP1077490A1 (en) * 1999-08-17 2001-02-21 Lucent Technologies Inc. Improvements in or relating to integrated circuit dies
EP1077489A1 (en) * 1999-08-17 2001-02-21 Lucent Technologies Inc. Integrated circuit die including conductive pads
KR100476925B1 (ko) * 2002-06-26 2005-03-17 삼성전자주식회사 본딩 불량과 신호 스큐를 방지하는 패드 배치를 갖는 반도체 칩
JP2005005306A (ja) * 2003-06-09 2005-01-06 Seiko Epson Corp 半導体装置、半導体モジュール、電子デバイス、電子機器および半導体モジュールの製造方法
US7872283B2 (en) 2006-11-09 2011-01-18 Panasonic Corporation Semiconductor integrated circuit and multi-chip module
JP2008166621A (ja) * 2006-12-29 2008-07-17 Sanyo Electric Co Ltd 半導体装置およびその製造方法
USD754083S1 (en) 2013-10-17 2016-04-19 Vlt, Inc. Electric terminal
JP6371582B2 (ja) * 2014-05-15 2018-08-08 ローム株式会社 パッケージ
JP1582228S (zh) * 2016-08-02 2017-07-24
US10951174B2 (en) 2016-10-24 2021-03-16 Mitsubishi Electric Corporation High-frequency amplifier
JP1664282S (zh) * 2019-07-24 2020-07-27
USD938925S1 (en) 2019-10-24 2021-12-21 Nuvoton Technology Corporation Japan Semiconductor device

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0282644A (ja) * 1988-09-20 1990-03-23 Fujitsu Ltd 半導体装置
USH1267H (en) * 1990-07-05 1993-12-07 Boyd Melissa D Integrated circuit and lead frame assembly
JPH0653266A (ja) * 1992-08-03 1994-02-25 Yamaha Corp 半導体装置

Also Published As

Publication number Publication date
JPH0945723A (ja) 1997-02-14
KR970008520A (ko) 1997-02-24
US5757082A (en) 1998-05-26

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