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Application filed by Powerchip Semiconductor CorpfiledCriticalPowerchip Semiconductor Corp
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Publication of TW333682BpublicationCriticalpatent/TW333682B/en
A method for producing IC capacitor, it includes: Form 1st dielectric layer on semiconductor substrate. Form contact hole inside 1st dielectric. Form 1st conductive on 1st dielectric layer to fill back the contact hole. Form 2nd dielectric on 1st conductive layer. Form Si layer on 2nd dielectric layer. Etch Si layer to separate Si layer to form HSG-Si. Use HSG-Si as etching mask to etch 2nd dielectric to form pillars dielectric. Use pillars dielectric as etching mask to etch 1st conductive layer, and during the etching step, the HSG-Si will be removed. Form 2nd conductive layer on top of 1st conductive layer and pillars dielectric. Use anisotropically etching to etch 2nd conductive layer, to form conductive sidewall spacers at sidewall of pillar dielectric. Remove pillars dielectric to form multi-crown structure. Form 3rd dielectric on multi-crown structure. Form 3rd conductive layer on 3rd dielectric layer.
TW086106214A1997-05-091997-05-09The method for producing multi-crown capacitor of DRAM memory cell
TW333682B
(en)