TW329547B - The manufacturing method for cylindrical capacitor in memory cell of DRAM - Google Patents

The manufacturing method for cylindrical capacitor in memory cell of DRAM

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Publication number
TW329547B
TW329547B TW086100950A TW86100950A TW329547B TW 329547 B TW329547 B TW 329547B TW 086100950 A TW086100950 A TW 086100950A TW 86100950 A TW86100950 A TW 86100950A TW 329547 B TW329547 B TW 329547B
Authority
TW
Taiwan
Prior art keywords
oxide
conductor
manufacturing
cylindrical capacitor
memory cell
Prior art date
Application number
TW086100950A
Other languages
Chinese (zh)
Inventor
Huey-Ju Hwang
Tzyh-Horng Wang
Original Assignee
Taiwan Semiconductor Mfg Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiwan Semiconductor Mfg Co Ltd filed Critical Taiwan Semiconductor Mfg Co Ltd
Priority to TW086100950A priority Critical patent/TW329547B/en
Application granted granted Critical
Publication of TW329547B publication Critical patent/TW329547B/en

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Abstract

A manufacturing method for cylindrical capacitor in memory cell of DRAM includes the following steps: (a) Provide a substrate, which has already formed MOS device that includes gate, source & drain on top; (b) Sequentially form 1st oxide on substrate surface; (c) Define the pattern of 1st oxide, and form contact window on top of source to expose the drain of MOS device; (d) From 1st conductor on 1st oxide surface to fill the contact window; (e) Form 2nd oxide on 1st conductor surface; (f) Define the pattern of 2nd oxide & 1st conductor to remain the 2nd oxide & 1st conductor on top of and surrounding the contact window; (g) Form 2nd conductor on each above surface, and through anisotropic etching to form spacer at surrounding of 2nd oxide and 1st conductor, and the 1st conductor & that spacer are consisted into the bottom electrode plate; (h) Use etching liquid with high selective ratio of 2nd oxide to 1st oxide to remove 2nd oxide and portion of 1st oxide; (I) Sequentially form insulating layer and 3rd conductor on 1st oxide and bottom plate surface to finish the manufacturing of cylindrical capacitor.
TW086100950A 1997-01-28 1997-01-28 The manufacturing method for cylindrical capacitor in memory cell of DRAM TW329547B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW086100950A TW329547B (en) 1997-01-28 1997-01-28 The manufacturing method for cylindrical capacitor in memory cell of DRAM

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW086100950A TW329547B (en) 1997-01-28 1997-01-28 The manufacturing method for cylindrical capacitor in memory cell of DRAM

Publications (1)

Publication Number Publication Date
TW329547B true TW329547B (en) 1998-04-11

Family

ID=58262537

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086100950A TW329547B (en) 1997-01-28 1997-01-28 The manufacturing method for cylindrical capacitor in memory cell of DRAM

Country Status (1)

Country Link
TW (1) TW329547B (en)

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