TW329054B - Method for making - Google Patents

Method for making

Info

Publication number
TW329054B
TW329054B TW086107162A TW86107162A TW329054B TW 329054 B TW329054 B TW 329054B TW 086107162 A TW086107162 A TW 086107162A TW 86107162 A TW86107162 A TW 86107162A TW 329054 B TW329054 B TW 329054B
Authority
TW
Taiwan
Prior art keywords
photo
inter
ion
insulating layer
resist mask
Prior art date
Application number
TW086107162A
Other languages
English (en)
Inventor
Masao Kunigashira
Original Assignee
Nippon Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co filed Critical Nippon Electric Co
Application granted granted Critical
Publication of TW329054B publication Critical patent/TW329054B/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B20/00—Read-only memory [ROM] devices
    • H10B20/27—ROM only
    • H10B20/30—ROM only having the source region and the drain region on the same level, e.g. lateral transistors
    • H10B20/38—Doping programmed, e.g. mask ROM
    • H10B20/383—Channel doping programmed
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B20/00—Read-only memory [ROM] devices

Landscapes

  • Semiconductor Memories (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
TW086107162A 1996-05-28 1997-05-27 Method for making TW329054B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8156050A JP2917918B2 (ja) 1996-05-28 1996-05-28 半導体装置の製造方法

Publications (1)

Publication Number Publication Date
TW329054B true TW329054B (en) 1998-04-01

Family

ID=15619226

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086107162A TW329054B (en) 1996-05-28 1997-05-27 Method for making

Country Status (4)

Country Link
US (1) US5854110A (zh)
JP (1) JP2917918B2 (zh)
KR (1) KR100248690B1 (zh)
TW (1) TW329054B (zh)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10156742A1 (de) * 2001-11-19 2003-06-05 Infineon Technologies Ag Halbleiterbauelement mit zumindest einer Speicherzelle und Verfahren dessen Herstellung
KR100487640B1 (ko) * 2002-12-14 2005-05-03 주식회사 하이닉스반도체 반도체 소자의 제조 방법
US6969642B2 (en) * 2003-07-25 2005-11-29 Macronix International Co., Ltd. Method of controlling implantation dosages during coding of read-only memory devices
US7915128B2 (en) * 2008-02-29 2011-03-29 Taiwan Semiconductor Manufacturing Company, Ltd. High voltage semiconductor devices
JP2011233684A (ja) 2010-04-27 2011-11-17 Elpida Memory Inc 半導体装置の製造方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5156989A (en) * 1988-11-08 1992-10-20 Siliconix, Incorporated Complementary, isolated DMOS IC technology
JPH05267604A (ja) * 1991-05-08 1993-10-15 Seiko Instr Inc 半導体装置の製造方法
US5242841A (en) * 1992-03-25 1993-09-07 Texas Instruments Incorporated Method of making LDMOS transistor with self-aligned source/backgate and photo-aligned gate

Also Published As

Publication number Publication date
KR970077690A (ko) 1997-12-12
JPH09321233A (ja) 1997-12-12
KR100248690B1 (ko) 2000-03-15
US5854110A (en) 1998-12-29
JP2917918B2 (ja) 1999-07-12

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