J15520 A7 B7 五、發明説明（ 經濟部中央棣準局員工消費合作社印裝 發明背景： 本發荫是有顒於MQ S F E T電晶體的结構和製程* 特別是有醑於二個新類而改良的MO S F Ε Τ终端區規副 設計和核心單元組態，Μ增加在终嬙區的崩漬電應，同時 消狳附帶地接通寄生雙極鼋晶體而改良了元件韌度，因而 得.Μ防止由於汽返爾壓（snapbaek vol_ta.ge)所造成的損 値。 習知技術： 元件設計者經常會面臨到由於提早霣麽巔漬而造成元 件損傷的顧虜1尤其在有較小單元的MO S F E T元件的 終端厲的電壓崩漬更形成了技術上的有所限制。MOSF E T功率元件產生崩漬讀颳的條件是依活性核心區單元的 空間和元件終端姐態而定。對於具有較小的電晶體單元的 MOSFET元件而言，當處在逆向偏壓時，空芝層（ depletion layer)的弧度在接面的邊緣上較大》而崩潰較 易發生之處在於元件靠近終端厚的邊緣發生。當大幅崩潰 在终端區發生時就產生了大量的電子和霉洞。在η通道元 件中，自由電子向下流至汲極，而電澜則被濂極的負霉壓 影響而横向移動到核心單元區。在逭些電洞被源極「拾取 」之Μ，由於大量的電洞經由源搔之下的η +源極區橫向 移動，Μ致單元内的寄生雙極電晶體會被附帶地接通，而 產生了突返電壓，因之對MOS F Ε Τ單元_成了永久性 損傷。 第一圖是MOSFET元件10内含核心單元區40 (請先閱讀背面之注意Ϋ項再填寫本頁) --裝------訂-------(線 木紙張尺度Μ用中國國家糯車（CNS ) A4戏K 210X297公螫） 3!552〇 Α7 Β7 經濟部中央標準局員工消費合作社印裝 五、發明説明（） 和终端區5 0的部份俯視圖。有複數個單元，每一單元包 含有被P體2 5画繞的源極30，而單元排列成「方形上 有方形」的組態。在終斓區，多晶矽閘極從核心單元區4 〇圼「多晶矽指」狀7 2向外延伸到終端區50，而藉其 上有複數個閘極接點，即多晶矽接頭70的閘極跑道7 6 和多晶矽指7 2壤接。假便ft種規K中多晶矽指7 2的寬 度'為X，而閛極跑道7 6的寬度為Y，則X約興Y相等。 電_的崩潰經常發生於閘極跑道7 6和多晶矽指72相交 處。崩漬是因多晶矽的額外長度Z所造成fZ為對角線長 *即 Z = VX 2 + Υ 2 (1) 由於在對角線方向的長度較長，因之電壓崩.檟最可、能發生 在閘極跑道76和多晶矽指7 2交界的方塊的中心處，因 為下面的Ρ體區間的間隔距離較長，而形成了這一崩漬脆 弱點。逭種較長的間隔距離Ζ，霈要在這些區下面的空乏 層邊緣合併之前有更高的電壓才能形成一镯屏陴來防止崩 潰。因此，Μ閘極跑道76連接多.晶矽指72的终端區規 刺便形成了崩漬脆弱點。瑄種組鰺逍成的提早崩潰除了可 能因為電壓崩潰附帶地接通寄生雙極電晶體而造成元件損 傷的顧盧之外，遨使元件設計和性能方面被加上更多的限 制。 第二Α圓和第二Β圖為第一圈中所示一般傳統式η通 道MOSFET元件1 0分別沿著Χ，Χ -和Υ — Υ -兩 線的截面圖。此元件係支揮在一η +基體上、其中有一η - - 4 - 本紙張尺度遑用中國國家標準（CNS ) A4规格（210X297公釐） (請先閱讀背面之注意事項再填寫本頁)J15520 A7 B7 Fifth, the description of the invention (The Ministry of Economic Affairs, Central Bureau of Precinct Employee Consumer Cooperative Printing and Invention Background: This hair shade is superior to the structure and process of MQ SFET transistors * Especially improved by two new categories MO SF Ε Τ Terminal area sub-design and core unit configuration, Μ increase the collapse in the terminal area of the response, while eliminating the incidental connection of parasitic bipolar crystals to improve the component toughness, so. Prevent damage caused by vapor pressure (snapbaek vol_ta.ge). Conventional technology: Component designers often face the problem of component damage due to early peak staining, especially in smaller units. The severe voltage collapse of the terminal of the MO SFET device has also formed a technical limitation. The conditions for the MOSF ET power device to produce a read scratch are dependent on the space of the active core area unit and the state of the terminal of the device. For MOSFET elements with small transistor cells, when under reverse bias, the arc of the depletion layer is larger on the edge of the junction. The breakdown is more likely to occur because the element is closer to the terminal thickness The edge occurs. When a large collapse occurs in the terminal area, a large number of electrons and mold holes are generated. In the η-channel element, free electrons flow down to the drain, and the electron is moved laterally by the negative mold pressure of the pole To the core unit area. In these holes where the holes are "picked up" by the source, because a large number of holes move laterally through the n + source area under the source, the parasitic bipolar transistors in the unit will be It is turned on incidentally, and a surge voltage is generated, which permanently damages the MOS F ET cell. The first picture is the MOSFET element 10 contains the core cell area 40 (please read the note Ϋ on the back side first (Fill in this page) --Installation ------ Order ------- (Line wood paper size Μ China National Glutinous Car (CNS) A4 Drama K 210X297 Public Stall) 3! 552〇Α7 Β7 Ministry of Economic Affairs Printed by the Central Bureau of Standards and Staff's Consumer Cooperative V. Invention description () and a partial top view of the terminal area 50. There are a plurality of units, each unit contains a source 30 drawn by a P body 25, and the units are arranged as The configuration of "there is a square on the square". In the final area, the polysilicon gate is from the core unit area. The "silicon finger" shape 7 2 extends outward to the terminal area 50, and there are a plurality of gate contacts on it, that is, the gate runway 7 6 of the polysilicon connector 70 and the polysilicon finger 7 2 border. Fake ft spec. In K, the width of the polysilicon finger 7 2 is X, and the width of the runway 7 6 is Y, then X is about equal to Y. The breakdown of the electric _ often occurs at the intersection of the gate runway 76 and the polysilicon finger 72. The stain is caused by the extra length Z of polysilicon. FZ is the diagonal length * that is Z = VX 2 + Υ 2 (1) Because the length in the diagonal direction is longer, the voltage collapse. The most possible and can happen At the center of the square where the gate runway 76 and the polysilicon finger 72 intersect, because of the longer separation distance of the P body section below, this weak spot of collapsing is formed. With a longer separation distance Z, it is necessary to have a higher voltage before the edges of the empty layers below these areas merge to form a bracelet screen to prevent collapse. Therefore, the terminal area of the M gate track 76 connected to the polysilicon finger 72 has formed a weak spot of collapse. The premature breakdown of the Xuanliu trumpet trumpet is not only in addition to Gu Lu, which may cause damage to the component due to the voltage collapse and the parasitic bipolar transistor, but also limits the design and performance of the component. The second circle A and the second diagram B are cross-sectional views of the conventional conventional n-channel MOSFET device 10 shown in the first circle along the lines X, X-and Y-Y-respectively. This element is supported on an η + substrate, one of which is η--4-This paper standard uses the Chinese National Standard (CNS) A4 specification (210X297 mm) (please read the precautions on the back before filling this page)
- -—1 HI -*1 - ^1. Λί m -- - I J— .HI --- -- ^SJ Λ線-- i. l·. A7 B7 經濟部中央榡準局貝工消費合作社印褽 五、發明説明（） 摻雑晶膜较極區20。如圖中所示，晶膜汲極區20上形 成有複數個P體區25和n +源極區30 〇MOSFET 元仵1 0分成核心單元區40和終端M5 0 *核心區40 中有複數個車元，，其中包含P朦區25，n+濂極區3 ◦ 和多晶矽W極3 5。如第一跚所示，源極6 0形成於核心 窜元區40内，而閘極跑道70，塲板80和等位環9 0 則形成於終，孅區卞0内。 對額定為3 0V的元件而言，當崩漬在崩漬電壓（約 36至4-0V)發生時，產生了大量的自由電子和電涧， 對高單元密度和高汲極電壓的MOS F E T元件而言，電 壓崩潰通龠發生在終端區5Q處』亦即第二A圓和第二B 圖中第9 5處，當η通道MOSF ET發生霄颳崩潰時* 所產生的自由電子會經由晶膜汲極層20和基髏15向下 流到汲«，同時所產生的大量的帶正電的電洞也會受到沿 著Ρ中虛線98通遇源極60的源極電壓的影響而横向移 往核心單元區。當造些霉洞經遘Ρ體區25而在η +源極 區30之卞移動時，在ρ η接面附近的寄生雙瘅體可旌被 附帶地接通*而此雙極突返（s.napback)電壓可能對元件1 〇造成永久性損傷。因此在终嬙區5 0所發生的食壓崩漬 就使得& OS.FET元件設計上和性能上被加上更廉格的 限制。 在第二B圓中，場《80沿著Y — Y -線在终竭區有 —接觴點，因之可能有一小部份的電洞99被此一小的接 觸窗口經過一P +體區25 >所拾取。但是、因為此一金 本紙張尺度逍用中國:國家標率（CNS ) A4規格（2】〇Χ297公釐） (請先閱讀背面之注意事項再填寫本頁) 丨裝^--—1 HI-* 1-^ 1. Λί m--IJ— .HI ----^ SJ Λ line-i. L. Fifth, the description of the invention () The doped crystal film is more polar region 20. As shown in the figure, a plurality of P body regions 25 and n + source regions 30 are formed on the crystal film drain region 20. The MOSFET element 10 is divided into a core unit region 40 and a terminal M5 0. * There are plural numbers in the core region 40 A vehicle element, which includes the P haze region 25, the n + 濂 pole region 3 ◦ and the polysilicon W pole 3 5. As shown in the first step, the source electrode 60 is formed in the core channel region 40, while the gate runway 70, the plate 80, and the equipotential ring 90 are formed in the terminal region 90. For a device rated at 30 V, when the chipping occurs at the chipping voltage (approximately 36 to 4-0 V), a large number of free electrons and electric currents are generated. For MOS FETs with high cell density and high drain voltage In terms of components, the voltage collapse occurs at the terminal area 5Q, which is the second circle A and the 9th position in the second B diagram. When the n channel MOSF ET collapses, the free electrons generated will pass through The crystal film drain layer 20 and the base 15 flow down to the drain. At the same time, a large number of positively charged holes will also be affected by the source voltage along the dotted line 98 in the middle of the p through the source 60 Move to the core unit area. When some mold holes are made to move through η body region 25 and move in the η + source region 30, the parasitic bimorph near the ρ η junction can be incidentally turned on * and this bipolar retreat ( s.napback) The voltage may cause permanent damage to the element 10. Therefore, the collapse of the edible pressure that occurs in the terminal area 50 makes the design and performance of the & OS.FET device more restrictive. In the second circle B, the field "80 has a connection point along the Y-Y- line in the exhaustion zone, so there may be a small part of the hole 99 passed by a small contact window through a P + body Area 25 > Picked up. However, because of the use of this gold standard paper in China: National Standard Rate (CNS) A4 specification (2) 〇297297 mm (please read the precautions on the back before filling this page) 丨 装 ^
'1T 線 f 315520 A7 經濟部中失棵準局貝工消費合作社印繁 B7五、發明説明（） 属層的目的是在r由閘極墊區附近的交叉處把多晶矽場板 和接地源極相連，所Μ *拾取電荷的效應很小。一般傳銃 的MOSF ΕΤ结構，即使有場椴接觸點80分佈在終端 區50，也不足Κ防止因為在終端區50崩漬時大量的锺 洞潦附帶接通寄生雙極體而產生的揖傷。 因之，在生產MOSFET功率元件的技藝中*尤其 在設計和製.造上仍需有能解決這些限制的改良的結構和製 程。 發明.特點·： 本發明之特點在於： 0)提供有新穎的終端區規劃和單元組憨的改良的元件 姐慇，Μ克腋上述提早崩潰的限制Μ及增加MOSF E Τ 功率元件的韌度，用Μ解決習知技術中所面臨的困難。 ⑵提供一涸改良的MOSF Εΐ終靖區组》，其中用 了特別的規劃策略，即使用舟圉自由離子拾取保衛瓌*内 袠拾取保衛猜和位於活性核心單元區邊緣的仿冥單元（ duMy cell) Μ防止離子横向流入MOSFET之單元内 ，因而能消除附帶地接通寄生雙搔醸的現象。 CS提供一涸改良的MOSFE Τ姐態，其中用了特別 的規刺策略，即把閘極跑道由终端區除去，Μ消除多晶矽 指和閘極跑道的交叉處，因之消除了使電壓崩潰的脆弱點 〇 W提供一個改良和延伸至終端區内的多晶矽指的位置 相配合的核心單元組態，在終端區内並將做為自由雛子拾 nn _^in· νϋ— (請先閲讀背面之注意事項再填窝本頁) • IT. 裝. 線 ip. 本紙張又度逋用中國.國家標率（CNS ) A4规格（21.0'X297公釐） 經濟部中央標率局貝工消費合作社印簟 A7 B7 五、發明説明（） 取保衛阻隔的仿真單元鲁於每一多晶矽指的附逬K便拾取 可能由多晶矽指底下穿過的自由離子，因之提供了一傾防 止自由離子進入核心單元區的有效的拾取阻睜。 ⑤在一俪有開放長择的Μ 0 S F E T元件的核心單元 區内提供一儸仿真的拾取單元片段，做為自由離子的拾取 單元，Μ阻止自由離子進入核心單元區。 這些目的和特颭，對具一般技藝者而言，當參照下列 的鼸示筚閱謓發明說明並研究各實施例後，一定無可置珐 地裢阴白本發明所蘭述的內容。 圖示簡單說明： 第一圖為一個習知技術的MOSFET元件的俯視圖，圖 中齄示多晶矽指和閘跑遒的速接因而造璜會發生提 早崩潰的脆弱點； 第二Α圖和运二Β圖是第一圖中所示的MOS F Ε Τ元件 的截面圖； 第三A圖至第三C圖係分別為具有改良的核心單元組態和新 頴的終端區，有自由離子拾取瓖Μ及在核心單元區的 拾取保衛牆來阻隔i 第四A圖和第四B圖分別為本發明之MO S F E T元件的 俯視和截面圖； 第五圖本發明之改良的MOSF E T元件的俯視驛，其中 核心單元的組態可和第三A圖至第三Ci中的核心 單元相比較；及 第六A圖至第六E圖分別為有開放長條的MO S F E T元 本紙張尺度適用中國國家標準（CNS ) A4規袼（210:X.797公釐） (請先閱讀背面之注意事項再填寫本頁)'1T line f 315520 A7 The Ministry of Economic Affairs of the Ministry of Economic Affairs of Pui Pong Consumer Cooperative Indica B7 V. Description of invention () The purpose of the subordinate layer is to place the polysilicon field plate and the grounded source at the intersection near the gate pad area. Connected, the effect of picking up charge is very small. The general MOSF ET structure, even if there are field contact points 80 distributed in the terminal area 50, is not enough Κ to prevent scratches caused by a large number of holes in the terminal area 50 when the parasitic bipolar body is connected . Therefore, in the art of producing MOSFET power components, especially in design and manufacturing, there is still a need for improved structures and processes that can address these limitations. Features of the invention: The features of the present invention are: 0) Provides improved component planning with novel terminal area planning and cell groups, the limitation of the above-mentioned early collapse of the armpit and increase the toughness of the MOSF E Τ power component , Use M to solve the difficulties faced in the conventional technology. ⑵Provide a completely improved MOSF E1 Jingjing District Group, which uses a special planning strategy, that is, using the Zhouqi free ion pickup to defend the 瓌 * the inner lining to pick up the guard and the phantom unit (duMy cell) M prevents ions from flowing laterally into the cell of the MOSFET, thus eliminating the phenomenon of incidental double parasitic turn-on. CS provides an improved MOSFE T state, which uses a special regulation strategy, that is, the gate runway is removed from the terminal area, M eliminates the intersection of polysilicon fingers and gate runway, thus eliminating the voltage collapse The fragile point 〇W provides an improved core unit configuration that matches the position of the polysilicon fingers extending into the terminal area. In the terminal area, it will be used as a free chick nn ^^ in · νϋ— (Please read the back side first Note and refill this page) • IT. Install. Line ip. This paper is also used in China. National standard rate (CNS) A4 specification (21.0'X297 mm) Printed by Beigong Consumer Cooperatives, Central Standard Rate Bureau, Ministry of Economic Affairs簟 A7 B7 V. Description of the invention () The simulation unit that takes the defense barrier is attached to each polysilicon finger. It picks up free ions that may pass under the polysilicon finger, so it provides a tilt to prevent free ions from entering the core unit. The effective pickup of the zone is blocked. ⑤ Provide a simulated pickup unit segment in the core unit area of an open-selection Μ0FSET element as a free ion pickup unit, M prevents free ions from entering the core unit area. These purposes and special features, for those of ordinary skill, after reading the description of the invention and studying the embodiments with reference to the following illustrations, there must be no way to obscure the contents of the present invention. A brief description of the diagram: The first picture is a top view of a MOSFET device of conventional technology. The diagram shows the quick connection between the polysilicon finger and the gate runner, so that the fragile point of premature collapse will occur; the second picture and the second Figure B is a cross-sectional view of the MOS F ET device shown in the first figure; Figures A to C are the terminal area with an improved core unit configuration and a new terminal, with free ion pick-up. Μ and the pick-up guard wall in the core unit area to block i. Figures 4A and 4B are respectively a top view and a cross-sectional view of the MO SFET device of the present invention; Figure 5 is a top view of the improved MOSF ET device of the present invention Among them, the configuration of the core unit can be compared with the core unit in the third A to the third Ci; and the sixth A to the sixth E are the MO SFET yuan paper size with open strips. Standard (CNS) A4 regulation (210: X.797mm) (Please read the notes on the back before filling this page)
、一~*J 缽 Α7 Β7 五、發明説明（） 件的俯視和截面僵，其具有新穎的终端詹規劃和核 心單元姐態來改進崩潰電颳和元件韌度。 發明說明： 第三A圏萆第3C圈顯示出本發萌之M0 S F E T元 件1 00，第三Α圈為此MOSFET元件ΓΟΟ的俯視 圖，其中有一核心單元區1 05包含#複數儷單元1 08 。此M0SFET元件100也包含有一儒终端區11〇 具有複數偁多晶矽指1 3 5，從核心單元區1 〇 S延伸到 终端區1 10。第三Β圈和第三C豳分別為沿著第三Α_ 中的Α — A *耜Β — Β -線的截面圄。_參聞第三Β圓， 其中MOSFET元件1 00是支撐布彤成於一個η +基、 一 ~ * J bowl Α7 Β7 V. Description of the invention () The top view and cross-section of the part are rigid. It has a novel terminal design and core unit configuration to improve the crash scraper and component toughness. Description of the invention: The third circle A shows the original M0 S F E T element 100, and the third circle A is a top view of the MOSFET element ΓΟΟ, in which there is a core cell area 105 including # 复数 俪 单元 1 08. The MOSFET element 100 also includes a terminal region 110 having a plurality of polysilicon fingers 135 extending from the core unit region 10S to the terminal region 110. The third circle B and the third circle C are cross-sections along the line A — A * —B — B — in the third A_, respectively. _Refer to the third B circle, in which the MOSFET element 100 is a support cloth formed into an η + base
艚102上的一俩η-摻雜賡104上。如一般的M0S FET元件100，在核心單元區105时每一涸M0S » * * · . 經濟部中夬標準局員工消費合作社印製 •--,-- -- IT n —4--1 I - (請先閱讀背面之注$項再填寫本頁) L. FET單元108包含有一涸在一涸η +源極羼1 1 4底 下形成-的Ρ臞區1 -1 2，且有一閘極1 1 6和一源極接、黏 1 1 8在表面上形成。此M0SFET元件1 00具有一 些斩穎的設計待黏來改良充件的韌度，並具提高在終端區 的崩漬電顧。M0SFET元件1 00包含有形成如一個 Ρ +摻雜區1 2 2的一偃外圍電荷拾取保衛環1 2 0和源 極接黏118_連。當在終端區，如崩漬黏125處發生 電壓崩漬時就產圭了自由的電洞，每一電洞均帶有正電荷 ，在從崩潰點1 2 5經Ρ +摻雜區1 22缑往源極接點1 1 8時，首先被此霣荷拾取保衛環1 20拾取；此外，沿 著A — Α/線也有一個内褢電荷拾取保衛牆1 30形成如 本紙張尺度逍用中國國家標準{ CNS ) Α4ΪΚ 210X297公釐） 315520 Α7 Β7 經濟部中央標準局貝工消費合作社印掣 五、發明说明（） P +艚區1 32的多元片段而和滙搔接點1 1 8直接連接 。同樣，’那些在崩潰點1 2石產生的而尚未被外圍電荷拾 取保衛環所拾取的自由電洞，就被此保術牆1 3 0拾取。: 第三C圖為MOSFET元件沿著B — B /線的截面 圓，其中外圍電荷拾取保衛瓖ί 2〇的结構和第三B圄中 所示的相同θ然而*由於内裹電荷袷取保衝猜130，因 為要譲出空間來形多晶矽指1 3 5而被折斷，因而在多晶 矽指135對面靠近核令窜元區10S處放置仿真單元1 40 *此仿真單元140有内褢電褚拾取保護阻隔的作用 ，來防止外圍的電祷拾取保術環1 2 0所遺_的電洞進入 核心單元區1 05。由於在崩漬時所產生的大I雛子在進 入核心單元區1 05前均被拾取，因而在每一單污10 8 下面的核心單元區10 $内產生，附帶地接通寄生雙極體 的現象的可能性就減少到最小，而改進了元件的韌度。 在第三Α圓中所示的MOSFE Τ元件1 0 0 ,除了 韌度的改良，同時也達成另一設計上的優點，即在终端區 1 1 〇處的崩漬電壓，由於除去了傳统式的閘極跑道，所 K將被提高《在一般傅统的M0SFET元件中，通常在 終端區的閘跑道_用來形成長形的閘搔接點（請參照第一 圓），灶發明中不採用上述一般的做法，而在每一多晶矽 指1 35的終點形成一蘭極接點1 45,因此，在習知技 術中由於在多晶矽指135和閘極跑道相交叉處所易形成 的提早崩潰的跪弱點就得Μ消除。本發明中MO S F E T 元件1 00終端區1 1 0的新頴設計，特別]在鈴近多晶矽 (請先閲讀背面之注項再'填寫本瓦) ΙΓ -- -*_ -. λ 、裝----One or two on the stern 102 are on the η-doped yoke 104. Like the general M0S FET element 100, it is printed in the core unit area 105 every time M0S »* * ·. Printed by the Employee Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs •-,--IT n — 4--1 I -(Please read the note $ item on the back and then fill in this page) L. FET unit 108 includes a Ρ 臞 region 1 -1 2 formed underneath a η + source electrode 1 1 4-and has a gate 1 1 6 is connected to a source, and 1 1 8 is formed on the surface. The MOSFET device 100 has some decisive design to be adhered to improve the toughness of the charging part and to improve the chipping in the terminal area. The MOSFET element 100 includes a peripheral charge pickup guard ring 120 formed as a P + doped region 122, and the source electrode is bonded 118_. When a voltage collapse occurs in the terminal area, such as at 125, a free hole is produced, each hole has a positive charge, from the collapse point 1 2 5 through the P + doped region 1 22 When going towards the source contact 1 1 8, it was first picked up by this defensive pick-up guard ring 1 20; in addition, there was also an inner charge pick-up guard wall 1 30 along the A — Α / line formed like this paper scale. National Standard {CNS) Α4ΪΚ 210X297 mm) 315520 Α7 Β7 The Ministry of Economic Affairs, Central Standards Bureau, Beigong Consumer Cooperatives, Seal 5. Description of the invention () P + 艚 区 1 32 of multiple fragments and directly connected to the junction 1 1 8 . In the same way, those free holes generated at the collapse point 12 stone that have not been picked up by the peripheral charge pickup guard ring are picked up by this protection wall 1 3 0. : The third picture C is the cross-section circle of the MOSFET element along the line B-B /, where the structure of the peripheral charge pickup guard 20 is the same as that shown in the third B θ. However, due to the entrapped charge Guess 130, because the space is needed to form the polysilicon finger 1 3 5 and is broken, so the simulation unit 1 40 is placed on the opposite side of the polysilicon finger 135 near the nuclear channeling area 10S * This simulation unit 140 is protected by internal electrical pickup The effect of the barrier is to prevent the external electric prayers from picking up the holes left by the magic circle 1 2 0 into the core unit area 1 05. Since the big I chicks produced during the collapse were picked up before entering the core unit area 105, they were generated in the core unit area 10 $ under each single pollution 10 8 and incidentally switched on the parasitic bipolar The possibility of the phenomenon is reduced to a minimum, and the toughness of the component is improved. The MOSFE T element 100 shown in the third circle A, in addition to the improvement in toughness, also achieves another design advantage, namely the collapse voltage at the terminal area 1 1 0, due to the removal of the traditional The gate runway of the gate will be improved. In general MOSFET devices, the gate runway in the terminal area is usually used to form a long gate contact (please refer to the first circle). Using the general method described above, a blue pole contact 1 45 is formed at the end of each polysilicon finger 1 35. Therefore, in the conventional technology, the premature collapse caused by the intersection of the polysilicon finger 135 and the gate runway is easy to form. Kneeling weakness has to be eliminated. The new design of the MO SFET device 100 terminal area 1 1 0 in the present invention, especially] in the near polysilicon (please read the notes on the back and then 'fill in the tile) ΙΓ--* _-. Λ 、 装- ---
l·訂I 1丨 ίψ. U! 本紙張又度逋用中國國家標準（CNS ) A4规格（21 αχ 297公釐） 經濟部中央梯準局員工消費合作社印製 315520 A7 B7 五、發明説明（） 指1 35處的設計，可使萠潰II壓增加。 將傅統式閘極-跑道（如第二圖中所示之閘極跑道7 6 )除去有另一個優點Μ第四A_所顯示'的MOSFET元 件1 0〇/來解說。MOSFET元件1 00 —和第兰A _至第三C崮中的MOSFET元件1 0 0相似，都#有 外圍電荷拾取保衛瓌120，内褢電荷拾取保衛腌13〇 ，以及内褢甯荷拾取保衝阻隔的仿效單元140。此MO SFET元件1 00 z與元件1 〇〇唯一不同之處是形成 在终端區的两極跑道150是和所有的多晶矽指135相 連接，因之在元件1 00 '之終端區，尤其是在脆弱點1 60處的崩潰電壓要比元件1 00的崩潰售颳為低，況且 ，元件1 0 0 ^的内褢電荷拾取保衛腌（如第四B圖所示 )的效應也臀元件100昨效率為低。第四B圓顯示由於 形成了閛極胞道1 50，置於其下的P體區1 1 2分為兩 個片段1 12-1和1 12-2，因而内裹t荷拾取保衛 牆130的效率就較第三B圓中的元件100的效率為低 。由於P嫿區112在閘極跑道下分段，在腊弱點125 所產生的雛子（自由電涧）不能如在元件100中直接沿 著Pfi區112移動而直接被内裏電荷拾取保衛膾130 所拾取。因此，將MOSFET元件1 00中的閜極跑道 1 5 0除去有些優點，不但因濟除了勝弱點而提高了崩潰 電壓，同時内裹電荷保衛腈1 30也可更有效地拾取電荷 〇 第五圖顯示本發明實施例的MOSFET元件1 80 -10 — 本紙張尺度逍用中國國家標準（CNS ) A4規格（210.X297公釐） (請先閲讀背面之注意事項再填寫本頁} ----^ -裝--------訂------「^ ΙΓ」· 經濟部中央標準局員工消費合作社印聚 A7 __；_B7五、發明説明（） 的部份俯視圖。除了外籣拾取保衛環外（圖上無顯示>， 此MOSFEJ元件180也包含有複數傾内哀拾取俸衛 猜1 85來防衛自由電洞進入核心單元庳1 9.〇。和第三 A圓中的單元和多晶矽指拓僕相比較時，由於單元1 9 5 的多离矽的開口和多晶矽指1 8 2在水平方向並不是直接 的排成一直嬢，所K外圍拾取保衛環所遺漏的電洞仍能經 由一路徑，，如路徑1 98，而達到單元195，做為垂直 方向的内《拾取保衛阻隔的仿真單元187也不能有效地 防止自由霄荷由水平路徑1 9 8進入。因此在第三A鼷中 所示的MO SF E T元件1 0..Q更提供了一個設計特點， 即在靠近多晶矽指1 3 5處安排了相對應的仿真單元1 4 0來姐隔自由電荷從多晶矽指135的底下進入核心軍元 區的路徑。 第六A圖顯示本發_另一MOSFET元件200的 部份俯視画。第六β圖至第六D圖則分別為此元件沿著X —χ/ ，Υ—Υ〃和Ζ—Ζ，線的截面國。首先請參照第 六Α圖，MOSFET元件2 0 0是一開放長條元件，其 中核心單元區2 0 5包含声複數個醏放長條單元2 0 8如 第六D鼴中沿Z — Z z線所示。每一開放長條單元2 0 8 包含一P體區202，一n+源極區204，一P+體區 2Q6和一閘樓209。在此食施例中，MOSFET元 件2 0 0更包含有一外圍電荷拾取诨衛環2 1 0，Μ及一 段仿真單元2 2 0。請參照第六C圔所示的仿真單元片段 220的截面画，其中仿真單元208 /包含P體區2 0 (請先閲讀背面之注意事項再填寫本頁)l · Subscribe I 1 丨 Lψ. U! This paper also uses the Chinese National Standard (CNS) A4 specification (21 αχ 297 mm) 315520 A7 B7 printed by the Employee Consumer Cooperative of the Central Escalation Bureau of the Ministry of Economy V. Description of invention ( ) Refers to the design of 1 to 35 places, which can increase the pressure of ulcer II. The removal of the conventional gate-runway (such as the gate runway 7 6 shown in the second figure) has another advantage: the fourth MOSFET element 100 / is shown. MOSFET element 100 — Similar to the MOSFET element 1 0 0 in the third A _ to the third C, it has a peripheral charge pick-up guard 120, an inner charge pick-up guard 30 °, and an inner charge pick-up guard冲 止 离 的 仿 素 140. The only difference between this MO SFET element 100 z and element 100 is that the bipolar runway 150 formed in the terminal area is connected to all polysilicon fingers 135, because it is in the terminal area of element 100 ', especially in The breakdown voltage at the fragile point 1 60 is lower than the breakdown sale of the component 100. Moreover, the effect of the internal charge pick-up and protection of the component 100 0 ^ (as shown in the fourth B) is also the hip component 100 yesterday. The efficiency is low. The fourth circle B shows that because of the formation of the epipolar cell channel 1 50, the P body region 1 12 placed under it is divided into two segments 1 12-1 and 1 12-2, so the t-load pick-up defense wall 130 is wrapped in The efficiency is lower than the efficiency of the element 100 in the third B circle. Since the P area 112 is segmented under the gate runway, the chicks (free electric stream) generated at the wax weak point 125 cannot be directly picked up by the inner charge pick-up defender 130 as in the component 100 moving directly along the Pfi area 112 . Therefore, removing the rudimentary track 1 50 in the MOSFET element 100 has some advantages. Not only does it improve the breakdown voltage because it overcomes the weakness, but also the charge is wrapped in to protect the nitrile 1 30. The charge can also be picked up more effectively. MOSFET device 1 80 -10 showing an embodiment of the present invention — This paper standard uses the Chinese National Standard (CNS) A4 specification (210.X297 mm) (please read the precautions on the back before filling this page) ---- ^ -Installed -------- order ------ "^ ΙΓ" · The Ministry of Economic Affairs, Central Standards Bureau employee consumer cooperative printed and printed A7 __; _B7 Partial top view of invention description (). Except for The pick-up outside the guard ring (not shown on the picture), the MOSFEJ element 180 also contains a plurality of tilt-in pick-up salaries 1 85 to defend the free hole from entering the core unit 19.0. And in the third circle A When comparing the unit with the polysilicon finger extension, since the opening of the polysilicon of the unit 1 9 5 and the polysilicon finger 1 8 2 are not directly aligned in the horizontal direction, the periphery of the K picks up the power missing from the guard ring The hole can still pass through a path, such as path 1 98, to reach unit 195, as a vertical In the direction, the simulation unit 187 of the pick-up guard block cannot effectively prevent the free load from entering through the horizontal path 1 9 8. Therefore, the MO SF ET element 1 0..Q shown in the third A is provided with a The design feature is that the corresponding simulation unit 1 40 is arranged close to the polysilicon finger 1 3 5 from the bottom of the polysilicon finger 135 into the core military area through free charge. The sixth figure A shows the present _other Partial top view of a MOSFET device 200. The sixth β to sixth D drawings are the cross-sectional states of the device along the lines of X-χ /, Υ-Υ〃 and Z-Z, respectively. First please refer to the sixth In Figure A, the MOSFET element 200 is an open strip element, in which the core unit area 250 contains a plurality of acoustic strip elements 2 0 8 as shown along the Z-Z z line in the sixth D mole. An open elongated cell 2 0 8 includes a P body region 202, an n + source region 204, a P + body region 2Q6 and a gate 209. In this embodiment, the MOSFET device 200 further includes a peripheral charge Pick up the Weiwei ring 2 1 0, M and a section of the simulation unit 2 2 0. Please refer to the section drawing of the simulation unit segment 220 shown in the sixth C 圔Wherein the simulation unit 208 / P body region 20 comprises (Read Notes on the back and then fill the page)
I l·訂 i .」· -11 - 本紙張尺度適用中國國家標準（CNS ) A4规格（210 X 297公釐） 經濟部中央標準局貝工消费合作社印製 315520 A7 ___ B7五、發明説明（） 和P+體區206r *而不包含一般單元中的n+源 極區204。請參照第六A画和第六B圖，當自由雛子， 即電洞在有數個拾取保衛環23〇的終端區產生後，即 橫向向核心單元區205移動而首先被外圍電荷拾取保衛 環210拾取而餘去，任何還漏的自由離子，再經由和源 掻箄極2 1 5連接的P +鱧區2. 〇6 /而被仿真單元2 2 〇所拾取。 第六E_顯示本發明M0S、F ET元件200另一部 份的部份俯視賺，其中包令一用K在其上形成複數個》極 接點24 5的内食段（inner secti'on) 2 4 0，在製造ft 内裹段240時施Μ—n♦阻隔而形成複數儸仿真單元2 50,其中僅有Ρ +區而無η·»·源極區來拾取自由離子並 傅送到源極電極。此具有仿真單元2 5 0的特別的η +阻 隔内褢區24〇對内裹開放長條單元提供了額外的保護來 防止遶些單元内的寄生雙搔饈被附帶地接通，因此大大地 增加開放長條單元2 2 0的韌度。 雖然本發明Μ上述之實施例敘述，但Μ上所掲露及說 明之具饈描述並不作為解釋本發明權利範圍之侷限。一旦 閱謓本發明揭露之内容，對具一般技藝人士，各樣之變化 、修改即已明白。因之，下列之專利權利要求項目，只要 變化及修改不出本發明之精意及内容者*都應被納入、包 含在本發明權利範靨之内。 (請先閱讀背面之注意事項再填寫本頁) ---^ '裝_ 卜丁 -5 L. ~ 12 - 本紙張尺度適用中國國家標準（CNS )八4规格（210X297公釐）I l · 定 i. "· -11-This paper scale is applicable to the Chinese National Standard (CNS) A4 specification (210 X 297 mm) 315520 A7 ___ B7 printed by the Beigong Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs ) And the P + body region 206r * do not include the n + source region 204 in a general cell. Please refer to the sixth drawing A and the sixth drawing B. When the free chick, that is, the hole is generated in the terminal area where there are several pick-up guard rings 230, it moves laterally to the core unit area 205 and is first picked up by the peripheral charge pick-up guard ring 210 After picking up, any free ions that are still leaked are picked up by the simulation unit 2 2 〇 via the P + 鳢 area 2. 0 6 / connected to the source gate 2 15. The sixth E_ shows the other part of the M0S and F ET device 200 of the present invention, and the top part of the ET device 200 is made from it, in which the baling one uses K to form a plurality of inner electrode segments (inner secti'on) ) 2 4 0, when making the wrapped section 240 in the ft, the M-n is blocked to form a complex 㑩 simulation unit 2 50, in which there is only the P + region and no η · »· source region to pick up free ions and send To the source electrode. This special η + blocking inner jacket region 24 with simulation unit 250 provides additional protection to the wrapped long strip unit to prevent parasitic double scratches inside these units from being incidentally switched on, thus greatly Increase the toughness of the open strip unit 2 2 0. Although the foregoing embodiments of the present invention are described, the detailed descriptions disclosed and described on M are not intended to limit the scope of the present invention. Once reading the content disclosed by the present invention, various changes and modifications to those with ordinary skills will be clear. Therefore, the following patent claim items should be included and included in the scope of the rights of the invention as long as the changes and modifications cannot reveal the essence and content of the invention *. (Please read the precautions on the back before filling out this page) --- ^ '装 _ 卜丁 -5 L. ~ 12-This paper size is applicable to the Chinese National Standard (CNS) 84 specifications (210X297 mm)