TW281768B - - Google Patents

Info

Publication number
TW281768B
TW281768B TW082101301A TW82101301A TW281768B TW 281768 B TW281768 B TW 281768B TW 082101301 A TW082101301 A TW 082101301A TW 82101301 A TW82101301 A TW 82101301A TW 281768 B TW281768 B TW 281768B
Authority
TW
Taiwan
Application number
TW082101301A
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Application granted granted Critical
Publication of TW281768B publication Critical patent/TW281768B/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G11C11/418—Address circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76895—Local interconnects; Local pads, as exemplified by patent document EP0896365
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823475—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type interconnection or wiring or contact manufacturing related aspects

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Power Engineering (AREA)
  • Semiconductor Memories (AREA)
TW082101301A 1991-12-09 1993-02-24 TW281768B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/805,393 US5264385A (en) 1991-12-09 1991-12-09 SRAM design with no moat-to-moat spacing

Publications (1)

Publication Number Publication Date
TW281768B true TW281768B (zh) 1996-07-21

Family

ID=25191448

Family Applications (1)

Application Number Title Priority Date Filing Date
TW082101301A TW281768B (zh) 1991-12-09 1993-02-24

Country Status (6)

Country Link
US (1) US5264385A (zh)
EP (1) EP0548675B1 (zh)
JP (1) JPH05326887A (zh)
KR (1) KR100302091B1 (zh)
DE (1) DE69231030T2 (zh)
TW (1) TW281768B (zh)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5554874A (en) * 1995-06-05 1996-09-10 Quantum Effect Design, Inc. Six-transistor cell with wide bit-line pitch, double words lines, and bit-line contact shared among four cells
KR100214843B1 (ko) * 1996-03-29 1999-08-02 김주용 반도체 소자 및 그의 제조방법
KR100490648B1 (ko) * 2000-10-04 2005-05-24 주식회사 하이닉스반도체 에스램셀의 제조 방법
US6326257B1 (en) * 2001-02-13 2001-12-04 United Microelectronics Corp. Method of fabricating static random access memory with spacers
JP2003133417A (ja) * 2001-10-26 2003-05-09 Matsushita Electric Ind Co Ltd 半導体集積回路装置及びその設計方法
DE102004037087A1 (de) 2004-07-30 2006-03-23 Advanced Micro Devices, Inc., Sunnyvale Selbstvorspannende Transistorstruktur und SRAM-Zellen mit weniger als sechs Transistoren
DE102008007029B4 (de) 2008-01-31 2014-07-03 Globalfoundries Dresden Module One Limited Liability Company & Co. Kg Betrieb einer elektronischen Schaltung mit körpergesteuertem Doppelkanaltransistor und SRAM-Zelle mit körpergesteuertem Doppelkanaltransistor
KR102178732B1 (ko) * 2013-12-20 2020-11-13 삼성전자주식회사 반도체 소자

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4416049A (en) * 1970-05-30 1983-11-22 Texas Instruments Incorporated Semiconductor integrated circuit with vertical implanted polycrystalline silicon resistor
US4408385A (en) * 1978-06-15 1983-10-11 Texas Instruments Incorporated Semiconductor integrated circuit with implanted resistor element in polycrystalline silicon layer
JPS5954260A (ja) * 1982-09-22 1984-03-29 Hitachi Ltd 半導体記憶装置およびその製造方法
US4804636A (en) * 1985-05-01 1989-02-14 Texas Instruments Incorporated Process for making integrated circuits having titanium nitride triple interconnect
US4774203A (en) * 1985-10-25 1988-09-27 Hitachi, Ltd. Method for making static random-access memory device
JP2892683B2 (ja) * 1989-05-29 1999-05-17 株式会社日立製作所 半導体記憶装置およびその製造方法
JP2547800B2 (ja) * 1987-11-30 1996-10-23 株式会社日立製作所 半導体集積回路装置及びその製造方法
JPH03218667A (ja) * 1989-11-01 1991-09-26 Hitachi Ltd 半導体記憶装置
KR910010741A (ko) * 1989-11-02 1991-06-29 야마무라 가쯔미 반도체 집적 회로 장치
JPH0831534B2 (ja) * 1989-11-24 1996-03-27 シャープ株式会社 半導体記憶装置及びその製造方法
US5124774A (en) * 1990-01-12 1992-06-23 Paradigm Technology, Inc. Compact SRAM cell layout
DE69026503T2 (de) * 1990-07-31 1996-11-14 Ibm Verfahren zur Herstellung von Bauelementen mit übereinander angeordneten selbstjustierten Feldeffekttransistoren aus Polisilizium und sich daraus ergebende Struktur
US5114879A (en) * 1990-11-30 1992-05-19 Texas Instruments Incorporated Method of forming a microelectronic contact

Also Published As

Publication number Publication date
JPH05326887A (ja) 1993-12-10
KR100302091B1 (ko) 2001-10-22
EP0548675A2 (en) 1993-06-30
DE69231030D1 (de) 2000-06-15
DE69231030T2 (de) 2000-11-02
KR930014991A (ko) 1993-07-23
EP0548675B1 (en) 2000-05-10
US5264385A (en) 1993-11-23
EP0548675A3 (en) 1995-09-20

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees