TW230844B - - Google Patents
Info
- Publication number
- TW230844B TW230844B TW082104683A TW82104683A TW230844B TW 230844 B TW230844 B TW 230844B TW 082104683 A TW082104683 A TW 082104683A TW 82104683 A TW82104683 A TW 82104683A TW 230844 B TW230844 B TW 230844B
- Authority
- TW
- Taiwan
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
- H01L28/60—Electrodes
- H01L28/82—Electrodes with an enlarged surface, e.g. formed by texturisation
- H01L28/90—Electrodes with an enlarged surface, e.g. formed by texturisation having vertical extensions
- H01L28/91—Electrodes with an enlarged surface, e.g. formed by texturisation having vertical extensions made by depositing layers, e.g. by depositing alternating conductive and insulating layers
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Semiconductor Memories (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE4221431A DE4221431A1 (de) | 1992-06-30 | 1992-06-30 | Herstellverfahren für einen Schlüsselkondensator |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW230844B true TW230844B (sl) | 1994-09-21 |
Family
ID=6462140
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW082104683A TW230844B (sl) | 1992-06-30 | 1993-06-12 |
Country Status (6)
| Country | Link |
|---|---|
| EP (1) | EP0647356A1 (sl) |
| JP (1) | JPH07508136A (sl) |
| KR (1) | KR950702339A (sl) |
| DE (1) | DE4221431A1 (sl) |
| TW (1) | TW230844B (sl) |
| WO (1) | WO1994000874A1 (sl) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE4221432C2 (de) * | 1992-06-30 | 1994-06-09 | Siemens Ag | Globales Planarisierungsverfahren für integrierte Halbleiterschaltungen oder mikromechanische Bauteile |
| US5714779A (en) * | 1992-06-30 | 1998-02-03 | Siemens Aktiengesellschaft | Semiconductor memory device having a transistor, a bit line, a word line and a stacked capacitor |
| KR950021710A (ko) * | 1993-12-01 | 1995-07-26 | 김주용 | 반도체 장치의 캐패시터 제조방법 |
| US5840623A (en) * | 1995-10-04 | 1998-11-24 | Advanced Micro Devices, Inc. | Efficient and economical method of planarization of multilevel metallization structures in integrated circuits using CMP |
| JPH10144882A (ja) * | 1996-11-13 | 1998-05-29 | Oki Electric Ind Co Ltd | 半導体記憶素子のキャパシタ及びその製造方法 |
| WO1998028789A1 (fr) * | 1996-12-20 | 1998-07-02 | Hitachi, Ltd. | Dispositif memoire a semi-conducteur et procede de fabrication associe |
| GB2322964B (en) * | 1997-03-07 | 2001-10-17 | United Microelectronics Corp | Polysilicon CMP process for high-density DRAM cell structures |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2524862B2 (ja) * | 1990-05-01 | 1996-08-14 | 三菱電機株式会社 | 半導体記憶装置およびその製造方法 |
| US5162248A (en) * | 1992-03-13 | 1992-11-10 | Micron Technology, Inc. | Optimized container stacked capacitor DRAM cell utilizing sacrificial oxide deposition and chemical mechanical polishing |
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1992
- 1992-06-30 DE DE4221431A patent/DE4221431A1/de not_active Withdrawn
-
1993
- 1993-06-12 TW TW082104683A patent/TW230844B/zh active
- 1993-06-24 EP EP93912618A patent/EP0647356A1/de not_active Withdrawn
- 1993-06-24 JP JP6501947A patent/JPH07508136A/ja active Pending
- 1993-06-24 WO PCT/DE1993/000551 patent/WO1994000874A1/de not_active Application Discontinuation
-
1994
- 1994-12-30 KR KR1019940704838A patent/KR950702339A/ko active IP Right Grant
Also Published As
| Publication number | Publication date |
|---|---|
| EP0647356A1 (de) | 1995-04-12 |
| JPH07508136A (ja) | 1995-09-07 |
| WO1994000874A1 (de) | 1994-01-06 |
| KR950702339A (ko) | 1995-06-19 |
| DE4221431A1 (de) | 1994-01-05 |