TW202320148A - Electronic component manufacturing method - Google Patents

Electronic component manufacturing method Download PDF

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TW202320148A
TW202320148A TW111136705A TW111136705A TW202320148A TW 202320148 A TW202320148 A TW 202320148A TW 111136705 A TW111136705 A TW 111136705A TW 111136705 A TW111136705 A TW 111136705A TW 202320148 A TW202320148 A TW 202320148A
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protective sheet
semiconductor wafer
substrate
manufacturing
small pieces
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宍戸雄一郎
佐藤慧
高本尚英
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日商日東電工股份有限公司
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    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
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    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/60Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N

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Abstract

Provided is a method for producing an electronic component, the method including: a step of laminating a protective sheet for protecting a circuit component on at least one side of the substrate, the at least one side being a circuit surface on which the circuit component is disposed; a step of separating a layered product of the substrate and the protective sheet into small pieces at intervals from each other in a plane direction to produce small pieces of the layered product each in which a small piece of the protective sheet and a substrate chip being a small piece of the separated substrate are laminated; and a step of removing the small piece of the protective sheet laminated on the circuit surface of the substrate chip.

Description

電子零件裝置之製造方法Manufacturing method of electronic component device

本發明係關於一種用以製造例如具有半導體積體電路之半導體裝置等的電子零件裝置之製造方法。The present invention relates to a manufacturing method for manufacturing electronic component devices such as semiconductor devices having semiconductor integrated circuits.

一直以來,已知一種於製造具有半導體積體電路之半導體裝置等時會採用之電子零件裝置之製造方法。此種電子零件裝置之製造方法中,例如,於具有基材層及黏著劑層之切晶帶上貼附作為基板之半導體晶圓,並拉伸切晶帶擴大其面積,藉此分割半導體晶圓使其小片化成為半導體晶片。接著,拾取小片化後之基板之半導體晶片並將其接著於被接著體。Conventionally, there is known a method of manufacturing electronic component devices used in the manufacture of semiconductor devices having semiconductor integrated circuits and the like. In the manufacturing method of such an electronic component device, for example, a semiconductor wafer as a substrate is attached to a dicing tape having a base material layer and an adhesive layer, and the dicing tape is stretched to enlarge its area, thereby dividing the semiconductor wafer. The circle makes it small into semiconductor wafers. Next, pick up the semiconductor wafer of the chipped substrate and bond it to the adherend.

一般而言,此種電子零件裝置之製造方法係具備:前步驟,形成於晶圓之一面側配置有高度集積之電路構成要素之電路面;及後步驟,從形成有電路面之半導體晶圓切出半導體晶片並進行組裝。Generally speaking, the manufacturing method of this kind of electronic component device includes: the first step, forming the circuit surface with highly integrated circuit components arranged on one side of the wafer; and the subsequent step, forming the semiconductor wafer with the circuit surface Semiconductor wafers are cut out and assembled.

後步驟中,例如於晶圓中形成用以使形成有電路面之晶圓(半導體晶圓)小片化成為較小之半導體晶片(chip、die)之脆弱部位,並於與電路面為相反側之面貼附切晶帶之黏著劑層。接著,在維持將半導體晶圓貼附於切晶帶之黏著劑層之狀態下將切晶帶往面方向拉伸,藉此以上述脆弱部位為界將半導體晶圓分割小片化成為半導體晶片。之後,將小片化而成之半導體晶片從切晶帶之黏著劑層上剝離。In the latter step, for example, a fragile part is formed in the wafer to make the wafer (semiconductor wafer) formed with the circuit surface small into smaller semiconductor chips (chip, die), and on the opposite side to the circuit surface Adhesive layer of dicing tape attached to the surface. Then, the dicing tape is stretched in the plane direction while maintaining the state where the semiconductor wafer is attached to the adhesive layer of the dicing tape, so that the semiconductor wafer is divided into small pieces by using the above-mentioned weak parts as boundaries into semiconductor chips. Afterwards, the semiconductor wafer formed by dicing is peeled off from the adhesive layer of the dicing tape.

如上所述之後步驟,例如具有:隱形加工步驟,藉由雷射光等於半導體晶圓中形成用以使半導體晶圓小片化成為較小之半導體晶片(chip、die)之脆弱部位;安裝步驟,將半導體晶圓之與電路面為相反側之面貼附於切晶帶上以固定半導體晶圓;擴展步驟,將切晶帶往面方向拉伸,藉此使半導體晶圓小片化成為半導體晶片(chip、die);拾取步驟,從黏著劑層上剝離並取出半導體晶片;及接合步驟,將取出之半導體晶片接合於被接著體。半導體積體電路,係例如歷經此等步驟而被製造。As mentioned above, the following steps include, for example: a stealth processing step, which is formed in the semiconductor wafer by laser light to form a fragile part for making the semiconductor wafer small into smaller semiconductor chips (chip, die); the mounting step, the The surface of the semiconductor wafer that is opposite to the circuit surface is attached to the dicing tape to fix the semiconductor wafer; in the expansion step, the dicing tape is stretched in the direction of the surface, thereby making the semiconductor wafer small into semiconductor chips ( chip, die); the pick-up step, peeling off the adhesive layer and taking out the semiconductor chip; and the bonding step, bonding the taken-out semiconductor chip to the adherend. A semiconductor integrated circuit is manufactured, for example, through these steps.

如上所述之電子零件裝置之製造方法中,例如於上述接合步驟中,將半導體晶片之電路面朝向被接著體而配置,並將兩者接合(即所謂之倒裝晶片接合)。In the method of manufacturing an electronic component device as described above, for example, in the above-mentioned bonding step, the circuit surface of the semiconductor chip is arranged facing the object to be bonded, and the two are bonded (so-called flip-chip bonding).

作為此種電子零件裝置之製造方法,例如已知一種製造方法,其經由於半導體晶片之電路面側突出之凸塊、及被接著體之表面之導電材(焊料等),將半導體晶片與被接著體電連接。具體而言,作為此種電子零件裝置之製造方法,已知一種電子零件裝置之製造方法,其於半導體晶片及被接著體之間配置特定之底部填充材,並將配置於半導體晶片之電路面之電極部、與被接著體之電極部電連接(例如專利文獻1)。As a method of manufacturing such an electronic component device, for example, a manufacturing method is known in which a semiconductor chip is bonded to a substrate via a bump protruding from the circuit surface side of the semiconductor chip and a conductive material (solder, etc.) on the surface of the substrate. Then the body is electrically connected. Specifically, as a method of manufacturing such an electronic component device, there is known a method of manufacturing an electronic component device in which a specific underfill material is arranged between a semiconductor wafer and an adherend, and a specific underfill material is arranged on the circuit surface of the semiconductor wafer. The electrode portion is electrically connected to the electrode portion of the adherend (for example, Patent Document 1).

詳細而言,專利文獻1所記載之電子零件裝置之製造方法,係一種製造具備:被接著體、與該被接著體電連接之半導體元件、及填充該被接著體與該半導體元件之間之空間的底部填充材之電子零件裝置之製造方法,其包含: 準備步驟,準備將特定之底部填充材貼合於前述半導體元件而成之附底部填充材之半導體元件;及 連接步驟,以前述底部填充材填充前述半導體元件與前述被接著體之間之空間,並將前述半導體元件與前述被接著體電連接。 更詳細而言,前述特定之底部填充材,其加熱處理前之150℃下之熔融黏度為50Pa・s以上3000Pa・s以下;且 將前述加熱處理前之150℃下之熔融黏度設為η1,並將於130℃下加熱處理1小時後之150℃下之熔融黏度設為η2時,黏度變化率[(η2/η1)×100]為500%以下; 將DSC測定中從-50℃至300℃為止之升溫過程中之總發熱量設為Qt,並將於175℃下加熱2小時後之從-50℃至300℃為止之升溫過程中之總發熱量設為Qh時,反應率{[(Qt-Qh)/Qt]×100}為90%以上。 Specifically, the manufacturing method of an electronic component device described in Patent Document 1 is a manufacturing method comprising: an adherend, a semiconductor element electrically connected to the adherend, and a space between the adherend and the semiconductor element. A method of manufacturing an electronic component device of a space bottom filling material, comprising: Preparatory step of preparing semiconductor elements with underfill materials formed by bonding specific underfill materials to the aforementioned semiconductor elements; and In the connecting step, the space between the semiconductor element and the adherend is filled with the underfill material, and the semiconductor element and the adherend are electrically connected. More specifically, the aforementioned specified underfill material has a melt viscosity at 150°C before heat treatment of 50 Pa・s to 3000 Pa・s; and When the melt viscosity at 150°C before the aforementioned heat treatment is set as η1, and the melt viscosity at 150°C after heat treatment at 130°C for 1 hour is set as η2, the viscosity change rate [(η2/η1)×100 ] is less than 500%; The total calorific value during the heating process from -50°C to 300°C in the DSC measurement is Qt, and the total calorific value during the heating process from -50°C to 300°C after heating at 175°C for 2 hours When the amount is Qh, the reaction rate {[(Qt-Qh)/Qt]×100} is 90% or more.

根據專利文獻1所記載之電子零件裝置之製造方法,係使用具有特定之黏度變化率、熔融黏度及反應率之底部填充材製造電子零件裝置,因此可達成製造效率之提升。 [先前技術文獻] [專利文獻] According to the manufacturing method of the electronic component device described in Patent Document 1, the electronic component device is manufactured using an underfill material having a specific viscosity change rate, melt viscosity, and reaction rate, so that the manufacturing efficiency can be improved. [Prior Technical Literature] [Patent Document]

[專利文獻1]日本國特開2015-170754號公報[Patent Document 1] Japanese Patent Laid-Open No. 2015-170754

[發明所欲解決之技術問題][Technical problem to be solved by the invention]

然而,例如於上述接合步驟中,有時會使被接著體與半導體晶片之間之間隙變得更小而進行接合。例如,有時會使已接合於基板等之半導體晶片成為被接著體,在此半導體晶片上進一步接合半導體晶片,重複與上述相同之倒裝晶片接合,從而堆疊半導體晶片。此時,例如會於相鄰之半導體晶片之間使電極部彼此直接連接。尤其於如此使電極部彼此直接連接之情形時,由於半導體晶片之間之間隙幾乎消失,因此若有異物附著於半導體晶片之電路面,可能會難以實施確實的接合。However, for example, in the above-mentioned bonding step, the gap between the adherend and the semiconductor wafer may be bonded with a smaller gap. For example, a semiconductor chip bonded to a substrate or the like may be used as an adherend, and a semiconductor chip may be further bonded to the semiconductor chip, and the same flip-chip bonding as above may be repeated to stack the semiconductor chips. In this case, for example, the electrode portions are directly connected between adjacent semiconductor wafers. Especially in the case where the electrode parts are directly connected to each other in this way, since the gap between the semiconductor chips almost disappears, if foreign matter adheres to the circuit surface of the semiconductor chip, it may be difficult to perform reliable bonding.

此種異物,例如如上所述,於將基板之半導體晶圓切割小片化等時,半導體晶圓之一部分可能生成為微小片,並附著於半導體晶片之電路面等。因此,需要一種可抑制此種異物附著於半導體晶片等之基板晶片之電路面的電子零件裝置之製造方法。 又,若有大量異物附著於半導體晶片等之基板晶片之電路面,則不論是否實施如上所述之接合步驟,由附著有大量異物之基板晶片所構成之電子零件裝置之產品可靠性皆可能降低。 For example, as described above, when the semiconductor wafer of the substrate is diced into small pieces, a part of the semiconductor wafer may be formed into tiny pieces, which may adhere to the circuit surface of the semiconductor wafer or the like. Therefore, there is a need for a method of manufacturing an electronic component device capable of suppressing such foreign matter from adhering to the circuit surface of a substrate wafer such as a semiconductor wafer. Also, if a large amount of foreign matter adheres to the circuit surface of the substrate wafer such as a semiconductor wafer, the product reliability of the electronic component device composed of the substrate wafer with a large amount of foreign matter attached may be reduced regardless of whether the above-mentioned bonding step is performed. .

然而,對於可抑制異物附著於小片化後之基板晶片之電路面的電子零件裝置之製造方法,尚難謂已受到充分研究。However, it is difficult to say that sufficient research has been done on a method of manufacturing electronic components and devices capable of suppressing foreign matter from adhering to the circuit surface of the chipped substrate wafer.

據此,本發明之課題在於:提供一種可抑制異物附著於所製作之基板晶片之電路面的電子零件裝置之製造方法。 [技術手段] Accordingly, an object of the present invention is to provide a method of manufacturing an electronic component device capable of suppressing foreign matter from adhering to the circuit surface of a manufactured substrate wafer. [Technical means]

為了解決上述課題,本發明之電子零件裝置之製造方法,係包含: 於基板之至少一面且配置有電路構成要素之電路面上,疊合保護前述電路構成要素之保護片材之步驟; 使前述基板及前述保護片材相疊而成之積層物於面方向上空出間隔而分割從而使其小片化,藉此製作前述基板小片化後之基板晶片與前述保護片材之小片相疊而成之前述積層物之小片的步驟;及 將疊於前述基板晶片之電路面上之前述保護片材之小片除去之步驟。 In order to solve the above-mentioned problems, the manufacturing method of the electronic component device of the present invention includes: A step of laminating a protective sheet for protecting the above-mentioned circuit components on at least one side of the substrate on which the circuit components are disposed; The laminate formed by stacking the aforementioned substrate and the aforementioned protective sheet is divided in the plane direction with a gap to be divided into small pieces, thereby producing a chip of the aforementioned substrate chip and a small piece of the aforementioned protective sheet stacked on top of each other. The step of forming small pieces of the aforementioned laminate; and A step of removing a small piece of the aforementioned protective sheet stacked on the circuit surface of the aforementioned substrate wafer.

上述電子零件裝置之製造方法,可進一步包含:將前述基板晶片之電路面朝向被接著體配置,並將前述基板晶片與前述被接著體接合之步驟。The manufacturing method of the above-mentioned electronic component device may further include a step of arranging the circuit surface of the substrate wafer facing the adherend, and bonding the substrate wafer to the adherend.

上述電子零件裝置之製造方法中,前述保護片材係含有水溶性高分子化合物; 前述除去步驟中,可使含水之液體與前述保護片材之複數個小片接觸,使各小片之至少一部分溶解於前述液體中,藉此將前述保護片材之複數個小片除去。 In the above method of manufacturing an electronic component device, the protective sheet contains a water-soluble polymer compound; In the removing step, the plurality of small pieces of the protective sheet may be brought into contact with a liquid containing water to dissolve at least a part of each small piece in the liquid, thereby removing the plurality of small pieces of the protective sheet.

上述電子零件裝置之製造方法中,於前述除去步驟中,可將貼附於前述保護片材之複數個小片之剝離用黏著帶剝離,藉此將前述剝離用黏著帶連同前述保護片材之複數個小片除去。In the above method of manufacturing an electronic component device, in the removing step, the adhesive tape for peeling of the plurality of small pieces attached to the protective sheet can be peeled off, whereby the adhesive tape for peeling and the plurality of small pieces of the protective sheet can be peeled off. A small piece is removed.

上述電子零件裝置之製造方法中,前述保護片材係含有硬化性組成物; 可藉由硬化處理使疊於前述基板上之前述保護片材硬化後,將前述基板及前述保護片材之前述積層物分割使其小片化。 In the above method of manufacturing an electronic component device, the protective sheet contains a curable composition; After the protective sheet laminated on the substrate is cured by curing treatment, the laminate of the substrate and the protective sheet may be divided into small pieces.

上述電子零件裝置之製造方法中,分別配置於前述基板晶片之二表面並作為前述電路構成要素之電極部係互相導通; 前述接合步驟中,可堆疊至少二個前述基板晶片,並使作為前述被接著體之一個前述基板晶片之前述電極部、與另一個前述基板晶片之前述電極部互相直接連接。 In the manufacturing method of the above-mentioned electronic component device, the electrode parts respectively arranged on the two surfaces of the above-mentioned substrate wafer and serving as the above-mentioned circuit constituent elements are connected to each other; In the bonding step, at least two substrate wafers may be stacked, and the electrode portion of one of the substrate wafers serving as the adherend may be directly connected to the electrode portion of the other substrate wafer.

以下,參照圖式說明本發明之電子零件裝置之製造方法之實施型態。Hereinafter, an embodiment of the manufacturing method of the electronic component device of the present invention will be described with reference to the drawings.

本實施型態之電子零件裝置之製造方法係包含: 於基板之至少一面且配置有電路構成要素之電路面上,疊合保護前述電路構成要素之保護片材10之步驟(保護步驟); 使前述基板及前述保護片材10相疊而成之積層物於面方向上空出間隔而分割從而使其小片化,藉此製作前述基板小片化後之基板晶片與前述保護片材10之小片相疊而成之前述積層物之小片的步驟(擴展步驟);及 將疊於前述基板晶片之電路面上之前述保護片材10之小片除去之步驟(除去步驟)。 本實施型態之電子零件裝置之製造方法,可進一步包含:將前述基板晶片之電路面朝向被接著體配置,並將前述基板晶片與前述被接著體接合之步驟(接合步驟)。 The manufacturing method of the electronic component device of this embodiment includes: A step of laminating a protective sheet 10 for protecting the above-mentioned circuit components on at least one side of the substrate and the circuit surface on which the circuit components are arranged (protection step); The laminate formed by stacking the above-mentioned substrate and the above-mentioned protective sheet 10 is divided in the plane direction with a gap to make it into small pieces, thereby producing a substrate wafer after the above-mentioned small pieces of the substrate and the small pieces of the above-mentioned protective sheet 10. The step of stacking small sheets of the aforementioned laminate (expansion step); and A step of removing the small pieces of the protective sheet 10 stacked on the circuit surface of the substrate wafer (removing step). The method for manufacturing an electronic component device according to this embodiment may further include a step of arranging the circuit surface of the substrate wafer facing the adherend, and bonding the substrate wafer to the adherend (bonding step).

本實施型態之電子零件裝置之製造方法,亦可於上述電路面上疊合上述保護片材前,進一步包含:提高與電路面Sa接觸之氣體之濕度之步驟(潤濕步驟)。The manufacturing method of the electronic component device of this embodiment may further include a step of increasing the humidity of the gas in contact with the circuit surface Sa (wetting step) before laminating the protective sheet on the circuit surface.

本實施型態之電子零件裝置之製造方法中,基板之至少一面受到保護片材10之保護。受保護之面(配置有電路構成要素之側之電路面Sa)可僅為基板之一面,亦可為兩面。In the manufacturing method of the electronic component device of the present embodiment, at least one side of the substrate is protected by the protective sheet 10 . The protected surface (the circuit surface Sa on which the circuit components are arranged) may be only one surface of the substrate, or may be both surfaces.

基板S,如圖1A之剖面圖所示,只要為板狀則其材質無特別限定。基板,可列舉例如:半導體晶圓、構成CMOS(Complementary Metal Oxide Semiconductor,互補性金屬氧化半導體)或MEMS(Micro Electro Mechanical Systems,微機電系統)等之基板、構成仿真晶圓之基板、或配線基板等。 此外,基板之至少一面側配置有電路構成要素。配置有電路構成要素之側之基板面成為電路面。電路構成要素,可列舉例如:配線、電極部、或者電晶體、二極體或感測器(受光感測器或振動感測器等)等之元件。 受保護片材10保護之電路面,例如可僅配置元件,亦可僅配置電極部。換言之,受保護片材10保護之電路面,只要配置電路構成要素中之至少一種即可。並且,電路構成要素中之至少一種會受到保護片材10之覆蓋及保護。 As shown in the cross-sectional view of FIG. 1A , the material of the substrate S is not particularly limited as long as it is plate-shaped. Substrates include, for example, semiconductor wafers, substrates constituting CMOS (Complementary Metal Oxide Semiconductor) or MEMS (Micro Electro Mechanical Systems, microelectromechanical systems), substrates constituting dummy wafers, or wiring substrates wait. In addition, circuit components are disposed on at least one side of the substrate. The substrate surface on the side where the circuit components are disposed becomes the circuit surface. Circuit constituent elements include, for example, elements such as wiring, electrode parts, or transistors, diodes, or sensors (light-receiving sensors, vibration sensors, etc.). The circuit surface protected by the protective sheet 10 may be provided with, for example, only components or only electrodes. In other words, the circuit surface protected by the protective sheet 10 only needs to arrange at least one of the circuit constituent elements. In addition, at least one of the circuit components is covered and protected by the protective sheet 10 .

上述潤濕步驟係視需要而實施。上述潤濕步驟,於採用含有水溶性高分子化合物之保護片材10(於後詳述)之情形下尤其有效。上述潤濕步驟,例如如圖1B所示,可藉由使含有水蒸氣之氣體與電路面Sa接觸,或將霧狀水噴於電路面Sa等實施。或者,亦可藉由將水塗布於電路面Sa而實施。藉由實施潤濕步驟,可提高含有水溶性高分子化合物之保護片材10對電路面Sa之密著性。The wetting steps described above are performed as necessary. The above wetting step is particularly effective when using a protective sheet 10 (described in detail later) containing a water-soluble polymer compound. The above wetting step, for example, as shown in FIG. 1B , can be implemented by making a gas containing water vapor contact the circuit surface Sa, or spraying mist water on the circuit surface Sa, or the like. Alternatively, it can also be implemented by applying water to the circuit surface Sa. By implementing the wetting step, the adhesion of the protective sheet 10 containing the water-soluble polymer compound to the circuit surface Sa can be improved.

上述保護步驟中,將保護片材10疊於配置有電路構成要素中之任一者之側的基板表面(電路面)上(參照圖1C)。換言之,可將保護片材10疊於配置有配線作為電路構成要素之側之電路面上,亦可將保護片材10疊於配置有感測器作為電路構成要素之側之基板之一面上,亦可將保護片材10疊於配置有電極部作為電路構成要素之側之基板之一面上。上述保護步驟中,以保護片材10覆蓋電路構成要素而將保護片材10疊於基板之至少一面上。In the above protection step, the protection sheet 10 is stacked on the substrate surface (circuit surface) on the side where any one of the circuit components is arranged (see FIG. 1C ). In other words, the protective sheet 10 may be laminated on the circuit surface on the side where the wiring is arranged as the circuit constituent element, or the protective sheet 10 may be laminated on one surface of the substrate on the side where the sensor is arranged as the circuit constituent element, The protective sheet 10 may also be stacked on one surface of the substrate on which the electrode portion is disposed as a circuit component. In the above protection step, the circuit components are covered with the protection sheet 10 and the protection sheet 10 is stacked on at least one surface of the substrate.

上述保護片材10如圖1D及圖2A所示,係形成為片材狀,並具有可在較弱之力下變形之柔軟性。此外,上述保護片材10係具有可黏著於基板S之黏著性。又,在上述製造步驟之前或其過程中,保護片材10之一面或二面上亦可疊合有剝離襯墊15。 又,圖式中之各圖為示意圖,未必與實物之縱橫長度比相同。其他圖式亦同。 As shown in FIG. 1D and FIG. 2A, the above-mentioned protective sheet 10 is formed into a sheet shape and has flexibility that can be deformed under relatively weak force. In addition, the above-mentioned protection sheet 10 has an adhesive property that can be adhered to the substrate S. As shown in FIG. In addition, the release liner 15 may be laminated on one or both surfaces of the protective sheet 10 before or during the above manufacturing steps. In addition, each drawing in the drawing is a schematic diagram, and the aspect ratio of an actual thing is not necessarily the same. The same goes for other schemas.

上述擴展步驟中,例如如圖1E所示,準備於內部形成有用以切割之脆弱部分之基板S。接著,例如如圖1F所示,在將保護片材10配置於基板S之一面側之狀態下,將基板S及保護片材10之積層物分割小片化。進行小片化時,使用配置於基板S之另一面側之切晶帶20,將切晶帶20往面方向拉伸以擴大切晶帶20之表面積。藉此,將基板S及保護片材10之積層物分割小片化,並沿面方向擴大彼此相鄰之基板S之間隔。In the above-mentioned expanding step, for example, as shown in FIG. 1E , a substrate S having a fragile portion for dicing formed therein is prepared. Next, for example, as shown in FIG. 1F , in a state where the protective sheet 10 is arranged on one side of the substrate S, the laminate of the substrate S and the protective sheet 10 is divided into small pieces. When performing chipping, the crystal cutting tape 20 arranged on the other side of the substrate S is used, and the crystal cutting tape 20 is stretched in the surface direction to increase the surface area of the crystal cutting tape 20 . Thereby, the laminate of the substrate S and the protective sheet 10 is divided into small pieces, and the distance between the substrates S adjacent to each other is enlarged along the plane direction.

上述切晶帶20,如圖2B所示,具備基材層21、及疊於該基材層21上之黏著劑層22。切晶帶20可使用市售品。The above-mentioned dicing tape 20 , as shown in FIG. 2B , includes a base material layer 21 and an adhesive layer 22 stacked on the base material layer 21 . As the dicing tape 20, a commercially available item can be used.

上述除去步驟中,如圖1G所示意性表示地,使保護片材之複數個小片10’之至少一部分溶解,或者將各小片10’分別從基板之小片S’上剝離等,藉此將疊於基板之小片S’上之保護片材之各小片10’除去。In the above-mentioned removal step, as schematically shown in FIG. 1G , at least a part of the plurality of small pieces 10' of the protective sheet is dissolved, or each small piece 10' is peeled off from the small piece S' of the substrate, etc., whereby the stacked Each small piece 10' of the protective sheet on the small piece S' of the substrate is removed.

上述接合步驟中,例如,將基板之小片S’直接或經由指定之部件接合於被接著體Z。又,接合步驟中,例如亦可堆疊複數個基板之小片S’。此外,例如亦可將呈附著有覆蓋用樹脂之狀態之基板之小片S’接合於被接著體Z。 被接著體Z,可列舉例如:中介層、配線電路基板、或基板之小片(堆疊基板之小片使其積層之情形時)等。 In the above bonding step, for example, the small piece S' of the substrate is bonded to the adherend Z directly or via a specified member. In addition, in the bonding step, for example, small pieces S' of a plurality of substrates may be stacked. In addition, for example, the small piece S' of the substrate in a state where the covering resin is adhered can also be bonded to the adherend Z. The adherend Z includes, for example, an interposer, a printed circuit board, or a small piece of a substrate (in the case of stacking small pieces of the substrate to laminate them) and the like.

本實施型態之電子零件裝置之製造方法所製造之電子零件裝置,例如可為:具備複數個半導體晶片等之半導體裝置;具備具互補性MOS(CMOS,Complementary Metal Oxide Semiconductor)之系統LSI之裝置;或者具備藉由微細加工技術使機械要素零件、感測器、致動器、電子電路集積於一個矽基板、玻璃基板、有機材料基板等上而成之裝置(MEMS,Micro Electro Mechanical Systems)等之裝置。所製造之電子零件裝置,亦可為具備配線基板之裝置。The electronic component device manufactured by the electronic component device manufacturing method of this embodiment can be, for example, a semiconductor device with a plurality of semiconductor chips, etc.; a device with a complementary MOS (CMOS, Complementary Metal Oxide Semiconductor) system LSI ; or a device (MEMS, Micro Electro Mechanical Systems) that has mechanical elements, sensors, actuators, and electronic circuits accumulated on a silicon substrate, glass substrate, organic material substrate, etc. by microfabrication technology, etc. device. The manufactured electronic component device may also be a device provided with a wiring board.

以下作為電子零件裝置之製造方法之例,列舉半導體裝置之製造方法並進行說明。Hereinafter, a method for manufacturing a semiconductor device will be cited as an example of a method for manufacturing an electronic component device, and will be described.

半導體裝置之製造方法中,一般而言,係從至少於一面側配置有電路構成要素之半導體晶圓(基板)切出半導體晶片,並組裝具備切出之半導體晶片之半導體裝置。本實施型態之半導體裝置之製造方法中,係將上述之保護片材10及切晶帶20至少用作輔助用具,並如下製造半導體裝置。In a method of manufacturing a semiconductor device, generally, a semiconductor wafer is cut out from a semiconductor wafer (substrate) on which circuit constituent elements are disposed on at least one side, and a semiconductor device including the cut out semiconductor wafer is assembled. In the method of manufacturing a semiconductor device according to this embodiment, the above-mentioned protective sheet 10 and dicing tape 20 are used at least as auxiliary tools, and a semiconductor device is manufactured as follows.

作為半導體裝置之製造方法之具體實施型態,列舉第一實施型態至第五實施型態之實施型態並進行詳細說明。As specific embodiments of the manufacturing method of a semiconductor device, the first embodiment to the fifth embodiment are listed and described in detail.

「第一實施型態」 第一實施型態之半導體裝置之製造方法,係具備組裝步驟,其從至少一面為電路面之半導體晶圓W切出半導體晶片X,並組裝具有如此之半導體晶片X之半導體裝置。 如此之組裝步驟,係包含:於為半導體晶圓W之至少一面且配置有電路構成要素之側之電路面上,疊合用以保護前述電路構成要素之保護片材10之步驟; 使相疊之半導體晶圓W及保護片材10之積層物於面方向上空出間隔而分割從而使其小片化,藉此製作半導體晶圓W小片化後之半導體晶片X與保護片材10之小片相疊而成之積層物之複數個小片之步驟; 將疊於半導體晶片X之電路面上之保護片材之各小片10’除去之步驟;及 將半導體晶片X之電路面朝向被接著體配置,並將半導體晶片X與被接著體接合之步驟。 "First Implementation Type" The method for manufacturing a semiconductor device according to the first embodiment includes an assembling step of cutting out a semiconductor wafer X from a semiconductor wafer W having at least one side as a circuit surface, and assembling a semiconductor device having such a semiconductor wafer X. Such an assembling step includes: a step of laminating a protective sheet 10 for protecting the above-mentioned circuit components on the circuit surface of at least one side of the semiconductor wafer W on which the circuit components are arranged; The stacked semiconductor wafer W and the laminated product of the protective sheet 10 are divided in the plane direction with a gap to be divided into small pieces, thereby producing the semiconductor wafer X and the protective sheet 10 after the semiconductor wafer W is chipped. The step of a plurality of small pieces of a laminate formed by stacking small pieces; A step of removing each small piece 10' of the protective sheet laminated on the circuit surface of the semiconductor chip X; and The step of arranging the circuit surface of the semiconductor chip X facing the adherend, and bonding the semiconductor chip X and the adherend.

第一實施型態之組裝步驟,例如具有以下之各步驟。 具體而言,第一實施型態之組裝步驟,係具有: 安裝步驟,將分別於兩面配置有電路構成要素之半導體晶圓W貼附於切晶帶20,將半導體晶圓W固定於切晶帶20; 保護步驟(上述之疊合步驟),將保護片材10貼附於半導體晶圓W之一側之電路面,藉此保護電路面; 隱形加工步驟,藉由雷射光於貼附有保護片材10之半導體晶圓W之內部形成脆弱部位,藉此進行使半導體晶圓W小片化成為半導體晶片(chip、die)之準備; 擴展步驟(上述之製作積層物之小片之步驟),藉由拉伸切晶帶20使半導體晶圓W及保護片材10一同小片化; 除去步驟(上述之除去步驟),將貼附於半導體晶片X之保護片材之複數個小片10’除去; 拾取步驟,對半導體晶片X與黏著劑層22之間進行剝離並取出半導體晶片X;及 接合步驟(上述之接合步驟),將取出之半導體晶片X接合於被接著體。實施此等步驟時,上述之保護片材10及切晶帶20係用作製造輔助用具。 The assembly steps of the first embodiment include, for example, the following steps. Specifically, the assembling steps of the first embodiment include: The mounting step is to attach the semiconductor wafer W with the circuit components arranged on both sides to the dicing tape 20, and fix the semiconductor wafer W to the dicing tape 20; The protection step (the above lamination step) is to attach the protection sheet 10 to the circuit surface of one side of the semiconductor wafer W, thereby protecting the circuit surface; In the stealth processing step, laser light is used to form a fragile part inside the semiconductor wafer W attached with the protective sheet 10, thereby performing preparations for making the semiconductor wafer W small into semiconductor chips (chips, dies); The expansion step (the above-mentioned step of making a small piece of the laminate) is to make the semiconductor wafer W and the protective sheet 10 into small pieces together by stretching the dicing tape 20; The removal step (the above-mentioned removal step) is to remove a plurality of small pieces 10' of the protective sheet attached to the semiconductor wafer X; Picking up step, peeling between the semiconductor wafer X and the adhesive layer 22 and taking out the semiconductor wafer X; and In the bonding step (the above-mentioned bonding step), the semiconductor wafer X taken out is bonded to the adherend. When implementing these steps, the above-mentioned protective sheet 10 and crystal cutting tape 20 are used as manufacturing auxiliary tools.

小片化成為半導體晶片X前之半導體晶圓W,例如可為藉由背磨加工被研磨至所期望之厚度者。具體而言,背磨加工中,可對電路面貼附有背磨膠帶B之半導體晶圓W進行研磨,將半導體晶圓W之厚度薄化至後續所製作之半導體晶片X之厚度。The semiconductor wafer W before being chipped into the semiconductor wafer X may be ground to a desired thickness by backgrinding, for example. Specifically, in the back grinding process, the semiconductor wafer W with the back grinding tape B attached to the circuit surface can be ground to reduce the thickness of the semiconductor wafer W to the thickness of the semiconductor wafer X produced subsequently.

半導體晶圓W係構成為可獲得複數個半導體晶片X。詳細而言,半導體晶圓W之構成,係可藉由於沿面之複數個方向(例如沿面且互相正交之方向)上分別空出間隔而分割從而使其小片化,進而製作複數個半導體晶片X。此外,半導體晶圓W中,電路構成要素係至少被配置於一面,至少一面為電路面。例如,第一實施型態所使用之半導體晶圓W中,係兩面分別為電路面。另一方面,其他實施型態所使用之半導體晶圓W中,則係任一面為電路面。如圖2C所示,第一實施型態中,半導體晶圓W之兩面側分別配置有作為電路構成要素之電極部D。一側之電極部D係與另一側之電極部D互相導通(電連接)。The semiconductor wafer W is configured so that a plurality of semiconductor wafers X can be obtained. Specifically, the structure of the semiconductor wafer W can be divided into small pieces by vacating intervals in a plurality of directions along the surface (for example, directions perpendicular to the surface and mutually orthogonal), and then a plurality of semiconductor wafers X can be produced. . In addition, in the semiconductor wafer W, circuit components are arranged on at least one surface, and at least one surface is a circuit surface. For example, in the semiconductor wafer W used in the first embodiment, both surfaces are circuit surfaces. On the other hand, in the semiconductor wafer W used in other embodiments, either side is a circuit side. As shown in FIG. 2C , in the first embodiment, electrode portions D serving as circuit constituent elements are disposed on both sides of the semiconductor wafer W, respectively. The electrode part D on one side is electrically connected to the electrode part D on the other side.

詳細而言,分割半導體晶圓W所製作之半導體晶片X,係具有分別配置於二表面且互相導通之電極部D。更詳細而言,如圖2D所示,半導體晶片X之兩面側分別配置有電極部D,且半導體晶片X之內部配置有於厚度方向上延伸並貫通之導電性之貫通孔V。經由如此之貫通孔V,兩面側之各電極部D互相導通。電極部D及貫通孔V皆由金屬材料等導電性材料所構成。貫通孔V亦稱為所謂的TSV。電極部D及貫通孔V,可由一體化之部件構成,亦可將個別形成之部件互相接合而構成。 又,於近年的半導體產業中,隨著集積化技術進一步的進展,需要一種更薄的半導體晶片(例如20μm以上50μm以下之厚度)。從厚度方向之一側觀察半導體晶片時之形狀,例如為矩形狀;一邊之長度,例如為5mm以上20mm以下之指定長度。 Specifically, the semiconductor wafer X manufactured by dividing the semiconductor wafer W has electrode portions D respectively arranged on two surfaces and conducting with each other. More specifically, as shown in FIG. 2D , electrode portions D are arranged on both sides of the semiconductor wafer X, and conductive through-holes V extending and penetrating in the thickness direction are arranged inside the semiconductor wafer X. Through the through-holes V as described above, the electrode portions D on both surfaces are electrically connected to each other. Both the electrode portion D and the through hole V are made of conductive materials such as metal materials. The through hole V is also called a so-called TSV. The electrode portion D and the through-hole V may be constituted by an integrated member, or may be constituted by bonding separately formed members to each other. In addition, in the semiconductor industry in recent years, with the further development of integration technology, a thinner semiconductor wafer (for example, a thickness of 20 μm or more and 50 μm or less) is required. The shape of the semiconductor wafer when viewed from one side in the thickness direction is, for example, a rectangle; the length of one side is, for example, a specified length ranging from 5 mm to 20 mm.

以下,於表示第一實施型態之製造方法之情況的圖式中標記「I」。同樣地,於第二實施型態~第五實施型態分別標記「II」~「V」。Hereinafter, "I" is marked in the drawings showing the state of the manufacturing method of the first embodiment. Similarly, "II" to "V" are respectively marked in the second embodiment to the fifth embodiment.

安裝步驟中,將半導體晶圓W固定於切晶帶20。如圖3A所示,半導體晶圓W之一側之電路面上,例如貼附有玻璃載體G。玻璃載體G係疊於半導體晶圓W之一側之電路面上,以支撐厚度較薄之半導體晶圓,並使如此之半導體晶圓便於操作。例如,玻璃載體G係於晶圓之一面側形成電路後被貼附於如此之電路面,並在被貼附於晶圓之狀態下,用於進一步在另一面側形成電路。玻璃載體G之厚度,例如為0.5mm以上5.0mm以下。In the mounting step, the semiconductor wafer W is fixed to the dicing tape 20 . As shown in FIG. 3A , on the circuit surface of one side of the semiconductor wafer W, for example, a glass carrier G is attached. The glass carrier G is stacked on the circuit surface of one side of the semiconductor wafer W to support the thinner semiconductor wafer and make the semiconductor wafer easier to handle. For example, the glass carrier G is attached to the circuit surface after forming a circuit on one surface of the wafer, and is used to further form a circuit on the other surface while being attached to the wafer. The thickness of the glass carrier G is, for example, not less than 0.5 mm and not more than 5.0 mm.

安裝步驟中,將切晶環R安裝於切晶帶20之黏著劑層22上,並將半導體晶圓W貼附於黏著劑層22之露出面(參照圖3B)。接著,從半導體晶圓W上剝離玻璃載體G(參照圖3C)。In the installation step, the crystal cutting ring R is installed on the adhesive layer 22 of the crystal cutting tape 20 , and the semiconductor wafer W is attached to the exposed surface of the adhesive layer 22 (refer to FIG. 3B ). Next, the glass carrier G is peeled off from the semiconductor wafer W (see FIG. 3C ).

亦可於後續之保護步驟前,如圖3D所示,實施潤濕步驟,提高與半導體晶圓W之電路面Wa接觸之氣體之濕度。於保護片材10含有水溶性高分子化合物之情形時,藉由實施潤濕步驟,半導體晶圓W之電路面Wa與保護片材10之密著性變得更加良好。又,潤濕步驟並非必要,可視需要實施。Before the subsequent protection step, as shown in FIG. 3D , a wetting step may be implemented to increase the humidity of the gas in contact with the circuit surface Wa of the semiconductor wafer W. When the protective sheet 10 contains a water-soluble polymer compound, the adhesion between the circuit surface Wa of the semiconductor wafer W and the protective sheet 10 becomes more favorable by performing the wetting step. Also, the wetting step is not essential, and may be performed as needed.

保護步驟中,於半導體晶圓W之上述一側之電路面上疊合保護片材10 (參照圖3E)。 保護步驟中,例如可將保護片材10直接按壓並貼附於上述電路面上,藉此於上述電路面上疊合保護片材10。另一方面,亦可調製含有構成保護片材10之固體成分、及溶解該固體成分之溶劑之保護片材用組成物,並於將如此之組成物塗布於上述電路面後使溶劑揮發,從而形成與上述電路面接觸之保護片材10,藉此於上述電路面上疊合保護片材10。 藉由於半導體晶圓W之電路面上疊合保護片材10,可防止垃圾等附著於被保護片材10所覆蓋之半導體晶圓W之電路面,直至保護片材10被除去。 In the protection step, a protection sheet 10 is laminated on the circuit surface of the above-mentioned side of the semiconductor wafer W (see FIG. 3E ). In the protection step, for example, the protection sheet 10 may be directly pressed and attached to the above-mentioned circuit surface, thereby laminating the protection sheet 10 on the above-mentioned circuit surface. On the other hand, it is also possible to prepare a protective sheet composition containing solid components constituting the protective sheet 10 and a solvent for dissolving the solid components, and to volatilize the solvent after applying such a composition on the above-mentioned circuit surface, thereby A protective sheet 10 is formed in contact with the above-mentioned circuit surface, whereby the protective sheet 10 is laminated on the above-mentioned circuit surface. By laminating the protective sheet 10 on the circuit surface of the semiconductor wafer W, it is possible to prevent dust and the like from adhering to the circuit surface of the semiconductor wafer W covered by the protective sheet 10 until the protective sheet 10 is removed.

隱形加工步驟中,於半導體晶圓W之內部形成用以使半導體晶圓W小片化成為半導體晶片X之脆弱部位。藉由對半導體晶圓W照射雷射光L,於半導體晶圓W之內部形成脆弱部位(參照圖3F)。雷射光L,例如從切晶帶側往半導體晶圓W照射。又,以藉由後續之擴展步驟分割半導體晶圓W所製作之各半導體晶片X按事先設計好地具有上述電極部D之方式,對半導體晶圓W照射雷射光L。隱形加工步驟,例如可使用市售之隱形切割裝置實施。In the stealth processing step, fragile parts for chipping the semiconductor wafer W into semiconductor wafers X are formed inside the semiconductor wafer W. By irradiating the semiconductor wafer W with laser light L, a fragile portion is formed inside the semiconductor wafer W (see FIG. 3F ). The laser light L is irradiated onto the semiconductor wafer W from, for example, the dicing tape side. Further, the semiconductor wafer W is irradiated with laser light L so that each semiconductor wafer X produced by dividing the semiconductor wafer W in the subsequent expansion step has the above-mentioned electrode portion D as designed in advance. The stealth processing step, for example, can be implemented using a commercially available stealth dicing device.

擴展步驟中,如圖3G所示,在半導體晶圓W之兩面側分別配置有切晶帶20及保護片材10之狀態下,將切晶帶20往面方向拉伸以擴大切晶帶20之表面積。藉此,將半導體晶圓W及保護片材10之積層物分割小片化,並沿面方向擴大小片化所形成之彼此相鄰之半導體晶片X之間隔。詳細而言,於切晶帶20之黏著劑層22上安裝切晶環R後,將切晶環R固定於擴展裝置之保持具H上。將擴展裝置所具備之上推部件U從切晶帶20之下側上推,藉此拉伸切晶帶20使其往面方向擴展。藉此,在特定之溫度條件下使半導體晶圓W及保護片材10小片化。上述溫度條件,例如為-20℃以上0℃以下。藉由調降上推部件U解除擴展狀態(至此為低溫擴展步驟)。 如此地在低溫下進行擴展步驟時,保護片材10需被切割小片化。上述保護片材10,係被設計為於此時可良好地被切割。 進一步地,擴展步驟中,在更高之溫度條件下(例如10℃以上25℃以下)將切晶帶20拉伸以擴大切晶帶20之表面積。藉此,將彼此相鄰之半導體晶片X往膜面之面方向拉開,進一步擴大切口(間隔)(常溫擴展步驟)。 擴展步驟中,將切晶帶20往面方向拉伸以擴大切晶帶20之面積,藉此半導體晶圓W與保護片材10一同被分割成小片。詳細而言,藉由拉伸切晶帶20,能以半導體晶圓內部之上述脆弱部位為界,將半導體晶圓W分割成小片之半導體晶片X。此時,在由半導體晶圓W小片化成為半導體晶片X之同時,保護片材10亦被分割成小片。 In the expanding step, as shown in FIG. 3G , in the state where the dicing tape 20 and the protective sheet 10 are disposed on both sides of the semiconductor wafer W, the dicing tape 20 is stretched in the direction of the surface to expand the dicing tape 20 surface area. Thereby, the laminated product of the semiconductor wafer W and the protective sheet 10 is divided into small pieces, and the distance between the adjacent semiconductor wafers X formed by the small pieces is enlarged along the surface direction. Specifically, after the crystal cutting ring R is installed on the adhesive layer 22 of the crystal cutting tape 20, the crystal cutting ring R is fixed on the holder H of the expansion device. Push up the push-up member U included in the expansion device from the lower side of the crystal cutting belt 20, thereby stretching the crystal cutting belt 20 to expand in the plane direction. Thereby, the semiconductor wafer W and the protective sheet 10 are reduced into small pieces under a specific temperature condition. The above-mentioned temperature conditions are, for example, -20°C or higher and 0°C or lower. The expansion state is released by lowering the push-up unit U (so far the low temperature expansion step). When performing the expanding step at low temperature in this way, the protective sheet 10 needs to be cut into small pieces. The above-mentioned protective sheet 10 is designed so that it can be cut well at this time. Further, in the expanding step, the crystal cutting belt 20 is stretched at a higher temperature (for example, not less than 10° C. and not more than 25° C.) to expand the surface area of the cutting crystal belt 20 . Thereby, the semiconductor wafers X adjacent to each other are pulled apart toward the surface of the film surface, and the incision (interval) is further enlarged (room temperature expansion step). In the expanding step, the dicing tape 20 is stretched in the plane direction to expand the area of the dicing tape 20 , whereby the semiconductor wafer W and the protective sheet 10 are divided into small pieces. Specifically, by stretching the dicing tape 20 , the semiconductor wafer W can be divided into small semiconductor wafers X with the above-mentioned weak portion inside the semiconductor wafer as a boundary. At this time, the protective sheet 10 is also divided into small pieces at the same time as the semiconductor wafer W is broken into small pieces.

除去步驟中,如圖3H所示,使含水之液體與保護片材之複數個小片10’接觸,使各小片10’之至少一部分溶解於上述液體中,藉此將疊於半導體晶片X上之保護片材之各小片10’除去。 藉由如此地將保護片材之小片10’除去,可較簡便地將保護片材之複數個小片10’全部除去,此外,可藉由上述液體較簡便地減少附著於半導體晶片表面之異物之數量。此外,亦可以液體洗淨曾疊有保護片材之小片10’之各半導體晶片X之面。 In the removal step, as shown in FIG. 3H , a liquid containing water is brought into contact with the plurality of small pieces 10' of the protective sheet, and at least a part of each small piece 10' is dissolved in the above-mentioned liquid. Each small piece 10' of the protective sheet is removed. By removing the small piece 10' of the protective sheet in this way, all the small pieces 10' of the protective sheet can be removed more easily. In addition, the amount of foreign matter adhering to the surface of the semiconductor wafer can be reduced more easily by the above-mentioned liquid. quantity. In addition, the surface of each semiconductor wafer X on which the small piece 10' of the protective sheet was laminated can also be washed with liquid.

可藉由使小片化後之保護片材(保護片材之複數個小片10’)全部溶解於上述液體中,從而將保護片材之小片10’除去。另一方面,亦可藉由使保護片材之小片10’之構成成分之一部分溶解於上述液體中,並使與半導體晶片X間之附著力減弱之各小片10’從半導體晶片X上剝離,從而將保護片材之複數個小片10’除去。The small pieces 10' of the protective sheet can be removed by dissolving all the small pieces of the protective sheet (the plurality of small pieces 10' of the protective sheet) in the above-mentioned liquid. On the other hand, it is also possible to peel off each small piece 10 ′ having weakened adhesive force with the semiconductor wafer X from the semiconductor wafer X by dissolving part of the constituent components of the protective sheet small piece 10 ′ in the above-mentioned liquid, Thereby the plurality of small pieces 10' of the protective sheet are removed.

含水之液體,只要是含水之液狀物質則無特別限定。如此之液體,可含有30質量%以上、50質量%以上、70質量%以上、80質量%以上、或90質量%以上的水。 上述液體,除了水以外,亦可含有可溶解於水中之成分。如此之成分,可列舉例如:水溶性有機溶劑。如此之水溶性有機溶劑,可列舉例如:甲醇、乙醇、異丙醇等丙醇、或三級丁醇等丁醇等之碳數4以下之一元醇。 The liquid containing water is not particularly limited as long as it is a liquid substance containing water. Such a liquid may contain 30% by mass or more, 50% by mass or more, 70% by mass or more, 80% by mass or more, or 90% by mass or more of water. The above-mentioned liquid may contain water-soluble components other than water. As such a component, a water-soluble organic solvent is mentioned, for example. Examples of such water-soluble organic solvents include propanols such as methanol, ethanol, and isopropanol, and C4 or less monohydric alcohols such as butanols such as tertiary butanol.

第一實施型態之除去步驟中,可將保護片材之小片10’浸漬於攪拌中之上述液體中,使液體接觸保護片材之小片10’。或者,亦可使自噴嘴等噴出之液體接觸保護片材之小片10’。上述液體之溫度無特別限定,例如可設定於10℃以上90℃以下。就可在更短時間內將保護片材之複數個小片10’除去之觀點而言,上述液體之溫度理想為40℃以上。In the removing step of the first embodiment, the small piece 10' of the protective sheet may be immersed in the above-mentioned liquid which is being stirred, and the liquid may be brought into contact with the small piece 10' of the protective sheet. Alternatively, the small piece 10' of the protective sheet may be brought into contact with the liquid sprayed from a nozzle or the like. The temperature of the above-mentioned liquid is not particularly limited, for example, it can be set at 10°C or higher and 90°C or lower. From the viewpoint of being able to remove the plurality of small pieces 10' of the protective sheet in a shorter time, the temperature of the liquid is preferably 40°C or higher.

例如,除去步驟中,使從下方支撐切晶帶20之圓板狀之臺沿圓周方向旋轉,並朝貼附於切晶帶20之黏著劑層22之複數個半導體晶片X噴射上述液體。藉此,可將疊於半導體晶圓W之保護片材之複數個小片10’除去。臺之旋轉速度,例如可為500rpm以上4000rpm以下;液體之噴射量,例如可為0.05L/min以上5.0L/min以下,噴射時間,例如可為5秒鐘以上300秒鐘以下。For example, in the removal step, the disc-shaped stage supporting the dicing tape 20 from below is rotated in the circumferential direction, and the liquid is sprayed toward the plurality of semiconductor wafers X attached to the adhesive layer 22 of the dicing tape 20 . Thereby, a plurality of small pieces 10' of the protective sheet stacked on the semiconductor wafer W can be removed. The rotation speed of the stage can be, for example, not less than 500 rpm and not more than 4000 rpm; the injection volume of liquid can be, for example, not less than 0.05 L/min and not more than 5.0 L/min; the injection time can be, for example, not less than 5 seconds and not more than 300 seconds.

根據上述半導體裝置之製造方法,由於在半導體晶圓W之配置有電路構成要素之側之面(電路面)上疊合保護片材10,因此可防止異物附著於上述電路面,直至將保護片材10除去。具體而言,由於係在半導體晶圓W與保護片材10相疊之狀態下使半導體晶圓W小片化而製作半導體晶片X,因此可防止半導體晶圓W之切割等時可能產生之碎片等之異物附著於半導體晶片X之電路面。即使在疊上保護片材10前有異物附著於半導體晶片X之電路面,在將疊於半導體晶片X之電路面上之保護片材之小片10’除去時,亦可將該異物除去。因此,可抑制異物附著於所製作之半導體晶片X之電路面。According to the above method of manufacturing a semiconductor device, since the protective sheet 10 is laminated on the surface (circuit surface) of the semiconductor wafer W on which the circuit components are arranged, foreign matter can be prevented from adhering to the above-mentioned circuit surface until the protective sheet is placed. Material 10 is removed. Specifically, since the semiconductor wafer W is cut into small pieces to produce the semiconductor wafer X in a state where the semiconductor wafer W and the protective sheet 10 are stacked, it is possible to prevent chipping or the like that may occur when the semiconductor wafer W is diced or the like The foreign matter attached to the circuit surface of the semiconductor chip X. Even if there is foreign matter attached to the circuit surface of the semiconductor chip X before the protective sheet 10 is stacked, the foreign matter can be removed when the small piece 10' of the protective sheet stacked on the circuit surface of the semiconductor chip X is removed. Therefore, foreign matter can be suppressed from adhering to the circuit surface of the produced semiconductor wafer X.

又,保護片材10之含有成分、物性等將於後續詳細說明。In addition, the components, physical properties, and the like of the protective sheet 10 will be described in detail later.

拾取步驟中,如圖3I所示,將半導體晶片X從切晶帶20之黏著劑層22上剝離。詳細而言,係使銷部件P上升,並經由切晶帶20將拾取對象之半導體晶片X上推。藉由吸附治具J保持被上推之半導體晶片X。In the picking step, as shown in FIG. 3I , the semiconductor wafer X is peeled off from the adhesive layer 22 of the dicing tape 20 . Specifically, the pin member P is raised, and the semiconductor wafer X to be picked up is pushed up through the dicing tape 20 . The pushed-up semiconductor wafer X is held by the suction jig J.

在如此地進行拾取步驟時,半導體晶片X需可輕易地從切晶帶20之黏著劑層22上剝離。此外,在進行上述之擴展步驟時,需藉由拉伸切晶帶20使半導體晶圓W及保護片材10良好地小片化。上述切晶帶20,係被設計為可良好地發揮此種性能。 例如,切晶帶20,係構成為藉由照射活性能量射線(例如紫外線)使黏著劑層22硬化,進而使黏著劑層22之黏著力降低。藉由照射後黏著劑層22硬化而可降低黏著劑層22之黏著力,因此於照射後可較易將半導體晶片X從黏著劑層22上剝離。此種構成之切晶帶20已售於市。 When the picking step is performed in this way, the semiconductor wafer X needs to be easily peeled off from the adhesive layer 22 of the dicing tape 20 . In addition, when performing the above-mentioned expansion step, the semiconductor wafer W and the protective sheet 10 need to be well divided into small pieces by stretching the dicing tape 20 . The crystal cutting belt 20 mentioned above is designed to be able to exert such performance well. For example, the dicing tape 20 is configured to harden the adhesive layer 22 by irradiating active energy rays (such as ultraviolet rays), thereby reducing the adhesive force of the adhesive layer 22 . The adhesive force of the adhesive layer 22 can be reduced by curing the adhesive layer 22 after irradiation, so the semiconductor chip X can be easily peeled off from the adhesive layer 22 after irradiation. Crystal cutting tapes 20 of this type are already on the market.

藉由拾取步驟取出之半導體晶片X之兩面側,如上所述,係分別配置有互相導通之電極部D。半導體晶片X之一面及另一面之表層部,係形成有電極部D、及電極部D以外之非電極部。非電極部,例如由絕緣材料(氧化矽)等所構成。如圖2D所示,於半導體晶片X之一面側及另一面側中,電極部D及非電極部之表面在同一平面。電極部D,例如形成為具有自半導體晶片X之最外面起算5nm以上10μm以下之厚度。又,配置為於厚度方向上貫通半導體晶片X之上述貫通孔V,係除了與電極部D接觸之部分以外,皆以上述絕緣材料覆蓋。換言之,半導體晶片X中於厚度方向上延伸之貫通孔V之表面之一部分係被絕緣材料所覆蓋,另一部分則與電極部D接觸。On both sides of the semiconductor wafer X taken out by the pick-up step, as described above, the electrode portions D which are electrically connected to each other are arranged respectively. The surface layer portions of one surface and the other surface of the semiconductor wafer X are formed with electrode portions D and non-electrode portions other than the electrode portions D. The non-electrode portion is made of, for example, an insulating material (silicon oxide) or the like. As shown in FIG. 2D , on one side and the other side of the semiconductor wafer X, the surfaces of the electrode portion D and the non-electrode portion are on the same plane. The electrode portion D is formed to have a thickness of 5 nm to 10 μm from the outermost surface of the semiconductor wafer X, for example. In addition, the above-mentioned through-hole V arranged to penetrate the semiconductor wafer X in the thickness direction is covered with the above-mentioned insulating material except for the portion in contact with the electrode portion D. In other words, part of the surface of the through-hole V extending in the thickness direction in the semiconductor wafer X is covered with an insulating material, and the other part is in contact with the electrode portion D.

接合步驟係於除去步驟及拾取步驟後實施。接合步驟中,例如如圖3J所示,將半導體晶片X中保護片材之小片10’被除去之面(電路面)朝向被接著體,並將半導體晶片X接合於被接著體。如此將半導體晶片X之電路面朝向被接著體,並將被接著體與半導體晶片X接合之方法,一般稱為倒裝接合。即使是此種接合方法,由於藉由上述除去步驟可抑制附著於半導體晶片X之電路面之異物之數量,因此可抑制進入半導體晶片X之電路面與被接著體之間的異物所造成之不良影響。The bonding step is performed after the removing step and the picking step. In the bonding step, for example, as shown in FIG. 3J , the surface (circuit surface) of the semiconductor wafer X from which the small piece 10' of the protective sheet is removed faces the adherend, and the semiconductor wafer X is bonded to the adherend. The method of facing the circuit surface of the semiconductor chip X to the substrate and bonding the substrate to the semiconductor chip X is generally called flip-chip bonding. Even with this bonding method, since the number of foreign matter adhering to the circuit surface of the semiconductor chip X can be suppressed by the above-mentioned removal step, it is possible to suppress defects caused by foreign matter that enters between the circuit surface of the semiconductor chip X and the adherend. Influence.

接合步驟中,例如,將半導體晶片X接合於被接著體Z(配線基板等)。此時,將被接著體Z與半導體晶片X接合,使被接著體Z側之電極部D與半導體晶片X側之電極部D導通。 此外,例如於接合步驟中,堆疊至少二個半導體晶片X,並使作為被接著體之一個半導體晶片X側之電極部D、與另一個半導體晶片X側之電極部D互相直接連接。換言之,將此等電極部D互相直接連接,使一個半導體晶片X側之電極部D、與另一個半導體晶片X側之電極部D導通,從而堆疊半導體晶片X。如上所述,由於半導體晶片之電路面等中,電極部與非電極部係配置為在同一平面,因此在使電極部彼此直接連接時,附著於半導體晶片X之電路面之異物越少越理想。尤其,理想係電極部之表面未附著異物。本實施型態之製造方法,可抑制異物附著於半導體晶片X之表面,因此於如上所述將複數個半導體晶片X互相接合時尤其有效。 於接合步驟中如上所述堆疊複數個半導體晶片X之情形時,由於係堆疊已抑制電路面之異物附著之複數個半導體晶片X,因此可抑制進入所堆疊之一個半導體晶片X與另一個半導體晶片X之間之異物之數量。因此,可在相鄰之半導體晶片X之間使電極部D彼此更確實地連接。因此,複數個半導體晶片X之電路能以高可靠性互相導通。 In the bonding step, for example, the semiconductor wafer X is bonded to the adherend Z (wiring board or the like). At this time, the substrate Z and the semiconductor chip X are bonded, and the electrode part D on the side of the substrate Z and the electrode part D on the side of the semiconductor chip X are electrically connected. In addition, for example, in the bonding step, at least two semiconductor wafers X are stacked, and the electrode portion D on the X side of one semiconductor wafer as an adherend is directly connected to the electrode portion D on the X side of the other semiconductor wafer. In other words, these electrode portions D are directly connected to each other, and the electrode portion D on the X side of one semiconductor chip is electrically connected to the electrode portion D on the X side of the other semiconductor chip, thereby stacking the semiconductor chips X. As mentioned above, since the electrode portion and the non-electrode portion are arranged on the same plane on the circuit surface of the semiconductor wafer, etc., when the electrode portions are directly connected to each other, the less foreign matter adhering to the circuit surface of the semiconductor wafer X, the better. . In particular, it is desirable that foreign matter does not adhere to the surface of the electrode portion. The manufacturing method of this embodiment can suppress the adhesion of foreign substances to the surface of the semiconductor wafer X, and therefore is particularly effective when bonding a plurality of semiconductor wafers X to each other as described above. In the case of stacking a plurality of semiconductor wafers X as described above in the bonding step, since the plurality of semiconductor wafers X having been suppressed from adhering to the circuit surface is stacked, it is possible to suppress the entry of one semiconductor wafer X and another semiconductor wafer stacked. The number of foreign objects between X. Therefore, between the adjacent semiconductor wafers X, the electrode portions D can be more reliably connected to each other. Therefore, the circuits of the plurality of semiconductor chips X can be mutually conducted with high reliability.

使電極部D互相直接連接時,例如可採用原子擴散接合處理法。原子擴散接合處理,例如可使用市售之原子擴散接合裝置實施。When the electrode portions D are directly connected to each other, for example, atomic diffusion bonding can be used. The atomic diffusion bonding treatment can be performed using, for example, a commercially available atomic diffusion bonding device.

又,第一實施型態中,亦可實施藉由熱硬化性樹脂等將半導體晶片X密封(覆蓋)之樹脂密封步驟,以保護經接合步驟之半導體晶片X。In addition, in the first embodiment, a resin sealing step of sealing (covering) the semiconductor chip X with a thermosetting resin or the like may be performed to protect the semiconductor chip X after the bonding step.

<第一實施型態之保護片材之細節> 保護片材10之厚度無特別限定,例如為1μm以上100μm以下。如此之厚度亦可為3μm以上,亦可為5μm以上。此外,如此之厚度亦可為40μm以下。又,於保護片材10為積層體之情形時,上述厚度為積層體之總厚度。 <Details of the protective sheet of the first embodiment> Although the thickness of the protective sheet 10 is not specifically limited, For example, it is 1 micrometer or more and 100 micrometers or less. Such a thickness may be 3 μm or more, or may be 5 μm or more. In addition, such thickness may be 40 micrometers or less. Moreover, when the protective sheet 10 is a laminated body, the said thickness is the total thickness of a laminated body.

上述保護片材10,係具有於上述擴展步驟中被往面方向拉伸而被小片化之構成。小片化後之各保護片材10,係具有與半導體晶片X之電路面相同之面積。The protective sheet 10 has a structure in which it is stretched in the plane direction in the above-mentioned expanding step to be divided into small pieces. Each protective sheet 10 after dicing has the same area as the circuit surface of the semiconductor chip X.

上述保護片材10,係至少含有水溶性高分子化合物,以使疊於半導體晶片X上之保護片材之小片10’在上述除去步驟中被含水之液體除去。The above-mentioned protective sheet 10 contains at least a water-soluble polymer compound, so that the small piece 10' of the protective sheet laminated on the semiconductor wafer X is removed by the water-containing liquid in the above-mentioned removal step.

水溶性高分子化合物,可列舉例如:聚乙烯醇(PVA)、聚乙烯吡咯烷酮(PVP)等。此等中,可採用一種作為水溶性高分子化合物,亦可組合採用二種以上。As a water-soluble polymer compound, polyvinyl alcohol (PVA), polyvinylpyrrolidone (PVP), etc. are mentioned, for example. Among these, one type may be used as a water-soluble polymer compound, and two or more types may be used in combination.

上述聚乙烯醇之皂化度(莫耳%),理想係50以上,更理想係60以上。此外,上述皂化度,理想係98以下。 藉由聚乙烯醇之皂化度為50以上,於除去步驟中聚乙烯醇更易溶解於含水之液體中。 The degree of saponification (mole %) of the polyvinyl alcohol is preferably 50 or higher, more preferably 60 or higher. In addition, the above-mentioned degree of saponification is ideally 98 or less. Since the polyvinyl alcohol has a degree of saponification of 50 or higher, the polyvinyl alcohol is more easily soluble in the aqueous liquid in the removal step.

上述皂化度,係在以下之分析條件下實施質子磁共振光譜法( 1H MNR)而測定。 又,於保護片材10含有PVA以外之成分之情形時,為了避免測定圖中峰重疊,係藉由甲醇萃取等進行PVA之分離萃取處理後,再實施測定。 分析裝置:FT-NMR:布魯克拜厄斯賓(Bruker Biospin)公司製,「AVANCEIII-400」 觀測頻率:400MHz(1H) 測定溶劑:重水、或重DMSO 測定溫度:80℃ 化學位移基準:外部標準TSP-d4(0.00ppm)(重水測定時) :測定溶劑(2.50ppm)(重DMSO測定時) 根據源自乙烯醇單元(VOH)之亞甲基之峰(重水:2.0~1.1ppm,重DMSO:1.9~1.0ppm)、及源自乙酸乙烯酯單元(VAc)之乙醯基之峰(重水:2.1ppm附近,重DMSO:2.0ppm附近),藉由下述算式算出皂化度。又,下述算式中,VOH(-CH 2-)係源自乙烯醇單元(VOH)之亞甲基之峰之強度,VAc(CH 3CO-)係源自乙酸乙烯酯單元(VAc)之乙醯基之峰之強度。 〔數1〕 [VOH(-CH 2-)/2] 皂化度= ―――――――――――――――――――×100 [VAc(CH 3CO-)/3]+[VOH(-CH 2-)/2] The degree of saponification mentioned above was measured by proton magnetic resonance spectroscopy ( 1 H MNR) under the following analytical conditions. Also, when the protective sheet 10 contains components other than PVA, in order to avoid overlapping of peaks in the measurement chart, the measurement is performed after separating and extracting PVA by methanol extraction or the like. Analysis device: FT-NMR: Bruker Biospin, "AVANCEIII-400" Observation frequency: 400 MHz (1H) Measurement solvent: Heavy water or heavy DMSO Measurement temperature: 80°C Chemical shift reference: External standard TSP-d4 (0.00ppm) (during the measurement of heavy water): measurement solvent (2.50ppm) (during the measurement of heavy DMSO) According to the peak derived from the methylene group of vinyl alcohol unit (VOH) (heavy water: 2.0~1.1ppm, heavy DMSO : 1.9~1.0ppm), and peaks derived from acetyl groups of vinyl acetate units (VAc) (heavy water: around 2.1ppm, heavy DMSO: around 2.0ppm), and the degree of saponification was calculated by the following formula. In addition, in the following formula, VOH (-CH 2 -) is the intensity of the peak derived from the methylene group of the vinyl alcohol unit (VOH), and VAc (CH 3 CO-) is the peak intensity derived from the vinyl acetate unit (VAc). The intensity of the peak of the acyl group. [Number 1] [VOH(-CH 2 -)/2] Saponification degree = ――――――――――――――――――――――×100 [VAc(CH 3 CO-)/3] +[VOH(-CH 2 -)/2]

上述聚乙烯醇之平均聚合度,理想係100以上,更理想係200以上。此外,上述平均聚合度,理想係1000以下,更理想係800以下。 藉由聚乙烯醇之平均聚合度為100以上,更易形成上述保護片材10。另一方面,藉由聚乙烯醇之平均聚合度為1000以下,於除去步驟中聚乙烯醇更易溶解於含水之液體中。 The average degree of polymerization of the polyvinyl alcohol is preferably 100 or more, more preferably 200 or more. In addition, the above-mentioned average degree of polymerization is ideally 1,000 or less, more preferably 800 or less. When the average degree of polymerization of polyvinyl alcohol is 100 or more, it becomes easier to form the said protective sheet 10. On the other hand, since the average degree of polymerization of polyvinyl alcohol is 1000 or less, polyvinyl alcohol is more easily dissolved in a liquid containing water in the removal step.

上述平均聚合度,係藉由凝膠滲透層析(GPC)而測定。測定條件如下。 分析裝置:安捷倫科技(Agilent Technologies)公司製,「1260Infinity」 管柱:東曹公司製,TSKgel G6000PWXL+TSKgel G3000PWXL(串聯連接) 管柱溫度:40℃ 溶離液:0.2M 硝酸鈉水溶液 流速:0.8mL/min 注入量:100μL 檢測器:示差折射計(RI) 標準樣品:聚乙二醇(PEG)、聚乙烯醇(PVA) 藉由使用PEG標準樣品之GPC測定,分別算出被測定樣品(PVA)、及已知平均聚合度之PVA標準樣品之重量平均分子量Mw。由PVA標準樣品之平均聚合度、及所算出之PVA標準樣品之重量平均分子量Mw製作檢量線。利用此檢量線,由被測定樣品(PVA)之重量平均分子量Mw求出被測定樣品(PVA)之平均聚合度。 The above-mentioned average degree of polymerization is measured by gel permeation chromatography (GPC). The measurement conditions are as follows. Analyzer: "1260 Infinity" manufactured by Agilent Technologies String: Tosoh Corporation, TSKgel G6000PWXL+TSKgel G3000PWXL (connected in series) Column temperature: 40°C Eluent: 0.2M sodium nitrate aqueous solution Flow rate: 0.8mL/min Injection volume: 100μL Detector: Differential Refractometer (RI) Standard samples: polyethylene glycol (PEG), polyvinyl alcohol (PVA) By GPC measurement using a PEG standard sample, the weight average molecular weight Mw of the measured sample (PVA) and the PVA standard sample with a known average degree of polymerization was calculated respectively. A calibration line was prepared from the average degree of polymerization of the PVA standard sample and the calculated weight average molecular weight Mw of the PVA standard sample. Using this calibration curve, the average degree of polymerization of the sample to be measured (PVA) was obtained from the weight average molecular weight Mw of the sample to be measured (PVA).

第一實施型態等之製造方法中所使用之保護片材10之斷裂伸長率,理想係在-15℃下為30.0%以下。如此之斷裂伸長率,亦可為20.0%以下,亦可為10.0%以下。又,上述斷裂伸長率,亦可為0.1%以上。 藉由上述斷裂伸長率為0.1%以上30.0%以下,可於擴展步驟中更確實地使上述保護片材10小片化。 The elongation at break of the protective sheet 10 used in the production method of the first embodiment etc. is desirably 30.0% or less at -15°C. Such elongation at break may be 20.0% or less, or may be 10.0% or less. In addition, the above-mentioned elongation at break may be 0.1% or more. When the said elongation at break is 0.1 % - 30.0 %, the said protective sheet 10 can be made into small pieces more reliably in an expansion process.

上述斷裂伸長率,例如可藉由增加保護片材10所含之水溶性高分子化合物之分子量而增加。另一方面,例如可藉由降低保護片材10所含之水溶性高分子化合物之分子量而降低上述斷裂伸長率。The aforementioned elongation at break can be increased by, for example, increasing the molecular weight of the water-soluble polymer compound contained in the protective sheet 10 . On the other hand, for example, the above-mentioned elongation at break can be lowered by lowering the molecular weight of the water-soluble polymer compound contained in the protective sheet 10 .

上述斷裂伸長率,係在以下之測定條件下測定。 ・測定裝置:拉伸試驗機(可使用島津製作所製之「Autograph AG-IS」等) ・測定樣品:厚度30μm ・試驗片:寬度10mm、長度50mm之長條狀,初始夾頭間距離20mm ・拉伸速度:10mm/sec ・測定溫度:-15℃(在-15℃下保持5分鐘後開始測定) ・將斷裂時之伸長率(伸長之長度相對於原長度之比例)設為斷裂伸長率(斷裂伸度) The above elongation at break was measured under the following measurement conditions. ・Measuring device: Tensile testing machine ("Autograph AG-IS" manufactured by Shimadzu Corporation, etc. can be used) ・Measurement sample: thickness 30μm ・Test piece: a long strip with a width of 10mm and a length of 50mm, and the initial distance between chucks is 20mm ・Tension speed: 10mm/sec ・Measurement temperature: -15°C (keep at -15°C for 5 minutes and start measurement) ・The elongation at break (the ratio of the elongated length to the original length) is defined as the elongation at break (elongation at break)

上述保護片材10之斷裂強度,在-15℃下可為500MPa以下,亦可為200MPa以下。又,上述斷裂強度,亦可為1.0MPa以上。如此之斷裂強度,係上述之斷裂伸長率之測定中斷裂時之拉伸力。 藉由上述斷裂強度為1.0MPa以上500MPa以下,可於擴展步驟中更確實地使上述保護片材10小片化。 The breaking strength of the protective sheet 10 may be 500 MPa or less at -15°C, or may be 200 MPa or less. In addition, the above breaking strength may be 1.0 MPa or more. Such breaking strength refers to the tensile force at break in the above-mentioned measurement of elongation at break. When the said breaking strength is 1.0 MPa or more and 500 MPa or less, the said protective sheet 10 can be made into small pieces more reliably in an expansion process.

上述斷裂強度,例如可藉由增加保護片材10所含之水溶性高分子化合物之分子量而增加。另一方面,例如可藉由降低保護片材10所含之水溶性高分子化合物之分子量而降低上述斷裂強度。The aforementioned breaking strength can be increased by, for example, increasing the molecular weight of the water-soluble polymer compound contained in the protective sheet 10 . On the other hand, for example, the breaking strength can be lowered by lowering the molecular weight of the water-soluble polymer compound contained in the protective sheet 10 .

上述保護片材10對半導體晶圓W之密著性,係以將上述保護片材10從矽裸晶圓上剝離時之剝離力表示。上述保護片材10在25℃下之剝離力,可為10.0[N/10mm]以下,亦可為8.0N/10mm]以下。又,上述剝離力,亦可為0.01[N/10mm]以上。 藉由上述剝離力為0.01[N/10mm]以上10.0[N/10mm]以下,於擴展步驟中使上述保護片材10小片化時,可更加抑制小片化後之保護片材10從半導體晶片X上意外剝離。 The adhesion of the protective sheet 10 to the semiconductor wafer W is represented by the peeling force when the protective sheet 10 is peeled off from the silicon bare wafer. The peeling force of the protective sheet 10 at 25° C. may be 10.0 [N/10mm] or less, or may be 8.0 N/10mm] or less. Moreover, the said peeling force may be 0.01 [N/10mm] or more. When the above-mentioned peeling force is 0.01 [N/10mm] or more and 10.0 [N/10mm] or less, when the above-mentioned protection sheet 10 is reduced into small pieces in the expansion step, it is possible to further suppress the separation of the small-piece protection sheet 10 from the semiconductor wafer X. Accidentally peeled off.

上述剝離力,例如可藉由增加保護片材10所含之水溶性高分子化合物之分子量而增加。另一方面,例如可藉由降低保護片材10所含之水溶性高分子化合物之分子量而降低上述剝離力。The above peeling force can be increased by, for example, increasing the molecular weight of the water-soluble polymer compound contained in the protective sheet 10 . On the other hand, for example, the peeling force can be reduced by reducing the molecular weight of the water-soluble polymer compound contained in the protective sheet 10 .

上述剝離力,係在以下之測定條件下測定。 如下製作測定用樣品,以測定上述保護片材10之一面(貼附於半導體晶圓W之側之面)之剝離力。首先,在25℃下於與保護片材10之上述之一面為相反側之面上,使用手壓輥貼附襯底膠帶。接著,將測定用樣品加工成寬度100mm,並在保護片材10之上述之一面上貼合矽裸晶圓。貼合係在90℃、10mm/sec之條件下實施。接著,在23℃之環境下,以180°之剝離角度及300mm/min之剝離速度,將襯底膠帶連同保護片材10從裸晶圓上剝離從而測定剝離力。最後,對測定值進行換算,以用[N/10mm]之單位值來表示。又,測定裝置,例如可使用「Autograph (島津(SHIMADZU)公司製)」。 The above-mentioned peeling force was measured under the following measurement conditions. A measurement sample was produced as follows to measure the peeling force of one side of the protective sheet 10 (the side attached to the semiconductor wafer W). First, the backing tape was attached at 25°C on the surface opposite to the above-mentioned one surface of the protective sheet 10 using a hand roller. Next, the measurement sample was processed to have a width of 100 mm, and a silicon bare wafer was bonded to the above-mentioned one surface of the protective sheet 10 . Bonding is carried out under the conditions of 90°C and 10mm/sec. Next, in an environment of 23° C., with a peeling angle of 180° and a peeling speed of 300 mm/min, the backing tape and the protective sheet 10 were peeled from the bare wafer to measure the peeling force. Finally, convert the measured value and express it in the unit value of [N/10mm]. In addition, as a measurement device, for example, "Autograph (manufactured by Shimadzu Corporation)" can be used.

上述保護片材10在-15℃下之拉伸彈性模數(拉伸儲存彈性模數E’),理想係0.01GPa以上10.0GPa以下。如此之拉伸彈性模數,亦可為0.05GPa以上,亦可為0.10GPa以上。此外,如此之拉伸彈性模數,亦可為5.0GPa以下,亦可為3.0GPa以下。 藉由在-15℃下之上述拉伸彈性模數為0.01GPa以上10.0GPa以下,可於擴展步驟中更確實地使上述保護片材10小片化。 The tensile elastic modulus (tensile storage elastic modulus E') of the protective sheet 10 at -15°C is ideally 0.01 GPa or more and 10.0 GPa or less. Such a tensile elastic modulus may be 0.05 GPa or more, and may be 0.10 GPa or more. In addition, such a tensile elastic modulus may be 5.0 GPa or less, and may be 3.0 GPa or less. When the said tensile modulus at -15 degreeC is 0.01 GPa or more and 10.0 GPa or less, the said protective sheet 10 can be made into small pieces more reliably in an expansion process.

上述保護片材10之彈性模數(拉伸彈性模數),例如可藉由增加保護片材10所含之水溶性高分子化合物之分子量而提高。另一方面,例如可藉由降低保護片材10所含之水溶性高分子化合物之分子量而降低拉伸彈性模數。The elastic modulus (tensile elastic modulus) of the protective sheet 10 can be increased by, for example, increasing the molecular weight of the water-soluble polymer compound contained in the protective sheet 10 . On the other hand, for example, the tensile modulus of elasticity can be reduced by reducing the molecular weight of the water-soluble polymer compound contained in the protective sheet 10 .

上述拉伸彈性模數,係在以下之測定條件下測定。 ・測定裝置:固體黏彈性測定裝置(可使用TA Instruments公司製之「RSAIII」等) ・測定樣品:厚度50μm ・試驗片:寬度10mm、長度40mm之長條狀,初始夾頭間距離20mm ・測定模式:拉伸模式 ・頻率1Hz,升溫速度10℃/min,應變量0.1% ・測定溫度範圍:-40℃至80℃(在-40℃下保持5分鐘後開始升溫) ・讀取-15℃及25℃下之拉伸彈性模數(拉伸儲存彈性模數)[MPa] The above-mentioned tensile elastic modulus was measured under the following measurement conditions. ・Measuring device: Solid viscoelasticity measuring device ("RSAIII" manufactured by TA Instruments, etc. can be used) ・Measurement sample: thickness 50μm ・Test piece: a long strip with a width of 10mm and a length of 40mm, and the initial distance between chucks is 20mm ・Measurement mode: tensile mode ・Frequency 1Hz, heating rate 10℃/min, strain 0.1% ・Measurement temperature range: -40°C to 80°C (heating starts after 5 minutes at -40°C) ・Read the tensile elastic modulus (tensile storage elastic modulus) at -15°C and 25°C [MPa]

上述保護片材10之表面自由能,在25℃下可為70[mJ/m 2]以下,亦可為65[mJ/m 2]以下。又,上述表面自由能亦可為30[mJ/m 2]以上。 藉由使上述表面自由能在上述範圍內,上述保護片材10對水之潤濕性適度地變佳,因此可於除去步驟中更簡便地將上述保護片材10除去。 The surface free energy of the above-mentioned protective sheet 10 may be 70 [mJ/m 2 ] or less, or 65 [mJ/m 2 ] or less at 25°C. In addition, the above-mentioned surface free energy may be 30 [mJ/m 2 ] or more. When the surface free energy is within the above range, the wettability of the protective sheet 10 to water becomes moderately better, so that the protective sheet 10 can be removed more easily in the removal step.

上述表面自由能,例如可藉由提高水溶性高分子化合物之分子中親水基(-OH基等)之比例而增加。另一方面,例如可藉由提高水溶性高分子化合物之分子中疏水基(烷基等)之比例而降低上述表面自由能。The above-mentioned surface free energy can be increased, for example, by increasing the proportion of hydrophilic groups (-OH groups, etc.) in the molecules of the water-soluble polymer compound. On the other hand, for example, the above-mentioned surface free energy can be reduced by increasing the proportion of hydrophobic groups (alkyl groups, etc.) in the molecule of the water-soluble polymer compound.

上述表面自由能,係由接觸角測定之結果算出。詳細而言,在20℃及相對濕度65%之條件下,使用接觸角計測定與上述保護片材10之表面接觸之水(H 2O)及二碘甲烷(CH 2I 2)之各液滴之接觸角。 接著,由所測定之水之接觸角θw及二碘甲烷之接觸角θi之值,如下算出表面自由能。詳細而言,依據Journal of Applied Polymer Science, vol.13, p1741-1747(1969)所記載之Owens等人之方法,求出γs d(表面自由能之分散成分)及γs h(表面自由能之極性成分)。 接著,將γs d及γs h相加所得之值γs(=γs d+γs h)設為上述保護片材10之表面自由能。 γs d(分散成分)及γs h(極性成分)個別的值,係由下述式(1)及式(2)之二元聯立方程式之解獲得。式(1)及(2)中,γw為水之表面自由能,γw d為水之表面自由能之分散成分,γw h為水之表面自由能之極性成分,γi為碘甲烷之表面自由能,γi d為碘甲烷之表面自由能之分散成分,γi h為碘甲烷之表面自由能之極性成分,如下所示為已知之值。 γw=72.8 [mJ/m 2] γw d=21.8 [mJ/m 2] γw h=51.0 [mJ/m 2] γi=50.8 [mJ/m 2] γi d=48.5 [mJ/m 2] γi h=2.3 [mJ/m 2] 〔數2〕

Figure 02_image001
The above-mentioned surface free energy is calculated from the result of contact angle measurement. Specifically, under the conditions of 20°C and a relative humidity of 65%, each solution of water (H 2 O) and diiodomethane (CH 2 I 2 ) in contact with the surface of the protective sheet 10 was measured using a contact angle meter. drop contact angle. Next, from the measured values of the contact angle θw of water and the contact angle θi of diiodomethane, the surface free energy was calculated as follows. Specifically, γs d (dispersion component of surface free energy) and γs h (dispersion component of surface free energy) were obtained according to the method of Owens et al. described in Journal of Applied Polymer Science, vol. polar ingredients). Next, the value γs (=γs d + γs h ) obtained by adding γs d and γs h is set as the surface free energy of the protective sheet 10 . Individual values of γs d (dispersed component) and γs h (polar component) are obtained by solving the binary simultaneous equations of the following formulas (1) and (2). In formulas (1) and (2), γw is the surface free energy of water, γw d is the dispersed component of the surface free energy of water, γw h is the polar component of the surface free energy of water, and γi is the surface free energy of methyl iodide , γi d is the dispersed component of the surface free energy of methyl iodide, and γi h is the polar component of the surface free energy of methyl iodide, and the values shown below are known values. γw=72.8 [mJ/m 2 ] γw d =21.8 [mJ/m 2 ] γw h =51.0 [mJ/m 2 ] γi=50.8 [mJ/m 2 ] γi d =48.5 [mJ/m 2 ] γi h =2.3 [mJ/m 2 ] [number 2]
Figure 02_image001

具體而言,於上述保護片材10中,測定一面(貼附於半導體晶圓W之側之面)之表面自由能。分別測定水及二碘甲烷之接觸角,並採用5次測定值之平均值。又,測定將1mL之液體滴於面上後5秒內之接觸角。由接觸角之各測定值算出分散成分及極性成分,並由其和求出表面自由能。Specifically, in the protective sheet 10 described above, the surface free energy of one surface (the surface attached to the semiconductor wafer W) was measured. The contact angles of water and diiodomethane were measured separately, and the average value of 5 measurements was adopted. Also, the contact angle within 5 seconds after dropping 1 mL of the liquid on the surface was measured. The dispersion component and the polar component were calculated from the measured values of the contact angle, and the surface free energy was calculated from their sum.

接著,詳細說明第二實施型態~第五實施型態。又,第二實施型態~第五實施型態中,不重覆與第一實施型態相同之說明。第二實施型態~第五實施型態中,只要沒有特別提及,可進行與第一實施型態相同之操作。Next, the second to fifth embodiments will be described in detail. In addition, in the second embodiment to the fifth embodiment, the same description as the first embodiment will not be repeated. In the second embodiment to the fifth embodiment, unless otherwise mentioned, the same operations as those in the first embodiment can be performed.

「第二實施型態」 第二實施型態之半導體裝置之製造方法,係與第一實施型態之半導體裝置之製造方法相同,具有上述之各步驟。 但是,第二實施型態之半導體裝置之製造方法與第一實施型態之半導體裝置之製造方法存在下述差異:於半導體晶圓W之一面配置電路構成要素;保護片材10之結構及含有成分;除去步驟中保護片材10之除去方法等。 "Second Implementation Type" The manufacturing method of the semiconductor device of the second embodiment is the same as the manufacturing method of the semiconductor device of the first embodiment, including the above-mentioned steps. However, the manufacturing method of the semiconductor device of the second embodiment is different from the manufacturing method of the semiconductor device of the first embodiment in the following differences: the circuit components are arranged on one side of the semiconductor wafer W; the structure of the protective sheet 10 and the Components; removal method of the protective sheet 10 in the removal step, etc.

詳細而言,第二實施型態之半導體裝置之製造方法中,保護片材10係含有硬化性組成物,藉由硬化處理使疊於半導體晶圓W之電路面上之保護片材10硬化後,使半導體晶圓W及保護片材10之積層物小片化。Specifically, in the method of manufacturing a semiconductor device according to the second embodiment, the protective sheet 10 contains a curable composition, and the protective sheet 10 stacked on the circuit surface of the semiconductor wafer W is hardened by curing treatment. , making the laminate of the semiconductor wafer W and the protective sheet 10 into small pieces.

第二實施型態中所使用之保護片材10,係含有藉由硬化處理而硬化之硬化性組成物。例如,保護片材10係藉由硬化性組成物而形成。 硬化性組成物,係含有藉由硬化處理而開始硬化反應之硬化性化合物。硬化性化合物,例如藉由紫外線等活性能量射線之照射處理、或者加熱處理等硬化處理而開始硬化反應。 第二實施型態中,藉由硬化處理使保護片材10硬化,可相應地於擴展步驟中更輕易地將保護片材10分割小片化。此外,藉由以硬化處理使保護片材10硬化,可降低保護片材10之黏著力。因此,於硬化處理後可較易將保護片材之各小片10’從各半導體晶片X上剝離。 The protective sheet 10 used in the second embodiment contains a curable composition cured by curing treatment. For example, the protective sheet 10 is formed of a curable composition. A curable composition contains a curable compound that initiates a hardening reaction by hardening treatment. The curable compound starts a hardening reaction by, for example, irradiation treatment with active energy rays such as ultraviolet rays or hardening treatment such as heat treatment. In the second embodiment, the protective sheet 10 is hardened by hardening treatment, so that the protective sheet 10 can be divided into smaller pieces more easily in the expansion step. In addition, by hardening the protective sheet 10 by curing treatment, the adhesive force of the protective sheet 10 can be reduced. Therefore, each small piece 10' of the protective sheet can be easily peeled off from each semiconductor wafer X after the hardening treatment.

第二實施型態中,如圖4A所示,與第一實施型態相同地,於切晶帶20依序疊上半導體晶圓W及保護片材10。保護片材10,理想係貼附有剝離襯墊15。然後,如圖4B所示,與第一實施型態相同地,對半導體晶圓W實施隱形加工步驟。In the second embodiment, as shown in FIG. 4A , the same as the first embodiment, the semiconductor wafer W and the protective sheet 10 are sequentially stacked on the dicing tape 20 . The protective sheet 10 is preferably attached with a release liner 15 . Then, as shown in FIG. 4B , a stealth processing step is performed on the semiconductor wafer W in the same manner as in the first embodiment.

例如,第二實施型態中所使用之保護片材10,如圖4C所示,藉由照射紫外線M等而硬化。具體而言,在黏著劑層22貼合於半導體晶圓W之一面、且保護片材10貼合於半導體晶圓W之另一面之狀態下,至少對保護片材10照射紫外線等。藉由照射紫外線等使保護片材10硬化。然後,如圖4D所示,將剝離襯墊15從保護片材10上剝離。進一步地,如圖4E所示,與第一實施型態相同地,將半導體晶圓W及保護片材10分割小片化。For example, the protective sheet 10 used in the second embodiment is hardened by irradiating ultraviolet rays M or the like as shown in FIG. 4C. Specifically, in a state where the adhesive layer 22 is attached to one surface of the semiconductor wafer W and the protective sheet 10 is attached to the other surface of the semiconductor wafer W, at least the protective sheet 10 is irradiated with ultraviolet light or the like. The protective sheet 10 is cured by irradiating ultraviolet rays or the like. Then, as shown in FIG. 4D , the release liner 15 is peeled off from the protective sheet 10 . Furthermore, as shown in FIG. 4E , the semiconductor wafer W and the protective sheet 10 are divided into small pieces as in the first embodiment.

(第二實施型態之除去步驟) 第二實施型態之除去步驟中,係使用剝離用黏著帶T,以將保護片材之小片10’從半導體晶片X上剝離。剝離用黏著帶T,例如可採用市售之黏著帶。 (Removal step of the second embodiment) In the removal step of the second embodiment, the small piece 10' of the protective sheet is peeled from the semiconductor wafer X using the adhesive tape T for peeling. As the peeling adhesive tape T, for example, a commercially available adhesive tape can be used.

第二實施型態之除去步驟中,如圖4F所示,將貼附於保護片材之複數個小片10’之剝離用黏著帶T剝離,藉此將剝離用黏著帶T連同保護片材之複數個小片10’除去。 藉由如此地使用剝離用黏著帶T,可較簡便地將保護片材之複數個小片10’除去。此外,在將保護片材之複數個小片10’剝離時,亦可將附著於半導體之電路面之異物除去。 In the removal step of the second embodiment, as shown in FIG. 4F , the peeling adhesive tape T of the plurality of small pieces 10 ′ attached to the protective sheet is peeled off, thereby removing the peeling adhesive tape T together with the protective sheet. A plurality of small pieces 10' are removed. By using the peeling adhesive tape T in this way, the plurality of small pieces 10' of the protective sheet can be removed relatively easily. In addition, when the plurality of small pieces 10' of the protective sheet are peeled off, foreign matter adhering to the circuit surface of the semiconductor can also be removed.

第二實施型態中所使用之保護片材10對半導體晶圓W之密著性,例如以將上述保護片材10從矽裸晶圓上剝離時之剝離力表示。如此之剝離力之測定方法如上所述。又,保護片材之小片10’與半導體晶片X之間之剝離力,在上述硬化處理後,小於保護片材之小片10’與剝離用黏著帶T之間之剝離力。The adhesiveness of the protective sheet 10 used in the second embodiment to the semiconductor wafer W is represented by, for example, the peeling force when the above-mentioned protective sheet 10 is peeled off from the silicon bare wafer. The measuring method of such peeling force is as above-mentioned. Moreover, the peeling force between the small piece 10' of the protective sheet and the semiconductor wafer X is smaller than the peeling force between the small piece 10' of the protective sheet and the adhesive tape T for peeling after the above-mentioned hardening treatment.

<第二實施型態之保護片材之細節> 第二實施型態中所使用之保護片材10,例如含有丙烯酸聚合物、異氰酸酯化合物、及聚合引發劑。 <Details of the protective sheet of the second embodiment> The protective sheet 10 used in the second embodiment contains, for example, an acrylic polymer, an isocyanate compound, and a polymerization initiator.

上述丙烯酸聚合物,係於分子中至少具有:(甲基)丙烯酸烷基酯之構成單元、含羥基之(甲基)丙烯酸酯之構成單元、及含聚合性基之(甲基)丙烯酸酯之構成單元。構成單元,係構成丙烯酸聚合物之主鏈之單元。上述丙烯酸聚合物中之各側鏈係含於構成主鏈之各構成單元中。The above-mentioned acrylic polymer has, in its molecule, at least: a constituent unit of an alkyl (meth)acrylate, a constituent unit of a hydroxyl-containing (meth)acrylate, and a constituent unit of a polymerizable group-containing (meth)acrylate. Constituent unit. A constituent unit is a unit constituting the main chain of an acrylic polymer. Each side chain in the above-mentioned acrylic polymer is contained in each constituent unit constituting the main chain.

上述(甲基)丙烯酸烷基酯之構成單元,係源自(甲基)丙烯酸烷基酯單體。換言之,(甲基)丙烯酸烷基酯單體進行聚合反應後之分子結構即為(甲基)丙烯酸烷基酯之構成單元。「烷基」之表述,係表示與(甲基)丙烯酸形成酯鍵後之烴部分。 (甲基)丙烯酸烷基酯之構成單元中烷基部分之烴可為飽和烴,亦可為不飽和烴。烷基部分之碳數可為6以上10以下。 The constituent units of the above-mentioned alkyl (meth)acrylates are derived from alkyl (meth)acrylate monomers. In other words, the molecular structure of the alkyl (meth)acrylate monomer after polymerization is the constituent unit of the alkyl (meth)acrylate. The term "alkyl" refers to a hydrocarbon moiety that forms an ester bond with (meth)acrylic acid. The hydrocarbon of the alkyl portion in the constituent unit of the alkyl (meth)acrylate may be a saturated hydrocarbon or an unsaturated hydrocarbon. The carbon number of the alkyl moiety may be 6 or more and 10 or less.

丙烯酸聚合物,係具有含羥基之(甲基)丙烯酸酯之構成單元,如此之構成單元之羥基係容易與異氰酸酯基反應。 藉由使具有含羥基之(甲基)丙烯酸酯之構成單元的丙烯酸聚合物、及異氰酸酯化合物事先共存於保護片材10中,可使保護片材10適度地硬化。因此,丙烯酸聚合物可充分地凝膠化。因此,保護片材10可維持形狀並發揮黏著性能。 Acrylic polymers have hydroxyl-containing (meth)acrylate constituent units, and the hydroxyl groups of such constituent units easily react with isocyanate groups. The protection sheet 10 can be moderately cured by allowing an acrylic polymer having a constituent unit of a hydroxyl-containing (meth)acrylate and an isocyanate compound to coexist in the protection sheet 10 in advance. Therefore, the acrylic polymer can be sufficiently gelled. Therefore, the protective sheet 10 can maintain the shape and exhibit adhesive properties.

含羥基之(甲基)丙烯酸酯之構成單元,理想係含羥基之(甲基)丙烯酸C2~C14烷基酯之構成單元。「C2~C14烷基」之表述,係表示與(甲基)丙烯酸形成酯鍵後之烴部分之碳數(2以上14以下)。換言之,含羥基之(甲基)丙烯酸C2~C14烷基酯單體,係表示(甲基)丙烯酸、與碳數2以上14以下之醇(通常為二元醇)形成酯鍵而成之單體。 C2~C14烷基之烴,通常為飽和烴。例如,C2~C14烷基之烴,為直鏈狀飽和烴、或支鏈狀飽和烴。C2~C14烷基之烴,理想係不含含有氧(O)或氮(N)等之極性基。 The constituent unit of hydroxyl-containing (meth)acrylate is ideally a constituent unit of hydroxyl-containing C2-C14 alkyl (meth)acrylate. The expression "C2~C14 alkyl" refers to the carbon number (2 to 14) of the hydrocarbon moiety after forming an ester bond with (meth)acrylic acid. In other words, C2~C14 alkyl (meth)acrylate monomers containing hydroxyl groups refer to monomers formed by forming ester bonds between (meth)acrylic acid and alcohols (usually diols) with 2 to 14 carbons. body. C2~C14 alkyl hydrocarbons, usually saturated hydrocarbons. For example, C2~C14 alkyl hydrocarbons are linear saturated hydrocarbons or branched saturated hydrocarbons. C2~C14 alkyl hydrocarbons ideally do not contain polar groups such as oxygen (O) or nitrogen (N).

含羥基之(甲基)丙烯酸C2~C14烷基酯之構成單元,可列舉例如:(甲基)丙烯酸羥乙基酯、(甲基)丙烯酸羥丙基酯、(甲基)丙烯酸羥正丁基酯、或者(甲基)丙烯酸羥異丁基酯等(甲基)丙烯酸羥丁基酯之各構成單元。又,(甲基)丙烯酸羥丁基酯之構成單元中,羥基(-OH基),可鍵結於烴部分之末端之碳(C)上,亦可鍵結於烴部分之末端以外之碳(C)上。The constituent units of hydroxyl-containing C2~C14 alkyl (meth)acrylates include, for example: hydroxyethyl (meth)acrylate, hydroxypropyl (meth)acrylate, hydroxy-n-butyl (meth)acrylate Each constituent unit of hydroxybutyl (meth)acrylate such as base ester or hydroxyisobutyl (meth)acrylate. In addition, in the constituent unit of hydroxybutyl (meth)acrylate, the hydroxyl group (-OH group) may be bonded to the carbon (C) at the end of the hydrocarbon portion, or may be bonded to a carbon other than the end of the hydrocarbon portion (C) on.

上述丙烯酸聚合物,係含有於側鏈具有聚合性不飽和雙鍵(聚合性碳-碳雙鍵)之含聚合性基之(甲基)丙烯酸酯之構成單元。 藉由使上述丙烯酸聚合物含有含聚合性基之(甲基)丙烯酸酯之構成單元,可在拾取步驟前藉由照射活性能量射線(紫外線等)使保護片材10硬化。詳細而言,藉由照射紫外線等活性能量射線,使光聚合引發劑產生自由基,藉由該自由基之作用,可使丙烯酸聚合物彼此進行交聯反應。藉此,可使照射前之保護片材10之黏著力藉由照射而降低。進而,可將保護片材之小片10’從半導體晶片X上良好地剝離。 又,活性能量射線,係採用紫外線、放射線、電子束。 The above-mentioned acrylic polymer is a structural unit containing a polymerizable group-containing (meth)acrylate having a polymerizable unsaturated double bond (polymerizable carbon-carbon double bond) in a side chain. By making the above-mentioned acrylic polymer contain a polymerizable group-containing (meth)acrylate structural unit, the protective sheet 10 can be cured by irradiating active energy rays (ultraviolet rays, etc.) before the pickup step. Specifically, by irradiating active energy rays such as ultraviolet rays, the photopolymerization initiator generates radicals, and by the action of the radicals, acrylic polymers can be crosslinked. Thereby, the adhesive force of the protective sheet 10 before irradiation can be reduced by irradiation. Furthermore, the small piece 10' of the protective sheet can be peeled off from the semiconductor wafer X favorably. Also, as active energy rays, ultraviolet rays, radiation rays, and electron beams are used.

含聚合性基之(甲基)丙烯酸酯之構成單元,具體而言可具有下述分子結構:上述之含羥基之(甲基)丙烯酸酯之構成單元中之羥基、與含異氰酸酯基之(甲基)丙烯酸酯單體之異氰酸酯基形成胺基甲酸酯鍵而成之分子結構。The structural unit of the polymeric group-containing (meth)acrylate may specifically have the following molecular structure: the hydroxyl group in the above-mentioned structural unit of the hydroxyl-containing (meth)acrylate, and the isocyanate group-containing (meth)acrylate. The molecular structure formed by the isocyanate group of the acrylate monomer forming a urethane bond.

具聚合性基之含聚合性基之(甲基)丙烯酸酯之構成單元,可於丙烯酸聚合物之聚合後調製。例如,可於(甲基)丙烯酸烷基酯單體、與含羥基之(甲基)丙烯酸酯單體共聚後,再使一部分之含羥基之(甲基)丙烯酸酯之構成單元中的羥基、與含異氰酸酯基之聚合性單體之異氰酸酯基進行胺基甲酸酯化反應,藉此獲得上述含聚合性基之(甲基)丙烯酸酯之構成單元。The structural unit of the polymerizable group-containing (meth)acrylate can be prepared after polymerization of the acrylic polymer. For example, after copolymerization of alkyl (meth)acrylate monomers and hydroxyl-containing (meth)acrylate monomers, the hydroxyl groups, Urethane reaction is carried out with the isocyanate group of the isocyanate group-containing polymerizable monomer to obtain the above-mentioned polymerizable group-containing (meth)acrylate constituent unit.

上述含異氰酸酯基之(甲基)丙烯酸酯單體,理想係於分子中具有一個異氰酸酯基及一個(甲基)丙烯醯基。如此之單體,可列舉例如(甲基)丙烯酸2-異氰酸基乙基酯。The above-mentioned isocyanate group-containing (meth)acrylate monomer ideally has one isocyanate group and one (meth)acryl group in the molecule. As such a monomer, 2-isocyanatoethyl (meth)acrylate is mentioned, for example.

保護片材10,可進一步含有於分子中具有複數個異氰酸酯基之異氰酸酯化合物。藉此,可使保護片材10中之丙烯酸聚合物間進行交聯反應。詳細而言,可使異氰酸酯化合物之一個異氰酸酯基與丙烯酸聚合物之羥基反應,並使另一個異氰酸酯基與其他丙烯酸聚合物之羥基反應,藉此經由異氰酸酯化合物進行交聯反應。The protective sheet 10 may further contain an isocyanate compound having a plurality of isocyanate groups in the molecule. Thereby, the cross-linking reaction among the acrylic polymers in the protective sheet 10 can be carried out. Specifically, one isocyanate group of an isocyanate compound reacts with a hydroxyl group of an acrylic polymer, and the other isocyanate group reacts with a hydroxyl group of another acrylic polymer, thereby performing a crosslinking reaction via the isocyanate compound.

異氰酸酯化合物,可列舉例如:脂肪族二異氰酸酯、脂環族二異氰酸酯、或芳香脂肪族二異氰酸酯等二異氰酸酯。進一步地,異氰酸酯化合物,可列舉例如:二異氰酸酯之二聚物或三聚物等之聚合多異氰酸酯、多亞甲基多伸苯基多異氰酸酯。As an isocyanate compound, diisocyanates, such as aliphatic diisocyanate, alicyclic diisocyanate, and araliphatic diisocyanate, are mentioned, for example. Furthermore, examples of the isocyanate compound include polymerized polyisocyanates such as dimers and trimers of diisocyanates, and polymethylene polyphenylene polyisocyanates.

此外,異氰酸酯化合物,可列舉例如使過量之上述異氰酸酯化合物與含活性氫之化合物反應而成之多異氰酸酯。含活性氫之化合物可列舉:含活性氫之低分子量化合物、含活性氫之高分子量化合物等。 又,異氰酸酯化合物,亦可使用脲基甲酸酯化多異氰酸酯、縮二脲化多異氰酸酯等。 上述異氰酸酯化合物,可單獨使用一種或組合使用二種以上。 Moreover, as an isocyanate compound, the polyisocyanate which made the said isocyanate compound and the compound containing active hydrogen react, for example in excess is mentioned. Examples of active hydrogen-containing compounds include active hydrogen-containing low-molecular-weight compounds, active hydrogen-containing high-molecular-weight compounds, and the like. Moreover, as an isocyanate compound, an allophanate polyisocyanate, a biuret polyisocyanate, etc. can also be used. The above-mentioned isocyanate compounds may be used alone or in combination of two or more.

上述異氰酸酯化合物,理想係芳香族二異氰酸酯與含活性氫之低分子量化合物之反應物。芳香族二異氰酸酯之反應物中異氰酸酯基之反應速度較慢,因此含有如此之反應物之保護片材10可抑制過度硬化。上述異氰酸酯化合物,理想係於分子中具有三個以上異氰酸酯基。The above-mentioned isocyanate compound is ideally a reactant of an aromatic diisocyanate and a low molecular weight compound containing active hydrogen. The reaction rate of the isocyanate group in the reactant of aromatic diisocyanate is relatively slow, so the protective sheet 10 containing such a reactant can suppress excessive hardening. The above-mentioned isocyanate compound preferably has three or more isocyanate groups in the molecule.

保護片材10所含之聚合引發劑,係可藉由所施加之熱或光能而開始聚合反應之化合物。藉由使保護片材10含有聚合引發劑,可在給予保護片材10熱能或光能時使丙烯酸聚合物間進行交聯反應。詳細而言,可於具有含聚合性基之(甲基)丙烯酸酯之構成單元的丙烯酸聚合物間開始聚合性基彼此之聚合反應,從而使保護片材10硬化。藉此,可使保護片材10之黏著力降低,進而可於除去步驟中輕易地將硬化後之保護片材之小片10’從半導體晶片X上剝離。 聚合引發劑,例如採用光聚合引發劑或熱聚合引發劑等。聚合引發劑,可使用一般的市售產品。 The polymerization initiator contained in the protective sheet 10 is a compound that can initiate a polymerization reaction by applying heat or light energy. By making the protective sheet 10 contain a polymerization initiator, it is possible to cause a crosslinking reaction between acrylic polymers when heat energy or light energy is given to the protective sheet 10 . Specifically, the polymerization reaction of the polymerizable groups can be initiated between the acrylic polymers having the constituent units of the polymerizable group-containing (meth)acrylate, and the protective sheet 10 can be cured. Thereby, the adhesive force of the protective sheet 10 can be reduced, and the small piece 10' of the hardened protective sheet can be easily peeled off from the semiconductor wafer X in the removal step. As a polymerization initiator, for example, a photopolymerization initiator, a thermal polymerization initiator, or the like is used. As a polymerization initiator, a general commercially available product can be used.

第二實施型態之保護片材10可如下製作。具體而言,係合成丙烯酸聚合物,並從含有丙烯酸聚合物、異氰酸酯化合物、聚合引發劑、及溶劑之黏著劑組成物中使溶劑揮發從而製作保護片材10。The protective sheet 10 of the second embodiment can be produced as follows. Specifically, an acrylic polymer is synthesized, and the protective sheet 10 is produced by volatilizing the solvent from an adhesive composition containing an acrylic polymer, an isocyanate compound, a polymerization initiator, and a solvent.

丙烯酸聚合物之合成中,例如藉由使(甲基)丙烯酸烷基酯單體與含羥基之(甲基)丙烯酸酯單體進行自由基聚合,從而合成丙烯酸聚合物中間產物。 自由基聚合可藉由一般方法進行。例如可將上述各單體溶解於溶劑中邊加熱邊攪拌,並添加聚合引發劑,藉此合成丙烯酸聚合物中間產物。亦可在鏈轉移劑存在下進行聚合,以調整丙烯酸聚合物之分子量。 接著,使丙烯酸聚合物中間產物所含之一部分之含羥基之(甲基)丙烯酸酯之構成單元的羥基、與含異氰酸酯基之聚合性單體之異氰酸酯基藉由胺基甲酸酯化反應鍵結。藉此,一部分之含羥基之(甲基)丙烯酸酯之構成單元變成含聚合性基之(甲基)丙烯酸酯之構成單元。 胺基甲酸酯化反應,可藉由一般方法進行。例如,在溶劑及胺基甲酸酯化觸媒存在下,邊加熱邊攪拌丙烯酸聚合物中間產物與含異氰酸酯基之聚合性單體。藉此,可使丙烯酸聚合物中間產物之一部分之羥基與含異氰酸酯基之聚合性單體之異氰酸酯基形成胺基甲酸酯鍵。 In the synthesis of an acrylic polymer, for example, an intermediate product of an acrylic polymer is synthesized by radically polymerizing an alkyl (meth)acrylate monomer and a hydroxyl-containing (meth)acrylate monomer. Radical polymerization can be performed by a general method. For example, the acrylic acid polymer intermediate can be synthesized by dissolving each of the above-mentioned monomers in a solvent while stirring while heating, and adding a polymerization initiator. It can also be polymerized in the presence of a chain transfer agent to adjust the molecular weight of the acrylic polymer. Next, the hydroxyl groups of the constituent units of the hydroxyl group-containing (meth)acrylate contained in the intermediate product of the acrylic polymer and the isocyanate group of the polymerizable monomer containing the isocyanate group are bonded by a urethanization reaction. Knot. Thereby, some structural units of the hydroxyl group-containing (meth)acrylate become the structural unit of the polymeric group containing (meth)acrylate. Urethane reaction can be performed by a general method. For example, in the presence of a solvent and a urethanization catalyst, the acrylic polymer intermediate product and the isocyanate group-containing polymerizable monomer are stirred while being heated. Thereby, a part of the hydroxyl group of the acrylic polymer intermediate product and the isocyanate group of the isocyanate group-containing polymerizable monomer can form a urethane bond.

接著,將丙烯酸聚合物、異氰酸酯化合物、及聚合引發劑溶解於溶劑中,從而調製黏著劑組成物。可藉由改變溶劑之量而調整組成物之黏度。接著,將黏著劑組成物塗布於剝離襯墊15(於後說明)。塗布方法,例如採用輥塗布、網版塗布、凹版塗布等一般的塗布方法。對所塗布之組成物施予脫溶劑處理或固化處理等,藉此使所塗布之黏著劑組成物固化,從而製作保護片材10。Next, an acrylic polymer, an isocyanate compound, and a polymerization initiator are dissolved in a solvent to prepare an adhesive composition. The viscosity of the composition can be adjusted by changing the amount of solvent. Next, the adhesive composition is applied to the release liner 15 (described later). As the coating method, for example, general coating methods such as roll coating, screen coating, and gravure coating are used. The applied composition is subjected to solvent removal treatment, curing treatment, etc., whereby the applied adhesive composition is cured, thereby producing the protective sheet 10 .

第二實施型態之保護片材10,例如如圖2A所示,可於使用前或使用中之階段,於至少一面疊有剝離襯墊15。剝離襯墊15,係構成為可輕易地從保護片材10上剝離。 更詳細而言,保護片材10中將與半導體晶圓W之電路面重疊之面、或與如此之面為相反側之面中至少一面,可在使用前或使用中之狀態下貼附有剝離襯墊15。剝離襯墊15,係用以保護保護片材10,並於將保護片材10貼附於半導體晶圓W後被剝離而移除。 The protective sheet 10 of the second embodiment, for example, as shown in FIG. 2A , can be laminated with a release liner 15 on at least one side before or during use. The release liner 15 is configured to be easily peeled from the protective sheet 10 . More specifically, at least one of the surface of the protective sheet 10 that will overlap the circuit surface of the semiconductor wafer W, or the surface opposite to this surface, may be attached with a protective sheet before use or during use. Release liner 15. The release liner 15 is used to protect the protection sheet 10 and is peeled off and removed after the protection sheet 10 is attached to the semiconductor wafer W. Referring to FIG.

上述剝離襯墊15,可用作用以支撐保護片材10之支撐材。剝離襯墊15,係適合用於將保護片材10疊於半導體晶圓W上之時。詳細而言,可在積層有剝離襯墊15與保護片材10之狀態下將保護片材10疊於半導體晶圓W上,藉此將保護片材10貼附於半導體晶圓W。然後,可將剝離襯墊15剝離。 又,亦可進一步於保護片材10貼附剝離襯墊15,使其成為於二個剝離襯墊15之間配置保護片材10之狀態。 The above-mentioned release liner 15 can be used as a supporting material for supporting the protective sheet 10 . The release liner 15 is suitably used when laminating the protective sheet 10 on the semiconductor wafer W. As shown in FIG. Specifically, the protective sheet 10 can be attached to the semiconductor wafer W by stacking the protective sheet 10 on the semiconductor wafer W in a state where the release liner 15 and the protective sheet 10 are laminated. Then, the release liner 15 can be peeled off. In addition, a release liner 15 may be further attached to the protective sheet 10 so that the protective sheet 10 may be placed between two release liners 15 .

剝離襯墊15之厚度,例如可為25μm以上75μm以下。剝離襯墊15,例如理想為聚對苯二甲酸乙二酯樹脂膜等樹脂膜。剝離襯墊15,理想為透光性(紫外線透射性)。剝離襯墊15,例如可使用經聚矽氧系、長鏈烷基系、氟系、硫化鉬等剝離劑進行表面處理之塑膠膜或紙等。又,剝離襯墊15,可採用產品名「DIAFOIL MRA50」(三菱化學公司製之雙軸延伸聚酯膜)等市售品。The thickness of the release liner 15 may be, for example, not less than 25 μm and not more than 75 μm. The release liner 15 is preferably, for example, a resin film such as a polyethylene terephthalate resin film. The release liner 15 is desirably translucent (ultraviolet ray transmissive). The release liner 15 can be, for example, a plastic film or paper surface-treated with a silicone-based, long-chain alkyl-based, fluorine-based, or molybdenum sulfide release agent. In addition, as the release liner 15, a commercially available product such as "DIAFOIL MRA50" (a biaxially stretched polyester film manufactured by Mitsubishi Chemical Corporation) can be used.

第二實施型態之保護片材10,例如可含有如上所述藉由活性能量射線而硬化之硬化性化合物,亦可含有能藉由加熱處理而開始硬化反應之硬化性化合物。 能藉由加熱處理而開始硬化反應之硬化性化合物,可列舉例如熱硬化性樹脂。 此外,藉由活性能量射線而硬化之硬化性化合物,進一步可列舉紫外線硬化性聚胺基甲酸酯樹脂等。 又,硬化性化合物,亦可列舉硬化性聚矽氧樹脂組成物。 The protective sheet 10 of the second embodiment may contain, for example, a curable compound that is cured by active energy rays as described above, or may contain a curable compound that can initiate a curing reaction by heat treatment. The curable compound capable of starting a curing reaction by heat treatment includes, for example, a thermosetting resin. Furthermore, examples of the curable compound cured by active energy rays further include ultraviolet curable polyurethane resins and the like. In addition, curable compounds also include curable silicone resin compositions.

熱硬化性樹脂,可列舉例如:環氧樹脂、酚樹脂、胺基樹脂、不飽和聚酯樹脂、熱硬化性聚醯亞胺樹脂等。上述熱硬化性樹脂,可僅採用一種或採用二種以上。As a thermosetting resin, an epoxy resin, a phenol resin, an amino resin, an unsaturated polyester resin, a thermosetting polyimide resin, etc. are mentioned, for example. The above-mentioned thermosetting resins may be used alone or in combination of two or more.

上述環氧樹脂,可列舉例如:雙酚A型、雙酚F型、雙酚S型、溴化雙酚A型、氫化雙酚A型、雙酚AF型、聯苯型、萘型、茀型、苯酚酚醛清漆型、鄰甲酚酚醛清漆型、三羥苯基甲烷型、四苯酚基乙烷型、乙內醯脲型、異氰脲酸三縮水甘油酯型、或縮水甘油胺型之各環氧樹脂。The above-mentioned epoxy resins include, for example, bisphenol A type, bisphenol F type, bisphenol S type, brominated bisphenol A type, hydrogenated bisphenol A type, bisphenol AF type, biphenyl type, naphthalene type, type, phenol novolac type, o-cresol novolac type, trishydroxyphenylmethane type, tetraphenol ethane type, hydantoylurea type, triglycidyl isocyanurate type, or glycidylamine type Each epoxy resin.

酚樹脂,可作為環氧樹脂之硬化劑發揮作用。酚樹脂,可列舉例如:酚醛清漆型酚樹脂、甲階型酚樹脂、聚對氧苯乙烯等聚氧苯乙烯等。 酚醛清漆型酚樹脂,可列舉例如:苯酚酚醛清漆樹脂、苯酚芳烷基樹脂、甲酚酚醛清漆樹脂、三級丁基苯酚酚醛清漆樹脂、壬基苯酚酚醛清漆樹脂等。 上述酚樹脂,可僅採用一種或採用二種以上。 Phenolic resins can be used as hardeners for epoxy resins. Examples of the phenol resin include polyoxystyrenes such as novolak-type phenol resins, resole-type phenol resins, and polyparaoxystyrene. Examples of novolak-type phenol resins include phenol novolak resins, phenol aralkyl resins, cresol novolac resins, tertiary butylphenol novolak resins, and nonylphenol novolak resins. The above-mentioned phenolic resins may be used alone or in combination of two or more.

紫外線硬化性聚胺基甲酸酯樹脂,可列舉:於分子中具有由複數個胺基甲酸酯鍵所構成之主鏈及含有(甲基)丙烯醯基之側鏈之化合物等。市售之紫外線硬化性聚胺基甲酸酯樹脂,可列舉例如大成精細化工公司製之「8UH系列」等。Examples of ultraviolet curable polyurethane resins include compounds having a main chain composed of a plurality of urethane bonds and side chains containing (meth)acryl groups in the molecule. Commercially available ultraviolet curable polyurethane resins include, for example, "8UH series" manufactured by Taisei Fine Chemical Co., Ltd., and the like.

硬化性聚矽氧樹脂組成物,可列舉例如:含有於分子中具有矽醇基之聚矽氧樹脂並可藉由矽醇基之縮合反應而硬化之組成物、可藉由烯基與SiH基之矽氫化反應而硬化之組成物、含有於分子中具有聚合性不飽和基之聚矽氧樹脂並可藉由自由基聚合反應而硬化之組成物等。Curable polysiloxane resin compositions include, for example, compositions that contain polysiloxane resins having silanol groups in the molecule and that can be hardened by condensation reactions of silanol groups, and compositions that can be hardened by condensation reactions of alkenyl and SiH groups. Compositions hardened by the hydrosilylation reaction, compositions containing polysiloxane resins having polymerizable unsaturated groups in the molecule and hardened by free radical polymerization, etc.

第二實施型態中,上述保護片材10之硬化處理前及硬化處理後之斷裂伸長率及斷裂強度,分別可與上述第一實施型態之保護片材10之斷裂伸長率及斷裂強度相同。In the second embodiment, the elongation at break and the strength at break before and after the hardening treatment of the protective sheet 10 can be the same as the elongation at break and the strength at break of the protective sheet 10 in the first embodiment, respectively. .

第二實施型態中,上述保護片材10之硬化處理前及硬化處理後之對半導體晶圓W之密著性,可藉由第一實施型態之說明中所示之上述剝離力測定。如此之剝離力,可與第一實施型態所使用之保護片材10之上述剝離力相同。In the second embodiment, the adhesion of the protective sheet 10 to the semiconductor wafer W before and after the curing treatment can be measured by the above-mentioned peeling force shown in the description of the first embodiment. Such a peeling force can be the same as the above-mentioned peeling force of the protective sheet 10 used in the first embodiment.

第二實施型態中所使用之保護片材10,理想係在硬化處理前、25℃下之拉伸彈性模數(拉伸儲存彈性模數E’)為1.0MPa以上1.0GPa以下。此外,理想係在硬化處理前、-15℃下之拉伸彈性模數(拉伸儲存彈性模數E’)為2.0MPa以上1.0GPa以下。 第二實施型態中所使用之保護片材10,理想係在硬化處理後、25℃下之拉伸彈性模數(拉伸儲存彈性模數E’)為5.0MPa以上10.0GPa以下。此外,理想係在硬化處理後、-15℃下之拉伸彈性模數(拉伸儲存彈性模數E’)為10.0MPa以上10.0GPa以下。 The protective sheet 10 used in the second embodiment preferably has a tensile elastic modulus (tensile storage elastic modulus E') at 25°C before hardening treatment of 1.0 MPa to 1.0 GPa. In addition, it is desirable that the tensile elastic modulus (tensile storage elastic modulus E') at -15°C before hardening treatment is 2.0 MPa or more and 1.0 GPa or less. The protective sheet 10 used in the second embodiment preferably has a tensile elastic modulus (tensile storage elastic modulus E') of 5.0 MPa or more and 10.0 GPa or less after curing treatment at 25°C. In addition, it is desirable that the tensile elastic modulus (tensile storage elastic modulus E') at -15°C after curing treatment be 10.0 MPa or more and 10.0 GPa or less.

第二實施型態中,未特別提及之步驟,可以與第一實施型態、第三實施型態、第四實施型態、或第五實施型態中各步驟相同之方式進行。In the second embodiment, steps that are not particularly mentioned can be performed in the same manner as each step in the first embodiment, the third embodiment, the fourth embodiment, or the fifth embodiment.

接著,詳細說明第三實施型態。又,第三實施型態中,不重覆與第一實施型態及第二實施型態相同之說明。第三實施型態中,只要沒有特別提及,可進行與第一實施型態或第二實施型態相同之操作。Next, the third embodiment will be described in detail. In addition, in the third embodiment, the same description as the first embodiment and the second embodiment will not be repeated. In the third embodiment, unless otherwise mentioned, the same operation as that of the first embodiment or the second embodiment can be performed.

「第三實施型態」 第三實施型態之半導體裝置之製造方法與第一實施型態之主要差異在於:於安裝步驟中,係在積層半導體晶圓W與保護片材10之狀態下將半導體晶圓W貼附於黏著劑層22,而非將疊於玻璃載體G上之半導體晶圓W貼附於切晶帶20之黏著劑層22等。 "Third Implementation Type" The main difference between the manufacturing method of the semiconductor device of the third embodiment and the first embodiment is that in the mounting step, the semiconductor wafer W is attached to the semiconductor wafer W and the protective sheet 10 in the state of lamination. The adhesive layer 22 is not the adhesive layer 22 and the like for attaching the semiconductor wafer W stacked on the glass carrier G to the dicing tape 20 .

詳細而言,第三實施型態之半導體裝置之製造方法中,如圖5A所示,準備貼附於背磨膠帶B之半導體晶圓W。Specifically, in the method of manufacturing a semiconductor device according to the third embodiment, as shown in FIG. 5A , a semiconductor wafer W attached to a back grinding tape B is prepared.

保護步驟中,如圖5B所示,於半導體晶圓W上貼附保護片材10。此時,形成於半導體晶圓W之一面貼附有保護片材10,並於另一面貼附有背磨膠帶之狀態。電路構成要素,係配置於半導體晶圓W之一面側。In the protection step, as shown in FIG. 5B , a protection sheet 10 is pasted on the semiconductor wafer W. At this time, the protective sheet 10 is attached to one side of the semiconductor wafer W, and the back grinding tape is attached to the other side. The circuit components are arranged on one side of the semiconductor wafer W. As shown in FIG.

接著,安裝步驟中,如圖5C所示,在半導體晶圓W與保護片材10重疊之狀態下,從半導體晶圓W上剝離背磨膠帶。藉此,形成半導體晶圓W與保護片材10重疊、且半導體晶圓W之另一面(不是電路面之非電路面)露出之狀態。Next, in the mounting step, as shown in FIG. 5C , the back grinding tape is peeled off from the semiconductor wafer W in a state where the semiconductor wafer W is overlapped with the protective sheet 10 . Thereby, the semiconductor wafer W and the protective sheet 10 are overlapped, and the other surface (non-circuit surface which is not the circuit surface) of the semiconductor wafer W is exposed.

第三實施型態之安裝步驟中,如圖5D所示,在半導體晶圓W與保護片材10重疊之狀態下,將露出之半導體晶圓W之另一面貼附於切晶帶20之黏著劑層22。此時,半導體晶圓W之一面貼附有保護片材10,並進一步貼附有剝離襯墊15,因此可經由保護片材10及剝離襯墊15將半導體晶圓W按壓在黏著劑層22上。因此,可在保護半導體晶圓W之電路面的同時,將半導體晶圓W貼附於黏著劑層22。In the installation step of the third embodiment, as shown in FIG. 5D , in the state where the semiconductor wafer W overlaps the protective sheet 10, the other side of the exposed semiconductor wafer W is attached to the adhesive tape 20. Agent layer 22. At this time, the protective sheet 10 is attached to one side of the semiconductor wafer W, and the release liner 15 is further attached, so that the semiconductor wafer W can be pressed against the adhesive layer 22 via the protective sheet 10 and the release liner 15. superior. Therefore, the semiconductor wafer W can be attached to the adhesive layer 22 while protecting the circuit surface of the semiconductor wafer W.

理想係於安裝步驟中,在剝離襯墊15與保護片材10積層之狀態下將保護片材10疊於半導體晶圓W上,並於擴展步驟中保護片材10被小片化前,將剝離襯墊15從保護片材10上剝離。Ideally, in the mounting step, the protective sheet 10 is stacked on the semiconductor wafer W in the state where the release liner 15 and the protective sheet 10 are laminated, and the peeling is performed before the protective sheet 10 is divided into pieces in the expanding step. The liner 15 is peeled off from the protective sheet 10 .

第三實施型態中,未特別提及之步驟,可以與第一實施型態、第二實施型態、第四實施型態、或第五實施型態中各步驟相同之方式進行。 又,第三實施型態、以及以下說明之第四實施型態及第五實施型態中,可實施第一實施型態所說明之上述除去步驟,亦可實施第二實施型態所說明之上述除去步驟。換言之,第三實施型態至第五實施型態之各除去步驟中,可藉由與上述方法相同之方法,利用含水之液體將保護片材之小片10’移除,或使用剝離用黏著帶T將保護片材之小片10’ 移除。 In the third embodiment, steps that are not specifically mentioned can be performed in the same manner as each step in the first embodiment, the second embodiment, the fourth embodiment, or the fifth embodiment. In addition, in the third embodiment, the fourth embodiment and the fifth embodiment described below, the above-mentioned removal step described in the first embodiment can be implemented, and the process described in the second embodiment can also be implemented. Remove steps above. In other words, in the removal steps of the third embodiment to the fifth embodiment, the small piece 10' of the protective sheet can be removed by using the same method as the above method, or the small piece 10' of the protective sheet can be removed by using an adhesive tape for peeling T Remove the small piece 10' of the protective sheet.

接著,詳細說明第四實施型態。又,第四實施型態中,不重覆與第一實施型態~第三實施型態相同之說明。第四實施型態中,只要沒有特別提及,可進行與第一實施型態~第三實施型態之各操作相同之操作。Next, the fourth embodiment will be described in detail. In addition, in the fourth embodiment, the same description as that of the first to third embodiments is not repeated. In the fourth embodiment, unless otherwise mentioned, the same operations as those of the first to third embodiments can be performed.

「第四實施型態」 第四實施型態之半導體裝置之製造方法與第三實施型態之主要差異在於:於安裝步驟前,對半導體晶圓W照射雷射光,從而於晶圓內部形成脆弱部位。 詳細而言,第四實施型態之半導體裝置之製造方法係具有: 隱形加工步驟,藉由雷射光於貼附有背磨膠帶B之半導體晶圓W之內部形成脆弱部位,進行使半導體晶圓W小片化之準備; 保護步驟,藉由於半導體晶圓W之一面貼附保護片材10而保護半導體晶圓W之電路面; 安裝步驟,將半導體晶圓W之另一面(例如,與電路面為相反側之面)貼附於切晶帶20,將半導體晶圓W固定於切晶帶20; 硬化處理步驟,藉由照射活性能量射線等硬化處理使保護片材10硬化,並使保護片材10之黏著力降低; 擴展步驟,藉由拉伸切晶帶20使半導體晶圓W及保護片材10小片化; 除去步驟,將貼附於半導體晶片X之保護片材之小片10’移除; 拾取步驟,將半導體晶片X與黏著劑層22之間剝離並取出半導體晶片X;及 接合步驟,將半導體晶片X接合於被接著體。 "Fourth Implementation Type" The main difference between the manufacturing method of the semiconductor device of the fourth embodiment and the third embodiment is that before the mounting step, the semiconductor wafer W is irradiated with laser light to form a fragile part inside the wafer. Specifically, the method for manufacturing a semiconductor device in the fourth embodiment includes: The stealth processing step is to use laser light to form a weak part inside the semiconductor wafer W with the back grinding tape B attached, so as to prepare the semiconductor wafer W for small pieces; The protection step is to protect the circuit surface of the semiconductor wafer W by attaching the protective sheet 10 to one surface of the semiconductor wafer W; In the installation step, the other side of the semiconductor wafer W (for example, the side opposite to the circuit side) is attached to the dicing tape 20, and the semiconductor wafer W is fixed on the dicing tape 20; The hardening treatment step is to harden the protective sheet 10 by irradiating active energy rays or other hardening treatment, and reduce the adhesive force of the protective sheet 10; The expansion step is to make the semiconductor wafer W and the protective sheet 10 into small pieces by stretching the dicing tape 20; The removal step is to remove the small piece 10' of the protective sheet attached to the semiconductor wafer X; Picking up step, peeling off between the semiconductor wafer X and the adhesive layer 22 and taking out the semiconductor wafer X; and In the bonding step, the semiconductor wafer X is bonded to the adherend.

第四實施型態中,如圖6A所示,準備呈與背磨膠帶B相疊之狀態之半導體晶圓W。In the fourth embodiment, as shown in FIG. 6A , a semiconductor wafer W in a state where the back grinding tape B is stacked is prepared.

第四實施型態之隱形加工步驟中,如圖6B所示,對呈與背磨膠帶B相疊之狀態之半導體晶圓W照射雷射光。背磨膠帶B,例如貼附於半導體晶圓W之與電路面為相反側之面。雷射光,例如從半導體晶圓W之電路面側照射。In the stealth processing step of the fourth embodiment, as shown in FIG. 6B , laser light is irradiated to the semiconductor wafer W in a state where the back grinding tape B is stacked. The back grinding tape B is, for example, attached to the surface of the semiconductor wafer W that is opposite to the circuit surface. Laser light is irradiated from the circuit side of the semiconductor wafer W, for example.

第四實施型態之保護步驟中,如圖6C所示,與第三實施型態相同地,於半導體晶圓W貼附保護片材10。藉此,形成於半導體晶圓W之一面(電路面)疊有保護片材10,並於另一面疊有背磨膠帶B之狀態。然後,將背磨膠帶B從半導體晶圓W上剝離。又,保護片材10,如圖6C所示,亦可疊有剝離襯墊15。In the protection step of the fourth embodiment, as shown in FIG. 6C , a protective sheet 10 is attached to the semiconductor wafer W in the same manner as in the third embodiment. Thereby, the protective sheet 10 is laminated on one surface (circuit surface) of the semiconductor wafer W, and the back grinding tape B is laminated on the other surface. Then, the back grinding tape B is peeled off from the semiconductor wafer W. As shown in FIG. In addition, the protective sheet 10 may be laminated with a release liner 15 as shown in FIG. 6C.

然後,如圖6D及圖6E所示,可與第二實施型態相同地實施安裝步驟(亦參照圖4A)。接著,如圖6F所示,可與第二實施型態相同地對保護片材10施予硬化處理(亦參照圖4C)。Then, as shown in FIG. 6D and FIG. 6E , the installation steps can be implemented in the same manner as in the second embodiment (also refer to FIG. 4A ). Next, as shown in FIG. 6F , the protective sheet 10 may be hardened in the same manner as in the second embodiment (see also FIG. 4C ).

第四實施型態中,未特別提及之步驟,可以與第一實施型態、第二實施型態、或第三實施型態中各步驟相同之方式進行。In the fourth embodiment, steps that are not specifically mentioned can be performed in the same manner as each step in the first embodiment, the second embodiment, or the third embodiment.

最後,詳細說明第五實施型態。又,第五實施型態中,不重覆與第一實施型態~第四實施型態相同之說明。第五實施型態中,只要沒有特別提及,可進行與第一實施型態~第四實施型態之各操作相同之操作。Finally, the fifth embodiment will be described in detail. In addition, in the fifth embodiment, the same description as the first to fourth embodiment will not be repeated. In the fifth embodiment, unless otherwise mentioned, the same operations as those of the first to fourth embodiments can be performed.

「第五實施型態」 第五實施型態之半導體裝置之製造方法與其他實施型態之主要差異在於:在於半導體晶圓W與背磨膠帶B之間配置保護片材10之狀態下,將半導體晶圓W貼附於切晶帶20之黏著劑層22。 詳細而言,第五實施型態之半導體裝置之製造方法中,如圖7A所示,係於半導體晶圓W之電路面上疊合保護片材10,再進一步於保護片材10上疊合背磨膠帶B。又,亦可於保護片材10之一面上疊合背磨膠帶B後,再於保護片材10之另一面上疊合半導體晶圓W;亦可在於保護片材10之一面上疊合背磨膠帶B前,於保護片材10之另一面上疊合半導體晶圓W。 "Fifth Implementation Type" The main difference between the manufacturing method of the semiconductor device of the fifth embodiment and the other embodiments is that the semiconductor wafer W is attached to the The adhesive layer 22 of the crystal cutting tape 20 . Specifically, in the manufacturing method of the semiconductor device of the fifth embodiment, as shown in FIG. Back grinding tape B. Also, after laminating the back grinding tape B on one side of the protective sheet 10, the semiconductor wafer W can be laminated on the other side of the protective sheet 10; Before grinding the tape B, the semiconductor wafer W is stacked on the other side of the protective sheet 10 .

在積層有半導體晶圓W、保護片材10、及背磨膠帶B之狀態下,對未配置電路構成要素之側之半導體晶圓W之面施予研磨加工。詳細而言,如圖7A所示,藉由研磨墊K施予研磨加工(背磨加工)直至半導體晶圓W到達指定厚度。藉由研磨加工,半導體晶圓W之厚度薄化至預定厚度(參照圖7B)。In the state where the semiconductor wafer W, the protective sheet 10, and the back grinding tape B are laminated, the surface of the semiconductor wafer W on the side where the circuit components are not arranged is subjected to grinding processing. In detail, as shown in FIG. 7A , polishing (back grinding) is performed with a polishing pad K until the semiconductor wafer W reaches a predetermined thickness. Through the grinding process, the thickness of the semiconductor wafer W is reduced to a predetermined thickness (see FIG. 7B ).

接著,於安裝步驟中,將施有研磨加工之半導體晶圓W之面(未配置電路構成要素之側之面)疊合於切晶帶20之黏著劑層22上。此時,如圖7C所示,半導體晶圓W之電路面上貼附有保護片材10,而保護片材10上進一步貼附有背磨膠帶B。Next, in the mounting step, the surface of the polished semiconductor wafer W (the surface on which no circuit components are arranged) is superimposed on the adhesive layer 22 of the dicing tape 20 . At this time, as shown in FIG. 7C , a protective sheet 10 is attached to the circuit surface of the semiconductor wafer W, and a back grinding tape B is further attached to the protective sheet 10 .

於切晶帶20之黏著劑層22上疊合半導體晶圓W後,可藉由與上述方法相同之方法實施隱形加工步驟。接著,在貼附於半導體晶圓W之保護片材10與背磨膠帶B之間進行剝離,將背磨膠帶B移除(參照圖7D)。又,亦可在將背磨膠帶B移除後實施隱形加工步驟。After laminating the semiconductor wafer W on the adhesive layer 22 of the dicing tape 20 , the stealth processing step can be implemented by the same method as the above method. Next, peeling is performed between the protective sheet 10 attached to the semiconductor wafer W and the back-grinding tape B, and the back-grinding tape B is removed (see FIG. 7D ). Moreover, after removing the back grinding tape B, you may implement a stealth processing process.

然後,可藉由與上述方法相同之方法,實施使保護片材10硬化進而使保護片材10之黏著力降低之硬化處理步驟;使半導體晶圓W及保護片材10小片化之擴展步驟;將貼附於半導體晶片X之保護片材之小片10’移除之除去步驟;將半導體晶片X取出之拾取步驟;及將半導體晶片X接合於被接著體之接合步驟等。Then, the hardening treatment step of hardening the protective sheet 10 so as to reduce the adhesion of the protective sheet 10 can be implemented by the same method as the above-mentioned method; the expansion step of making the semiconductor wafer W and the protective sheet 10 smaller; The removing step of removing the small piece 10' of the protective sheet attached to the semiconductor chip X; the picking step of taking out the semiconductor chip X; and the bonding step of bonding the semiconductor chip X to an adherend, etc.

本發明之實施型態之電子零件裝置(例如半導體裝置)之製造方法如上述例示,惟本發明並不限於上述例示之電子零件裝置之製造方法。 即,在不損及本發明之效果之範圍內,可採用一般電子零件裝置之製造方法中所使用之各種型態。 The method of manufacturing an electronic component device (for example, a semiconductor device) according to an embodiment of the present invention is exemplified above, but the present invention is not limited to the method of manufacturing an electronic component device exemplified above. That is, various types used in the manufacturing method of a general electronic component device can be employ|adopted in the range which does not impair the effect of this invention.

例如,如上所述,本發明之製造方法中所使用之基板(例如半導體晶圓),可如第一實施型態所說明,為兩面側分別配置有電路構成要素之基板,另一方面,亦可如其他實施型態所說明,為僅一面側配置有電路構成要素之基板。換言之,本發明之製造方法中所製作之基板可僅一面為電路面,亦可二面分別為電路面。For example, as described above, the substrate (such as a semiconductor wafer) used in the manufacturing method of the present invention can be a substrate with circuit constituent elements arranged on both sides as described in the first embodiment. On the other hand, it can also be As described in other embodiments, it may be a substrate on which circuit constituent elements are arranged only on one side. In other words, only one side of the substrate manufactured in the manufacturing method of the present invention may be a circuit surface, or both surfaces may be circuit surfaces.

本說明書所揭露之事項包含如下。 (I) 一種電子零件裝置之製造方法,其係包含: 於基板之至少一面且配置有電路構成要素之電路面上,疊合保護前述電路構成要素之保護片材之步驟; 使前述基板及前述保護片材相疊而成之積層物於面方向上空出間隔而分割從而使其小片化,藉此製作前述基板小片化後之基板晶片與前述保護片材之小片相疊而成之前述積層物之小片的步驟;及 將疊於前述基板晶片之電路面上之前述保護片材之小片除去之步驟。 根據上述(I)之電子零件裝置之製造方法,由於在基板之配置有電路構成要素之側之面(以下亦稱為電路面)上疊合保護片材,因此可防止異物附著於上述電路面,直至將保護片材除去。具體而言,可在基板與保護片材相疊之狀態下使基板小片化時,防止可能隨著小片化而產生之碎片等異物附著於基板晶片之電路面。即使在疊上保護片材前有異物附著於基板晶片之電路面,在將保護片材之小片除去時,亦可將該異物除去。 因此,可抑制異物附著於所製作之基板晶片之電路面。 (II) 如上述(I)所記載之電子零件裝置之製造方法,其中,其進一步包含:將前述基板晶片之電路面朝向被接著體配置,並將前述基板晶片與前述被接著體接合之步驟。 上述(II)之電子零件裝置之製造方法,可抑制進入基板晶片之電路面與被接著體之間的異物所造成之不良影響。 (III) 如上述(I)或(II)所記載之電子零件裝置之製造方法,其中,前述保護片材係含有水溶性高分子化合物; 前述除去步驟中,係使含水之液體與前述保護片材之複數個小片接觸,使各小片之至少一部分溶解於前述液體中,藉此將前述保護片材之複數個小片除去。 根據上述(III)之電子零件裝置之製造方法,藉由上述液體,不僅可移除前述保護片材之小片,亦可減少附著於基板晶片之電路面之異物的數量。此外,可藉由上述液體洗淨基板晶片之電路面。 (IV) 如上述(III)所記載之電子零件裝置之製造方法,其中,在前述除去步驟前進一步包含:提高與前述電路面接觸之氣體之濕度之步驟。 (V) 如上述(I)或(II)所記載之電子零件裝置之製造方法,其中,前述除去步驟中,係將貼附於前述保護片材之複數個小片之剝離用黏著帶剝離,藉此將前述剝離用黏著帶連同前述保護片材之複數個小片除去。 根據上述(V)之電子零件裝置之製造方法,可較簡便地將前述保護片材除去。 (VI) 如上述(V)所記載之電子零件裝置之製造方法,其中,前述保護片材係含有硬化性組成物; 藉由硬化處理使疊於前述基板上之前述保護片材硬化後,將前述基板及前述保護片材之前述積層物分割使其小片化。 根據上述(VI)之電子零件裝置之製造方法,前述保護片材越藉由硬化處理而硬化,越可輕易地將前述保護片材分割小片化。並且,可更輕易地藉由剝離用黏著帶將前述保護片材除去。 (VII) 如上述(II)至(VI)中任一項所記載之電子零件裝置之製造方法,其中,分別配置於前述基板晶片之二表面並作為前述電路構成要素之電極部係互相導通; 前述接合步驟中,係堆疊複數個前述基板晶片,並使作為前述被接著體之一個前述基板晶片之前述電極部、與另一個前述基板晶片之前述電極部互相直接連接。 根據上述(VII)之電子零件裝置之製造方法,由於係堆疊已抑制電路面之異物附著之基板晶片,因此可抑制進入所堆疊之一個基板晶片與另一個基板晶片之間之異物之數量。因此,可在相鄰之基板晶片之間使電極部彼此更確實地連接。因此,複數個基板晶片之電路能以高可靠性互相導通。 The matters disclosed in this manual include the following. (I) A method of manufacturing an electronic component device, comprising: A step of laminating a protective sheet for protecting the above-mentioned circuit components on at least one side of the substrate on which the circuit components are disposed; The laminate formed by stacking the aforementioned substrate and the aforementioned protective sheet is divided in the plane direction with a gap to be divided into small pieces, thereby producing a chip of the aforementioned substrate chip and a small piece of the aforementioned protective sheet stacked on top of each other. The step of forming small pieces of the aforementioned laminate; and A step of removing a small piece of the aforementioned protective sheet stacked on the circuit surface of the aforementioned substrate wafer. According to the manufacturing method of the electronic component device of the above (I), since the protective sheet is laminated on the surface of the substrate on which the circuit components are arranged (hereinafter also referred to as the circuit surface), foreign matter can be prevented from adhering to the above-mentioned circuit surface. until the protective sheet is removed. Specifically, when the substrate is chipped in a state where the substrate and the protective sheet are stacked, it is possible to prevent foreign matter such as debris that may be generated along with chipping from adhering to the circuit surface of the substrate chip. Even if foreign matter is attached to the circuit surface of the substrate wafer before the protective sheet is laminated, the foreign matter can be removed when removing a small piece of the protective sheet. Therefore, foreign matter can be suppressed from adhering to the circuit surface of the produced substrate wafer. (II) The method of manufacturing an electronic component device as described in (I) above, further comprising: a step of arranging the circuit surface of the substrate wafer facing the adherend, and bonding the substrate wafer to the adherend. The manufacturing method of the electronic component device of the above-mentioned (II) can suppress the adverse effect caused by the foreign matter entering between the circuit surface of the substrate wafer and the adherend. (III) The method for manufacturing an electronic component device as described in (I) or (II) above, wherein the protective sheet contains a water-soluble polymer compound; In the removing step, the plurality of small pieces of the protective sheet are brought into contact with a liquid containing water to dissolve at least a part of each small piece in the liquid, thereby removing the plurality of small pieces of the protective sheet. According to the manufacturing method of the electronic component device of the above (III), with the liquid, not only the small pieces of the protective sheet can be removed, but also the number of foreign matter adhering to the circuit surface of the substrate wafer can be reduced. In addition, the circuit surface of the substrate wafer can be cleaned by the above-mentioned liquid. (IV) The method of manufacturing an electronic component device as described in (III) above, further comprising, before the removing step, the step of increasing the humidity of the gas in contact with the circuit surface. (V) The method of manufacturing an electronic component device as described in (I) or (II) above, wherein in the removing step, the adhesive tape for peeling off the plurality of small pieces attached to the protective sheet is peeled off, whereby the aforementioned The peeling adhesive tape and the plurality of small pieces of the aforementioned protective sheet are removed. According to the manufacturing method of the electronic component device of said (V), the said protective sheet can be removed relatively easily. (VI) The method for manufacturing an electronic component device as described in (V) above, wherein the protective sheet contains a curable composition; After the protective sheet laminated on the substrate is cured by curing treatment, the laminate of the substrate and the protective sheet is divided into small pieces. According to the manufacturing method of the electronic component device of said (VI), the said protection sheet can be divided|segmented and divided into small pieces more easily as the said protection sheet is cured by hardening process. In addition, the protective sheet can be removed more easily with the adhesive tape for peeling. (VII) The method of manufacturing an electronic component device as described in any one of (II) to (VI) above, wherein the electrode parts respectively arranged on the two surfaces of the aforementioned substrate wafer and serving as the aforementioned circuit constituent elements are connected to each other; In the bonding step, a plurality of the substrate wafers are stacked, and the electrode portion of one of the substrate wafers serving as the adherend is directly connected to the electrode portion of the other substrate wafer. According to the manufacturing method of the electronic component device of the above (VII), since the substrate wafers having suppressed adhesion of foreign matter on the circuit surface are stacked, the amount of foreign matter entering between one of the stacked substrate wafers and the other substrate wafer can be suppressed. Therefore, the electrode portions can be more reliably connected between adjacent substrate wafers. Therefore, the circuits of a plurality of substrate chips can be conducted with each other with high reliability.

本說明書所揭露之事項進一步包含如下。 (1) 一種半導體裝置之製造方法,其係包含: 於半導體晶圓之至少一面且配置有電路構成要素之側之電路面上,疊合用以保護前述電路構成要素之保護片材之步驟; 使相疊之前述半導體晶圓及前述保護片材之積層物於面方向上空出間隔而分割從而使其小片化,藉此製作前述半導體晶圓小片化後之半導體晶片與前述保護片材之小片相疊而成之前述積層物之小片的步驟;及 將疊於前述半導體晶片之電路面上之前述保護片材之小片除去之步驟。 根據上述(1)之半導體裝置之製造方法,由於在半導體晶圓之形成有電路之面(電路面)上疊合保護片材,因此可防止異物附著於上述電路面直至將保護片材除去。具體而言,可在半導體晶圓與保護片材相疊之狀態下使半導體晶圓小片化時,防止可能隨著小片化而產生之碎片等異物附著於半導體晶片之電路面。即使在疊上保護片材前有異物附著於半導體晶片之電路面,在將保護片材之小片除去時,亦可將該異物除去。 因此,可抑制異物附著於所製作之半導體晶片之電路面。 (2) 如上述(1)所記載之半導體裝置之製造方法,其中,其進一步包含:將前述半導體晶片之電路面朝向被接著體配置,並將前述半導體晶片與前述被接著體接合之步驟。 上述(2)之半導體裝置之製造方法,可抑制進入半導體晶片之電路面與被接著體之間的異物所造成之不良影響。 (3) 如上述(1)或(2)所記載之半導體裝置之製造方法,其中,在使前述半導體晶圓及前述保護片材之積層物疊合於切晶帶之一面之狀態下將前述切晶帶往面方向拉伸,藉此將前述積層物分割小片化,從而製作前述積層物之小片。 (4) 如上述(1)至(3)中任一項所記載之半導體裝置之製造方法,其中,前述保護片材係含有水溶性高分子化合物; 前述除去步驟中,係使含水之液體與前述保護片材之複數個小片接觸,使各小片之至少一部分溶解於前述液體中,藉此將前述保護片材之複數個小片除去。 根據上述(4)之半導體裝置之製造方法,藉由上述液體,不僅可移除前述保護片材之小片,亦可減少附著於半導體晶片之電路面之異物的數量。此外,可藉由上述液體洗淨半導體晶片之電路面。 (5) 如上述(4)所記載之半導體裝置之製造方法,其中,前述水溶性高分子化合物,係含有聚乙烯醇及聚乙烯吡咯烷酮中至少一者。 (6) 如上述(5)所記載之電子零件裝置之製造方法,其中,在前述除去步驟前進一步包含:提高與前述電路面接觸之氣體之濕度之步驟。 (7) 如上述(1)至(3)中任一項所記載之半導體裝置之製造方法,其中,前述除去步驟中,係將貼附於前述保護片材之複數個小片之剝離用黏著帶剝離,藉此將前述剝離用黏著帶連同前述保護片材之複數個小片除去。 根據上述(7)之半導體裝置之製造方法,可較簡便地將前述保護片材除去。 (8) 如上述(7)所記載之半導體裝置之製造方法,其中,前述保護片材係含有硬化性組成物; 藉由硬化處理使疊於前述半導體晶圓上之前述保護片材硬化後,將前述半導體晶圓及前述保護片材之前述積層物分割使其小片化。 根據上述(8)之半導體裝置之製造方法,前述保護片材越藉由硬化處理而硬化,越可輕易地將前述保護片材分割小片化。並且,可更輕易地藉由剝離用膠帶將前述保護片材除去。 (9) 如上述(8)所記載之半導體裝置之製造方法,其中,前述硬化性組成物,係含有選自於分子中含有聚合性碳-碳雙鍵之化合物、於分子中含有縮水甘油基之化合物、於分子中含有異氰酸酯基之化合物、於分子中含有羧基之化合物、及於分子中含有羥基之化合物所成群中之硬化性化合物中之至少一種。 (10) 如上述(1)至(9)中任一項所記載之半導體裝置之製造方法,其中,前述半導體晶片,係具有分別配置於二表面且互相導通之電極部; 前述接合步驟中,係堆疊至少二個前述半導體晶片,並使作為前述被接著體之一個前述半導體晶片之前述電極部、與另一個前述半導體晶片之前述電極部互相直接連接。 根據上述(10)之半導體裝置之製造方法,由於係堆疊已抑制電路面之異物附著之半導體晶片,因此可抑制進入所堆疊之一個半導體晶片與另一個半導體晶片之間之異物之數量。因此,可使相鄰之半導體晶片之電極部彼此更確實地連接。因此,複數個半導體晶片之電路能以高可靠性互相導通。 [實施例] The matters disclosed in this specification further include the following. (1) A method of manufacturing a semiconductor device, comprising: A step of laminating a protective sheet for protecting the above-mentioned circuit components on at least one side of the semiconductor wafer and the circuit surface of the side where the circuit components are arranged; The layered product of the above-mentioned semiconductor wafer and the above-mentioned protective sheet stacked on top of each other is divided and divided into small pieces with a gap in the plane direction, thereby producing small pieces of the semiconductor wafer and the above-mentioned protective sheet after the above-mentioned semiconductor wafer is diced. The step of stacking small pieces of the aforementioned laminate; and A step of removing a small piece of the aforementioned protective sheet stacked on the circuit surface of the aforementioned semiconductor wafer. According to the semiconductor device manufacturing method of (1) above, since the protective sheet is laminated on the surface (circuit surface) of the semiconductor wafer on which the circuit is formed, foreign matter can be prevented from adhering to the circuit surface until the protective sheet is removed. Specifically, when the semiconductor wafer is divided into pieces in a state where the semiconductor wafer and the protective sheet are stacked, it is possible to prevent foreign matter such as chips that may be generated along with the dicing from adhering to the circuit surface of the semiconductor wafer. Even if foreign matter is attached to the circuit surface of the semiconductor chip before the protective sheet is laminated, the foreign matter can be removed when a small piece of the protective sheet is removed. Therefore, foreign matter can be suppressed from adhering to the circuit surface of the manufactured semiconductor wafer. (2) The method for manufacturing a semiconductor device as described in (1) above, further comprising: a step of arranging the circuit surface of the semiconductor wafer facing the adherend, and bonding the semiconductor wafer to the adherend. The method for manufacturing a semiconductor device according to the above (2) can suppress adverse effects caused by foreign matter entering between the circuit surface of the semiconductor wafer and the adherend. (3) The method for manufacturing a semiconductor device according to (1) or (2) above, wherein the dicing tape is laminated on one side of the dicing tape in a state where the laminate of the semiconductor wafer and the protective sheet is laminated. By stretching in the plane direction, the above-mentioned laminate is divided into small pieces to produce small pieces of the above-mentioned laminate. (4) The method for manufacturing a semiconductor device according to any one of (1) to (3) above, wherein the protective sheet contains a water-soluble polymer compound; In the removing step, the plurality of small pieces of the protective sheet are brought into contact with a liquid containing water to dissolve at least a part of each small piece in the liquid, thereby removing the plurality of small pieces of the protective sheet. According to the method of manufacturing a semiconductor device of the above (4), by using the liquid, not only small pieces of the protective sheet can be removed, but also the amount of foreign matter adhering to the circuit surface of the semiconductor chip can be reduced. In addition, the circuit surface of the semiconductor chip can be cleaned by the above-mentioned liquid. (5) The method for manufacturing a semiconductor device according to (4) above, wherein the water-soluble polymer compound contains at least one of polyvinyl alcohol and polyvinylpyrrolidone. (6) The method of manufacturing an electronic component device as described in (5) above, further including, before the removing step, the step of increasing the humidity of the gas in contact with the circuit surface. (7) The method for manufacturing a semiconductor device according to any one of (1) to (3) above, wherein in the removing step, the adhesive tape for peeling off the plurality of small pieces attached to the protective sheet is peeled off, by This removes the plurality of small pieces of the aforementioned adhesive tape for peeling and the aforementioned protective sheet. According to the method of manufacturing a semiconductor device of (7) above, the protective sheet can be removed relatively easily. (8) The method of manufacturing a semiconductor device according to (7) above, wherein the protective sheet contains a curable composition; After hardening the protective sheet laminated on the semiconductor wafer by curing treatment, the laminate of the semiconductor wafer and the protective sheet is divided into small pieces. According to the method of manufacturing a semiconductor device of (8) above, the more the protective sheet is hardened by the curing treatment, the easier it is to divide the protective sheet into small pieces. In addition, the protective sheet can be removed more easily with a peeling tape. (9) The method for manufacturing a semiconductor device as described in (8) above, wherein the curable composition contains a compound selected from a compound containing a polymerizable carbon-carbon double bond in the molecule, a compound containing a glycidyl group in the molecule, At least one of hardening compounds in the group of a compound containing an isocyanate group in a molecule, a compound containing a carboxyl group in a molecule, and a compound containing a hydroxyl group in a molecule. (10) The method of manufacturing a semiconductor device as described in any one of (1) to (9) above, wherein the semiconductor wafer has electrode portions respectively arranged on both surfaces and conducting with each other; In the bonding step, at least two semiconductor wafers are stacked, and the electrode portion of one semiconductor wafer serving as the adherend is directly connected to the electrode portion of the other semiconductor wafer. According to the method of manufacturing a semiconductor device of (10) above, since the semiconductor wafers in which adhesion of foreign matter on the circuit surface has been suppressed are stacked, the amount of foreign matter entering between one stacked semiconductor wafer and another semiconductor wafer can be suppressed. Therefore, the electrode portions of adjacent semiconductor wafers can be more reliably connected to each other. Therefore, circuits of a plurality of semiconductor chips can be conducted with each other with high reliability. [Example]

接下來以實驗例更詳細地說明本發明,惟本發明並不限於此等。Next, the present invention will be described in more detail with experimental examples, but the present invention is not limited thereto.

作為電子零件裝置之製造方法之一例,如下實施半導體裝置之製造方法。As an example of a method of manufacturing an electronic component device, a method of manufacturing a semiconductor device is implemented as follows.

準備市售品(產品名「V-12SR」日東電工公司製)作為切晶帶。並且使用矽裸晶圓代替半導體晶圓。 如下製作保護片材。製作保護片材時,將含有溶劑之保護片材用組成物塗布於剝離襯墊之一面並使溶劑揮發,藉此積層保護片材及剝離襯墊。進一步地,將剝離襯墊貼合於保護片材上,以形成將保護片材配置於二個剝離襯墊之間之狀態。又,使用矽裸晶圓(厚度50μm,直徑300mm之圓板狀)代替半導體晶圓。 A commercially available product (product name "V-12SR" manufactured by Nitto Denko Co., Ltd.) was prepared as a dicing tape. And use silicon bare wafers instead of semiconductor wafers. The protective sheet was produced as follows. When producing the protective sheet, the composition for the protective sheet containing a solvent is coated on one side of the release liner and the solvent is volatilized, thereby laminating the protective sheet and the release liner. Further, the release liner is pasted on the protection sheet to form a state in which the protection sheet is arranged between the two release liners. Also, a silicon bare wafer (disc shape with a thickness of 50 μm and a diameter of 300 mm) is used instead of a semiconductor wafer.

[實施例1] (保護片材a之製作) 準備皂化度為65(莫耳%)且平均聚合度為240之聚乙烯醇(市售品)。將此聚乙烯醇(PVA)分散於水中後,將其加溫至90℃使其溶解,從而調製PVA水溶液。將此PVA水溶液塗布於剝離襯墊a(PET膜,厚度50μm)上。剝離襯墊a係具有施有聚矽氧離型處理之面,使用塗布器將上述PVA水溶液塗布於此面上。進一步地,在110℃下進行乾燥處理2分鐘,形成疊於剝離襯墊a之一面上之厚度10μm之保護片材。然後,於如此保護片材之露出面上疊合剝離襯墊b(PET膜,厚度25μm)。又,剝離襯墊b係具有施有聚矽氧離型處理之面,將此面貼附於保護片材。如此製作被二個剝離襯墊包夾之保護片材a。 (安裝步驟及保護步驟) 從所製作之保護片材a上剝離並移除剝離襯墊b,使保護片材a之一面露出。將此露出面貼合於疊在切晶帶上之矽裸晶圓。 詳細而言,在將矽裸晶圓與玻璃載體貼合之狀態下將晶圓貼合於切晶帶。然後,將玻璃載體從晶圓上剝離,使晶圓之一面露出。 使晶圓之該露出面(與和切晶帶接觸之面為相反側之面)、及將剝離襯墊b剝離後之保護片材a之上述露出面抵接而貼合。貼合時,使用將臺溫度加溫至90℃之日東精機公司製之MV3000真空貼片機。如此形成依序積層切晶帶、矽裸晶圓及保護片材a之狀態。 (隱形加工步驟) 接著,使用DISCO公司製之DFL7361對矽裸晶圓照射雷射光,從而於晶圓內部形成脆弱部位。之後,將剝離襯墊a剝離。 (擴展步驟) 接著,使用DISCO公司製之DDS2300在-15℃、200mm/s下將晶圓及保護片材之積層物切割小片化,從而獲得小片化(10mm×10mm之矩形狀)後之晶片(chip、die)及保護片材。 (除去步驟) 然後,使用DISCO公司製之切割裝置DDS2300之水洗淨機構對保護片材噴水,藉此使保護片材與水接觸,以將保護片材除去。藉此使晶片(chip、die)之一表面(臨時電路面)露出。 [Example 1] (Making of protective sheet a) Polyvinyl alcohol (commercially available) having a degree of saponification of 65 (mol %) and an average degree of polymerization of 240 was prepared. After dispersing this polyvinyl alcohol (PVA) in water, it was heated to 90 degreeC and dissolved, and the PVA aqueous solution was prepared. This PVA aqueous solution was coated on a release liner a (PET film, thickness 50 μm). The release liner a has a surface treated with silicone release treatment, and the above-mentioned PVA aqueous solution is coated on this surface using an applicator. Furthermore, drying treatment was carried out at 110° C. for 2 minutes to form a protective sheet with a thickness of 10 μm laminated on one side of the release liner a. Then, a release liner b (PET film, thickness 25 μm) was laminated on the exposed surface of the protective sheet. Also, the release liner b has a surface on which silicone release treatment has been applied, and this surface is attached to the protective sheet. In this way, a protective sheet a sandwiched between two release liners was produced. (Installation steps and protection steps) The prepared protective sheet a was peeled off and the release liner b was removed to expose one side of the protective sheet a. Attach this exposed surface to the silicon bare wafer stacked on the dicing tape. Specifically, the wafer is bonded to the dicing tape in a state where the silicon bare wafer and the glass carrier are bonded. Then, the glass carrier is peeled off from the wafer to expose one side of the wafer. The exposed surface of the wafer (the surface opposite to the surface in contact with the dicing tape) and the exposed surface of the protective sheet a after peeling off the release liner b are brought into contact with each other and bonded together. For lamination, use the MV3000 vacuum mounter manufactured by Nitto Seiki Co., Ltd., which heats the stage temperature to 90°C. In this way, the crystal cutting tape, the silicon bare wafer and the protective sheet a are sequentially laminated. (Invisible processing step) Next, the bare silicon wafer was irradiated with laser light using DFL7361 manufactured by DISCO to form a fragile part inside the wafer. After that, the release liner a was peeled off. (extended steps) Next, use DDS2300 manufactured by DISCO to cut the laminate of wafer and protective sheet into small pieces at -15°C and 200mm/s to obtain chip (chip, die) after chipping (10mm×10mm rectangular shape). ) and protective sheet. (step removed) Then, the protection sheet was removed by spraying water on the protection sheet using the water cleaning mechanism of the cutting device DDS2300 manufactured by DISCO, thereby bringing the protection sheet into contact with water. Thereby, one surface (temporary circuit surface) of the chip (chip, die) is exposed.

[實施例2] (保護片材b之製作) 於具備冷凝管、氮氣導入管、溫度計及攪拌裝置之反應容器內加入:作為單體之丙烯酸羥乙酯(HEA)11質量份、丙烯酸2-乙基己酯(2EHA)89質量份,作為熱聚合引發劑之偶氮二異丁腈(AIBN)0.2質量份。 進一步地,加入作為反應用溶劑之乙酸丁酯,使前述單體之濃度為36質量%。然後,在氮氣氣流下,於62℃下實施聚合4小時,並於75℃下實施聚合處理2小時,藉此合成丙烯酸系聚合物溶液A。 於此丙烯酸系聚合物溶液A中加入:異氰酸2-甲基丙烯醯氧基乙酯(產品名「Karenz MOI」,昭和電工公司製)13質量份、二月桂酸二丁基錫0.07質量份。接著,在空氣氣流下,於50℃下實施加成反應處理12小時,從而獲得丙烯酸系聚合物溶液A’。 接著,相對於丙烯酸系聚合物溶液A’100質量份,加入作為交聯劑之多異氰酸酯化合物(產品名「TAKENATE D-101A」,三井化學公司製)0.8質量份、及光聚合引發劑(產品名「Omnirad127」,IGM公司製)5質量份,從而調製黏著劑溶液(以下稱黏著劑溶液A)。 接著,使用塗布器在具有施有聚矽氧離型處理之面之剝離襯墊a(PET膜,厚度50μm)之聚矽氧離型處理面上,塗布上述黏著劑溶液A。在120℃下進行乾燥處理2分鐘,形成疊於剝離襯墊a之一面上之厚度30μm之保護片材b。然後,於該保護片材b之露出面上貼合具有施有聚矽氧離型處理之面之剝離襯墊b(PET膜,厚度25μm)之聚矽氧離型處理面。在50℃下保存24小時,從而製作UV硬化性保護片材。 (安裝步驟及保護步驟) 從所製作之保護片材上將剝離襯墊b剝離,使保護片材之一面露出。將此露出面貼合於疊在切晶帶上之矽裸晶圓。 詳細而言,在將矽裸晶圓與玻璃載體G貼合之狀態下將晶圓貼合於切晶帶。然後,將玻璃載體G從晶圓上剝離,使晶圓之一面露出。 使晶圓之該露出面(與和切晶帶接觸之面為相反側之面)、及將剝離襯墊b剝離後之保護片材b之上述露出面抵接而貼合。貼合時,使用將臺溫度加溫至30℃之日東精機公司製之MV3000真空貼片機。如此形成依序積層切晶帶、矽裸晶圓及保護片材a之狀態。 (隱形加工步驟) 使用DISCO公司製之DFL7361對晶圓照射雷射光從而於晶圓內部形成脆弱部位。 (硬化處理) 然後,從配置切晶帶之側之相反側(剝離襯墊a側)對保護片材照射300mJ/cm 2之紫外線,使保護片材硬化。接著,將剝離襯墊a從保護片材上剝離。 (擴展步驟) 接著,使用DISCO公司製之DDS2300在-15℃、200mm/s下將晶圓及保護片材之積層物切割小片化,從而獲得小片化後之晶片(chip、die)及保護片材。 (除去步驟) 接著,為了將小片化後之保護片材除去,使用積層機在疊於晶片(chip、die)上之UV硬化性保護片材上貼附剝離用黏著帶(黏著帶,產品名「No.360UL」)。然後,將剝離用黏著帶剝離。藉此,將剝離用黏著帶連同保護片材除去,使晶片(chip、die)之一表面(臨時電路面)露出。 [Example 2] (Preparation of protective sheet b) In a reaction vessel equipped with a condenser tube, a nitrogen gas introduction tube, a thermometer and a stirring device, add: 11 parts by mass of hydroxyethyl acrylate (HEA) as a monomer, 2- 89 parts by mass of ethylhexyl ester (2EHA), and 0.2 parts by mass of azobisisobutyronitrile (AIBN) as a thermal polymerization initiator. Furthermore, butyl acetate as a solvent for reaction was added so that the concentration of the said monomer might be 36 mass %. Then, polymerization was carried out at 62° C. for 4 hours under a nitrogen stream, and a polymerization treatment was carried out at 75° C. for 2 hours, whereby an acrylic polymer solution A was synthesized. To this acrylic polymer solution A were added: 13 parts by mass of 2-methacryloxyethyl isocyanate (product name "Karenz MOI", manufactured by Showa Denko Co., Ltd.), and 0.07 parts by mass of dibutyltin dilaurate. Next, an addition reaction process was performed at 50 degreeC for 12 hours under air flow, and the acrylic polymer solution A' was obtained. Next, 0.8 parts by mass of a polyisocyanate compound (product name "TAKENATE D-101A", manufactured by Mitsui Chemicals Co., Ltd.) as a crosslinking agent and a photopolymerization initiator (product Name "Omnirad 127", manufactured by IGM Corporation) 5 parts by mass to prepare an adhesive solution (hereinafter referred to as adhesive solution A). Next, the above-mentioned adhesive solution A was coated on the silicone release-treated surface of the release liner a (PET film, thickness 50 μm) having the silicone release-treated surface with an applicator. Drying treatment was carried out at 120° C. for 2 minutes to form a protective sheet b with a thickness of 30 μm laminated on one side of the release liner a. Then, the silicone release-treated surface of the release liner b (PET film, thickness 25 μm) having the silicone release-treated surface was attached to the exposed surface of the protective sheet b. It stored at 50 degreeC for 24 hours, and produced the UV curable protective sheet. (Installation step and protection step) The release liner b was peeled off from the prepared protective sheet to expose one side of the protective sheet. Attach this exposed surface to the silicon bare wafer stacked on the dicing tape. Specifically, the wafer is bonded to the dicing tape in a state where the silicon bare wafer and the glass carrier G are bonded. Then, the glass carrier G is peeled off from the wafer to expose one side of the wafer. The exposed surface of the wafer (the surface opposite to the surface in contact with the dicing tape) and the exposed surface of the protective sheet b from which the release liner b has been peeled off are brought into contact and bonded together. For lamination, use the MV3000 vacuum mounter manufactured by Nitto Seiki Co., Ltd., which heats the table temperature to 30°C. In this way, the crystal cutting tape, the silicon bare wafer and the protective sheet a are sequentially laminated. (Stealth processing step) DFL7361 manufactured by DISCO Corporation was used to irradiate the wafer with laser light to form a fragile part inside the wafer. (Hardening Treatment) Next, the protective sheet was irradiated with 300 mJ/cm 2 of ultraviolet rays from the side opposite to the side where the dicing tape was placed (the release liner a side) to harden the protective sheet. Next, the release liner a was peeled off from the protective sheet. (Expansion step) Next, use DDS2300 manufactured by DISCO Corporation to cut the laminate of wafer and protective sheet into small pieces at -15°C and 200mm/s to obtain chip (chip, die) and protective sheet after dicing material. (Removal step) Next, in order to remove the protective sheet after dicing, use a laminator to attach an adhesive tape for peeling (adhesive tape, product name "No. 360UL"). Then, peel off the peel-off adhesive tape. Thereby, the peeling adhesive tape and the protective sheet are removed, and one surface (temporary circuit surface) of a chip (chip, die) is exposed.

<保護片材之物性測定> (矽密著性) 藉由上述之測定條件、測定方法,在25℃下測定保護片材對矽裸晶圓之剝離力。 (斷裂強度及斷裂伸長率) 藉由上述之測定條件、測定方法,在-15℃下測定斷裂強度及斷裂伸長率。 (拉伸彈性模數) 藉由上述之測定條件、測定方法,分別在-15℃及25℃下測定拉伸彈性模數。 (表面自由能) 藉由上述之測定條件、測定方法、算出方法,算出25℃下保護片材之表面自由能(但僅於實施例1進行)。 <Physical property measurement of protective sheet> (silicon adhesion) According to the above-mentioned measurement conditions and measurement methods, the peeling force of the protective sheet to the silicon bare wafer was measured at 25°C. (breaking strength and elongation at break) The breaking strength and breaking elongation were measured at -15°C by the above-mentioned measuring conditions and measuring methods. (tensile modulus of elasticity) The tensile modulus of elasticity was measured at -15°C and 25°C, respectively, according to the above-mentioned measurement conditions and measurement methods. (surface free energy) The surface free energy of the protective sheet at 25° C. was calculated by the above-mentioned measurement conditions, measurement methods, and calculation methods (but only in Example 1).

[比較例] 除了未將保護片材與矽裸晶圓貼合以外,與實施例1或實施例2相同地製作晶片(chip、die)。具體而言,使用DISCO公司製之DFL7361對貼附於切晶帶之矽裸晶圓照射雷射光,從而於晶圓內部形成脆弱部位。然後,使用DISCO公司製之DDS2300在-15℃、200mm/s下將晶圓切割小片化。 [comparative example] A chip (chip, die) was produced in the same manner as in Example 1 or Example 2 except that the protective sheet was not bonded to the silicon bare wafer. Specifically, a bare silicon wafer attached to a dicing tape is irradiated with laser light using DFL7361 manufactured by DISCO to form a fragile part inside the wafer. Then, the wafer was diced into small pieces at -15° C. and 200 mm/s using DDS2300 manufactured by DISCO Corporation.

<評價:晶片(chip、die)表面之異物附著> 以數位顯微鏡觀察露出之晶片(chip、die)之表面(除去保護片材之面),並計算隨機選出之10×10mm正方形範圍中之異物個數。異物之個數為10個以上時判定為不良(×),異物之個數小於10個時判定為良(○)。 實施例1及比較例中,將觀察有異物附著之晶片(chip、die)之表面時之照片分別示於圖8及圖9。 <Evaluation: Adhesion of foreign matter on the surface of a chip (chip, die)> Observe the surface of the exposed chip (chip, die) (the surface except the protective sheet) with a digital microscope, and count the number of foreign objects in a randomly selected 10×10mm square range. When the number of foreign objects was 10 or more, it was judged as bad (×), and when the number of foreign objects was less than 10, it was judged as good (◯). In Example 1 and Comparative Example, photographs when observing the surface of a chip (chip, die) with foreign substances attached are shown in Fig. 8 and Fig. 9, respectively.

如上實施實施例及比較例之各製造方法。各製造方法所使用之保護片材之細節、及評價結果示於表1。Each manufacturing method of the Example and the comparative example was implemented as mentioned above. Table 1 shows the details of the protective sheet used in each production method and the evaluation results.

〔表1〕 保護片材 實施例1 實施例2 比較例 類型 水溶性 UV硬化性    厚度[μm] 10 30    Si密著性[N/10mm](25℃) 7.9 硬化前:1 硬化後:0.1    斷裂強度[MPa](-15℃) 42 硬化後:18    斷裂伸長率[%](-15℃) 3 硬化後:25    拉伸彈性模數[GPa](-15℃) 3.3 硬化後:0.2    拉伸彈性模數[GPa](25℃) 2.9 硬化後:0.05    表面自由能[mJ/m 2] 55 -    切割容易度    除去容易度    晶片(chip、die)表面之異物數量 [個/100mm 2] 良(○): 3 良(○): 6 不良(×): 200以上 〔Table 1〕 protective sheet Example 1 Example 2 comparative example type water soluble UV curing Thickness [μm] 10 30 Si adhesion [N/10mm](25℃) 7.9 Before hardening: 1 After hardening: 0.1 Breaking Strength[MPa](-15℃) 42 Hardened: 18 Elongation at break[%](-15℃) 3 Hardened: 25 Tensile modulus of elasticity[GPa](-15℃) 3.3 After hardening: 0.2 Tensile modulus of elasticity [GPa] (25°C) 2.9 After hardening: 0.05 Surface free energy [mJ/m 2 ] 55 - Ease of cutting good good Ease of removal good good The number of foreign matter on the surface of the chip (chip, die) [pcs/100mm 2 ] Good (○): 3 Good (○): 6 Bad (×): 200 or more

由上述評價結果可知,藉由以實施例之半導體裝置之製造方法製造半導體裝置,可抑制異物附著於晶片(chip、die)之電路面。藉此,可使被接著體之電極部與晶片(chip、die)之電極部密著並確實地導通。尤其,於積層複數個具有分別形成於兩面且互相導通之電極部之構成的半導體晶片時,可使相鄰之半導體晶片之電極部彼此密著並確實地導通。因此,可充分保持所製造之半導體裝置之導電性能之可靠性。From the above evaluation results, it can be seen that by manufacturing the semiconductor device by the method of manufacturing the semiconductor device of the embodiment, the adhesion of foreign matter to the circuit surface of the chip (chip, die) can be suppressed. Thereby, the electrode part of the object to be bonded and the electrode part of the chip (chip, die) can be made to adhere and conduct reliably. In particular, when stacking a plurality of semiconductor wafers each having electrode portions formed on both surfaces and conducting with each other, the electrode portions of adjacent semiconductor wafers can be brought into close contact with each other and be reliably conducted. Therefore, the reliability of the conductive performance of the fabricated semiconductor device can be sufficiently maintained.

藉由實施如上述之實施例之電子零件裝置之製造方法,可效率良好地製造積層有複數個半導體晶片之半導體裝置等。 [相關申請案之交互參照] By carrying out the manufacturing method of the electronic component device of the above-mentioned embodiment, it is possible to efficiently manufacture a semiconductor device or the like in which a plurality of semiconductor chips are laminated. [Cross-reference to related applications]

本案係主張日本國特願2021-164051號、及日本國特願2022-063382號之優先權,此等申請案係藉由引用併入本案說明書之記載。 [產業利用性] This case claims the priority of Japanese Patent Application No. 2021-164051 and Japanese Patent Application No. 2022-063382, and these applications are incorporated by reference into the description of this case. [Industrial Utilization]

本發明之電子零件裝置之製造方法,例如適合用以製造具備半導體積體電路等之半導體裝置。The manufacturing method of the electronic component device of this invention is suitably used for manufacturing the semiconductor device provided with a semiconductor integrated circuit etc., for example.

10:保護片材 10’:保護片材之小片 15:剝離襯墊 20:切晶帶 21:基材層 22:黏著劑層 G:玻璃載體 W:半導體晶圓 X:半導體晶片 V:貫通孔 D:電極部 T:剝離用黏著帶 B:背磨膠帶 10: Protective sheet 10': small piece of protective sheet 15:Peel off liner 20: Cut crystal belt 21: Substrate layer 22: Adhesive layer G: glass carrier W: semiconductor wafer X: semiconductor wafer V: through hole D: electrode part T: Adhesive tape for peeling off B: Back grinding tape

〔圖1A〕於厚度方向上切斷基板之一例而成之剖面圖。 〔圖1B〕示意性表示潤濕步驟之一例之情況的剖面圖。 〔圖1C〕示意性表示保護步驟之一例之情況的剖面圖。 〔圖1D〕示意性表示保護步驟之一例之情況的剖面圖。 〔圖1E〕示意性表示使基板及保護片材之積層物小片化前之情況之一例的剖面圖。 〔圖1F〕示意性表示使基板及保護片材之積層物小片化時之情況之一例的剖面圖。 〔圖1G〕示意性表示移除疊於基板之小片上之保護片材之小片之情況之一例的剖面圖。 〔圖2A〕於厚度方向上切斷保護片材及剝離襯墊之一例而成之剖面圖。 〔圖2B〕於厚度方向上切斷切晶帶之一例而成之剖面圖。 〔圖2C〕於厚度方向上切斷作為基板之半導體晶圓之一例而成之剖面圖。 〔圖2D〕於厚度方向上將分割作為基板之半導體晶圓所製作之半導體晶片之一例切斷而成之剖面圖。 〔圖3A〕示意性表示第一實施型態中之安裝步驟前之情況的剖面圖。 〔圖3B〕示意性表示第一實施型態中之安裝步驟之情況的剖面圖。 〔圖3C〕示意性表示第一實施型態中之安裝步驟之情況的剖面圖。 〔圖3D〕示意性表示第一實施型態中之潤濕步驟之情況的剖面圖。 〔圖3E〕示意性表示第一實施型態中之保護步驟之情況的剖面圖。 〔圖3F〕示意性表示第一實施型態中之隱形加工步驟之情況的剖面圖。 〔圖3G〕示意性表示第一實施型態中之擴展步驟之情況的剖面圖。 〔圖3H〕示意性表示第一實施型態中之除去步驟之情況的剖面圖。 〔圖3I〕示意性表示第一實施型態中之拾取步驟之情況的剖面圖。 〔圖3J〕示意性表示第一實施型態中之接合步驟之情況的剖面圖。 〔圖4A〕示意性表示第二實施型態中之安裝步驟之情況的剖面圖。 〔圖4B〕示意性表示第二實施型態中之隱形加工步驟之情況的剖面圖。 〔圖4C〕示意性表示第二實施型態中之對保護片材進行硬化處理之情況的剖面圖。 〔圖4D〕示意性表示第二實施型態中對保護片材施予硬化處理後將剝離襯墊剝離後之情況的剖面圖。 〔圖4E〕示意性表示第二實施型態中之擴展步驟之情況的剖面圖。 〔圖4F〕示意性表示第二實施型態中之除去步驟之情況的剖面圖。 〔圖5A〕示意性表示第三實施型態中之半導體晶圓及背磨膠帶之情況的剖面圖。 〔圖5B〕示意性表示第三實施型態中之保護步驟之情況的剖面圖。 〔圖5C〕示意性表示第三實施型態中之安裝步驟前之情況的剖面圖。 〔圖5D〕示意性表示第三實施型態中之安裝步驟之情況的剖面圖。 〔圖6A〕示意性表示第四實施型態中之半導體晶圓及背磨膠帶之情況的剖面圖。 〔圖6B〕示意性表示第四實施型態中之隱形加工步驟之情況的剖面圖。 〔圖6C〕示意性表示第四實施型態中之保護步驟之情況的剖面圖。 〔圖6D〕示意性表示第四實施型態中之安裝步驟前之情況的剖面圖。 〔圖6E〕示意性表示第四實施型態中之安裝步驟之情況的剖面圖。 〔圖6F〕示意性表示第四實施型態中之對保護片材進行硬化處理之情況的剖面圖。 〔圖7A〕示意性表示第五實施型態中之研磨加工之情況的剖面圖。 〔圖7B〕示意性表示第五實施型態中之研磨加工後之情況的剖面圖。 〔圖7C〕示意性表示第五實施型態中之安裝步驟後之情況的剖面圖。 〔圖7D〕示意性表示第五實施型態中之隱形加工步驟後之情況的剖面圖。 〔圖8〕表示觀察藉由實施例1之製造方法所製作之半導體晶片之表面所得之情況的照片。 〔圖9〕表示觀察藉由比較例之製造方法所製作之半導體晶片之表面所得之情況的照片。 [FIG. 1A] A cross-sectional view of an example of a substrate cut in the thickness direction. [FIG. 1B] A cross-sectional view schematically showing an example of the wetting step. [FIG. 1C] A cross-sectional view schematically showing an example of a protection step. [FIG. 1D] A cross-sectional view schematically showing an example of a protection step. [FIG. 1E] A cross-sectional view schematically showing an example of the state before the laminate of the substrate and the protective sheet is fragmented. [FIG. 1F] A cross-sectional view schematically showing an example of a state in which a laminate of a substrate and a protective sheet is fragmented. [FIG. 1G] A cross-sectional view schematically showing an example of the removal of the small piece of the protective sheet stacked on the small piece of the substrate. [FIG. 2A] A cross-sectional view of an example of a protective sheet and a release liner cut in the thickness direction. [FIG. 2B] A cross-sectional view of an example of a cut crystal tape cut in the thickness direction. [FIG. 2C] A cross-sectional view of an example of a semiconductor wafer serving as a substrate cut in the thickness direction. [FIG. 2D] A cross-sectional view of an example of a semiconductor wafer manufactured by dividing a semiconductor wafer as a substrate in the thickness direction. [FIG. 3A] A cross-sectional view schematically showing the state before the mounting step in the first embodiment. [FIG. 3B] A cross-sectional view schematically showing the state of the mounting step in the first embodiment. [FIG. 3C] A cross-sectional view schematically showing the state of the mounting step in the first embodiment. [FIG. 3D] A cross-sectional view schematically showing the state of the wetting step in the first embodiment. [FIG. 3E] A cross-sectional view schematically showing the state of the protection step in the first embodiment. [FIG. 3F] A cross-sectional view schematically showing the state of the stealth processing step in the first embodiment. [FIG. 3G] A cross-sectional view schematically showing the state of the expansion step in the first embodiment. [FIG. 3H] A cross-sectional view schematically showing the state of the removal step in the first embodiment. [FIG. 3I] A cross-sectional view schematically showing the state of the pick-up step in the first embodiment. [FIG. 3J] A cross-sectional view schematically showing the state of the bonding step in the first embodiment. [FIG. 4A] A cross-sectional view schematically showing the state of the mounting step in the second embodiment. [FIG. 4B] A cross-sectional view schematically showing the state of the stealth processing step in the second embodiment. [FIG. 4C] A cross-sectional view schematically showing the state of hardening the protective sheet in the second embodiment. [FIG. 4D] A cross-sectional view schematically showing a state in which the release liner is peeled off after hardening the protective sheet in the second embodiment. [FIG. 4E] A cross-sectional view schematically showing the state of the expansion step in the second embodiment. [FIG. 4F] A cross-sectional view schematically showing the state of the removal step in the second embodiment. [FIG. 5A] A cross-sectional view schematically showing the state of the semiconductor wafer and the backgrinding tape in the third embodiment. [FIG. 5B] A cross-sectional view schematically showing the state of the protection step in the third embodiment. [FIG. 5C] A cross-sectional view schematically showing the situation before the mounting step in the third embodiment. [FIG. 5D] A cross-sectional view schematically showing the state of the mounting step in the third embodiment. [FIG. 6A] A cross-sectional view schematically showing the state of the semiconductor wafer and the backgrinding tape in the fourth embodiment. [FIG. 6B] A cross-sectional view schematically showing the state of the stealth processing step in the fourth embodiment. [FIG. 6C] A cross-sectional view schematically showing the state of the protection step in the fourth embodiment. [FIG. 6D] A cross-sectional view schematically showing the situation before the mounting step in the fourth embodiment. [FIG. 6E] A cross-sectional view schematically showing the state of the mounting step in the fourth embodiment. [FIG. 6F] A cross-sectional view schematically showing the state of hardening the protective sheet in the fourth embodiment. [FIG. 7A] A cross-sectional view schematically showing the state of grinding in the fifth embodiment. [FIG. 7B] A cross-sectional view schematically showing the state after grinding in the fifth embodiment. [FIG. 7C] A cross-sectional view schematically showing the state after the mounting step in the fifth embodiment. [FIG. 7D] A cross-sectional view schematically showing the state after the stealth processing step in the fifth embodiment. [FIG. 8] is a photograph showing the observation of the surface of the semiconductor wafer produced by the production method of Example 1. [FIG. [FIG. 9] is a photograph showing the observation of the surface of the semiconductor wafer produced by the production method of the comparative example.

10’:保護片材之小片 10': small piece of protective sheet

I:第一實施型態之製造方法 I: Manufacturing method of the first embodiment

Claims (6)

一種電子零件裝置之製造方法,其係包含: 於基板之至少一面且配置有電路構成要素之電路面上,疊合保護該電路構成要素之保護片材之步驟; 使該基板及該保護片材相疊而成之積層物於面方向上空出間隔而分割從而使其小片化,藉此製作該基板小片化後之基板晶片與該保護片材之小片相疊而成之該積層物之小片的步驟;及 將疊於該基板晶片之電路面上之該保護片材之小片除去之步驟。 A method of manufacturing an electronic component device, comprising: A step of laminating a protective sheet for protecting the circuit components on at least one side of the substrate on which the circuit components are disposed; The laminate formed by stacking the substrate and the protective sheet is divided in the plane direction with a space therebetween to be divided into small pieces, thereby producing a substrate wafer after the chipping of the substrate is stacked with small pieces of the protective sheet. the step of forming small pieces of the laminate; and A step of removing a small piece of the protective sheet stacked on the circuit surface of the substrate wafer. 如請求項1所述之電子零件裝置之製造方法,其中,其進一步包含:將該基板晶片之電路面朝向被接著體配置,並將該基板晶片與該被接著體接合之步驟。The method of manufacturing an electronic component device according to claim 1, further comprising: a step of arranging the circuit surface of the substrate wafer facing the adherend, and bonding the substrate wafer and the adherend. 如請求項1或2所述之電子零件裝置之製造方法,其中,該保護片材係含有水溶性高分子化合物; 該除去步驟中,係使含水之液體與該保護片材之複數個小片接觸,使各小片之至少一部分溶解於該液體中,藉此將該保護片材之複數個小片除去。 The method of manufacturing an electronic component device according to claim 1 or 2, wherein the protective sheet contains a water-soluble polymer compound; In the removing step, the plurality of small pieces of the protective sheet is brought into contact with a liquid containing water to dissolve at least a part of each small piece in the liquid, thereby removing the plurality of small pieces of the protective sheet. 如請求項1或2所述之電子零件裝置之製造方法,其中,該除去步驟中,係將貼附於該保護片材之複數個小片之剝離用黏著帶剝離,藉此將該剝離用黏著帶連同該保護片材之複數個小片除去。The method of manufacturing an electronic component device according to claim 1 or 2, wherein in the removing step, the peeling adhesive tapes of the plurality of small pieces attached to the protective sheet are peeled off, whereby the peeling adhesive The tape is removed along with several small pieces of the protective sheet. 如請求項4所述之電子零件裝置之製造方法,其中,該保護片材係含有硬化性組成物; 藉由硬化處理使疊於該基板上之該保護片材硬化後,將該基板及該保護片材之該積層物分割使其小片化。 The method of manufacturing an electronic component device according to claim 4, wherein the protective sheet contains a curable composition; After the protective sheet laminated on the substrate is cured by curing treatment, the laminate of the substrate and the protective sheet is divided into small pieces. 如請求項2所述之電子零件裝置之製造方法,其中,分別配置於該基板晶片之二表面並作為該電路構成要素之電極部係互相導通; 該接合步驟中,係堆疊至少二個該基板晶片,並使作為該被接著體之一個該基板晶片之該電極部、與另一個該基板晶片之該電極部互相直接連接。 The method of manufacturing an electronic component device as described in claim 2, wherein the electrode parts respectively arranged on the two surfaces of the substrate wafer and serving as the circuit constituent elements are connected to each other; In the bonding step, at least two substrate wafers are stacked, and the electrode portion of one substrate wafer serving as the adherend is directly connected to the electrode portion of the other substrate wafer.
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