TW202221873A - 在扇出中之可撓性封裝架構概念 - Google Patents

在扇出中之可撓性封裝架構概念 Download PDF

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TW202221873A
TW202221873A TW110142481A TW110142481A TW202221873A TW 202221873 A TW202221873 A TW 202221873A TW 110142481 A TW110142481 A TW 110142481A TW 110142481 A TW110142481 A TW 110142481A TW 202221873 A TW202221873 A TW 202221873A
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die
rdl
compliant
landing
electronic device
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TW110142481A
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TWI795077B (zh
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卡西克 珊姆蓋姆
弗林 P 卡森
軍 翟
瑞門多 Ｍ 卡門佛特
李孟盧
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美商蘋果公司
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Abstract

描述可撓性封裝及具有經整合可撓性封裝之電子裝置。在一實施例中，一可撓性封裝包括一第一晶粒及一第二晶粒，其等囊封在一模製化合物層中。一順應重分布層(RDL)橫跨該模製化合物層及兩晶粒，且包括直接形成在該等晶粒之著陸墊上的電佈線。一凹口係形成在該等晶粒之間的該模製化合物層中，以促進該順應RDL之撓曲。

Description

在扇出中之可撓性封裝架構概念
本文描述之實施例係關於電子封裝，且更具體地係關於可撓性封裝。
可攜式及行動電子裝置（諸如，行動電話、個人數位助理(personal digital assistant, PDA)、數位相機、可攜式播放器、遊戲、可穿戴式裝置、及其他行動裝置）的目前市場需求要求將更多效能及特徵整合至越來越小的空間中，其中可用的模組基材區可能受限。
可撓性印刷電路板(PCB)變得更常見，其中不同於傳統的剛性PCB，可撓性PCB（撓性板、或可撓性印刷電路）可在使用期間或為了符合設計目標而彎曲、折疊或扭轉。此類撓性板通常包括一可撓性基材（例如聚合物，諸如聚醯亞胺、聚酯、聚萘二甲酸乙二醇酯等），其具有印刷電路圖案（例如金屬圖案，諸如銅）在可撓性基材之一側或兩側上。可將各種晶片安裝在印刷電路圖案上。亦可形成多層撓性板。另一種解決方案包括剛性-撓性PCB，其中撓性連接器係利用插座彈簧銷等而連接至另一板。晶片可僅安裝在該等板上，或亦在撓性連接器上，其可包括絕緣佈線層（例如，交替的金屬及絕緣體層）。
實施例描述可撓性封裝、其製造方法、及用於將可撓性封裝整合至電子裝置中的方式，諸如接合至其他可撓性佈線基材或非平面著陸區。在一實施例中，一可撓性封裝包括一第一晶粒及一第二晶粒，其等囊封在一模製化合物層中。一順應重分布層(RDL)橫跨該模製化合物層及兩晶粒，且包括直接形成在該等晶粒之著陸墊上的電佈線。一凹口（凹部）係形成在該等晶粒之間的該模製化合物層中，以促進該順應RDL之撓曲。
該等可撓性封裝可包括額外裝置，諸如晶粒或組件，其係接合至該RDL之面側或該可撓性封裝之背側的任一者，以形成具有多個封裝位準的三維(3D)可撓性封裝。此外，可撓性封裝之面側或背側的任一者（或兩者）可接合至對應的著陸區。
實施例描述可撓性封裝、製造可撓性封裝之方法、及具有經整合可撓性封裝之電子裝置。根據實施例之可撓性封裝可包括：一第一晶粒及一第二晶粒，其等囊封在一模製化合物層中、及一順應重分布層(RDL)，其橫跨該模製化合物層、該第一晶粒、及該第二晶粒。具體而言，該順應RDL可包括直疾形成在該第一晶粒之第一著陸墊上及直接形成在該第二晶粒之著陸墊上的電佈線。一凹口（凹部）可形成在該第一晶粒與該第二晶粒之間的該模製化合物層內。此可促進用於提供封裝可撓性之順應RDL的使用。
在一態樣中，實施例描述可撓性封裝結構，其中使用一順應RDL以提供封裝可撓性。因此，不同於傳統撓性板或可撓性印刷電路，實施例不依賴於可撓性基材。
在另一態樣中，實施例可充分利用傳統的嵌入式晶圓級處理(eWLP)技術以供製造，因而整合簡單且可靠的程序流來產生薄且可撓性的封裝輪廓。例如，主要封裝厚度可主要地導因於薄化的晶粒厚度，具有順應RDL之最小貢獻。一例示性製造序列可包括：將一第一晶粒及一第二晶粒面向下置於一載體基材上；將該第一晶粒及該第二晶粒囊封在一模製化合物層中；移除該載體基材並可選地減薄該經模製表面；形成一順應RDL在該第一晶粒、該第二晶粒、及該模製化合物層上；以及在該第一晶粒與該第二晶粒之間的該模製化合物層中形成一凹口。
可撓性封裝結構之一般建立區塊可取決於應用而經受額外的封裝序列。例如，可實行額外的封裝以形成3D封裝體系(system in package, SiP)組態之多個封裝位準、及額外組件之整合，包括晶粒及被動元件等。此外，可包括雙側RDL。根據實施例之可撓性封裝可安裝在各種電子結構中，包括至傳統撓性板上、至多個佈線基材、或其他結構及外殼上。
在各種實施例中，參照圖式進行說明。然而，某些實施例可在無這些特定細節之一或多者的情況下實行或可與其他已知的方法及構形結合實行。在下列敘述中，為了提供對實施例的全面瞭解而提出眾多特定細節（例如，特定構形、尺寸、及程序等）。在其他例子中，為了避免不必要地使本實施例失焦，所以並未特別詳細地敘述公知的半導體程序及製造技術。此專利說明書通篇指稱的「一實施例(one embodiment)」係指與該實施例一同描述之具體特徵、結構、構形、或特性係包括在至少一實施例中。因此，此專利說明書通篇於各處出現之詞組「在一實施例中(in one embodiment)」不必然指稱相同實施例。此外，在一或多個實施例中，可以任何合適的方式結合特定特徵、結構、構形、或特性。
如本文所用之「在…上面(above)」、「在…上方(over)」、「至(to)」、「介於…之間(between)」、「橫跨(spanning)」、及「在…上(on)」之用語可指稱一層相對於其他層之一相對位置。一層在另一層「上面」、在另一層「上方」、「橫跨」另一層、或在另一層「上」或者一層接合「至」另一層或與另一層「接觸(contact)」可直接與另一層接觸或可具有一或多個中介層。一層介於（多個）層「之間」可直接與該等層接觸或可具有一或多個中介層。
現在參考圖1，提供根據實施例之用於可撓性封裝100之一般建立區塊的截面側視圖圖示。如圖所示，封裝100包括囊封在模製化合物層110中之複數個晶粒102、及順應重分布層(RDL)120，其橫跨模製化合物層110之前側112及包括著陸墊106的晶粒102之前面104。為了清楚及簡潔之目的，針對包括一第一晶粒及一第二晶粒之所繪示實施例來做出以下描述，雖然已理解實施例未如此受限。根據實施例，順應RDL 120包括直接形成在晶粒102之著陸墊106上的電佈線122。例如，順應RDL 120可包括一或多個介電層124、及形成電佈線122之一或多個導電跡線126及通孔128。順應RDL 120之面側121可額外地包括終端接觸墊130。例如，這些可係凸塊下冶金(underbump metallurgy, UBM)墊，用於將可撓性封裝100安裝至另一組件之著陸區上。順應RDL 120之面側121亦可對應於可撓性封裝100之面側121。
一或多個凹口115可形成在晶粒102或多個晶粒組的任一者之間的模製化合物層110內。在所繪示的特定實施例中，凹口115係形成為完全通過模製化合物層110，使得沒有模製化合物層之厚度餘留在凹口115下方，雖然此並非必需的；且凹口可部分地延伸通過模製化合物層110厚度，使得在凹口下方的模製化合物層之厚度小於第一晶粒之第一厚度及第二晶粒之第二厚度。根據許多實施例，凹口115未以剛性材料填充，可保持為未填充的（例如，氣隙），或若有必要，以諸如凝膠之順應材料填充。
RDL 120可扇出電佈線122及終端接觸墊130，以容納在凹口115下方之更多彎曲區。因此，可將終端接觸墊130扇出，比晶粒102著陸墊106更接近封裝側邊緣109，特別是最內接觸墊130，以容納更多彎曲區。
根據實施例，一或多個垂直互連140延伸通過模製化合物層110。例如，垂直互連140可從模製化合物層110之前側112延伸至模製化合物層之背側114。電佈線122可直接形成在曝露於模製化合物之前側上的垂直互連140上。垂直互連140可由各種特徵形成，以包括垂直電連接，包括柱（例如，銅柱）或作為離散組件142之部分，諸如PCB條、模製互連基材(MIS)中介層、或包括通孔、終端接觸墊等之一些組合的其他組件。
圖2係根據實施例之形成可撓性封裝的方法之程序流程。圖3A至圖3F係根據實施例之形成可撓性封裝的方法之示意截面側視圖圖示。為了清楚及簡明起見，同時描述圖2及圖3A至圖3F之處理序列。
在操作2010，將晶粒102面104向下放置在載體基材202上，如在圖3A中所示。載體基材202可係用以支援下列處理序列之任何剛性基材，包括晶圓（例如，矽晶圓）、玻璃、金屬等。在一實施例中，將晶粒102放置在載體基材202上之雙側膠帶層204（黏著劑）上。一或多個垂直互連140亦可定位成鄰接晶粒102。例如，這些可係預形成柱。替代地，可將垂直互連140包括在其他離散組件142中，其亦放置在雙側膠帶層204上。應理解，此序列可在晶圓或面板尺度，用於形成可撓性封裝之陣列。
現在參考圖3B，晶粒102及可選的垂直互連140（離散組件142）係囊封在模製化合物層110中，該模製化合物層可選地覆蓋晶粒102之背側105及垂直互連140。載體基材202及黏著劑層（諸如雙側膠帶層204）可接著在操作2030移除，導致圖3C中所繪示之經重建結構，其可係晶圓或面板尺度。此可導致使晶粒102之著陸墊106以及垂直互連140曝露。在操作2020，過模製晶粒102之背側105可提供用於在移除載體基材202之後處理經重構結構的結構穩定性。
現在參考圖3D，接著在操作2040形成順應RDL 120。如圖所示，順應RDL 120可形成（並橫跨）在晶粒102、模製化合物層110、以及垂直互連140（或離散組件142）上。順應RDL 120可藉由逐層程序來形成且可使用薄膜技術來形成。導電跡線126及通孔128可藉由首先沉積一晶種層、隨後生長一金屬（例如，銅）圖案來產生。替代地，導電跡線126及通孔128可藉由沉積（例如，濺鍍）及蝕刻來形成。在一實施例中，順應RDL 120包括利用單一主體金屬層之導電跡線126及連接通孔128。導電跡線126及通孔128的材料能包括，但不限於，金屬材料，諸如，銅、鈦、鎳、金、及彼等的組合或合金。接著將金屬圖案嵌入介電層124中，其係可選地經圖案化。介電層124可係任何合適可撓性材料，諸如，氧化物、或聚合物（例如，聚醯亞胺）。
根據實施例，薄膜順應RDL 120可具有小於習知有機或層壓基材、或撓性連接器之厚度。例如，習知六金屬層有機或層壓基材可具有200 µm至500 µm之厚度。根據實施例之順應RDL 120的厚度可藉由導電跡線126和介電層124之數目以及形成之方式來判定。根據實施例，導電跡線126可具有厚度10 µm或更小，諸如大約3 µm至10 µm；且介電層具有5 µm或更小之厚度，諸如2 µm至5 µm。根據實施例之順應RDL可額外地允許相較於習知有機或層壓基材、或撓性連接器之更窄的線間距寬度（細節距）及更薄的線。在實施例中，順應RDL 120具有小於70 µm（或更具體地大約50 µm或更小）之總最大厚度，諸如大約30 µm。在一例示性實施方案中，用於導電跡線126及對應的介電層124之一雙層可係順應RDL 120之大約5 µm。對於層厚度變化（或額外鈍化層）假設高達額外30 µm之變化，則順應RDL 120可小於50 µm（對於4金屬層設計）、或小於70 µm（對於8金屬層設計）。
現在參考圖3E，經重構結構可（例如）藉由拋光模製化合物層110以曝露晶粒102之背側105、或甚至減少晶粒102之厚度以及曝露垂直互連140之背側141來薄化。在一實施例中，經薄化晶粒具有小於300 µm之厚度，諸如大約250 µm。在操作2050，接著可在晶粒102之間的模製化合物層110中形成一或多個凹口115，如在圖3F中所示。此外，導電凸塊150（例如，焊料凸塊）可形成在垂直互連140（或離散組件142）之背側141上，或者終端接觸墊130可形成在順應RDL 120/可撓性封裝100之面側121上。可選地，導電凸塊150可形成在凹口115之前或之後。
根據實施例之薄可撓式封裝100結構可藉由接合額外裝置（諸如額外晶片或被動組件等）來進一步處理以包括額外RDL、或封裝位準；且可整合入各種電子裝置組態中。根據實施例，可撓性封裝可安裝至著陸區上，使得一或多個凹口115下方之順應RDL 120係可撓性的。因此，附接至在（多個）凹口115之側向相對側上的可撓性封裝100（無論在可撓性封裝100之背側或是面側上）可固定在非共面的位置中、或可移動的、或可折疊的，使得可撓性封裝100隨著其所附接的（多個）基材而撓曲。根據許多實施例，凹口115未以剛性材料填充，可保持為未填充的（例如，氣隙），或若有必要，以諸如凝膠之順應材料填充。在一實施例中，RDL 120不包括直接在凹口115正下方之任何終端接觸墊。各種電子裝置組態係繪示在圖4至圖12中。
圖4係根據一實施例之具有安裝在多個著陸區302上的封裝背側108之3D可撓性封裝100的示意截面側視圖圖示。在所繪示的特定實施例中，著陸區302可在相對的佈線基材300上，諸如剛性PCB、可撓性PCB（撓性板）等。著陸區302亦可在（或至少部分地重疊）晶粒102及垂直互連140正下方，雖然由於RDL 120之佈線中的扇出或扇入而可預期一些偏移。具體而言，RDL 120可扇出電佈線122及終端接觸墊130，以容納在凹口115下方之更多彎曲區。因此，可將終端接觸墊130扇出，比晶粒102著陸墊106更接近封裝側邊緣109，特別是最內接觸墊130，以容納更多彎曲區。亦顯示在圖4中者係可撓性封裝100之變異，其中額外組件係接合至順應RDL 120之面側121上的終接觸墊130以形成3D可撓性封裝。可使用導電材料450（諸如導電膏、導電凸塊（例如焊料凸塊）、微凸塊等）來達成接合。圖5係類似於圖4之所繪示實施例，其中唯一差異在於其3D可撓性封裝結構可額外地（或替代地）包括接合至順應RDL 120之面側121上的終端接觸墊130之額外晶粒402，以取代（或外加於）組件400。
在圖4至圖5中所繪示之兩實施例中，著陸區302係繪示為共面，然而，此並非必要。如先前所述，順應RDL 120可撓曲，特別是在凹口115下方的區域中。彎曲可係面外的、以及扭轉的。根據實施例，可將著陸區302固定在非平面位置中，或佈線基材300可係可撓性的，使得可將著陸區302移動至非平面位置，而同時可撓性封裝100隨著（多個）佈線基材300之移動而撓曲。
此外，在圖4至圖5中所繪示之兩實施例中，裝置（例如晶粒402、組件400）未接合至橫跨凹口115之順應RDL 120的面側121。依此方式，剛性結構不干擾順應RDL 120之彎曲。
現在參考圖6，其係根據一實施例之具有安裝至多個著陸區的面側及背側兩者之可撓性封裝的示意截面側視圖圖示。在所示的例示性實施例中，可撓性佈線基材300（諸如撓性板）可連接至終端接觸墊130及垂直互連140之背側141兩者，並包覆可撓性封裝100之邊緣周圍。應理解，圖6僅係說明性的。不需要將佈線基材300安裝至可撓性封裝100之兩側，而因此圖6應理解為顯示可將可撓性封裝100之任一側或兩側安裝至相同或不同的佈線基材300上之不同的著陸區302。此外，類似於圖4至圖5，可將著陸區302固定在非平面位置中，或佈線基材300可係可撓性的，使得可將著陸區302移動至非平面位置，而同時可撓性封裝100隨著（多個）佈線基材300之移動而撓曲。
現在參考圖7，繪示3D可撓性封裝100之另一實施例，其中非將封裝背側108安裝至（多個）基材300，取而代之根據一實施例以將封裝面側121安裝在多個著陸區302上。此外，可藉由將一或多個晶粒402（或組件）接合至垂直互連140之背側141來達成3D可撓性封裝100。類似於先前所述之電子裝置組態，可將著陸區302固定在非平面位置中，或佈線基材300可係可撓性的，使得可將著陸區302移動至非平面位置，而同時可撓性封裝100隨著（多個）佈線基材300之移動而撓曲。
直至此點，已描述了實施例，其中可撓性封裝100之面側或背側係接合至多個著陸區302。圖8係根據一實施例之具有安裝至多個著陸區302的封裝背側109之3D可撓性封裝100的示意截面側視圖圖示。具體而言，先前描述為包括垂直互連140之離散組件142可包括側向互連145，用於將封裝側邊緣109接合至可包括在佈線基材300中之著陸區302。在此一實施例中，可將著陸區302固定在非平面位置中，或佈線基材300可係可撓性的，使得可將著陸區302移動至非平行位置，而同時可撓性封裝100隨著（多個）佈線基材300之移動而撓曲。
直至此點，已描述並繪示了實施例，其中著陸區302係形成在實體上分開的佈線基材300上。然而，此並非必需的，且本文所述之可撓性封裝100亦可安裝在剛性或可撓性佈線基材300之相同側上。在此組態中，可撓性封裝100可隨著其所接合之可撓性佈線基材300而撓曲。此外，可撓性封裝100之面側或背側可接合至佈線基材300，而可撓性封裝100亦可係3D可撓性封裝。
圖9A係根據一實施例之安裝至多個著陸區302的3D可撓性封裝100背側108之示意截面側視圖圖示。具體而言，3D可撓性封裝100可類似於圖4至圖5之組態，其差異在於3D可撓性封裝100係安裝至單一基材，且著陸區302係位於佈線基材300之相同的第一側301上。
圖9B係根據一實施例之其係安裝至多個著陸區302的面側121之3D可撓性封裝100的示意截面側視圖圖示。具體而言，3D可撓性封裝100可類似於圖7之組態，其差異在於3D可撓性封裝100係安裝至單一基材，且著陸區302係位於佈線基材300之相同的第一側301上。
在圖9A至圖9B中所繪示之實施例中，佈線基材第一側301經折疊、或係可向內折疊的，使得在該折疊之相對側上的第一著陸區302及第二著陸區302成小於180度之角度。然而，設想替代配置，包括其中佈線基材經折疊、或可向外折疊，在該折疊之相對側上的第一著陸區302及第二著陸區302成大於180度之角度。
現在參考圖10至圖12，繪示額外電子裝置組態。應理解，不同於圖9A至圖9B，圖10至圖12之圖示經簡化以對應於面側121安裝的或背側108安裝的可撓性封裝100。因此，圖10至圖12之圖示在此方面比圖9A至圖9B之圖示更不詳細。
現在參考圖10，提供根據一實施例之安裝至L形外殼的可撓性封裝100之示意側視圖圖示。L形外殼可係一個、或多個佈線基材300。此外，L形外殼固定在適當位置或可移動的。
圖11係根據一實施例之安裝在鈍角外殼周圍的可撓性封裝100之示意側視圖圖示。鈍角外殼可係一個、或多個佈線基材300。在所繪示之實施例中，佈線基材300經折疊、或係可向外折疊的，使得在該折疊之相對側上的第一著陸區302及第二著陸區302成大於180度之角度。此外，著陸區302可位於佈線基材之相同第一側301上。
現在參考圖12，提供用於電子裝置之又另一設計的示意側視圖圖示，其中可撓性封裝100係根據一實施例而安裝至具有一附接背側外殼500之兩個佈線基材300。例如，背側外殼500可係一機械小晶片（例如，無功能性、矽、塑膠、金屬）、或剛性佈線基材，其包括用於兩個佈線基材300之間的電連接之接觸墊510。以此方式，該組態仍可係可撓性的，然而包括用以限制撓曲件之量的拘束結構之量。
在使用實施例的各種態樣的過程中，所屬技術領域中具有通常知識者將明白上述實施例的組合或變化對於形成並整合可撓性封裝入電子裝置中而言係可行的。雖然已經以結構特徵及/或方法動作之特定語言敘述實施例，應了解附加的申請專利範圍不必受限於所述的特定特徵或行為。替代地，所揭示之特定的特徵或動作應理解為可用於說明之申請專利範圍的實施例。
100:可撓性封裝/封裝 102:晶粒 104:前面/面 105:背側 106:著陸墊 108:封裝背側/背側 109:封裝側邊緣/封裝背側 110:模製化合物層 112:前側 114:背側 115:凹口 120:順應重分佈層(RDL)/RDL 121:面側 122:電佈線 124:介電層 126:導電跡線 128:通孔 130:終端接觸墊/最內接觸墊 140:垂直互連 141:背側 142:離散組件 145:側向互連 150:導電凸塊 202:載體基材 204:雙側膠帶層 300:佈線基材/基材 301:第一側 302:著陸區 400:組件 402:晶粒 450:導電材料 500:背側外殼 510:接觸墊 2010:操作 2020:操作 2030:操作 2040:操作 2050:操作
〔圖1〕係根據實施例之用於可撓性封裝之一般建立區塊的示意截面側視圖圖示。 〔圖2〕係根據一實施例之用於形成可撓性封裝的方法之程序流程。 〔圖3A〕至〔圖3F〕係根據實施例之形成可撓性封裝的方法之示意截面側視圖圖示。 〔圖4〕至〔圖5〕係根據一實施例之具有安裝在多個著陸區上的封裝背側之3D可撓性封裝的示意截面側視圖圖示。 〔圖6〕係根據一實施例之具有安裝至多個著陸區的面側及背側兩者之可撓性封裝的示意截面側視圖圖示。 〔圖7〕係根據一實施例之具有安裝在多個著陸區上的封裝面側之3D可撓性封裝的示意截面側視圖圖示。 〔圖8〕係根據一實施例之具有安裝至多個著陸區的側邊緣之封裝的3D可撓性封裝的示意截面側視圖圖示。 〔圖9A〕係根據一實施例之其係安裝至多個著陸區的背側之3D可撓性封裝的示意截面側視圖圖示。 〔圖9B〕係根據一實施例之其係安裝至多個著陸區的面側之3D可撓性封裝的示意截面側視圖圖示。 〔圖10〕係根據一實施例之安裝至L形外殼的可撓性封裝之示意側視圖圖示。 〔圖11〕係根據一實施例之安裝在鈍角外殼周圍的可撓性封裝之示意側視圖圖示。 〔圖12〕係根據一實施例之安裝至具有裝附背側外殼的兩個佈線基材之可撓性封裝的示意側視圖圖示。
102:晶粒
108:封裝背側/背側
115:凹口
120:順應重分佈層(RDL)/RDL
140:垂直互連
300:佈線基材/基材
301:第一側
302:著陸區
400:組件

Claims (20)

  1. 一種電子裝置，其包含： 一第一著陸區及一第二著陸區，其中該第一著陸區連同該第二著陸區；及 一可撓性封裝，其安裝在該第一著陸區及該第二著陸區上，該可撓性封裝包含： 一第一晶粒及一第二晶粒，其囊封在一模製化合物層中； 一順應重分布層(RDL)，其橫跨該模製化合物層、該第一晶粒、及該第二晶粒，其中該順應RDL包括直接形成在該第一晶粒之第一著陸墊上及直接形成在該第二晶粒之第二著陸墊上的電佈線；及 一凹口，其在該第一晶粒與該第二晶粒之間的該模製化合物層內。
  2. 如請求項1之電子裝置，其中該凹口未以一剛性材料填充。
  3. 如請求項2之電子裝置，其中該順應RDL具有50 µm或更小之最大厚度。
  4. 如請求項3之電子裝置，其中該RDL包括複數個終端接觸墊，且一終端接觸墊非位於該凹口正下方。
  5. 如請求項2之電子裝置，其中該第一著陸區及該第二著陸區係位於一佈線基材之一相同側上。
  6. 如請求項5之電子裝置，其中該佈線基材第一側經折疊或係可向內折疊的，使得該第一著陸區與該第二著陸區成小於180度之角度。
  7. 如請求項5之電子裝置，其中該佈線基材第一側經折疊或係可向外折疊的，使得該第一著陸區與該第二著陸區成大於180度之角度。
  8. 如請求項2之電子裝置，其中該第一著陸區係位於一第一佈線基材中，且該第二著陸區係位於與該第一佈線基材實體上分開的一第二佈線基材中。
  9. 如請求項8之電子裝置，其進一步包含一剛性基材，該剛性基材安裝至該第一佈線基材及該第二佈線基材，其中該剛性基材係與該模製化合物層中之該凹口相對。
  10. 如請求項2之電子裝置，其進一步包含直接將該順應RDL連接至該第一著陸區之第一複數個導電凸塊、及直接將該順應RDL連接至該第二著陸區之第二複數個導電凸塊。
  11. 如請求項2之電子裝置，其進一步包含延伸通過該模製化合物層之一第一垂直互連、及延伸通過該模製化合物層之一第二垂直互連。
  12. 如請求項11之電子裝置，其進一步包含接合至與該第一晶粒相對之該順應RDL的一面側之一第一裝置、及接合至與該第二晶粒相對之該順應RDL的一面側之一第二裝置。
  13. 如請求項11之電子裝置，其進一步包含接合至與該順應RDL相對之該垂直互連的一背側之一第一裝置、及接合至與該順應RDL相對之該垂直互連的一背側之一第二裝置。
  14. 如請求項11之電子裝置，其中該第一垂直互連利用第一複數個導電凸塊而接合至該第一著陸區，且該第二垂直互連利用該第二複數個導電凸塊而接合至該第二著陸區。
  15. 如請求項2之電子裝置，其進一步包含直接將該順應RDL連接至該第一著陸區之第一複數個導電凸塊、及直接將該順應RDL連接至該第二著陸區之第二複數個導電凸塊。
  16. 一種可撓性封裝，其包含： 一第一晶粒及一第二晶粒，其囊封在一模製化合物層中； 一順應重分布層(RDL)，其橫跨該複數個垂直互連、該模製化合物層、該第一晶粒、及該第二晶粒，其中該順應RDL包括直接形成在該第一晶粒之第一著陸墊上及直接形成在該第二晶粒之著陸墊上的電佈線；及 一凹口，其在該第一晶粒與該第二晶粒之間的該模製化合物層內； 其中該凹口未以一剛性材料填充。
  17. 如請求項16之可撓性封裝，其進一步包含複數個垂直互連，該複數個垂直互連延伸通過該模製化合物層之一厚度，其中該順應RDL具有50 µm或更小之一最大厚度。
  18. 如請求項16之可撓性封裝，其中該順應RDL包括在該順應RDL之一面側上的複數個終端接觸墊，且該等終端接觸墊經扇出比該等第一著陸墊及該等第二著陸墊更接近該可撓性封裝之側邊緣。
  19. 一種形成一可撓性封裝的方法，該方法包含： 將一第一晶粒及一第二晶粒面向下放置在一載體基材上； 將該第一晶粒及該第二晶粒囊封在一模製化合物層中； 移除該載體基材； 形成一順應重分布層(RDL)在該第一晶粒、該第二晶粒、及該模製化合物層上；及 在該第一晶粒與該第二晶粒之間的該模製化合物層中形成一凹口。
  20. 如請求項19之方法，其中： 形成該順應RDL包括在該第一晶粒之第一著陸墊上及在該第二晶粒之第二著陸墊上直接形成電佈線；及 形成該電佈線包括利用一單一主體金屬層形成一導電跡線及連接通孔。
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