TW202143314A - 在選擇性原子層蝕刻中使用超薄蝕刻停止層的方法 - Google Patents

在選擇性原子層蝕刻中使用超薄蝕刻停止層的方法 Download PDF

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TW202143314A
TW202143314A TW110103982A TW110103982A TW202143314A TW 202143314 A TW202143314 A TW 202143314A TW 110103982 A TW110103982 A TW 110103982A TW 110103982 A TW110103982 A TW 110103982A TW 202143314 A TW202143314 A TW 202143314A
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奥米德 詹迪
保羅 阿貝爾
賈克斯 法各克
大衛 吉沃特扣
史蒂芬 M 喬治
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日商東京威力科創股份有限公司
科羅拉多大學董事會法人團體
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Abstract

使用超薄蝕刻停止層(ESL)的材料選擇性蝕刻的方法,其中在使用原子層蝕刻(ALE)的小如約一單層的厚度處該ESL係有效的。一種基板處理方法包含:將第一膜沉積於一基板之上;將第二膜沉積於該第一膜之上;以及相對於該第一膜,使用ALE製程將該第二膜選擇性蝕刻,其中該蝕刻步驟自終結(self-terminate)於該第二膜及該第一膜的介面。

Description

在選擇性原子層蝕刻中使用超薄蝕刻停止層的方法
[相關申請案的交互參照]  本申請案主張以下優先權:美國專利臨時申請案第62/969567號,發明名稱「METHOD FOR USING ULTRA-THIN ETCH STOP LAYERS IN SELECTIVE ATOMIC LAYER ETCHING」,申請於西元2020年2月3日;上述申請案的全部內容藉由參照全部於此明確地納入。
本發明關聯於半導體製造及半導體裝置之領域,並且更具體而言,關聯於一種在半導體處理中使用超薄無機蝕刻停止層的方法。
在半導體及相關產業之中,奈米結構及奈米圖案之製造導致對達成接近原子層級的準確度以及在沉積及蝕刻不同材料的步驟中之選擇性的需求。示例包含精細內連線特徵部的金屬填充,以及在場效電晶體及其他小於10 nm等級的奈米裝置之中使用的超薄閘極介電質及超薄通道之形成。原子層沉積(ALD)及原子層蝕刻(ALE)製程可界定先進半導體生產所需要的原子層成長以及移除,基於沉積/回蝕方法產生超平滑薄膜、以及在高縱橫比結構中進行保形蝕刻。
本文敘述使用超薄蝕刻停止層(ESL)選擇性蝕刻材料的方法,其中當使用ALE製程時,在小如接近一單層的厚度處,該ESL係有效的。
根據一實施例,一基板處理方法包含:將第一膜沉積於一基板之上;將第二膜沉積於該第一膜之上;以及使用ALE製程而相對於該第一膜將該第二膜選擇性蝕刻,其中該蝕刻步驟自終結(self-terminate)於該第二膜與該第一膜的介面。
根據另一實施例,一種基板處理方法,包含:提供一基板,其含有在一基板上之第一膜以及在該第一膜上之第二膜;使用一ALE製程啟動該第二膜之蝕刻步驟,該ALE製程相對於該第一膜而選擇性蝕刻該第二膜;以及使用該ALE製程移除該第二膜,其中該蝕刻移除步驟自終結於該第二膜與該第一膜之介面。該方法進一步包含:在該移除步驟之後,使用一額外ALE製程蝕刻該第一膜,其中該ALE製程包含第一反應物與第二反應物之交替氣體暴露,並且該額外ALE製程包含第三反應物與第四反應物之交替氣體暴露,並且其中該ALE製程及該額外ALE製程係在沒有該第一反應物、該第二反應物、該第三反應物、及該第四反應物之電漿激發的情況下實施。根據一實施例,該第一膜具有接近一單層的均勻厚度。
根據另一實施例,一種基板處理方法,包含:將一ZrO2 膜沉積於一基板之上;將一Al2 O3 膜沉積於該ZrO2 膜之上;使用熱ALE製程啟動該Al2 O3 膜之蝕刻步驟,該熱ALE製程相對於該ZrO2 膜選擇性蝕刻該Al2 O3 膜;以及使用該熱ALE製程移除該Al2 O3 膜,其中該蝕刻步驟自終結於該Al2 O3 膜及該ZrO2 膜之介面。根據一實施例,該ZrO2 膜具有接近一單層的均勻厚度。根據一實施例,該熱ALE製程包含HF與Al(CH3 )3 之交替氣體暴露。根據一實施例,該方法進一步包含:在該移除步驟之後,使用一額外熱ALE製程蝕刻該ZrO2 膜,該額外熱ALE製程包含HF與Al(CH3 )2 Cl之交替氣體暴露。
在半導體裝置之製造中,ESL係用於材料堆疊之中,以停止不同材料的介面處之蝕刻製程,或者用以保護下伏材料免於蝕刻。本發明之實施例敘述ESL之使用,該ESL可能僅一單層(原子層)厚,且可能加以沉積並且在之後於一或多個處理室之中原位移除。本文所述之方法可提供在半導體裝置製造中之處理時間及材料使用的顯著減少,並且允許在奈米尺寸空間及3D特徵部之中的沉積/蝕刻製程。進一步而言,該等方法可減少在半導體裝置之中在材料之多堆疊之集成期間與壓力累積有關的問題。
根據一實施例,敘述一種使用超薄ESL的材料之選擇性蝕刻的方法,其中在ALE處理中,在小如接近一單層的厚度處該ESL係有效的。ALE係一種蝕刻技術,用於使用連續及自限反應的材料薄層移除。熱ALE(在沒有電漿激發的情況下實施)使用自飽和及自終結(self-terminating)的連續熱驅動反應步驟提供等向性原子級蝕刻控制。熱ALE蝕刻機制可包含氟化及配位基交換、轉換蝕刻、以及氧化與氟化反應。蝕刻準確度可達到原子級尺度,並且大範圍的均勻基板蝕刻係可達成的。可使用本發明之實施例處理的基板之示例包含常見於半導體製造中的半導體材料(例如Si)之薄晶圓,並且可具有100mm、200mm、300mm、或更大的直徑。然而,可使用其他類型的基板,例如用於製作太陽能板的基板。
圖1A-1E示意地顯示根據本發明之實施例的一種處理層結構的方法。如圖1A中示意地顯示,該方法包含提供基板1,其含有基材100(例如Si晶圓)、以及在基材100上之底膜102。儘管未顯示於圖1A之中,但基板1可含有一或多個額外的膜及材料以及一或多簡單或進階圖案化特徵部。
在圖1B之中,該方法進一步包含將第一膜104沉積於底膜102上方。根據本發明之實施例,第一膜104可用作一ESL。在一示例之中,第一膜104係介電膜。在若干示例之中,第一膜102可包含一金屬氧化物膜,其通式為Mx Oy ,其中x及y係整數。示例包含ZrO2 及Al2 O3 。在一示例之中,第一膜104可包含ZrO2 ,可使用ALD處理將其均勻地沉積於基材100之上。然而,第一膜102不限於金屬氧化物,並且可包含其他材料或由其他材料組成,例如氧化物、氮化物、氮氧化物、以及在半導體裝置之中見到的其他材料。
在圖1C之中,該方法進一步包含將第二膜106沉積於第一膜104之上,其中第二膜106包含與第一膜104不同的材料。根據本發明之實施例,第一膜104可用於停止在第二膜106及第一膜104之介面處的後續蝕刻製程,或者用於保護第一膜102免於蝕刻。在一實施例之中,第二膜106係介電膜。在若干示例之中,第二膜106可包含金屬氧化物膜,其通式為Mx Oy ,其中x及y係整數。示例包含ZrO2 、HfO2 、及Al2 O3 。在一示例之中,第二膜106可包含Al2 O3 ,其可使用ALD處理均勻地沉積於第一膜104之上。然而,第二膜106不限於金屬氧化物,並且可包含其他材料或由其他材料組成,例如氧化物、氮化物、氮氧化物、以及在半導體裝置中見到的其他材料。
該方法進一步包含使用相對於第一膜104而選擇性蝕刻第二膜106的一ALE製程(例如,熱ALE製程)啟動該第二膜106之蝕刻。該ALE製程移除第二膜106,直到因為該ALE製程之選擇性蝕刻特徵使該蝕刻自終結於第二膜106及第一膜104之介面處。圖1D示意地顯示當第二膜106已自基板1移除時的基板1。之後,根據一實施例,第一膜104可自基板1移除,例如使用一額外的ALE製程。這示意地顯示於圖1D之中。
圖2顯示根據本發明實施例的在沉積/蝕刻製程期間使用石英晶體微平衡(QCM)追蹤的基板質量變化。質量軌跡200顯示在QCM之上以ng/cm2 為單位的基板質量增加/減損與時間的函數關係,其中質量增加及質量減損分別對應於沉積及蝕刻製程。該膜結構包含底AlO3 膜、在該底AlO3 膜上之ZrO2 膜、以及在該ZrO2 膜上之頂AlO3 膜。質量軌跡200分為三個區段,其中第一區段201顯示了在該底Al2 O3 膜之上有著一單層厚度的ZrO2 膜之ALD期間的質量增加,第二區段202顯示在該ZrO2 膜上之頂Al2 O3 膜之ALD期間的質量增加,並且第三區段203顯示在使用一ALE製程的該頂Al2 O3 膜之蝕刻及移除期間的質量減損。ZrO2 膜之ALD係使用四氯化鋯(ZrCl4 )與水(H2 O)的交替氣體暴露加以實施,並且頂Al2 O3 膜之ALD係使用三甲基鋁(Al(CH3 )3 )與H2 O之交替氣體暴露加以實施。該頂Al2 O3 之ALE使用氟化氫(HF)與Al(CH3 )3 之交替氣體暴露,其中ALD循環每一者包含使用HF暴露的Al2 O3 表面氟化,接著暴露於Al(CH3 )3 ,其藉由配位基交換反應而導致該氟化表面層(亦即AlF3 )之蝕刻。
該頂Al2 O3 膜之蝕刻的未平衡ALE反應包含:
Al2 O3 + HF(g) →   AlF3 + H2 O(g) (1)
AlF3 + Al(CH3 )3(g) →   AlFx (CH3 )y(g) (2)
該頂Al2 O3 膜之蝕刻繼續直到該頂Al2 O3 膜完全被移除並且接著該ALE製程自終結於該頂Al2 O3 膜及該ZrO2 膜之介面處。該ALE製程之所以自終結係因為該ZrO2 膜對藉由HF與Al(CH3 )3 之交替氣體暴露的蝕刻係高度阻抗的。儘管該ZrO2 膜在與HF反應以形成ZrF4 之後經受氟化,但與Al(CH3 )3 的配位基交換反應在ALE條件下係熱力學上不利的,並且這破壞及停止該蝕刻製程。
該ZrO2 膜的未平衡ALE反應包含:
ZrO2 + HF(g) →  ZrF4 + H2 O(g) (3)
ZrF4 + Al(CH3 )3(g) →   不反應                 (4)
ZrO2 膜之蝕刻阻抗清楚地顯示於圖2之區段203之中,其中,在該頂Al2 O3 膜之移除期間,在大量ALE循環之後測量的質量軌跡200漸進地逼近該ZrO2 膜之質量。儘管ZrO2 之氟化係作為每次ALE循環中之質量增加加以觀察,但在該氟化表面對Al(CH3 )3(g) 之後續暴露之後並未觀察到質量的淨變化,這代表對交換反應的一鈍化表面。因此,在完全蝕刻及移除頂Al2 O3 膜之後該蝕刻製程停止於該ZrO2 膜之上,從而顯示儘管該ZrO2 膜僅有單層厚度,但作用為ESL而有效地保護該下伏材料(亦即,該底Al2 O3 膜)免於蝕刻。以熱力學的觀點而言,作為ESL的該ZrO2 膜之蝕刻阻隔能力在理論上可係無限的,因為在該ALE條件之下配位基交換反應在熱理學上係不利的。這允許有著單層厚度的超薄ESL得以藉由將適切的材料用作ESL而有效地阻隔該ALE製程。
圖3顯示根據本發明之實施例在沉積/蝕刻製程期間利用QCM追蹤的基板質量改變。軌跡300顯示在使用ZrCl4 及H2 O之交替氣體暴露的ZrO2 之ALD期間的質量增加,以及在使用HF及Al(CH3 )3 之交替氣體暴露的ZrO2 之後續ALE處理期間的質量改變。該ZrO2 膜作為ESL的穩固性被清楚地展現,並且顯示(即便在ESL製程的100次循環之後)該ZrO2 膜之ZrF4 表面的100%阻隔效率。
圖4顯示根據本發明之實施例由QCM量測的蝕刻率。顯示於圖中的是在ALE製程之中Al2 O3 膜之蝕刻率與預先沉積在該Al2 O3 膜之上的ZrO2 的不同數量的關係。ZrO2 係由使用Al(CH3 )3 及H2 O之交替氣體暴露的ALD加以沉積,並且該ALE製程係使用HF及Al(CH3 )3 之交替氣體暴露加以實施。在實心圓400之中的實驗數據顯示沉積在該Al2 O3 膜之上的ZrO2 的數量增加將導致下伏Al2 O3 膜之蝕刻量減少。具體而言,約200 ng的ZrO2 (對應於沉積於該Al2 O3 膜之上接近一單層的ZrO2 )將Al2 O3 之蝕刻率減少至幾乎為零。將ZrO2 膜之厚度增加至單層厚度以上並不影響蝕刻率,因為ZrO2 已經完全覆蓋該Al2 O3 膜。在ZrO2 之僅大約一單層之厚度處的有效蝕刻停止係與該蝕刻反應之不利的熱力學特性相一致,其中Al2 O3 表面反應部位被ZrO2 鈍化。進一步而言,在接近一單層之厚度處的ZrO2 之有效蝕刻阻隔顯示ZrO2 之第一單層均勻地覆蓋該Al2 O3 膜,並且ZrCl4 前驅物對暴露的Al2 O3 表面部分比對覆蓋該Al2 O3 膜的ZrO2 來得更加活性。
圖5顯示根據本發明之實施例的在ALE製程期間使用QCM追蹤的基板質量改變。儘管ZrO2 膜並不會被使用HF及Al(CH3 )3 之交替氣體暴露蝕刻Al2 O3 膜的熱ALE處理所蝕刻,但藉由取代該ALE處理之中一或多個的氣相蝕刻反應物,該ZrO2 膜可能被蝕刻及移除。在圖5之中,如軌跡500所示,藉由使用HF及二甲基氯化鋁(DMAC,Al(CH3 )2 Cl)之交替氣體暴露的熱ALE處理,ZrO2 膜被蝕刻。以Al(CH3 )2 Cl取代Al(CH3 )3 使得配位基交換反應在熱力學上有利,並且從而啟動根據以下未平衡ALE反應的ZrO2 膜之蝕刻:
ZrO2 + HF(g) →  ZrF4 + H2 O(g) (5)
ZrF4 + Al(CH3 )2 Cl(g) →  ZrFx Cly (g) (6)
ZrO2 膜之蝕刻係由QCM軌跡中之階梯式質量減損加以繪示。
圖6以表格形式顯示根據本發明之實施例可能用於選擇性ALE的蝕刻反應物及材料之組合的示例。所列組合係基於實驗及熱力學資訊。在繪示於圖6的一示例之中,ZrO2 膜可用做ESL,用於使用HF及Al(CH3 )3 之交替氣體暴露的Al2 O3 及HfO2 膜之熱ALE處理。此後,舉例而言,若希望的話,可使用HF及Al(CH3 )2 Cl之交替氣體暴露將該ZrO2 膜移除。在另一示例之中,Al2 O3 膜可能用作ESL,用於使用HF及SiCl4 之交替氣體暴露的ZrO2 及HfO2 膜之熱ALE處理。此後,舉例而言,若希望的話,可使用HF及Al(CH3 )3 之交替氣體暴露將該Al2 O3 膜移除。
根據若干實施例,該ALD處理、該ALE處理、或二者可在以下的基板溫度範圍之中加以實施:在約100℃及約400℃之間、在約200℃及約400℃之間、或者在約200℃及約300℃之間。在一示例之中,該ALD處理、該ALE處理、或二者可在約250℃及約280℃之間的基板溫度下加以實施。
在若干示例之中,該ALD處理及該ALE處理可在相同的基板溫度或在幾乎相同的基板溫度下加以實施。本領域中通常知識者將輕易地理解到當該ALD處理及該ALE處理二者在相同處理室之中實施時以及當該ALD處理及該ALE處理使用不同的處理室時,這允許了高基板產出率。
在若干示例之中,二個以上的ALD處理、ALE處理、以及額外的ALE處理可在相同的基板溫度或者在幾乎相同的基板溫度下加以實施。舉例而言,該ALE處理及該額外的ALE處理可在相同的基板溫度或者在幾乎相同的基板溫度下加以實施。
一種使用超薄蝕刻停止層(ESL)的材料之選擇性蝕刻的方法的複數實施例已被敘述。本發明之實施例的上述敘述係為說明及敘述之目的而呈現。這不旨在窮舉本發明或將本發明限制為所揭露的精確形式。此實施方法章節和隨附的發明申請專利範圍包括僅用於敘述目的之術語,並且不應被解釋為限制性的。相關領域中通常知識者可理解到鑑於以上教示的許多修改及改變係可能的。因此,本發明之範圍不旨在由此實施方法章節所限制,而係由以下的隨附發明申請專利範圍所限制。
1:基板 100:基材 102:底膜 104:第一膜 106:第二膜 200:質量軌跡 201:第一區段 202:第二區段 203:第三區段 300:軌跡 400:實心圓 500:軌跡
在附隨圖示之中:
圖1A-1E示意地顯示根據本發明之實施例的一種處理層結構的方法;
圖2顯示根據本發明之實施例的在沉積/蝕刻製程期間以石英晶體微平衡(QCM)追蹤的基板質量改變;
圖3顯示根據本發明之實施例的在沉積/蝕刻製程期間以QCM追蹤的基板質量改變;
圖4顯示根據本發明之實施例的以QCM測量的蝕刻率;
圖5顯示根據本發明之實施例的在ALE製程期間以QCM追蹤的基板質量改變;
圖6以表格形式顯示本發明之實施例的可用於選擇性ALE的蝕刻反應物及材料之組合的示例。
200:質量軌跡
201:第一區段
202:第二區段
203:第三區段

Claims (20)

  1. 一種基板處理方法,包含: 將第一膜沉積於一基板之上; 將第二膜沉積於該第一膜之上;以及 使用原子層蝕刻(ALE)製程而相對於該第一膜將該第二膜選擇性蝕刻,其中該蝕刻步驟自終結(self-terminate)於該第二膜與該第一膜的介面。
  2. 如請求項1之基板處理方法,其中該ALE製程包含第一反應物與第二反應物之交替氣體暴露。
  3. 如請求項2之基板處理方法,其中該ALE製程包含一熱ALE製程,其係在沒有該第一反應物與該第二反應物之電漿激發的情況下實施。
  4. 如請求項1之基板處理方法,其中該第一及第二膜係介電膜。
  5. 如請求項1之基板處理方法,其中該第一及第二膜包含不同的金屬氧化物膜,其係選自由Al2 O3 、ZrO2 、及HfO2 所組成的群組。
  6. 如請求項1之基板處理方法,其中該第二膜包含一Al2 O3 膜。
  7. 如請求項6之基板處理方法,其中在一原子層沉積(ALD)製程之中,該Al2 O3 膜係使用Al(CH3 )3 及H2 O之交替氣體暴露加以沉積。
  8. 如請求項1之基板處理方法,其中該ALE製程包含1) HF及2) Sn(acac)2 、Al(CH3 )3 、Al(CH3 )2 Cl、SiCl4 、或TiCl4 之交替氣體暴露。
  9. 如請求項1之基板處理方法,其中該第一膜包含一ZrO2 膜。
  10. 如請求項9之基板處理方法,其中該ZrO2 膜具有接近一單層的均勻厚度。
  11. 如請求項9之基板處理方法,其中在一原子層沉積(ALD)製程之中,該ZrO2 膜係使用ZrCl4 及H2 O之交替氣體暴露加以沉積。
  12. 如請求項1之基板處理方法,進一步包含: 在該選擇性蝕刻步驟之後,使用一額外ALE製程蝕刻該第一膜。
  13. 如請求項12之基板處理方法,其中該ALE製程包含第一反應物與第二反應物的交替氣體暴露,並且該額外ALE製程包含該第一反應物與第三反應物之交替氣體暴露,該第三反應物不同於該第二反應物。
  14. 如請求項13之基板處理方法,其中該ALE製程及該額外ALE製程係在沒有該第一反應物、該第二反應物、及該第三反應物之電漿激發的情況下實施。
  15. 如請求項13之基板處理方法,其中該第一膜包含一ZrO2 膜,該第二膜包含一Al2 O3 膜,該第一反應物包含HF,該第二反應物包含Al(CH3 )3 ,並且該第三反應物包含Al(CH3 )2 Cl。
  16. 一種基板處理方法,包含: 提供一基板,其含有第一膜以及在該第一膜上之第二膜; 使用熱原子層蝕刻(ALE)製程啟動該第二膜之蝕刻步驟,該熱ALE製程相對於該第一膜而選擇性蝕刻該第二膜; 使用該熱ALE製程移除該第二膜,其中該移除步驟自終結於該第二膜與該第一膜之介面;以及 在該移除步驟之後,使用一額外熱ALE製程蝕刻該第一膜,其中該熱ALE製程包含第一反應物與第二反應物之交替氣體暴露,並且該額外熱ALE製程包含該第一反應物與第三反應物之交替氣體暴露,該第三反應物不同於該第二反應物,並且其中該熱ALE製程及該額外熱ALE製程係在沒有該第一反應物、該第二反應物、及該第三反應物之電漿激發的情況下實施。
  17. 一種基板處理方法,包含: 將一ZrO2 膜沉積於一基板之上; 將一Al2 O3 膜沉積於該ZrO2 膜之上; 使用熱原子層蝕刻(ALE)製程啟動該Al2 O3 膜之蝕刻步驟,該熱ALE製程相對於該ZrO2 膜選擇性蝕刻該Al2 O3 膜;以及 使用該熱ALE製程移除該Al2 O3 膜,其中該蝕刻步驟自終結於該Al2 O3 膜與該ZrO2 膜之介面。
  18. 如請求項17之基板處理方法,其中該熱ALE製程包含HF與Al(CH3 )3 之交替氣體暴露。
  19. 如請求項17之基板處理方法,其中該ZrO2 膜具有接近一單層的均勻厚度。
  20. 如請求項17之基板處理方法,進一步包含: 在該移除步驟之後,使用一額外熱ALE製程蝕刻該ZrO2 膜,該額外熱ALE製程包含HF與Al(CH3 )2 Cl之交替氣體暴露。
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