TW202135173A - 具局部外金屬層的半導體封裝結構及其製法 - Google Patents

具局部外金屬層的半導體封裝結構及其製法 Download PDF

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TW202135173A
TW202135173A TW109108482A TW109108482A TW202135173A TW 202135173 A TW202135173 A TW 202135173A TW 109108482 A TW109108482 A TW 109108482A TW 109108482 A TW109108482 A TW 109108482A TW 202135173 A TW202135173 A TW 202135173A
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substrate
metal layer
sub
semiconductor package
chambers
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TW109108482A
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陳詩駿
曾生斗
徐坤基
巫勤達
陳盈霖
吳定曄
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力成科技股份有限公司
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Priority to TW109108482A priority Critical patent/TW202135173A/zh
Priority to US17/094,101 priority patent/US11410945B2/en
Publication of TW202135173A publication Critical patent/TW202135173A/zh

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Abstract

本發明係一種具局部外金屬層的半導體封裝結構及其製法，於封裝製法中，以一特殊的封裝基板或或以一特殊的定位板對多個半導體裝置進行封裝，令多個半導體裝置的封裝體在同一道步驟中快速且完整地形成局部金屬層。

Description

具局部外金屬層的半導體封裝結構及其製法
本發明係關於一種具外金屬層的半導體封裝結構及其製法，尤指一種具局部外金屬層的半導體封裝結構及其製法。
因應藍芽5G或WIFI 5G應用IC的設計，半導體封裝結構需要整合高頻元件於其中，為避免高頻元件(如天線)干擾晶片運作，必須進行訊號隔離。
請參閱圖7A所示，將多個整合有天線元件的半導體封裝結構90黏貼於一定位板91上，其中各該半導體封裝結構90係於一基板901上分別設置有一晶片902及一天線元件903，該晶片902及該天線元件903係由同一封膠體904包覆；再準備多個光罩92，並將該些光罩92分別對準該些半導體封裝結構90，黏貼於該定位板91上，各該光罩92係覆蓋該封膠體904部分外側，即對應其天線元件903的位置；接著，如圖7B所示，對該封膠體904的其他部分的外側形成一金屬層93。於移除該些光罩92後，如圖7C所示，即構成一個具有部分金屬遮蔽層的半導體封裝結構90’。
然而，上述於半導體封裝結構的封膠層外形成局部金屬層的製程步驟過於費時，主要因為將多個半導體封裝結構分別黏設在定位板後，再將光罩一一對位設置在對應的半導體封裝結構；此外，若光罩對位出現誤差，則金屬層無法形成在正確位置，造成屏蔽電磁訊號能力減弱；因此，有必要進一改良之。
有鑑於上述具局部金屬層的半導體封裝結構的製法過於費時及良率不佳，本發明主要目的係提供一種新的具局部外金屬層的半導體封裝結構及其製法。
欲達上述目的所使用的主要技術手段係令該具局部外金屬層的半導體封裝結構包含： 一基板，係包含一第一子基板及一第二子基板；其中該第二子基板係自該第一子基板的一側水平向外延伸，且該第二子基板的寬度小於該第一子基板； 一高頻元件，係接合在該基板的第一子基板上； 一晶片，係接合在該基板的第二子基板上； 一封膠體，係形成於該基板上，並包覆該晶片及該高頻元件；以及 一金屬層，係覆蓋對應該第二子基板的該封膠體外側。
由上述說明可知，本發明具局部外金屬層的半導體封裝結構係主要使用特殊形狀的基板，讓供晶片設置的第一子基板尺寸較小，方便於封裝製程中快速且完整地於對應晶片位置的該封膠體外側形成金屬層，該金屬層提供該晶片不受電磁訊號干擾的遮蔽層用。
欲達上述目的所使用的主要技術手段係令該具局部外金屬層的半導體封裝結構的製法係包含以下步驟： (a) 提供一封裝基板；其中該基板係形成至少一長槽及多個與該長槽連通的短槽，該些短槽係等距平行排列，且二相鄰短槽之間為一元件接合區； (b) 將多個晶片分別接合在該基板上的對應元件接合區內，各該晶片靠近該長槽，且將多個高頻元件接合在對應元件接合區外，且各該高頻元件係遠離該長槽； (c) 於該封裝基板上形成一封膠體，以覆蓋該封裝基板上的該些晶片及該些高頻元件； (d) 於該封膠體上對應各該元件接合區形成金屬層；以及 (e) 沿各該短槽的方向進行切割，以分離出多個具局部外金屬層的半導體封裝結構。
由上述說明可知，本發明製法係主要提供一特殊設計的封裝基板，於該些晶片及高頻元件接合於該封裝基板上，並形成封膠體後，可在同一步驟中，快速且完整地將該封膠體上對應各該元件接合區形成金屬層，接著再進行切割步驟，將大量具有外金屬層的半導體封裝結構分離出來。
欲達上述目的所使用的主要技術手段係令該具局部外金屬層的半導體封裝結構的另一製法係包含以下步驟： (a) 提供一定位板，該定位板形成有多個定位槽，各該定位槽包含有一第一容室及一第二容室，該第一容室較第二容室大； (b) 將多個半導體封裝結構分別設置於對應的定位槽內；其中各該半導體封裝結構包含有一基板、一晶片、一高頻元件及一包覆該晶片及該高頻元件的封膠體，各該半導體封裝結構中對應高頻元件的封膠體部分係匹配容置於對應的第二容室，而各該半導體封裝結構中對應晶片的封膠體部分係容置在對應的第一容室，且其三外側邊係與第一容室保持一間隙； (c) 封閉該些第二容室； (d) 對位在該些第一容室的半導體封裝結構的封膠體部分形成金屬層；以及 (e) 開啟該些第二容室，取出各該半導體封裝結構。
由上述說明可知，本發明製法係主要提供一特殊設計的定位板，將整合有晶片及高頻元件的半導體封裝元件分別設置在該定位板的定位槽內，並令各該半導體封裝元件的高頻元件對應定位槽的第二容室內，而各該半導體封裝元件的晶片則對應該定位槽的較大的第一容室內，因此該半導體封裝元件外側與該第一容室的內側壁有間距，當封閉該些第二容室，只剩該些第一容室外露，即可在同一步驟對外露的該些第一容室形成金屬層，之後開啟第二容室，即可大量地取出具有外金屬層的半導體封裝結構。
本發明係針對具局部金屬層的半導體封裝結構提出新的製法及其製品，以解決既有製法費時及良率不佳等問題，以下謹配合數個實施例及圖式詳加說明本發明技術內容。
首先請參閱圖1A、圖1B及圖1C所示，係為本發明具局部金屬層的半導體封裝結構1的第一實施例，其包含有：一基板10、一高頻元件20、一晶片30、一封膠體40及一金屬層50。
上述基板10係包含一第一子基板11及一第二子基板12；其中該第二子基板12係自該第一子基板11的一側邊水平向外延伸，且該第二子基板12的寬度小於該第一子基板；於本實施例，該基板10係呈一”凸”字型。
上述高頻元件20係接合在該基板10的第一子基板11上；於本實施例，該高頻元件20係為一天線，例如應用於藍芽5G或WIFI 5G的通訊用天線，但不以此為限。
上述晶片30係接合在該基板10的第二子基板12上；於本實施例，該晶片30係以打線方式接合於該第二子基板12上，亦可採覆晶接合方式，故不以此為限。
上述封膠體40係形成該基板10上，並包覆該晶片30及該高頻元件20；於本實施例，係以模壓方式形成該封膠層40。
上述金屬層50係形成於對應該第二子基板12的該封膠體40外側；於本實施例，該金屬層50係進一步覆蓋該第二子基板12外側邊，以及與該第二子基板12相鄰的該第一子基板11的該外側邊。
以下進一步說明上述局部金屬層50的半導體封裝結構的製法，請配合參閱圖2A至圖2G所示，本發明半導體封裝結構1的製法係包含以下步驟(a)至步驟(e)。
於步驟(a)，如圖2A所示，提供一封裝基板10’；其中該封裝基板10’係形成至少一長槽13及多個與該長槽13連通的短槽14，該些短槽14係等距平行排列，且二相鄰短槽14之間為一元件接合區100。於本實施例，該長槽13與對應短槽14係構成一梳子狀長槽，該封裝基板10’係包含三條並列的梳子狀長槽。
於步驟(b)，如圖2B所示，將多個晶片30分別設置在該封裝基板10’上的對應元件接合區100內，各該晶片30靠近該長槽13，且將多個高頻元件20設置在對應元件接合區100外，各該高頻元件20係遠離該長槽13。
於步驟(c)，如圖2B所示，於該封裝基板10’上形成一封膠體40’，以覆蓋該封裝基板10’上的該些晶片30及該些高頻元件20。於本實施例，以模壓方式形成該封膠層40’，其中模壓用模具係匹配該封裝基板10’上的梳子狀長槽，使得該封膠體40’形狀可匹配該封裝基板10’形狀，於壓模後仍維持該梳子狀長槽外露。
於步驟(d)，如圖2B至圖2E所示，於該封膠體40’上對應各該元件接合區100形成金屬層50’。於本實施例，先準備三條膠帶60，將各該膠帶60黏貼在對應該些高頻元件20的該封膠體40’上，並與對應長槽13平行，如圖2D所示，再以濺鍍或噴塗方式將金屬離子51沉積在該外露的封裝基板10’部分、該些膠帶60、外露的封膠體40’部分及外露在梳子狀長槽的封裝基板10’側邊；如此，如圖2E所示，該封膠體40’上對應所有的元件接合區100即可一次形成金屬層50’，且該元件接合區100的頂面及三個外側邊均完整地形成有金屬層50’；接著，再移除該些膠帶60，即對應該高頻元件20的封膠體40’部分沒有形成金屬層。
於步驟(e)，如圖2F及圖2G所示，沿各該短槽14的方向進行切割，以分離出多個具局部外金屬層的半導體封裝結構1。於本實施例，切割路徑係對準各該短槽14之寬度的中間，以確保對應各該晶片30的封膠體40部分的兩外側邊的金屬層50’可完整地保留，故本實施例提供的製品即構成一”凸”字型。
再請參閱圖3A至圖3E，本發明半導體封裝結構的製法的第二較佳實施例，其步驟(a)至(c)均與第一實施例相同，以下謹進一步說明步驟 (d)及步驟(e)。
於步驟(d)，如圖3A至及圖3C所示，以濺鍍或噴塗方式將金屬離子51對外露的封裝基板10’部分、該封膠體40’及外露在梳子狀長槽的封裝基板10’側邊形成金屬層50’，再如圖3C所示，再以研磨工具研磨對應該些高頻元件20的該封膠體40’部分上的金屬層50’，使對應該些高頻元件20的該封膠體40’外露；此外，亦可使用如雷射、蝕刻等其他金屬移除方式。
於步驟(e)，如圖3D及圖3E所示，沿各該短槽14的方向進行切割，以分離出多個具局部外金屬層的半導體封裝結構1。於本實施例，切割路徑係對準各該短槽14之寬度的中間，以確保對應各該晶片30的封膠體40’部分的兩外側邊的金屬層50’可完整地保留，故本實施例提供的製品即構成一”凸”字型。
請參閱圖4所示，係為本發明具局部金屬層的半導體封裝結構1a的第二實施例，其包含有：一基板10a、一高頻元件20、一晶片30、一封膠體40及一金屬層50；其中該晶片30及高頻元件20係分別接合於該基板10a上，該封膠體40係形成於該基板10a上，並包覆該晶片30及高頻元件20；於本實施例，該半導體封裝結構1a呈一長矩形狀。
請配合參閱圖5A至圖5F所示，係為本發明半導體封裝結構1a的製法，其包含以下步驟(a)至步驟(e)。
於步驟(a)，如圖5A所示，先提供一定位板70，該定位板70形成有多個定位槽71，各該定位槽71包含有一第一容室711及一第二容室712，該第一容室711較第二容室712大；於本實施例，該定位板70上的該定位槽71係排列成三列，但不以此為限。
於步驟(b)，如圖5B所示，將多個半導體封裝結構1a’分別設置於對應的定位槽71內；其中各該半導體封裝結構1a’包含有一基板10a、一晶片30、一高頻元件20及一包覆該晶片30及該高頻元件20的封膠體40，各該半導體封裝結構1a’中對應高頻元件20的封膠體40部分係匹配容置於對應的第二容室712，而各該半導體封裝結構1a’中對應晶片30的封膠體40部分係容置於對應的第一容室711，即各該半導體封裝結構1a’對應該晶片30的封膠體40部分的三個外側邊係分別與該第一容室711保持間隙。
於步驟(c)，如圖5C所示，封閉該些第二容室712；於本實施例係提供一遮罩80，以該遮罩80覆蓋該定位板70，並封閉該些第二容室712；其中該遮罩80係形成有多條長開口81，該些長開口81係分別對準對應列的該些第一容室711，該些第一容室711使外露，並蓋合該些第二容室712，遮蔽對應該些高頻元件20的封膠體40部分。再如圖6所示，係為本發明另一實施例，即可以膠帶60對準該些第二容室712並黏貼在定位板70上，即可遮蔽對應該些高頻元件20的封膠體部分。
於步驟(d)，如圖5D及圖5E所示，對位在該些第一容室711的半導體封裝結構的封膠體40部分形成金屬層50’；於本實施例，以濺鍍或噴塗方式將金屬離子51沉積在遮罩80及外露於遮罩長開口81的定位板70部分、位在該些第一容室711的半導體封裝結構的封膠體40部分及位在該些第一容室711的半導體封裝結構的基板10a側邊；如此，所有半導體封裝結構中對應晶片30的封膠體40部分即可一次形成金屬層50’，甚至對應該晶片30的基板10a側邊也形成有金屬層50’。
於步驟(e)，如圖5E及圖5F所示，開啟該些第二容室712，取出各該具局部外金屬層的半導體封裝結構1a；於本實施例，將遮罩80移除，即可取出多個該具局部外金屬層的半導體封裝結構1a；同理，如圖6所示，於步驟(d)結束後，撕開膠帶60，同樣可取出多個該具局部外金屬層的半導體封裝結構1a。
綜上所述，本發明以特殊的封裝基板及定位板，進行多個半導體封裝結構的封裝製程或容置多個封裝半成品，將多個半導體封裝結構的封裝體快速且完整地形成局部金屬層。
以上所述僅是本發明的實施例而已，並非對本發明做任何形式上的限制，雖然本發明已以實施例揭露如上，然而並非用以限定本發明，任何所屬技術領域中具有通常知識者，在不脫離本發明技術方案的範圍內，當可利用上述揭示的技術內容作出些許更動或修飾為等同變化的等效實施例，但凡是未脫離本發明技術方案的內容，依據本發明的技術實質對以上實施例所作的任何簡單修改、等同變化與修飾，均仍屬於本發明技術方案的範圍內。
1:半導體封裝結構 1a:半導體封裝結構 1a’:半導體封裝結構 10:基板 10a:基板 10’:封裝基板 100:元件接合區 11:第一子基板 12:第二子基板 13:長槽 14:短槽 20:高頻元件 30:晶片 40:封膠體 40’:封膠體 50:金屬層 50’:金屬層 51:金屬離子 60:膠帶 70:定位板 71:定位槽 711:第一容室 712:第二容室 80:遮罩 81:長開口 90:半導體封裝結構 90’:半導體封裝結構 901:基板 902:晶片 903:天線元件 904:封膠體 91:定位板 92:光罩 93:金屬層
圖1A：本發明具有外金屬層的半導體封裝結構的第一實施例的一立體外觀圖。 圖1B：係圖1A沿著B-B割面線的一剖面圖。 圖1C：係圖1A沿著C-C割面線的一剖面圖。 圖2A至2G：本發明封裝方法之第一實施例的不同步驟的剖面圖。 圖3A至3E：本發明封裝方法之第二實施例的不同步驟的剖面圖。 圖4：本發明具有外金屬層的半導體封裝結構的第二實施例的一立體外觀圖。 圖5A至5F：本發明封裝方法之第三實施例的不同步驟的剖面圖。 圖6：本發明封裝方法之第四實施例的其中一步驟的剖面圖。 圖7A至圖7C：既有具有外金屬層的半導體封裝結構之製法的不同步驟的側視圖。
1:半導體封裝結構
10:基板
11:第一子基板
12:第二子基板
20:高頻元件
30:晶片
40:封膠體
50:金屬層

Claims (13)

  1. 一種具局部外金屬層的半導體封裝結構，包括： 一基板，係包含一第一子基板及一第二子基板；其中該第二子基板係自該第一子基板的一側水平向外延伸，且該第二子基板的寬度小於該第一子基板； 一高頻元件，係接合在該基板的第一子基板上； 一晶片，係接合在該基板的第二子基板上； 一封膠體，係形成於該基板上，並包覆該晶片及該高頻元件；以及 一金屬層，係覆蓋對應該第二子基板的該封膠體外側。
  2. 如請求項1所述之半導體封裝結構，其中：該金屬層係進一步覆蓋該第二子基板外側邊。
  3. 如請求項1或2所述之半導體封裝結構，其中：該金屬層係進一步覆蓋與該第二子基板相鄰的該第一子基板的外側邊。
  4. 如請求項1所述之半導體封裝結構，其中：該高頻元件係為天線。
  5. 一種具局部外金屬層的半導體封裝結構的製法，包括： (a) 提供一封裝基板；其中該基板係形成至少一長槽及多個與該長槽連通的短槽，該些短槽係等距平行排列，且二相鄰短槽之間為一元件接合區； (b) 將多個晶片分別接合在該基板上的對應元件接合區內，各該晶片靠近該長槽，且將多個高頻元件接合在對應元件接合區外，且各該高頻元件係遠離該長槽； (c) 於該封裝基板上形成一封膠體，以覆蓋該封裝基板上的該些晶片及該些高頻元件； (d) 於該封膠體上對應各該元件接合區形成金屬層；以及 (e) 沿各該短槽的方向進行切割，以分離出多個具局部外金屬層的半導體封裝結構。
  6. 如請求項5所述之半導體封裝結構的製法，其中：該步驟(d)係包含： (d1) 準備至少一膠帶； (d2) 將各該膠帶黏貼在對應該些高頻元件的該封膠體部分上，並與對應長槽平行； (d3) 於該至少一膠帶及外露的封膠體部分上形成一金屬層；以及 (d4) 移除該至少一膠帶。
  7. 如請求項5所述之半導體封裝結構的製法，其中：該步驟(d)係包含： (d1) 於該封膠體上形成一金屬層；以及 (d2) 移除對應該些高頻元件之該封膠體上的金屬層部分。
  8. 如請求項7所述之半導體封裝結構的製法，其中：該步驟(d2)係以研磨方式移除該金屬層部分。
  9. 如請求項6至8中任一項所述之半導體封裝結構的製法，其中：該金屬層係以濺鍍或噴塗成形之。
  10. 一種局部外金屬層的半導體封裝結構的製法，包括： (a) 提供一定位板，該定位板形成有多個定位槽，各該定位槽包含有一第一容室及一第二容室，該第一容室較第二容室大； (b) 將多個半導體封裝結構分別設置於對應的定位槽內；其中各該半導體封裝結構包含有一基板、一晶片、一高頻元件及一包覆該晶片及該高頻元件的封膠體，各該半導體封裝結構中對應高頻元件的封膠體部分係匹配容置於對應的第二容室，而各該半導體封裝結構中對應晶片的封膠體部分係容置在對應的第一容室，且其三外側邊係與第一容室保持一間隙； (c) 封閉該些第二容室； (d) 對位在該些第一容室的半導體封裝結構的封膠體部分形成金屬層；以及 (e) 開啟該些第二容室，取出各該半導體封裝結構。
  11. 如請求項10所述之半導體封裝結構的製法，其中： 於該步驟(a)中，該定位板上的該定位槽係排列成多列；以及 於該步驟(c)中，以一遮罩覆蓋該定位板；其中該遮罩係形成有多條長開口，該些長開口係分別對準對應列的該些第一容室，該些第一容室使外露，並蓋合該些第二容室。
  12. 如請求項10所述之半導體封裝結構的製法，其中： 於該步驟(a)中，該定位板上的該定位槽係排列成多列；以及 於該步驟(c)中，以一膠帶貼合各列的該些第二容室，該些第二容室封閉，但該些第一容室外露。
  13. 如請求項10所述之半導體封裝結構的製法，其中：該步驟(d)係對該定位板濺鍍或噴塗金屬離子，對位在該些第一容室的半導體封裝結構的封膠體部分形成金屬層。
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