TW202131524A - Metal capacitor - Google Patents

Metal capacitor Download PDF

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TW202131524A
TW202131524A TW109103780A TW109103780A TW202131524A TW 202131524 A TW202131524 A TW 202131524A TW 109103780 A TW109103780 A TW 109103780A TW 109103780 A TW109103780 A TW 109103780A TW 202131524 A TW202131524 A TW 202131524A
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electrode
electrodes
metal layer
sheet
electrode sheet
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TW109103780A
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TWI772741B (en
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陳重光
李家慶
黃建福
胡家銘
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旺宏電子股份有限公司
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Abstract

A metal capacitor is provided. The metal capacitor includes a first metal layer and a second metal layer, which are formed on a substrate. The first metal layer includes a first electrode sheet and a second electrode sheet, and the second metal layer includes a third electrode sheet and a fourth electrode sheet. A first horizontal capacitor is formed between the first electrode sheet and the second electrode sheet. A second horizontal capacitor is formed between the third electrode sheet and the fourth electrode sheet. At least part of the fourth electrode sheet is above the first electrode sheet, and a first vertical capacitor is formed between the first electrode sheet and the fourth electrode sheet. At least part of the third electrode sheet is above the second electrode sheet, and a second vertical capacitor is formed between the second electrode sheet and the third electrode sheet.

Description

金屬電容Metal capacitor

本發明是有關於一種金屬電容,且特別是有關於一種利用電容寄生效應所形成的金屬電容。The present invention relates to a metal capacitor, and more particularly to a metal capacitor formed by the parasitic effect of the capacitor.

在類比電路中,經常出現內部電路需要的工作電壓高於系統所接收的電源電壓Vdd的情形。例如,記憶體電路接收的電源電壓Vdd為3V,但要進行選取操作、寫入操作、抹除操作時,則可能需要5V、10V、12V等高電壓。因此,電荷泵(charge pump)經常用於類比電路中,在電源電壓(可能由電池提供)比工作電壓低時可以產生工作電壓。In analog circuits, it often happens that the operating voltage required by the internal circuit is higher than the power supply voltage Vdd received by the system. For example, the power supply voltage Vdd received by the memory circuit is 3V, but high voltages such as 5V, 10V, 12V, etc. may be required for selecting, writing, and erasing operations. Therefore, charge pumps are often used in analog circuits to generate operating voltages when the power supply voltage (which may be provided by the battery) is lower than the operating voltage.

請參見第1圖,其係電荷泵倍壓電路的示意圖。電荷泵倍壓電路10包含多級電荷泵10a。隨著相序相反的時脈信號clk、clkb輪流驅動,後級的電荷泵10a產生的電壓也越來越高。電荷泵倍壓電路10所包含的電荷泵10a的個數,可根據電源電壓Vdd與輸出電壓Vout的值而決定。Please refer to Figure 1, which is a schematic diagram of the charge pump voltage doubler circuit. The charge pump voltage doubler circuit 10 includes a multi-stage charge pump 10a. As the clock signals clk and clkb with opposite phase sequence are driven in turn, the voltage generated by the charge pump 10a of the subsequent stage is also higher and higher. The number of charge pumps 10a included in the charge pump voltage doubler circuit 10 can be determined according to the values of the power supply voltage Vdd and the output voltage Vout.

在第1圖中,每個電荷泵10a各自包含串接的二級反向驅動器、升壓電容(boot capacitor)Cb與接成二極體形式的傳輸電晶體(Pass MOS)。升壓電容Cb的兩端分別接收升壓電壓(boost voltage)Vb與時脈驅動信號(driving clock signal)clkd。在電荷泵10a中,升壓電容Cb需占用較大的面積。因此,若能減少升壓電容Cb的面積,便可降低半導體電路的生產成本。In Figure 1, each charge pump 10a includes a two-stage reverse driver connected in series, a boost capacitor Cb, and a pass MOS connected in the form of a diode. Both ends of the boost capacitor Cb respectively receive a boost voltage (boost voltage) Vb and a clock driving signal (driving clock signal) clkd. In the charge pump 10a, the boost capacitor Cb needs to occupy a larger area. Therefore, if the area of the boost capacitor Cb can be reduced, the production cost of the semiconductor circuit can be reduced.

本發明係有關於一種利用閒置的金屬層的電容寄生效應作為金屬電容。此種金屬電容可搭配電晶體電容使用,在無需使用額外面積的情況下提升電容值。The present invention relates to a use of the capacitance parasitic effect of an idle metal layer as a metal capacitor. This kind of metal capacitors can be used with transistor capacitors to increase the capacitance value without using additional area.

根據本發明之第一方面,提出一種金屬電容,包含:第一金屬層與第二金屬層。第一金屬層設置於基板的上方,且第二金屬層設置於第一金屬層的上方。第一金屬層包含:第一電極片以及第二電極片。第一平面電容形成於第一電極片與第二電極片之間。第二金屬層包含:第三電極片以及第四電極片。第二平面電容形成於第三電極片與第四電極片之間。其中,第四電極片的至少一部份位於第一電極片的上方,且第一縱向電容形成於第一電極片與第四電極片之間。第三電極片的至少一部份位於第二電極片的上方,且第二縱向電容形成於第二電極片與第三電極片之間。According to the first aspect of the present invention, a metal capacitor is provided, including: a first metal layer and a second metal layer. The first metal layer is disposed above the substrate, and the second metal layer is disposed above the first metal layer. The first metal layer includes: a first electrode sheet and a second electrode sheet. The first planar capacitor is formed between the first electrode sheet and the second electrode sheet. The second metal layer includes: a third electrode sheet and a fourth electrode sheet. The second planar capacitor is formed between the third electrode sheet and the fourth electrode sheet. Wherein, at least a part of the fourth electrode sheet is located above the first electrode sheet, and the first longitudinal capacitor is formed between the first electrode sheet and the fourth electrode sheet. At least a part of the third electrode sheet is located above the second electrode sheet, and the second longitudinal capacitor is formed between the second electrode sheet and the third electrode sheet.

根據本發明之第二方面,提出一種金屬電容,包含 :設置於電晶體電容上方的至少一金屬層。至少一金屬層包含:第一電極片以及一第二電極片。其中,第一電極片接收第一電壓,且第二電極片接收第二電壓。According to a second aspect of the present invention, a metal capacitor is provided, including: at least one metal layer disposed above the transistor capacitor. The at least one metal layer includes: a first electrode sheet and a second electrode sheet. Wherein, the first electrode sheet receives the first voltage, and the second electrode sheet receives the second voltage.

為了對本發明之上述及其他方面有更佳的瞭解,下文特舉實施例,並配合所附圖式詳細說明如下:In order to have a better understanding of the above and other aspects of the present invention, the following specific examples are given in conjunction with the accompanying drawings to describe in detail as follows:

在半導體電路中,通常使用MOS電晶體作為電容。但使用MOS電晶體作為電容時,需額外占用面積。因此,如何能在半導體電路中,減少升壓電容Cb的面積為一重要課題。為便於說明,本文將利用MOS電晶體實現的電容稱為電晶體電容C_MOS。In semiconductor circuits, MOS transistors are usually used as capacitors. However, when MOS transistors are used as capacitors, additional area is required. Therefore, how to reduce the area of the boost capacitor Cb in a semiconductor circuit is an important issue. For the convenience of description, this article will use MOS transistors to realize the capacitance called transistor capacitance C_MOS.

在記憶體電路中,為能對記憶胞進行存取,通常設有多層金屬層。這些金屬層的設置主要用於對記憶胞電路的相關控制,但在非記憶體胞主要電路的電路(例如,電荷泵的電晶體電容C_MOS)中,並未使用這些金屬層。換言之,位於電晶體電容C_MOS上方的金屬層相當於被閒置。因此,本揭露利用此種位於電晶體電容C_MOS上方閒置的金屬層形成金屬電容C_MET。接著,將金屬電容C_MET與電晶體電容C_MOS加以並聯,達到提升升壓電容Cb之電容值的效果。同樣的,在其他使用電荷泵的電路中,若存在閒置的金屬層時,亦可用類似的方式達到提升升壓電容Cb之電容值的效果。In the memory circuit, in order to be able to access the memory cell, there are usually multiple metal layers. The arrangement of these metal layers is mainly used for the related control of the memory cell circuit, but these metal layers are not used in circuits other than the main circuit of the memory cell (for example, the transistor capacitor C_MOS of the charge pump). In other words, the metal layer above the transistor capacitor C_MOS is equivalent to being idle. Therefore, the present disclosure utilizes such an idle metal layer above the transistor capacitor C_MOS to form the metal capacitor C_MET. Then, the metal capacitor C_MET and the transistor capacitor C_MOS are connected in parallel to achieve the effect of increasing the capacitance value of the boost capacitor Cb. Similarly, in other circuits that use charge pumps, if there is an idle metal layer, a similar method can also be used to increase the capacitance value of the boost capacitor Cb.

請參見第2圖,其係將金屬電容C_MET與電晶體電容C_MOS並聯之示意圖。根據本揭露的實施例,升壓電容Cb包含金屬電容C_MET與電晶體電容C_MOS。Please refer to Figure 2, which is a schematic diagram of connecting the metal capacitor C_MET and the transistor capacitor C_MOS in parallel. According to the disclosed embodiment, the boost capacitor Cb includes a metal capacitor C_MET and a transistor capacitor C_MOS.

在電晶體電容C_MOS中,將電晶體的閘級連接至升壓電壓Vb,以及將電晶體的源極與汲極連接至時脈驅動信號clkd。另一方面,金屬電容C_MET的兩端分別接收升壓電壓Vb與時脈驅動信號clkd。因此,金屬電容C_MET與電晶體電容C_MOS並聯於升壓電壓Vb與時脈驅動信號clkd之間。為便於說明,本文將升壓電壓Vb定義為電壓V1,以及假設將時脈驅動信號clkd定義為電壓V2。In the transistor capacitor C_MOS, the gate of the transistor is connected to the boost voltage Vb, and the source and drain of the transistor are connected to the clock drive signal clkd. On the other hand, the two ends of the metal capacitor C_MET respectively receive the boosted voltage Vb and the clock driving signal clkd. Therefore, the metal capacitor C_MET and the transistor capacitor C_MOS are connected in parallel between the boosted voltage Vb and the clock driving signal clkd. For ease of description, this article defines the boost voltage Vb as the voltage V1, and assumes that the clock drive signal clkd is defined as the voltage V2.

將金屬電容C_MET與電晶體電容C_MOS並聯後,即可提升升壓電容Cb的電容值。根據模擬結果,採用金屬電容C_MET時,升壓電容Cb的電容值約可提升40%。由於金屬電容C_MET使用的是閒置的金屬層實現,並不會占用額外的面積。當升壓電容Cb利用金屬電容C_MET提供部分的電容值,則電晶體電容C_MOS所需的面積也可相對減少。After the metal capacitor C_MET and the transistor capacitor C_MOS are connected in parallel, the capacitance value of the boost capacitor Cb can be increased. According to the simulation results, when the metal capacitor C_MET is used, the capacitance value of the boost capacitor Cb can be increased by about 40%. Since the metal capacitor C_MET is implemented using an idle metal layer, it does not take up additional area. When the boost capacitor Cb uses the metal capacitor C_MET to provide part of the capacitance value, the area required by the transistor capacitor C_MOS can be relatively reduced.

請參見第3圖,其係利用電晶體電容上方的金屬層形成電極圖樣之示意圖。電晶體電容C_MOS包含多晶矽(poly)層31a、31c與擴散層(diffusion)31b。關於電晶體電容C_MOS的作法此處不予詳述。在電晶體電容C_MOS的上方包含至少一層金屬層MTL。金屬層MTL用來做為金屬電容C_MET。在本實施例中,假設電晶體電容C_MOS與金屬電容在x方向與y方向的寬度約為20 μm。然,應用本實施例之金屬層MTL的寬度數值與設計參數有關,且本發明之範圍並不受該些數值拘束。此外,金屬電容C_MET的位置在電晶體電容C_MOS的上方(z軸的正方向)。此處將電晶體電容C_MOS的層狀結構定義為一基板。Please refer to Figure 3, which is a schematic diagram of using the metal layer above the transistor capacitor to form an electrode pattern. The transistor capacitor C_MOS includes polysilicon (poly) layers 31a, 31c and a diffusion layer (diffusion) 31b. The operation of the transistor capacitor C_MOS will not be described in detail here. At least one metal layer MTL is included above the transistor capacitor C_MOS. The metal layer MTL is used as the metal capacitor C_MET. In this embodiment, it is assumed that the widths of the transistor capacitor C_MOS and the metal capacitor in the x direction and the y direction are about 20 μm. However, the width value of the metal layer MTL applied in this embodiment is related to the design parameters, and the scope of the present invention is not restricted by these values. In addition, the position of the metal capacitor C_MET is above the transistor capacitor C_MOS (the positive direction of the z-axis). Here, the layered structure of the transistor capacitor C_MOS is defined as a substrate.

在第3圖中,假設金屬層MTL1包含電極片ELED1、ELED2。在本文中,以右上-左下的斜紋網底表示用於接收電壓V1的電極(片),以及以點狀網底表示用於接收電壓V2的電極(片)。因此,在第3圖中,電極片ELED1用於接收電壓V1,且電極片ELED2接收電壓V2。由於電極片ELED1、ELED2接收不同電壓的緣故,在電極片ELED1、ELED2之間的空隙將累積電荷並形成電容寄生效應。因此,在電極片ELED1、ELED2之間將形成電容。In Figure 3, it is assumed that the metal layer MTL1 includes electrode pieces ELED1 and ELED2. In this article, the diagonal mesh bottom from the upper right to the lower left represents the electrode (sheet) for receiving the voltage V1, and the dot mesh bottom represents the electrode (sheet) for receiving the voltage V2. Therefore, in Figure 3, the electrode sheet ELED1 is used to receive the voltage V1, and the electrode sheet ELED2 receives the voltage V2. Since the electrode plates ELED1 and ELED2 receive different voltages, the gap between the electrode plates ELED1 and ELED2 will accumulate charges and form a capacitance parasitic effect. Therefore, a capacitance will be formed between the electrode sheets ELED1 and ELED2.

在本文中,將同一個金屬層的不同電極片之間所形成的電容定義為平面電容Ch。平面電容Ch的電容值和兩側電極片之間的相對表面積成正比,並與兩側電極片之間的距離比反比。因此,當電極片上的電極數量越多且間隔越密集時,可使平面電容Ch的電容值提升。In this article, the capacitance formed between different electrode sheets of the same metal layer is defined as the planar capacitance Ch. The capacitance value of the planar capacitor Ch is proportional to the relative surface area between the electrode plates on both sides, and inversely proportional to the distance ratio between the electrode plates on both sides. Therefore, when the number of electrodes on the electrode sheet is larger and the interval is denser, the capacitance value of the planar capacitor Ch can be increased.

當半導體電路包含多個金屬層時,除相同金屬層的不同電極片彼此間可能形成平面電容Ch外,跨金屬層之間的電極(片)若接收不同電壓時,電極(片)之間也可能形成電容寄生效應。本文將跨金屬層間所形成的電容定義為縱向電容Cv。When a semiconductor circuit includes multiple metal layers, in addition to the possibility of forming a planar capacitance Ch between different electrode pieces of the same metal layer, if the electrodes (pieces) between the metal layers receive different voltages, the electrodes (pieces) will also May form capacitance parasitic effects. This article defines the capacitance formed across the metal layers as the vertical capacitance Cv.

以記憶體電路為例,在電晶體電容的上方可能包含四層金屬層。根據本揭露的構想,這四層金屬層都可能包含兩個分別用於接收電壓V1、V2的電極片,且各電極片的形狀與所接收的電壓會根據所在的位置的不同而異。為便於說明,以下僅就金屬層與電極片之間的相對位置加以說明,不再重複繪式基板與金屬層之間的關係。Taking a memory circuit as an example, four metal layers may be included above the transistor capacitor. According to the concept of the present disclosure, each of the four metal layers may include two electrode plates for receiving voltages V1 and V2, respectively, and the shape of each electrode plate and the received voltage may vary depending on the location. For ease of description, only the relative position between the metal layer and the electrode sheet will be described below, and the relationship between the substrate and the metal layer will not be repeated.

另請留意,為便於說明電極片的電極圖樣與金屬層的位置關係,本文假設x軸、y軸、z軸方向分別對應於半導體電路的長度方向、寬度方向、高度方向。其中,不同的金屬層代表在z軸上的位置不同。實際應用時,電極圖樣與金屬層所對應的方向、相對位置等,均可視實際應用而異。Please also note that in order to facilitate the description of the positional relationship between the electrode pattern of the electrode sheet and the metal layer, this article assumes that the x-axis, y-axis, and z-axis directions correspond to the length, width, and height directions of the semiconductor circuit, respectively. Among them, different metal layers represent different positions on the z-axis. In actual application, the direction and relative position of the electrode pattern and the metal layer may vary depending on the actual application.

請參見第4圖,其係於兩個金屬層上設置電極片,進而根據電極片的電容圖樣產生電容效果的一種實施例之示意圖。此圖式假設基板上方有兩個金屬層MTL1、MTL2,其中金屬層MTL1位於設置於基板的上方,且金屬層MTL2位於金屬層MTL1的上方。再者,金屬層MTL1包含電極片ELED1、ELED2;金屬層MTL2包含電極片ELED3、ELED4。其中,電極片ELED1、ELED3接收電壓V1,而電極片ELED2、ELED4接收電壓V2。Please refer to FIG. 4, which is a schematic diagram of an embodiment in which electrode plates are arranged on two metal layers, and then a capacitance effect is generated according to the capacitance pattern of the electrode plates. This figure assumes that there are two metal layers MTL1 and MTL2 above the substrate, where the metal layer MTL1 is located above the substrate, and the metal layer MTL2 is located above the metal layer MTL1. Furthermore, the metal layer MTL1 includes electrode pieces ELED1 and ELED2; the metal layer MTL2 includes electrode pieces ELED3 and ELED4. Among them, the electrode pieces ELED1 and ELED3 receive the voltage V1, and the electrode pieces ELED2 and ELED4 receive the voltage V2.

在此圖式右上角的放大圖可以看出,在金屬層MTL2上,因為電極片ELED3、ELED4分別接收電壓V1、V2的緣故,在電極片ELED3、ELED4之間形成平面電容Ch。同理,在金屬層MTL1上,因為電極片ELED1、ELED2分別接收電壓V1、V2的緣故,在電極片ELED1、ELED2之間也將形成平面電容Ch。It can be seen from the enlarged view in the upper right corner of this drawing that on the metal layer MTL2, because the electrode plates ELED3 and ELED4 receive the voltages V1 and V2, respectively, a planar capacitor Ch is formed between the electrode plates ELED3 and ELED4. Similarly, on the metal layer MTL1, since the electrode plates ELED1 and ELED2 receive the voltages V1 and V2, respectively, a planar capacitor Ch will also be formed between the electrode plates ELED1 and ELED2.

除了在各個金屬層所形成的平面電容外,在本案中,跨金屬層之間,亦可藉由電極所在位置的配置而產生電容。例如,在此圖式的電極片ELED1、ELED2、ELED3、ELED4中,若金屬層MTL2上的電極片的電極所接收的電壓,與其相對位置之金屬層MTL1上的電極片的電極所接收的電壓不同時,在這兩個電極之間就會形成縱向電容Cv。In addition to the planar capacitors formed in each metal layer, in this case, across the metal layers, the capacitance can also be generated by the arrangement of the positions of the electrodes. For example, in the electrode sheets ELED1, ELED2, ELED3, ELED4 in this figure, if the voltage received by the electrode of the electrode sheet on the metal layer MTL2, the voltage received by the electrode of the electrode sheet on the metal layer MTL1 at the opposite position At different times, a longitudinal capacitance Cv is formed between the two electrodes.

以兩層的金屬層MTL1、MTL2為例,電極片ELED4的至少一部份位於電極片ELED1的上方。由於電極片ELED1與電極片ELED4分別接收電壓V1與電壓V2的緣故,在電極片ELED1與電極片ELED4之間的重疊位置上形成縱向電容Cv。同樣的,由於電極片ELED3的至少一部份位於電極片ELED2上方的緣故,在電極片ELED2與電極片ELED3之間的重疊位置上形成另一個縱向電容Cv。Taking the two metal layers MTL1 and MTL2 as an example, at least a part of the electrode sheet ELED4 is located above the electrode sheet ELED1. Since the electrode piece ELED1 and the electrode piece ELED4 receive the voltage V1 and the voltage V2, respectively, a longitudinal capacitance Cv is formed at the overlapping position between the electrode piece ELED1 and the electrode piece ELED4. Similarly, since at least a part of the electrode sheet ELED3 is located above the electrode sheet ELED2, another longitudinal capacitor Cv is formed at the overlapping position between the electrode sheet ELED2 and the electrode sheet ELED3.

在第4圖的電極片ELED1、ELED2、ELED3、ELED4中,有一部分電極的邊界以較粗的線條標示,另一部分電極的邊界以較細的線條標示。該些以較粗的線條所標示的電極,將與其z軸方向(上方/下方)相對應位置的電極之間形成縱向電容Cv。另一方面,該些以較細的線條所標示的電極,並不會與其z軸方向(上方/下方)相對應位置的電極之間形成縱向電容Cv。關於電極所在位置與是否產生縱向電容的進一步細節,將於下文中以較詳細的例子說明。In the electrode sheets ELED1, ELED2, ELED3, and ELED4 in Figure 4, the boundaries of some of the electrodes are marked with thicker lines, and the boundaries of the other part of the electrodes are marked with thinner lines. The electrodes marked with thicker lines will form a longitudinal capacitance Cv between the electrodes at positions corresponding to the z-axis direction (upper/lower). On the other hand, the electrodes marked with thinner lines do not form a longitudinal capacitance Cv between the electrodes at positions corresponding to the z-axis direction (upper/lower). Further details on the location of the electrodes and whether longitudinal capacitance is generated will be described in more detail below with a more detailed example.

在第4圖中,電極片ELED1、ELED3具有相似的電極圖樣,且電極片ELED2、ELED4具有相似的電極圖樣。即,在金屬層MTL1、MTL2中,同樣用於接收電壓V1的電極片(ELED1、ELED3)的電極圖樣彼此相似;以及,在金屬層MTL1、MTL2中,同樣用於接收電壓V2的電極片(ELED2、ELED4)的電極圖樣彼此相似。In Figure 4, the electrode sheets ELED1 and ELED3 have similar electrode patterns, and the electrode sheets ELED2 and ELED4 have similar electrode patterns. That is, in the metal layers MTL1, MTL2, the electrode patterns of the electrode plates (ELED1, ELED3) that are also used to receive the voltage V1 are similar to each other; and, in the metal layers MTL1, MTL2, the electrode plates (ELED1, ELED3) that are also used to receive the voltage V2 ( The electrode patterns of ELED2, ELED4) are similar to each other.

根據第4圖所示,在電極片ELED1、ELED2、ELED3、ELED4彼此形成多個平面電容Ch與縱向電容Cv。關於這些電極片ELED1、ELED2、ELED3、ELED4之間如何形成平面電容Ch與縱向電容Cv,以及該些平面電容Ch與縱向電容Cv之間的連接關係,將於第5A、5B、5C、5D圖說明。As shown in Fig. 4, a plurality of planar capacitors Ch and vertical capacitors Cv are formed on the electrode sheets ELED1, ELED2, ELED3, and ELED4. Regarding how the planar capacitor Ch and the longitudinal capacitor Cv are formed between the electrode sheets ELED1, ELED2, ELED3, and ELED4, and the connection relationship between the planar capacitor Ch and the longitudinal capacitor Cv, we will see Figures 5A, 5B, 5C, and 5D. illustrate.

請參見第5A、5B、5C、5D圖,其係兩個金屬層上的電極片彼此形成互容之示意圖。關於第4圖所描述之,關於電極片ELED1、ELED2、ELED3、ELED4之相對位置與所形成之平面電容Ch、縱向電容Cv的關係,可整理如第5A圖所示。Please refer to Figures 5A, 5B, 5C, and 5D, which are schematic diagrams showing that the electrode plates on the two metal layers form mutual capacitance with each other. Regarding the description in Figure 4, the relationship between the relative positions of the electrode sheets ELED1, ELED2, ELED3, and ELED4 and the formed planar capacitance Ch and the vertical capacitance Cv can be organized as shown in Figure 5A.

在金屬層MTL1上,由於電極片ELED1、ELED2接收的電壓不同,在電極片ELED1、ELED2之間形成平面電容Ch1;以及,在金屬層MTL2上,由於電極片ELED3、ELED4接收的電壓不同,在電極片ELED3、ELED4之間形成平面電容Ch2。在金屬層MTL1、MTL2之間,在電極片ELED1、ELED4之間形成縱向電容Cv1;以及,在電極片ELED2、ELED3之間形成縱向電容Cv2。On the metal layer MTL1, due to the different voltages received by the electrode plates ELED1 and ELED2, a planar capacitor Ch1 is formed between the electrode plates ELED1 and ELED2; and, on the metal layer MTL2, due to the different voltages received by the electrode plates ELED3 and ELED4, A planar capacitor Ch2 is formed between the electrode sheets ELED3 and ELED4. Between the metal layers MTL1 and MTL2, a vertical capacitor Cv1 is formed between the electrode pieces ELED1 and ELED4; and a vertical capacitor Cv2 is formed between the electrode pieces ELED2 and ELED3.

從側面(x-z平面)觀察第5A圖的平面電容Ch1、C2與縱向電容Cv1、Cv2之間的關係,可整理如第5B圖所示。又,基於電極片ELED1、ELED3同樣接收電壓V1的緣故,第5B圖中的電極片ELED1、ELED3具有相同電壓。據此,第5B圖可簡化為第5C圖。同理,基於電極片ELED2、ELED4同樣接收電壓V2的緣故,第5C圖中的電極片ELED2、ELED4具有相同電壓。據此,第5C圖可再簡化為第5D圖。Observing the relationship between the planar capacitors Ch1 and C2 and the longitudinal capacitors Cv1 and Cv2 in Fig. 5A from the side (x-z plane), it can be organized as shown in Fig. 5B. In addition, since the electrode pieces ELED1 and ELED3 also receive the voltage V1, the electrode pieces ELED1 and ELED3 in Figure 5B have the same voltage. Accordingly, Figure 5B can be simplified to Figure 5C. In the same way, since the electrode plates ELED2 and ELED4 also receive the voltage V2, the electrode plates ELED2 and ELED4 in Figure 5C have the same voltage. Accordingly, Figure 5C can be further simplified into Figure 5D.

根據第5A、5B、5C、5D圖的說明可以得知,藉由在金屬層MTL1、MTL2上對電極片ELED1、ELED2、ELED3、ELED4的電極圖樣加以設計,可產生多個電容(包含縱向電容Cv、平面電容Ch)並聯的效果。也就是說,此種對既有未使用的金屬層加以設計而利用電極圖樣之間所形成的電容寄生效應,確實可用來作為金屬電容C_MET,達到如第2圖所示之,提升升壓電容Cb之電容值的效果。According to the description of Figures 5A, 5B, 5C, and 5D, it can be known that by designing the electrode patterns of the electrode sheets ELED1, ELED2, ELED3, and ELED4 on the metal layers MTL1, MTL2, multiple capacitors (including vertical capacitors) can be generated. The effect of parallel connection of Cv and planar capacitor Ch). That is to say, this kind of design of the existing unused metal layer to use the capacitive parasitic effect formed between the electrode patterns can indeed be used as the metal capacitor C_MET to achieve the boost capacitor as shown in Figure 2. The effect of the capacitance value of Cb.

基於繪式角度的緣故,第4圖所繪式之各電極片ELED1、ELED2、ELED3、ELED4所包含的電極數量較少。以下之一實施例,係假設將x-y平面繪式的金屬層MTL1、MTL2較完整的繪式在面積約為20 μm*20 μm的範圍,可在平行x軸方向上設置38列電極,然本實施例之面積數值以及可形成之電極列數,與設計參數有關,本發明之範圍並不限於該些數值拘束。如前所述,當電極之間的距離越接近時,可使電容值增加。因此,以高密度的方式設置多列電極,可使平面電容Ch1、Ch2的電容值提升。Due to the drawing angle, each electrode sheet ELED1, ELED2, ELED3, ELED4 drawn in Figure 4 contains a small number of electrodes. In one of the following embodiments, it is assumed that the metal layers MTL1 and MTL2 drawn on the xy plane are completely drawn in the area of about 20 μm*20 μm. 38 rows of electrodes can be arranged in the direction parallel to the x-axis. The area values of the embodiments and the number of electrode rows that can be formed are related to design parameters, and the scope of the present invention is not limited to these numerical constraints. As mentioned earlier, when the distance between the electrodes is closer, the capacitance value can be increased. Therefore, by arranging multiple columns of electrodes in a high-density manner, the capacitance values of the planar capacitors Ch1 and Ch2 can be increased.

此處以第6、7圖說明電極片ELED1的電極圖樣;以及以第8、9圖說明電極片ELED2的電極圖樣。接著,以第10圖說明金屬層MTL1上的電極片ELED1 、ELED2共同組合後的電極圖樣。Here, the electrode patterns of the electrode sheet ELED1 are described in FIGS. 6 and 7; and the electrode patterns of the electrode sheet ELED2 are described in FIGS. 8 and 9. Next, the electrode pattern in which the electrode pieces ELED1 and ELED2 on the metal layer MTL1 are combined together will be described with reference to FIG. 10.

請參見第6圖,其係電極片ELED1之示意圖。電極片ELED1包含共用電極cmn11與電極組GP11a、GP11b。其中,共用電極cmn11同時與電極組GP11a、GP11b相連。Please refer to Figure 6, which is a schematic diagram of the electrode sheet ELED1. The electrode sheet ELED1 includes a common electrode cmn11 and electrode groups GP11a and GP11b. Among them, the common electrode cmn11 is connected to the electrode groups GP11a and GP11b at the same time.

請參見第7圖,其係電極片ELED1所包含的電極圖樣之示意圖。圖中左側為電極組GP11a、右側為電極組GP11b,底部為共用電極cmn11。Please refer to Figure 7, which is a schematic diagram of the electrode pattern included in the electrode sheet ELED1. In the figure, the left side is the electrode group GP11a, the right side is the electrode group GP11b, and the bottom is the common electrode cmn11.

電極組GP11a包含:與y軸平行並與共用電極cmn11相連的主電極M11a,以及多個與x軸平行的分支電極br11a。其中,各個分支電極br11a彼此等長,且分支電極br11a均以其左側端點連接至主電極M11a。分支電極br11a的右側端點朝向x軸的正方向。電極組GP11b包含:與y軸平行並與共用電極cmn11相連的主電極M11b,以及多個與x軸平行的分支電極br11b。其中,各個分支電極br11b彼此等長,且分支電極br11b均以其右側端點連接至主電極M11b。分支電極br11b的左側端點朝向x軸的負方向。據此,電極組GP11a、GP11b呈現平梳(flat comb)形狀。其中,電極組GP11a的梳齒朝向x軸的正方向,而電極組GP11b的梳齒朝向x軸的負方向。The electrode group GP11a includes a main electrode M11a parallel to the y-axis and connected to the common electrode cmn11, and a plurality of branch electrodes br11a parallel to the x-axis. Among them, the respective branch electrodes br11a are equal in length to each other, and the branch electrodes br11a are all connected to the main electrode M11a with their left end points. The right end of the branch electrode br11a faces the positive direction of the x-axis. The electrode group GP11b includes a main electrode M11b parallel to the y-axis and connected to the common electrode cmn11, and a plurality of branch electrodes br11b parallel to the x-axis. Among them, the respective branch electrodes br11b are equal in length to each other, and the branch electrodes br11b are all connected to the main electrode M11b with their right end points. The left end of the branch electrode br11b faces the negative direction of the x-axis. Accordingly, the electrode groups GP11a and GP11b have a flat comb shape. Among them, the comb teeth of the electrode group GP11a face the positive direction of the x-axis, and the comb teeth of the electrode group GP11b face the negative direction of the x-axis.

共用電極cmn11平行於x軸,共用電極cmn11的兩端分別連接至主電極M11a、M11b的底部。共用電極cmn11的長度較電極組GP11a的分支電極br11a長,且共用電極cmn11的長度亦較電極組GP11b的分支電極br11b長。The common electrode cmn11 is parallel to the x-axis, and the two ends of the common electrode cmn11 are respectively connected to the bottoms of the main electrodes M11a and M11b. The length of the common electrode cmn11 is longer than the branch electrode br11a of the electrode group GP11a, and the length of the common electrode cmn11 is also longer than the branch electrode br11b of the electrode group GP11b.

請同時參看第6、7圖。在電極片ELED1上,分支電極br11a與分支電極br11b所在的列數並不相同,且分支電極br11a與分支電極br11b以指狀交叉的方式排列。當金屬層MTL1共包含38列電極時,電極組GP11a共包含9個分支電極br11a,電極組GP11b包含9個分支電極br11b。共用電極cmn11位於第一列(y=1)。分支電極br11a自第3列開始,以四列為間隔而設置(y=3, 7, …35)。分支電極br11b自第5列開始,以四列為間隔而設置(y=5, 9, …37)。Please refer to Figures 6 and 7 at the same time. On the electrode sheet ELED1, the number of columns in which the branch electrodes br11a and the branch electrodes br11b are located are not the same, and the branch electrodes br11a and the branch electrodes br11b are arranged in a finger-like cross. When the metal layer MTL1 includes a total of 38 columns of electrodes, the electrode group GP11a includes a total of 9 branch electrodes br11a, and the electrode group GP11b includes 9 branch electrodes br11b. The common electrode cmn11 is located in the first column (y=1). The branch electrodes br11a start from the third column and are arranged at intervals of four columns (y=3, 7, …35). The branch electrodes br11b start from the fifth column and are arranged at intervals of four columns (y=5, 9, …37).

請參見第8圖,其係電極片ELED2之示意圖。電極片ELED2包含共用電極cmn12與彎折電極bnd12。共用電極cmn12平行於x軸,而彎折電極bnd12呈現之字形(zigzag)。Please refer to Figure 8, which is a schematic diagram of the electrode sheet ELED2. The electrode sheet ELED2 includes a common electrode cmn12 and a bent electrode bnd12. The common electrode cmn12 is parallel to the x-axis, and the bent electrode bnd12 has a zigzag shape.

請參見第9圖,其係電極片ELED2所包含的電極圖樣之示意圖。圖中上方為共用電極cmn12,下方為彎折電極bnd12。Please refer to Figure 9, which is a schematic diagram of the electrode pattern included in the electrode sheet ELED2. The upper part of the figure is the common electrode cmn12, and the lower part is the bent electrode bnd12.

共用電極cmn12平行於x軸,且共用電極cmn12的長度較彎折電極bnd12在x軸的長度略長。彎折電極bnd12包含多個長電極eledL12與多個短電極eledS12a、eledS12b。長電極eledL12彼此等長並平行於x軸,且長電極eledL12的左側端點彼此對齊、右側端點亦彼此對齊。在第9圖中,長電極eledL12位於偶數列(y=偶數)。The common electrode cmn12 is parallel to the x-axis, and the length of the common electrode cmn12 is slightly longer than the length of the bent electrode bnd12 on the x-axis. The bent electrode bnd12 includes a plurality of long electrodes eledL12 and a plurality of short electrodes eledS12a and eledS12b. The long electrodes eledL12 are equal in length to each other and parallel to the x-axis, and the left end points of the long electrodes eledL12 are aligned with each other, and the right end points are also aligned with each other. In Figure 9, the long electrode eledL12 is located in an even-numbered column (y=even).

請同時參看第8、9圖。彎折電極bnd12的短電極eledS12a、eledS12b平行於y軸。各短電極eledS12a、eledS12b具有上方端點與下方端點。短電極eledS12a藉由上方端點與下方端點而與長電極eledL12的左側端點相連;短電極eledS12b藉由上方端點與下方端點而與長電極eledL12的右側端點相連。此外,與同一個長電極eledL12相連的左右兩側的短電極eledS12a、eledS12b在y軸方向上的位置並不一致。Please refer to Figures 8 and 9 at the same time. The short electrodes eledS12a and eledS12b of the bent electrode bnd12 are parallel to the y-axis. Each short electrode eledS12a, eledS12b has an upper end point and a lower end point. The short electrode eledS12a is connected to the left end of the long electrode eledL12 by the upper and lower end points; the short electrode eledS12b is connected to the right end of the long electrode eledL12 by the upper and lower end points. In addition, the positions of the short electrodes eledS12a and eledS12b on the left and right sides connected to the same long electrode eledL12 in the y-axis direction are not consistent.

例如,位於第2列與第4列的長電極eledL12的右側端點分別連接至位於右側的短電極eledS12b的兩端;於第4列與第6列的長電極eledL12的左側端點分別連接至位於左側的短電極eledS12a的兩端;位於第6列與第8列的長電極eledL12的右側端點分別連接至位於右側的短電極eledS12b的兩端;位於第8列與第10列的長電極eledL12的左側端點分別連接至位於左側的短電極eledS12的兩端。其餘長電極eledL12與短電極eledS12a、eledS12b之間的連接關係類似故不詳述。For example, the right end of the long electrode eledL12 in the second and fourth columns is connected to both ends of the short electrode eledS12b on the right; the left end of the long electrode eledL12 in the fourth and sixth columns is connected to Both ends of the short electrode eledS12a on the left; the right end of the long electrode eledL12 in the 6th and 8th columns are connected to both ends of the short electrode eledS12b on the right; the long electrode in the 8th and 10th columns The left end of eledL12 is respectively connected to the two ends of the short electrode eledS12 on the left. The connection relationship between the remaining long electrode eledL12 and the short electrodes eledS12a and eledS12b is similar and will not be described in detail.

也就是說,位於左側的短電極eledS12a與位於右側的短電極eledS12b在y軸上的位置彼此交錯。此外,與位於第36列之長電極eledL12相連的左側短電極eledS12a,其上方端點還與共用電極cmn12相連。That is, the positions of the short electrode eledS12a on the left side and the short electrode eledS12b on the right side on the y-axis are staggered. In addition, the left short electrode eledS12a, which is connected to the long electrode eledL12 in the 36th column, has its upper end connected to the common electrode cmn12.

請參見第10圖,其係第6圖的電極片ELED1與第8圖的電極片ELED2所組成之金屬層MTL1的示意圖。第6圖所示的電極片ELED1與第8圖所示的電極片ELED2共同組成第10圖所示的金屬層MTL1。請同時參見第6、8、10圖,其中位於金屬層MTL1的電極片ELED1、ELED2的電極位置可整理如表1。 表1 金屬層MTL1 電極名稱 電極方向 電極所對應的列數 電極片ELED1 (第6、7圖)   電極組GP11a 主電極M11a 平行y軸 NA 分支電極 br11a 平行x軸 3, 7, 11, 15, 19, 23, 27, 31, 35 電極組GP11b 主電極 M11b 平行y軸 NA 分支電極 br11b 平行x軸 5, 9, 13, 17, 21, 25, 29, 33, 37 共用電極cmn11 平行x軸 1 電極片ELED2 (第8、9圖)   共用電極cmn12 平行x軸 38 彎折電極bnd12 長電極eledL12 平行x軸 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30, 32, 34, 36 短電極eledS12a, eledS12b 平行y軸 NA Please refer to Fig. 10, which is a schematic diagram of the metal layer MTL1 composed of the electrode sheet ELED1 in Fig. 6 and the electrode sheet ELED2 in Fig. 8. The electrode piece ELED1 shown in FIG. 6 and the electrode piece ELED2 shown in FIG. 8 together constitute the metal layer MTL1 shown in FIG. 10. Please refer to Figures 6, 8, and 10 at the same time, where the electrode positions of the electrode sheets ELED1 and ELED2 on the metal layer MTL1 can be sorted as shown in Table 1. Table 1 Metal layer MTL1 Electrode name Electrode direction The number of columns corresponding to the electrode Electrode sheet ELED1 (Figures 6 and 7) Electrode group GP11a Main electrode M11a Parallel y axis NA Branch electrode br11a Parallel x axis 3, 7, 11, 15, 19, 23, 27, 31, 35 Electrode group GP11b Main electrode M11b Parallel y axis NA Branch electrode br11b Parallel x axis 5, 9, 13, 17, 21, 25, 29, 33, 37 Common electrode cmn11 Parallel x axis 1 Electrode sheet ELED2 (pictures 8 and 9) Common electrode cmn12 Parallel x axis 38 Bending electrode bnd12 Long electrode eledL12 Parallel x axis 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30, 32, 34, 36 Short electrode eledS12a, eledS12b Parallel y axis NA

由表1可以看出,接收電壓V1的電極片ELED1的分支電極 br11a、brllb大多位於奇數列上,而接收電壓V2的電極片ELED2的長電極eledL12大多位於偶數列上。據此,在金屬層MTL1上,各列的電極之間確實可形成平面電容Ch1。It can be seen from Table 1 that the branch electrodes br11a and brllb of the electrode sheet ELED1 receiving the voltage V1 are mostly located on odd-numbered columns, while the long electrode eledL12 of the electrode sheet ELED2 receiving the voltage V2 is mostly located on the even-numbered columns. Accordingly, on the metal layer MTL1, a planar capacitor Ch1 can be formed between the electrodes of each column.

接著,以第11、12圖說明電極片ELED3的電極圖樣;以及,以第13、14圖說明電極片ELED4的電極圖樣。接著,以第15圖說明金屬層MTL2上的電極片ELED3、ELED4共同組合後的電極圖樣。Next, the electrode patterns of the electrode sheet ELED3 will be described in FIGS. 11 and 12; and the electrode patterns of the electrode sheet ELED4 will be described in FIGS. 13 and 14. Next, the electrode pattern in which the electrode pieces ELED3 and ELED4 on the metal layer MTL2 are combined together will be described with reference to FIG. 15.

請參見第11圖,其係電極片ELED3之示意圖。電極片ELED3包含共用電極cmn21與電極組GP21a、GP21b。其中,共用電極cmn21同時與電極組GP21a、GP21b相連。Please refer to Figure 11, which is a schematic diagram of the electrode sheet ELED3. The electrode sheet ELED3 includes a common electrode cmn21 and electrode groups GP21a and GP21b. Among them, the common electrode cmn21 is connected to the electrode groups GP21a and GP21b at the same time.

請參見第12圖,其係電極片ELED3所包含的電極圖樣之示意圖。圖中左側為電極組GP21a、右側為電極組GP21b,底部為共用電極cmn21。Please refer to Figure 12, which is a schematic diagram of the electrode pattern included in the electrode sheet ELED3. In the figure, the left side is the electrode group GP21a, the right side is the electrode group GP21b, and the bottom is the common electrode cmn21.

電極組GP21a包含:與y軸平行並與共用電極cmn21相連的主電極M21a,以及多個與x軸平行的分支電極br21a。其中,各個分支電極br21a彼此等長,且分支電極br21a均以其左側端點連接至主電極M21a。分支電極br21a的右側端點朝向x軸的正方向。電極組GP21b包含:與y軸平行並與共用電極cmn21相連的主電極M21b,以及多個與x軸平行的分支電極br21b。其中,各個分支電極br21b彼此等長,且分支電極br21b均以其右側端點連接至主電極M21b。分支電極br21b的左側端點朝向x軸的負方向。據此,電極組GP21a、GP21b呈現平梳形狀。其中,電極組GP21a的梳齒朝向x軸的正方向,而電極組GP21b的梳齒朝向x軸的負方向。The electrode group GP21a includes a main electrode M21a parallel to the y-axis and connected to the common electrode cmn21, and a plurality of branch electrodes br21a parallel to the x-axis. Among them, the respective branch electrodes br21a are equal in length to each other, and the branch electrodes br21a are all connected to the main electrode M21a with their left end points. The right end of the branch electrode br21a faces the positive direction of the x-axis. The electrode group GP21b includes a main electrode M21b parallel to the y-axis and connected to the common electrode cmn21, and a plurality of branch electrodes br21b parallel to the x-axis. Among them, the respective branch electrodes br21b are equal in length to each other, and the branch electrodes br21b are all connected to the main electrode M21b with their right end points. The left end of the branch electrode br21b faces the negative direction of the x-axis. Accordingly, the electrode groups GP21a and GP21b have a flat comb shape. Among them, the comb teeth of the electrode group GP21a face the positive direction of the x-axis, and the comb teeth of the electrode group GP21b face the negative direction of the x-axis.

共用電極cmn21平行於x軸,共用電極cmn21的兩端分別連接至主電極M21a、M21b的底部。共用電極cmn21的長度較電極組GP21a的分支電極br21a,以及較電極組GP21b的分支電極br21b長。The common electrode cmn21 is parallel to the x-axis, and both ends of the common electrode cmn21 are respectively connected to the bottoms of the main electrodes M21a and M21b. The length of the common electrode cmn21 is longer than the branch electrode br21a of the electrode group GP21a and longer than the branch electrode br21b of the electrode group GP21b.

請同時參看第11、12圖。在電極片ELED3上,分支電極br21a與分支電極br21b所在的列數並不相同,且分支電極br21a與分支電極br21b以指狀交叉的方式排列。當金屬層MTL2共包含38列電極時,電極組GP21a共包含8個分支電極br21a,電極組GP21b包含9個分支電極br21b。共用電極cmn21位於第一列(y=1)。分支電極br21a自第6列開始,以四列為間隔而設置(y=6, 10, …34)。分支電極br21b自第4列開始,以四列為間隔而設置(y=4, 8, …36)。Please refer to Figures 11 and 12 at the same time. On the electrode sheet ELED3, the number of columns in which the branch electrodes br21a and the branch electrodes br21b are located are not the same, and the branch electrodes br21a and the branch electrodes br21b are arranged in a finger-like cross. When the metal layer MTL2 includes a total of 38 columns of electrodes, the electrode group GP21a includes a total of 8 branch electrodes br21a, and the electrode group GP21b includes 9 branch electrodes br21b. The common electrode cmn21 is located in the first column (y=1). The branch electrodes br21a are arranged at intervals of four rows starting from the sixth row (y=6, 10, ... 34). The branch electrodes br21b start from the fourth column and are arranged at intervals of four columns (y=4, 8, …36).

請參見第13圖,其係電極片ELED4之示意圖。電極片ELED4包含共用電極cmn22與彎折電極bnd22。共用電極cmn22平行於x軸,而彎折電極bnd22呈現之字形。Please refer to Figure 13, which is a schematic diagram of the electrode sheet ELED4. The electrode sheet ELED4 includes a common electrode cmn22 and a bent electrode bnd22. The common electrode cmn22 is parallel to the x-axis, and the bent electrode bnd22 has a zigzag shape.

請參見第14圖,其係電極片ELED4所包含的電極圖樣之示意圖。圖中上方為共用電極cmn22,下方為彎折電極bnd22。Please refer to Figure 14, which is a schematic diagram of the electrode pattern included in the electrode sheet ELED4. The upper part of the figure is the common electrode cmn22, and the lower part is the bent electrode bnd22.

共用電極cmn22平行於x軸,且共用電極cmn22的長度較彎折電極bnd22在x軸的長度略長。彎折電極bnd22包含多個長電極eledL22與多個短電極eledS22a、eledS22b。長電極eledL22彼此等長並平行於x軸,且長電極eledL22的左側端點彼此對齊、右側端點亦彼此對齊。在第13圖中,長電極eledL22位於第2列、第38列,以及介於2~38之間的奇數列(y=3, 5, … 37)。The common electrode cmn22 is parallel to the x-axis, and the length of the common electrode cmn22 is slightly longer than the length of the bent electrode bnd22 on the x-axis. The bent electrode bnd22 includes a plurality of long electrodes eledL22 and a plurality of short electrodes eledS22a and eledS22b. The long electrodes eledL22 are equal in length to each other and parallel to the x-axis, and the left end points of the long electrodes eledL22 are aligned with each other, and the right end points are also aligned with each other. In Figure 13, the long electrode eledL22 is located in the second column, the 38th column, and the odd column between 2~38 (y=3, 5,… 37).

請同時參看第13、14圖。短電極eledS22a、eledS22b平行於y軸。彎折電極bnd22的短電極eledS22a、eledS22b平行於y軸。各短電極eledS22a、eledS22b具有上方端點與下方端點。短電極eledS22a藉由上方端點與下方端點而與長電極eledL22的左側端點相連;短電極eledS22b藉由上方端點與下方端點而與長電極eledL22的右側端點相連。此外,與同一個長電極eledL22相連的左右兩側的短電極eledS22a、eledS22b在y軸方向上的位置並不相同。Please refer to Figures 13 and 14 at the same time. The short electrodes eledS22a and eledS22b are parallel to the y axis. The short electrodes eledS22a and eledS22b of the bent electrode bnd22 are parallel to the y axis. Each short electrode eledS22a, eledS22b has an upper end point and a lower end point. The short electrode eledS22a is connected to the left end of the long electrode eledL22 by the upper and lower end points; the short electrode eledS22b is connected to the right end of the long electrode eledL22 by the upper and lower end points. In addition, the positions of the short electrodes eledS22a and eledS22b on the left and right sides connected to the same long electrode eledL22 in the y-axis direction are not the same.

例如,位於第2列與第3列的長電極eledL22的右側端點分別連接至位於右側的短電極eledS22b的兩端;於第3列與第5列的長電極eledL22的左側端點分別連接至位於左側的短電極eledS22a的兩端;位於第5列與第7列的長電極eledL22的右側端點分別連接至位於右側的短電極eledS22b的兩端;位於第7列與第9列的長電極eledL22的左側端點分別連接至位於左側的短電極eledS22的兩端。其餘長電極eledL22與短電極eledS22a、eledS22b之間的連接關係類似故不詳述。For example, the right end of the long electrode eledL22 in the second and third columns is connected to the two ends of the short electrode eledS22b in the right; the left end of the long electrode eledL22 in the third and fifth columns is connected to Both ends of the short electrode eledS22a located on the left; the right end of the long electrode eledL22 located in the 5th and 7th columns are connected to both ends of the short electrode eledS22b located on the right; the long electrode in the 7th and 9th columns The left end of eledL22 is respectively connected to the two ends of the short electrode eledS22 on the left. The connection relationship between the remaining long electrode eledL22 and the short electrodes eledS22a and eledS22b is similar and will not be described in detail.

也就是說,位於左側的短電極eledS22a與位於右側的短電極eledS22b在y軸上的位置彼此交錯。此外,與位於第37列之長電極eledL12相連的右側短電極eledS22b,其上方端點還與共用電極cmn22相連。That is, the positions of the short electrode eledS22a on the left side and the short electrode eledS22b on the right side on the y-axis are staggered. In addition, the right short electrode eledS22b, which is connected to the long electrode eledL12 in the 37th column, has its upper end connected to the common electrode cmn22.

請參見第15圖,其係第11圖的電極片ELED3與第13圖的電極片ELED4所組成之金屬層MTL1的示意圖。第11圖所示的電極片ELED3與第13圖所示的電極片ELED4共同組成第15圖所示的金屬層MTL2。請同時參見第11、13、15圖,其中位於金屬層MTL2的電極片ELED3、ELED4的電極位置可整理如表2 表2 金屬層MTL2 電極名稱 電極方向 電極所對應的列數 電極片ELED3 (第11、12圖)   電極組GP21a 主電極M21a 平行y軸 NA 分支電極 br21a 平行x軸 6, 10, 14, 18, 22, 26, 30, 34 電極組GP21b 主電極 M21b 平行y軸 NA 分支電極 br21b 平行x軸 4, 8, 12, 16, 20, 24, 28, 32, 36 共用電極cmn21 平行x軸 1 電極片ELED4 (第13、14圖)   共用電極cmn22 平行x軸 38 彎折電極bnd22 長電極eledL22 平行x軸 2, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37 短電極eledS22a, eledS22b 平行y軸 NA Please refer to FIG. 15, which is a schematic diagram of the metal layer MTL1 composed of the electrode sheet ELED3 in FIG. 11 and the electrode sheet ELED4 in FIG. The electrode piece ELED3 shown in FIG. 11 and the electrode piece ELED4 shown in FIG. 13 together constitute the metal layer MTL2 shown in FIG. 15. Please refer to Figures 11, 13, and 15, where the electrode positions of the electrode sheets ELED3 and ELED4 on the metal layer MTL2 can be sorted as shown in Table 2 Table 2 Metal layer MTL2 Electrode name Electrode direction The number of columns corresponding to the electrode Electrode sheet ELED3 (Picture 11, 12) Electrode group GP21a Main electrode M21a Parallel y axis NA Branch electrode br21a Parallel x axis 6, 10, 14, 18, 22, 26, 30, 34 Electrode group GP21b Main electrode M21b Parallel y axis NA Branch electrode br21b Parallel x axis 4, 8, 12, 16, 20, 24, 28, 32, 36 Common electrode cmn21 Parallel x axis 1 Electrode sheet ELED4 (Pictures 13, 14) Common electrode cmn22 Parallel x axis 38 Bending electrode bnd22 Long electrode eledL22 Parallel x axis 2, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37 Short electrode eledS22a, eledS22b Parallel y axis NA

由表2可以看出,接收電壓V2的電極片ELED3的分支電極 br21a、br2lb大多位於偶數列上,而接收電壓V2的電極片ELED4的長電極eledL22大多位於奇數列上。據此,在金屬層MTL2上,各列的電極之間確實可形成平面電容Ch2。It can be seen from Table 2 that the branch electrodes br21a and br2lb of the electrode sheet ELED3 receiving the voltage V2 are mostly located on even-numbered columns, while the long electrode eledL22 of the electrode sheet ELED4 receiving the voltage V2 is mostly located on the odd-numbered columns. Accordingly, on the metal layer MTL2, a planar capacitor Ch2 can be formed between the electrodes of each column.

承上,藉由電極圖樣的設計,除了各金屬層MTL1、MTL2在各自的平面上所形成的平面電容Ch1、Ch2外,還可進一步在金屬層MTL2和金屬層MTL1之間形成縱向電容Cv1、Cv2。In addition, through the design of the electrode pattern, in addition to the planar capacitors Ch1 and Ch2 formed by the metal layers MTL1 and MTL2 on their respective planes, vertical capacitors Cv1 and Cv1 can be further formed between the metal layer MTL2 and the metal layer MTL1. Cv2.

請同時參見第6、7、13、14圖與表1、2。如表1所列示,在第6、7圖中,電極片ELED1的分支電極 br11a位於第 3、7、11、15、19、 23、27、31、35列,且分支電極Br11b位於第5、 9、13、17、21、25、29、33、37列。如表2所列示,在第13、14圖中,電極片ELED4的彎折電極bnd22的長電極eledL22位於第2列以及第3~37列中全部的奇數列。由於金屬層MTL2位於金屬層MTL1的上方,基於前述說明可以得知,電極片ELED4的長電極eledL22的位置大多在電極片ELED1的分支電極 br11a的位置的上方。此外,電極片ELED1用於接收電壓V1,而電極片接收ELED4用於接收電壓V2。據此可以看出,若將第15圖的金屬層MTL2置放於第10圖的金屬層MTL1的正上方,在第3~37列中全部的奇數列的上下層電極之間,將形成縱向電容Cv1。Please refer to Figures 6, 7, 13, and 14 and Tables 1 and 2 at the same time. As shown in Table 1, in Figures 6 and 7, the branch electrode br11a of the electrode sheet ELED1 is located in the third, seventh, 11, 15, 19, 23, 27, 31, and 35 columns, and the branch electrode Br11b is located in the fifth column. , 9, 13, 17, 21, 25, 29, 33, 37 columns. As shown in Table 2, in Figures 13 and 14, the long electrode eledL22 of the bent electrode bnd22 of the electrode sheet ELED4 is located in the second column and all the odd columns in the third to 37th columns. Since the metal layer MTL2 is located above the metal layer MTL1, based on the foregoing description, the position of the long electrode eledL22 of the electrode sheet ELED4 is mostly above the position of the branch electrode br11a of the electrode sheet ELED1. In addition, the electrode sheet ELED1 is used to receive the voltage V1, and the electrode sheet receiving ELED4 is used to receive the voltage V2. From this, it can be seen that if the metal layer MTL2 in Figure 15 is placed directly above the metal layer MTL1 in Figure 10, between the upper and lower electrodes of all odd-numbered columns in columns 3 to 37, a longitudinal direction will be formed. Capacitance Cv1.

請同時參見第8、9、11、12圖與表1、2。如表1所列示,在第8、9圖中,電極片ELED2的彎折電極的長電極位於偶數列(y = 2、4、6、8、10、12、14、16、18、20、22、24、26、28、30、32、34、36)。如表2所列示,在第11、12圖中,電極片ELED3的分支電極br21a位於第6、10、14、18、22、26、30、34列,且分支電極br21b位於第4、8、12、 16、20、24、28、32、36列。由於金屬層MTL2位於金屬層MTL1的上方,基於前述說明可以得知,電極片ELED3的分支電極 br21a、br21b的位置都在電極片ELED2的長電極eledL12的位置的上方。此外,電極片ELED2用於接收電壓V2,而電極片ELED3用於接收電壓V1。據此可以看出,若將第15圖的金屬層MTL2置放於第10圖的金屬層MTL1的正上方,在第4~36列中全部的偶數列的上下層電極之間,將形成縱向電容Cv2。Please refer to Figures 8, 9, 11, 12 and Tables 1 and 2 at the same time. As shown in Table 1, in Figures 8 and 9, the long electrodes of the bent electrodes of the electrode sheet ELED2 are located in even-numbered columns (y = 2, 4, 6, 8, 10, 12, 14, 16, 18, 20 , 22, 24, 26, 28, 30, 32, 34, 36). As shown in Table 2, in Figures 11 and 12, the branch electrodes br21a of the electrode sheet ELED3 are located in columns 6, 10, 14, 18, 22, 26, 30, and 34, and the branch electrodes br21b are located in columns 4 and 8. , 12, 16, 20, 24, 28, 32, 36 columns. Since the metal layer MTL2 is located above the metal layer MTL1, based on the foregoing description, it can be known that the positions of the branch electrodes br21a and br21b of the electrode sheet ELED3 are above the position of the long electrode eledL12 of the electrode sheet ELED2. In addition, the electrode sheet ELED2 is used to receive the voltage V2, and the electrode sheet ELED3 is used to receive the voltage V1. Based on this, it can be seen that if the metal layer MTL2 in Figure 15 is placed directly above the metal layer MTL1 in Figure 10, between the upper and lower electrodes of all even-numbered columns in the 4th to 36th columns, a longitudinal direction will be formed. Capacitance Cv2.

前述說明的金屬層與電極片的關係,可進一步應用於更多的金屬層上。第16圖假設包含四個金屬層的例子。實際應用時,金屬層的數量會依據半導體製程本身具有的層數而決定。The relationship between the metal layer and the electrode sheet described above can be further applied to more metal layers. Figure 16 assumes an example containing four metal layers. In practical applications, the number of metal layers is determined by the number of layers in the semiconductor process itself.

請參見第16圖,其係於多個金屬層上形成電極圖樣彼此交錯之電極片的示意圖。為便於說明,此處將各個金屬層mMTL1、mMTL2、mMTL3、mMTL4上的電極片mELED1、mELED2、mELED3、mELED4、mELED5、mELED6、mELED7、mELED8之電極圖樣中的電極片位置按照列數整理於表3。 表3       接收的電壓 列數 1 2 3 4 5 6 7 8 9 10 11 12 13 14 金屬層 mMTL1 電極片mELED1 V1 X   X   X   X   X   X   X   電極片mELED2 V2   X   X   X   X   X   X   X 金屬層 mMTL2 電極片mELED3 V1 X     X   X   X   X   X     電極片mELED4 V2   X X   X   X   X   X   X X 金屬層 mMTL3 電極片mELED5 V1 X   X   X   X   X   X   X   電極片mELED6 V2   X   X   X   X   X   X   X 金屬層 mMTL4 電極片mELED7 V1 X     X   X   X   X   X     電極片mELED8 V2   X X   X   X   X   X   X X Please refer to FIG. 16, which is a schematic diagram of forming electrode sheets with interlaced electrode patterns on a plurality of metal layers. For ease of description, the electrode positions in the electrode patterns on the respective metal layers mMTL1, mMTL2, mMTL3, and mMTL4 are arranged in the table according to the number of columns. 3. table 3 Received voltage Number of columns 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Metal layer mMTL1 Electrode sheet mELED1 V1 X X X X X X X Electrode sheet mELED2 V2 X X X X X X X Metal layer mMTL2 Electrode sheet mELED3 V1 X X X X X X Electrode sheet mELED4 V2 X X X X X X X X Metal layer mMTL3 Electrode sheet mELED5 V1 X X X X X X X Electrode sheet mELED6 V2 X X X X X X X Metal layer mMTL4 Electrode sheet mELED7 V1 X X X X X X Electrode sheet mELED8 V2 X X X X X X X X

如前所述,分屬不同金屬層的電極片之間將形成縱向電容,而同屬相同金屬層的電極片之間將形成平面電容。因此,採用第16圖之電極圖樣設計時,在金屬層mMTL1的電極片mELED1、mELED2之間形成將平面電容Ch;在金屬層mMTL2的電極片mELED3、mELED4之間形成將平面電容Ch;在金屬層mMTL3的電極片mELED5、mELED6之間將形成平面電容Ch;以及,在金屬層mMTL4的電極片mELED7、mELED8之間將形成平面電容Ch。此外,在金屬層mMTL1、mMTL2之間將形成縱向電容Cv;在金屬層mMTL2、mMTL3之間將形成縱向電容Cv;以及,在金屬層mMTL3、mMTL4之間將形成縱向電容Cv。As mentioned above, the electrode plates belonging to different metal layers will form a vertical capacitance, and the electrode plates belonging to the same metal layer will form a planar capacitor. Therefore, when using the electrode pattern design in Figure 16, a planar capacitor Ch is formed between the electrode plates mELED1 and mELED2 of the metal layer mMTL1; a planar capacitor Ch is formed between the electrode plates mELED3 and mELED4 of the metal layer mMTL2; A planar capacitor Ch is formed between the electrode plates mELED5 and mELED6 of the layer mMTL3; and a planar capacitor Ch is formed between the electrode plates mELED7 and mELED8 of the metal layer mMTL4. In addition, a longitudinal capacitance Cv will be formed between the metal layers mMTL1 and mMTL2; a longitudinal capacitance Cv will be formed between the metal layers mMTL2 and mMTL3; and a longitudinal capacitance Cv will be formed between the metal layers mMTL3 and mMTL4.

在前述實施例中,假設接收電壓V1的電極片均具有類似的外觀,以及,假設接收電壓V2的電極片均具有類似的外觀。即,金屬層MTL1上用於接收電壓V1的電極片ELED1與金屬層MTL2上用於接收電壓V1的電極片ELED3均由電極組和位於第1列的共用電極所組成。以及,金屬層MTL1上用於接收電壓V2的電極片ELED2與金屬層MTL2上用於接收電壓V2的電極片ELED4均由共用電極和彎折電極所組成。但是,實際應用時,並不需要限定接收相同電壓的電極片應具有類似的外觀。例如,在第17圖的例子中,位於奇數金屬層和位於偶數金屬層中,使用具有不同的電極圖樣外觀的電極片接收相同的電壓。In the foregoing embodiment, it is assumed that the electrode pieces receiving the voltage V1 all have a similar appearance, and it is assumed that the electrode pieces receiving the voltage V2 all have a similar appearance. That is, the electrode piece ELED1 on the metal layer MTL1 for receiving the voltage V1 and the electrode piece ELED3 on the metal layer MTL2 for receiving the voltage V1 are both composed of an electrode group and a common electrode located in the first column. And, the electrode piece ELED2 on the metal layer MTL1 for receiving the voltage V2 and the electrode piece ELED4 on the metal layer MTL2 for receiving the voltage V2 are both composed of a common electrode and a bent electrode. However, in actual application, it is not necessary to limit that the electrode plates receiving the same voltage should have a similar appearance. For example, in the example shown in FIG. 17, the electrode pieces in the odd-numbered metal layer and the even-numbered metal layer are used to receive the same voltage with different electrode patterns.

請參見第17圖,其係於兩個金屬層上設置電極片,進而根據電極片的電容圖樣產生電容效果的另一種實施例之示意圖。為便於說明,此處將各個金屬層oMTL1、oMTL2、oMTL3、oMTL4上的電極片oELED1、oELED2、oELED3、oELED4的電極所在的列數,以表格方式呈現。 表4       列數 1 2 3 4 5 6 7 8 9 10 11 12 13 14 金屬層 oMTL1 電極片oELED1(V1) X   X   X   X   X   X   X   電極片oELED2(V2)   X   X   X   X   X   X   X 金屬層 oMTL2 電極片oELED3(V1) X   X   X   X   X   X   X   電極片oELED4(V2)   X   X   X   X   X   X   X Please refer to FIG. 17, which is a schematic diagram of another embodiment in which electrode plates are arranged on two metal layers, and then a capacitance effect is generated according to the capacitance pattern of the electrode plates. For ease of description, the number of columns where the electrodes of the electrode sheets oELED1, oELED2, oELED3, and oELED4 on the respective metal layers oMTL1, oMTL2, oMTL3, and oMTL4 are located are presented in a table. Table 4 Number of columns 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Metal layer oMTL1 Electrode sheet oELED1(V1) X X X X X X X Electrode sheet oELED2(V2) X X X X X X X Metal layer oMTL2 Electrode sheet oELED3(V1) X X X X X X X Electrode sheet oELED4(V2) X X X X X X X

與第4圖相較,儘管在第17圖中的金屬層MTL2上的電極片oELED3、oELED4的電極圖樣的外觀與電極之間的相對位置稍有不同,但採用第17圖的電極圖樣的設計方式時,電極片oELED1、oELED2、oELED3、oELED4所接收的電壓V1、V2的關係仍然保持不變。即,在金屬層oMTL1上,仍由電極片oELED1接收電壓V1,由電極片oELED2接收電壓V2;以及,在金屬層oMTL2上,仍由電極片oELE4接收電壓V2,以及,由電極片oELED3接收電壓V1。因此,在不同金屬層的電極片之間形成縱向電容Cv,以及同一金屬層的電極片之間形成平面電容Ch的關係仍與前述說明相似。Compared with Figure 4, although the appearance of the electrode patterns of oELED3 and oELED4 on the metal layer MTL2 in Figure 17 is slightly different from the relative position between the electrodes, the design of the electrode pattern of Figure 17 is adopted. In this way, the relationship between the voltages V1 and V2 received by the electrode sheets oELED1, oELED2, oELED3, and oELED4 remains unchanged. That is, on the metal layer oMTL1, the electrode sheet oELED1 still receives the voltage V1, and the electrode sheet oELED2 receives the voltage V2; and, on the metal layer oMTL2, the electrode sheet oELE4 still receives the voltage V2, and the electrode sheet oELED3 receives the voltage. V1. Therefore, the relationship between the formation of the vertical capacitance Cv between the electrode plates of different metal layers and the formation of the planar capacitance Ch between the electrode plates of the same metal layer is still similar to the foregoing description.

在第17圖中,電極片oELED1、oELED4具有相似的電極圖樣,且電極片oELED2、oELED3具有相似的電極圖樣。即,在金屬層oMTL1中接收電壓V1的電極片(oELED1)的電極圖樣,與在金屬層oMTL2中接收電壓V2的電極片(oELED4)的電極圖樣相似;以及,在金屬層oMTL1中接收電壓V2的電極片(oELED2)的電極圖樣,與在金屬層oMTL2中接收電壓V1的電極片(oELED3)的電極圖樣相似。In Figure 17, the electrode sheets oELED1 and oELED4 have similar electrode patterns, and the electrode sheets oELED2 and oELED3 have similar electrode patterns. That is, the electrode pattern of the electrode piece (oELED1) receiving the voltage V1 in the metal layer oMTL1 is similar to the electrode pattern of the electrode piece (oELED4) receiving the voltage V2 in the metal layer oMTL2; and, the voltage V2 is received in the metal layer oMTL1 The electrode pattern of the electrode sheet (oELED2) is similar to the electrode pattern of the electrode sheet (oELED3) receiving the voltage V1 in the metal layer oMTL2.

更進一步的,本揭露還可將電極圖樣進一步改變,例如,在x軸的方向上進一步區分為多個區段,並依據區段的多寡而改變彎折電極與電極組的數量。隨著彎折電極與電極組的數量不同,其相對位置之間的排列方式也可能產生不同變化。以下關於將電極片區分為多個區段的說明,僅以單一個金屬層為例。實際應用時,其他金屬層上的電極片亦須對應的修改。此處不再詳述多層金屬層的電極圖樣應該如何設計。Furthermore, the present disclosure can further change the electrode pattern, for example, further divide it into a plurality of sections in the x-axis direction, and change the number of bent electrodes and electrode groups according to the number of sections. As the number of bent electrodes and electrode groups is different, the arrangement of their relative positions may also change differently. In the following description of dividing the electrode sheet into multiple segments, only a single metal layer is taken as an example. In actual application, the electrode pads on other metal layers must be modified accordingly. How to design the electrode pattern of the multilayer metal layer will not be detailed here.

請參見第18圖,其係金屬層s2MTL1上的電極片包含兩個區段的一個實施例之示意圖。金屬層s2MTL1包含電極片s2ELED1、s2ELED2。以下以第19、20圖說明電極片s2ELED1的電極圖樣,以及以第21、22圖說明電極片s2ELED2的電極圖樣。Please refer to FIG. 18, which is a schematic diagram of an embodiment in which the electrode sheet on the metal layer s2MTL1 includes two sections. The metal layer s2MTL1 includes electrode sheets s2ELED1 and s2ELED2. Hereinafter, the electrode patterns of the electrode sheet s2ELED1 will be described in Figs. 19 and 20, and the electrode patterns of the electrode sheet s2ELED2 will be described in Figs. 21 and 22.

請參見第19圖,其係第18圖的電極片s2ELED1之示意圖。電極片s2ELED1包含電極組s2GP11a、s2GP11b、s2GP11c,以及共用電極s2cmn11。共用電極s2cmn11同時與電極組s2GP11a、s2GP11b、s2GP11c相連。Please refer to Fig. 19, which is a schematic diagram of the electrode sheet s2ELED1 in Fig. 18. The electrode sheet s2ELED1 includes electrode groups s2GP11a, s2GP11b, s2GP11c, and a common electrode s2cmn11. The common electrode s2cmn11 is connected to the electrode groups s2GP11a, s2GP11b, and s2GP11c at the same time.

請參見第20圖,其係第18圖的電極片s2ELED1所包含的電極圖樣之示意圖。電極組s2GP11a包含主電極s2M11a與分支電極s2br11a;電極組s2GP11b包含主電極s2M11b與分支電極s2br11b;以及,電極組s2GP11c包含主電極s2M11c與分支電極s2br11c1、s2br11c2。主電極s2M11a、s2M11b、s2M11c均平行於y軸方向,而分支電極s2br11a、s2br11b、s2br11c1、s2br11c2均平行於x軸。Please refer to Fig. 20, which is a schematic diagram of the electrode pattern included in the electrode sheet s2ELED1 of Fig. 18. The electrode group s2GP11a includes a main electrode s2M11a and a branch electrode s2br11a; the electrode group s2GP11b includes a main electrode s2M11b and a branch electrode s2br11b; and the electrode group s2GP11c includes a main electrode s2M11c and branch electrodes s2br11c1, s2br11c2. The main electrodes s2M11a, s2M11b, and s2M11c are all parallel to the y-axis direction, and the branch electrodes s2br11a, s2br11b, s2br11c1, and s2br11c2 are all parallel to the x-axis.

電極組s2GP11a、s2GP11b呈現平梳形狀。其組成與第7圖的電極組GP11a、GP11b相似,故不再詳述。另一方面,電極組s2GP11c呈現魚骨形狀。由於電極組s2GP11c在主電極s2M11c的兩側分別包含分支電極s2br11c1、s2br11c2,因此電極組s2GP11c所包含的分支電極s2br11c1、s2br11c2的數量較電極組s2GP11a包含的分支電極s2br11a的數量多,也較電極組s2GP11b包含的分支電極s2br11b的數量多。此外,共用電極s2cmn11平行於x軸方向。共用電極s2cmn11的兩端分別與主電極s2M11a、s2M11b相連,且共用電極s2cmn11的中間與主電極s2M11c相連。The electrode groups s2GP11a and s2GP11b have a flat comb shape. Its composition is similar to that of the electrode groups GP11a and GP11b in Figure 7, so it will not be described in detail. On the other hand, the electrode group s2GP11c has a fishbone shape. Since the electrode group s2GP11c includes branch electrodes s2br11c1 and s2br11c2 on both sides of the main electrode s2M11c, the number of branch electrodes s2br11c1 and s2br11c2 included in the electrode group s2GP11c is larger than the number of branch electrodes s2br11a included in the electrode group s2GP11a, which is also greater than the electrode group. The s2GP11b includes a large number of branch electrodes s2br11b. In addition, the common electrode s2cmn11 is parallel to the x-axis direction. The two ends of the common electrode s2cmn11 are respectively connected to the main electrodes s2M11a and s2M11b, and the middle of the common electrode s2cmn11 is connected to the main electrode s2M11c.

請參見第21圖,其係第18圖的電極片s2ELED2之示意圖。電極片s2ELED2包含共用電極s2cmn12與彎折電極s2bnd12a、s2bnd12b。Please refer to Fig. 21, which is a schematic diagram of the electrode sheet s2ELED2 in Fig. 18. The electrode sheet s2ELED2 includes a common electrode s2cmn12 and bent electrodes s2bnd12a and s2bnd12b.

請參見第22圖,其係第18圖的電極片s2ELED2所包含的電極圖樣之示意圖。共用電極s2cmn12平行於x軸方向,彎折電極s2bnd12a、s2bnd12b具有類似的形狀且彼此對稱(鏡像)。因此,彎折電極s2bnd12a 的長電極s2bnd12aL的數量,與彎折電極s2bnd12b的長電極s2bnd12bL的數量相等。此外,彎折電極s2bnd12a 的短電極s2bnd12aSa的數量等於彎折電極s2bnd12b的短電極s2bnd12bSb的數量;以及,彎折電極s2bnd12a 的短電極s2bnd12aSb的數量等於彎折電極s2bnd12b的短電極s2bnd12bSa的數量。Please refer to Fig. 22, which is a schematic diagram of the electrode pattern included in the electrode sheet s2ELED2 of Fig. 18. The common electrode s2cmn12 is parallel to the x-axis direction, and the bent electrodes s2bnd12a and s2bnd12b have similar shapes and are symmetrical (mirror images) to each other. Therefore, the number of the long electrodes s2bnd12aL of the bent electrode s2bnd12a is equal to the number of the long electrodes s2bnd12bL of the bent electrode s2bnd12b. In addition, the number of short electrodes s2bnd12aSa of the bent electrode s2bnd12a is equal to the number of short electrodes s2bnd12bSb of the bent electrode s2bnd12b; and the number of short electrodes s2bnd12aSb of the bent electrode s2bnd12a is equal to the number of short electrodes s2bnd12bSa of the bent electrode s2bnd12b.

將第19圖的電極片s2ELED1與第21圖的電極片s2ELED2組合後,即可得出如第18圖所示的金屬層s2MTL1。其中,主電極s2M11c將金屬層s2MTL分為兩個區段。其中,電極片s2ELED1在區段x=1與區段x=2中的電極圖樣彼此為鏡像,且電極片s2ELED2在區段x=1與區段x=2中的電極圖樣彼此亦為鏡像。After combining the electrode sheet s2ELED1 of FIG. 19 and the electrode sheet s2ELED2 of FIG. 21, the metal layer s2MTL1 shown in FIG. 18 can be obtained. The main electrode s2M11c divides the metal layer s2MTL into two sections. The electrode patterns of the electrode sheet s2ELED1 in the section x=1 and the section x=2 are mirror images of each other, and the electrode patterns of the electrode sheet s2ELED2 in the section x=1 and the section x=2 are also mirror images of each other.

請參見第23圖,其係金屬層s2MTL1’上的電極片包含兩個區段的另一個實施例之示意圖。金屬層s2MTL1’包含電極片s2ELED1’、s2ELED2’。以下以第24、25圖說明電極片s2ELED1’的電極圖樣,以及以第26、27圖說明電極片s2ELED2’的電極圖樣。Please refer to FIG. 23, which is a schematic diagram of another embodiment in which the electrode sheet on the metal layer s2MTL1' includes two sections. The metal layer s2MTL1' includes electrode sheets s2ELED1' and s2ELED2'. Hereinafter, the electrode patterns of the electrode sheet s2ELED1' will be described in Figs. 24 and 25, and the electrode patterns of the electrode sheet s2ELED2' will be described in Figs. 26 and 27.

請參見第24圖,其係第23圖的電極片s2ELED1’之示意圖。電極片s2ELED1’包含電極組s2GP11a’、s2GP11b’、s2GP11c’,以及共用電極s2cmn11’。Please refer to Fig. 24, which is a schematic diagram of the electrode sheet s2ELED1' of Fig. 23. The electrode sheet s2ELED1' includes electrode groups s2GP11a', s2GP11b', s2GP11c', and a common electrode s2cmn11'.

請參見第25圖,其係第23圖的電極片s2ELED1’所包含的電極圖樣之示意圖。電極組s2GP11a’包含主電極s2M11a’與分支電極s2br11a’;電極組s2GP11b’包含主電極s2M11b’與分支電極s2br11b’;以及,電極組s2GP11c’包含主電極s2M11c’與分支電極s2br11c1’、s2br11c2’。主電極s2M11a’、s2M11b’、s2M11c’均平行於y軸方向,而分支電極s2br11a’、s2br11b’、s2br11c1’、s2br11c2’均平行於x軸。Please refer to Fig. 25, which is a schematic diagram of the electrode pattern included in the electrode sheet s2ELED1' of Fig. 23. The electrode group s2GP11a’ includes a main electrode s2M11a’ and a branch electrode s2br11a’; the electrode group s2GP11b’ includes a main electrode s2M11b’ and a branch electrode s2br11b’; and the electrode group s2GP11c’ includes a main electrode s2M11c’ and branch electrodes s2br11c1’, s2br11c2’. The main electrodes s2M11a', s2M11b', and s2M11c' are all parallel to the y-axis direction, while the branch electrodes s2br11a', s2br11b', s2br11c1', and s2br11c2' are all parallel to the x-axis.

電極組s2GP11’a、s2GP11b’呈現平梳形狀。其組成分別與第11圖的電極組GP21a、GP21b相似,故不再詳述。另一方面,電極組s2GP11c’呈現魚骨形狀。由於電極組s2GP11c’在主電極s2M11c’的兩側分別包含分支電極s2br11c1’、s2br11c2’,因此電極組s2GP11c’所包含的分支電極s2br11c1’、s2br11c2’的數量較電極組s2GP11a’包含的分支電極s2br11a’的數量多,也較電極組s2GP11b’包含的分支電極s2br11b’的數量多。此外,共用電極s2cmn11’平行於x軸方向。共用電極s2cmn11’的兩端分別與主電極s2M11a’、s2M11b’相連,且共用電極s2cmn11’的中間與主電極s2M11c’相連。The electrode groups s2GP11'a and s2GP11b' have a flat comb shape. Its composition is similar to that of the electrode groups GP21a and GP21b in Fig. 11, so it will not be described in detail. On the other hand, the electrode group s2GP11c' has a fishbone shape. Since the electrode group s2GP11c' includes branch electrodes s2br11c1' and s2br11c2' on both sides of the main electrode s2M11c', the number of branch electrodes s2br11c1' and s2br11c2' included in the electrode group s2GP11c' is greater than the number of branch electrodes s2br11a included in the electrode group s2GP11a' The number of ′′ is larger than that of the branch electrode s2br11b′ included in the electrode group s2GP11b′. In addition, the common electrode s2cmn11' is parallel to the x-axis direction. The two ends of the common electrode s2cmn11' are respectively connected to the main electrodes s2M11a' and s2M11b', and the middle of the common electrode s2cmn11' is connected to the main electrode s2M11c'.

請參見第26圖,其係第23圖的電極片s2ELED2’之示意圖。電極片s2ELED2’包含共用電極s2cmn12’與彎折電極s2bnd12a’ 、s2bnd12b’。Please refer to Fig. 26, which is a schematic diagram of the electrode sheet s2ELED2' of Fig. 23. The electrode sheet s2ELED2' includes a common electrode s2cmn12' and bent electrodes s2bnd12a' and s2bnd12b'.

請參見第27圖,其係第23圖的電極片ELED2所包含的電極圖樣之示意圖。共用電極s2cmn12’平行於x軸,彎折電極s2bnd12a’、s2bnd12b’具有相同的形狀且彼此平行排列。因此,彎折電極s2bnd12a’ 的長電極s2bnd12aL’的數量,與彎折電極s2bnd12b’的長電極s2bnd12bL’的數量相等。此外,彎折電極s2bnd12a’ 的短電極s2bnd12aSa’的數量等於彎折電極s2bnd12b’的短電極s2bnd12bSa’的數量;以及,彎折電極s2bnd12a’的短電極s2bnd12aSb’的數量等於彎折電極s2bnd12b’的短電極s2bnd12bSb’的數量。Please refer to Fig. 27, which is a schematic diagram of the electrode pattern included in the electrode sheet ELED2 of Fig. 23. The common electrode s2cmn12' is parallel to the x-axis, and the bent electrodes s2bnd12a' and s2bnd12b' have the same shape and are arranged parallel to each other. Therefore, the number of long electrodes s2bnd12aL' of the bent electrode s2bnd12a' is equal to the number of long electrodes s2bnd12bL' of the bent electrode s2bnd12b'. In addition, the number of short electrodes s2bnd12aSa' of the bent electrode s2bnd12a' is equal to the number of short electrodes s2bnd12bSa' of the bent electrode s2bnd12b'; and the number of short electrodes s2bnd12aSb' of the bent electrode s2bnd12a' is equal to the number of short electrodes s2bnd12b'. The number of electrodes s2bnd12bSb'.

將第24圖的電極片s2ELED1’與第26圖的電極片s2ELED2’組合後,即可得出如第23圖所示的金屬層s2MTL1’。其中,主電極s2M11c’將金屬層s2MTL1’分為兩個區段。其中,電極片s2ELED1’在區段x=1與區段x=2中的電極圖樣相同,且電極片s2ELED2’在區段x=1與區段x=2中的電極圖樣彼此亦相同。After combining the electrode sheet s2ELED1' of FIG. 24 and the electrode sheet s2ELED2' of FIG. 26, the metal layer s2MTL1' shown in FIG. 23 can be obtained. The main electrode s2M11c' divides the metal layer s2MTL1' into two sections. The electrode pattern of the electrode sheet s2ELED1' in the section x=1 and the section x=2 is the same, and the electrode pattern of the electrode sheet s2ELED2' in the section x=1 and the section x=2 is also the same.

請參見第28圖,其係於金屬層s4MTL1上的電極片包含四個區段的一個實施例之示意圖。金屬層s4MTL1包含電極片s4ELED1、s4ELED2。電極片s4ELED1包含4個電極組與共用電極,電極片s4ELED2包含共用電極與4個彎折電極。其中,區段x=1和區段x=2的電極圖樣彼此為鏡像;區段x=3和區段x=4的電極圖樣彼此為鏡像。此外,左側的兩個區段(x=1和x=2) 的電極圖樣和右側的兩個區段(x=3和x=4)的電極圖樣彼此為鏡像。Please refer to FIG. 28, which is a schematic diagram of an embodiment in which the electrode sheet on the metal layer s4MTL1 includes four sections. The metal layer s4MTL1 includes electrode sheets s4ELED1 and s4ELED2. The electrode sheet s4ELED1 includes 4 electrode groups and a common electrode, and the electrode sheet s4ELED2 includes a common electrode and 4 bent electrodes. Among them, the electrode patterns of section x=1 and section x=2 are mirror images of each other; the electrode patterns of section x=3 and section x=4 are mirror images of each other. In addition, the electrode patterns of the two sections on the left (x=1 and x=2) and the electrode patterns of the two sections on the right (x=3 and x=4) are mirror images of each other.

請參見第29圖,其係於金屬層s4MTL1’上的電極片包含四個區段的另一個實施例之示意圖。金屬層s4MTL1’包含電極片s4ELED1’、s4ELED2’。電極片s4ELED1’包含4個電極組與一個共用電極,電極片s4ELED2’包含一個共用電極與4個彎折電極。其中,每個區段x=1、2、3、4的電極圖樣都相同。Please refer to FIG. 29, which is a schematic diagram of another embodiment in which the electrode sheet on the metal layer s4MTL1' includes four sections. The metal layer s4MTL1' includes electrode pieces s4ELED1' and s4ELED2'. The electrode sheet s4ELED1' includes 4 electrode groups and a common electrode, and the electrode sheet s4ELED2' includes a common electrode and 4 bent electrodes. Among them, the electrode patterns of each section x=1, 2, 3, and 4 are all the same.

根據前述說明,電極片所包含之區段的數量(X)與電極組、共用電極以及彎折電極的數量之間的關係可整理如表5。 表5 區段數量(X) 電極片ELED1 電極片ELED2 電極組 共用電極 共用電極 彎折電極 X=1 (第6~15圖) 2 左:平梳型 右:平梳型 1 1 1 X=2 (第18~27圖) 3 左:平梳型 右:平梳型 中:魚骨型 1 1 2 X=4 (第28、29圖) 5 左:平梳型 右:平梳型 中:魚骨型*2 1 1 4 According to the foregoing description, the relationship between the number of sections (X) included in the electrode sheet and the number of electrode groups, common electrodes, and bent electrodes can be summarized as shown in Table 5. table 5 Number of sections (X) Electrode sheet ELED1 Electrode sheet ELED2 Electrode group Common electrode Common electrode Bend electrode X=1 (Pictures 6-15) 2 Left: Flat comb type Right: Flat comb type 1 1 1 X=2 (Pictures 18-27) 3 Left: Flat comb type Right: Flat comb type Middle: Fishbone type 1 1 2 X=4 (pictures 28 and 29) 5 Left: Flat comb type Right: Flat comb type Middle: Fishbone type*2 1 1 4

當區段數量增加時,電極片所包含的電極組的數量與彎折電極的數量也隨著增加。假設分為X個區段,則電極片ELED1包含(X+1)個電極組,且電極片ELED2包含X個彎折電極。另,電極片ELED1、ELED2所包含的共用電極的數量並不會隨著區段數量的改變而異,始終包含1個共用電極。如前所述,當金屬層MTL1上的電極片所包含的區段數量改變時,其他金屬層上的電極片也需對應修改。此部分的修改屬於應用上的變化,此處不予詳述。When the number of sections increases, the number of electrode groups included in the electrode sheet and the number of bent electrodes also increase. Assuming that it is divided into X sections, the electrode sheet ELED1 includes (X+1) electrode groups, and the electrode sheet ELED2 includes X bent electrodes. In addition, the number of common electrodes included in the electrode sheets ELED1 and ELED2 does not vary with the number of segments, and always includes one common electrode. As mentioned above, when the number of sections included in the electrode pads on the metal layer MTL1 changes, the electrode pads on other metal layers also need to be modified accordingly. The modification of this part is an application change and will not be detailed here.

綜上,本揭露提供一種對閒置金屬層的電極圖樣加以設計,進而使金屬層上的電極片形成寄生電容效應的做法。此種藉由改變金屬層MTL1上的電極片ELED1、ELED2,以及在金屬層MTL2上的電極片ELED3、ELED4的電極圖樣的做法,能提供一個與電晶體電容C_MOS並聯的金屬電容C_MET。由於採用的是閒置金屬層,且直接利用金屬層之間的寄生電容的特性,本揭露的做法能在不占用額外電路的情況下,有效增加升壓電容Cb的電容值。In summary, the present disclosure provides a method for designing the electrode pattern of the idle metal layer, so that the electrode pads on the metal layer form a parasitic capacitance effect. This method of changing the electrode patterns of the electrode pieces ELED1 and ELED2 on the metal layer MTL1 and the electrode pieces ELED3 and ELED4 on the metal layer MTL2 can provide a metal capacitor C_MET in parallel with the transistor capacitor C_MOS. Since the idle metal layer is used and the characteristics of the parasitic capacitance between the metal layers are directly used, the method disclosed in the present disclosure can effectively increase the capacitance value of the boost capacitor Cb without occupying an additional circuit.

綜上所述,雖然本發明已以實施例揭露如上,然其並非用以限定本發明。本發明所屬技術領域中具有通常知識者,在不脫離本發明之精神和範圍內,當可作各種之更動與潤飾。因此,本發明之保護範圍當視後附之申請專利範圍所界定者為準。In summary, although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention. Those with ordinary knowledge in the technical field to which the present invention belongs can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to those defined by the attached patent application scope.

10:電荷泵倍壓電路 Vdd:電源電壓 Vout:輸出電壓 Clk,Clkb:時脈信號 Clkd:時脈驅動信號 10a:電荷泵 Vb:升壓電壓 Cb:升壓電容 V1,V2:電壓 C_MOS:電晶體電容 31a,31c:多晶矽層 31b:擴散層 C_MET:金屬電容 ELED1,ELED2,ELED3,ELED4,mELED1,mELED2,mELED3,mELED4,mELED5,mELED6,mELED7,mELED8,oELED1,oELED2,oELED3,oELED4,s2ELED1,s2ELED2,s2ELED1’,s2ELED2’,s4ELED1,s4ELED2,s4ELED1’,s4ELED2’:電極片 MTL,MTL1,MTL2,mMTL1,mMTL2,mMTL3,mMTL4, oMTL1,oMTL2,s2MTL1,s2MTL1’,s4MTL1,s4MTL1’:金屬層 Ch,Ch1,Ch2:平面電容 Cv1,Cv2:縱向電容 cmn11,cmn12,cmn21,cmn22,s2cmn11,s2cmn12, s2cmn11’,s2cmn12’:共用電極 GP11a,GP11b,GP21a,GP21b,s2GP11a,s2GP11b, s2GP11c,s2GP11a’,s2GP11b’,s2GP11c’:電極組 M11a,M11b,M21a,M21b,s2M11a,s2M11c,s2M11b, s2M11a’,s2M11c’,s2M11b’:主電極 br11a,br11b,b21a,b21b,s2br11a,s2br11c1,s2br11c2,s2br11b, s2br11a’,s2br11c1’,s2br11c2’,s2br11b’:分支電極 bnd12,bnd22,s2bnd12a,s2bnd12b,s2bnd12a’,s2bnd12b’:彎折電極 eledL12,eledL22,s2bnd12aL,s2bnd12bL,s2bnd12aL’,s2bnd12bL’:長電極 eledS12a,eledS12b,eledS22a,eledS22b,s2bnd12aSa,s2bnd12aSb,sbnd12bSa,s2bnd12bSb,s2bnd12aSa’,s2bnd12aSb’,sbnd12bSa’,s2bnd12bSb’:短電極10: Charge pump voltage doubler circuit Vdd: power supply voltage Vout: output voltage Clk, Clkb: clock signal Clkd: clock drive signal 10a: charge pump Vb: boost voltage Cb: Boost capacitor V1, V2: voltage C_MOS: Transistor capacitance 31a, 31c: polysilicon layer 31b: Diffusion layer C_MET: Metal capacitor ELED1, ELED2, ELED3, ELED4, mELED1, mELED2, mELED3, mELED4, mELED5, mELED6, mELED7, mELED8, oELED1, oELED2, oELED3, oELED4, s2ELED1, s2ELED2', ELED2', ELED1's4 ': electrode sheet MTL,MTL1,MTL2,mMTL1,mMTL2,mMTL3,mMTL4, oMTL1,oMTL2,s2MTL1,s2MTL1’,s4MTL1,s4MTL1’:Metal layer Ch, Ch1, Ch2: Planar capacitance Cv1, Cv2: longitudinal capacitance cmn11, cmn12, cmn21, cmn22, s2cmn11, s2cmn12, s2cmn11’,s2cmn12’: common electrode GP11a,GP11b,GP21a,GP21b,s2GP11a,s2GP11b, s2GP11c,s2GP11a’,s2GP11b’,s2GP11c’: Electrode group M11a,M11b,M21a,M21b,s2M11a,s2M11c,s2M11b, s2M11a’,s2M11c’,s2M11b’: main electrode br11a,br11b,b21a,b21b,s2br11a,s2br11c1,s2br11c2,s2br11b, s2br11a’,s2br11c1’,s2br11c2’,s2br11b’: branch electrode bnd12,bnd22,s2bnd12a,s2bnd12b,s2bnd12a’,s2bnd12b’: bending electrode eledL12,eledL22,s2bnd12aL,s2bnd12bL,s2bnd12aL’,s2bnd12bL’: long electrode eledS12a,eledS12b,eledS22a,eledS22b,s2bnd12aSa,s2bnd12aSb,sbnd12bSa,s2bnd12bSb,s2bnd12aSa’,s2bnd12aSb’,sbnd12bSa’,s2bnd12bSb’: Short electrodes

第1圖,其係電荷泵倍壓電路的示意圖。 第2圖,其係將金屬電容C_MET與電晶體電容C_MOS並聯之示意圖。 第3圖,其係利用電晶體電容上方的金屬層形成電極圖樣之示意圖。 第4圖,其係於兩個金屬層上設置電極片,進而根據電極片的電容圖樣產生電容效果的一種實施例之示意圖。 第5A、5B、5C、5D圖,其係兩個金屬層上的電極片彼此形成互容之示意圖。 第6圖,其係電極片ELED1之示意圖。 第7圖,其係電極片ELED1所包含的電極圖樣之示意圖。 第8圖,其係電極片ELED2之示意圖。 第9圖,其係電極片ELED2所包含的電極圖樣之示意圖。 第10圖,其係第6圖的電極片ELED1與第8圖的電極片ELED2所組成之金屬層MTL1的示意圖。 第11圖,其係電極片ELED3之示意圖。 第12圖,其係電極片ELED3所包含的電極圖樣之示意圖。 第13圖,其係電極片ELED4之示意圖。 第14圖,其係電極片ELED4所包含的電極圖樣之示意圖。 第15圖,其係第11圖的電極片ELED3與第13圖的電極片ELED4所組成之金屬層MTL2的示意圖。 第16圖,其係於多個金屬層上形成電極圖樣彼此交錯之電極片的示意圖。 第17圖,其係於兩個金屬層上設置電極片,進而根據電極片的電容圖樣產生電容效果的另一種實施例之示意圖。 第18圖,其係金屬層s2MTL1上的電極片包含兩個區段的一個實施例之示意圖。 第19圖,其係第18圖的電極片s2ELED1之示意圖。 第20圖,其係第18圖的電極片s2ELED1所包含的電極圖樣之示意圖。 第21圖,其係第18圖的電極片s2ELED2之示意圖。 第22圖,其係第18圖的電極片s2ELED2所包含的電極圖樣之示意圖。 第23圖,其係金屬層s2MTL1’上的電極片包含兩個區段的另一個實施例之示意圖。 第24圖,其係第23圖的電極片s2ELED1’之示意圖。 第25圖,其係第23圖的電極片s2ELED1’所包含的電極圖樣之示意圖。 第26圖,其係第23圖的電極片s2ELED2’之示意圖。 第27圖,其係第23圖的電極片s2ELED2’所包含的電極圖樣之示意圖。 第28圖,其係於金屬層s4MTL1上的電極片包含四個區段的一個實施例之示意圖。 第29圖,其係於金屬層s4MTL1’上的電極片包含四個區段的另一個實施例之示意圖。Figure 1 is a schematic diagram of a charge pump voltage doubler circuit. Figure 2 is a schematic diagram of connecting the metal capacitor C_MET and the transistor capacitor C_MOS in parallel. Figure 3 is a schematic diagram of using the metal layer above the transistor capacitor to form an electrode pattern. FIG. 4 is a schematic diagram of an embodiment in which electrode plates are arranged on two metal layers, and then a capacitance effect is generated according to the capacitance pattern of the electrode plates. Figures 5A, 5B, 5C, and 5D are schematic diagrams showing that the electrode plates on the two metal layers form mutual capacitance with each other. Figure 6 is a schematic diagram of the electrode sheet ELED1. Figure 7 is a schematic diagram of the electrode pattern included in the electrode sheet ELED1. Figure 8 is a schematic diagram of the electrode sheet ELED2. Figure 9 is a schematic diagram of the electrode pattern included in the electrode sheet ELED2. Fig. 10 is a schematic diagram of the metal layer MTL1 composed of the electrode sheet ELED1 of Fig. 6 and the electrode sheet ELED2 of Fig. 8. Figure 11 is a schematic diagram of the electrode sheet ELED3. Figure 12 is a schematic diagram of the electrode pattern included in the electrode sheet ELED3. Figure 13 is a schematic diagram of the electrode sheet ELED4. Figure 14 is a schematic diagram of the electrode pattern included in the electrode sheet ELED4. FIG. 15 is a schematic diagram of the metal layer MTL2 composed of the electrode sheet ELED3 of FIG. 11 and the electrode sheet ELED4 of FIG. 13. FIG. 16 is a schematic diagram of forming electrode sheets with interlaced electrode patterns on a plurality of metal layers. FIG. 17 is a schematic diagram of another embodiment in which electrode plates are arranged on two metal layers, and the capacitance effect is generated according to the capacitance pattern of the electrode plates. FIG. 18 is a schematic diagram of an embodiment in which the electrode sheet on the metal layer s2MTL1 includes two sections. Fig. 19 is a schematic diagram of the electrode sheet s2ELED1 of Fig. 18. Fig. 20 is a schematic diagram of the electrode pattern included in the electrode sheet s2ELED1 of Fig. 18. Fig. 21 is a schematic diagram of the electrode sheet s2ELED2 of Fig. 18. Fig. 22 is a schematic diagram of the electrode pattern included in the electrode sheet s2ELED2 of Fig. 18. FIG. 23 is a schematic diagram of another embodiment in which the electrode sheet on the metal layer s2MTL1' includes two sections. Fig. 24 is a schematic diagram of the electrode sheet s2ELED1' of Fig. 23. Fig. 25 is a schematic diagram of the electrode pattern included in the electrode sheet s2ELED1' of Fig. 23. Fig. 26 is a schematic diagram of the electrode sheet s2ELED2' of Fig. 23. Fig. 27 is a schematic diagram of the electrode pattern included in the electrode sheet s2ELED2' of Fig. 23. FIG. 28 is a schematic diagram of an embodiment in which the electrode sheet on the metal layer s4MTL1 includes four sections. Fig. 29 is a schematic diagram of another embodiment in which the electrode sheet on the metal layer s4MTL1' includes four sections.

C_MOS:電晶體電容C_MOS: Transistor capacitance

31a,31c:多晶矽層31a, 31c: polysilicon layer

31b:擴散層31b: Diffusion layer

C_MET:金屬電容C_MET: Metal capacitor

ELED1,ELED2:電極片ELED1, ELED2: electrode sheet

MTL:金屬層MTL: Metal layer

Claims (10)

一種金屬電容,包含: 一第一金屬層,設置於一基板的上方,包含: 一第一電極片;以及 一第二電極片,其中一第一平面電容形成於該第一電極片與該第二電極片之間;以及 一第二金屬層,設置於該第一金屬層的上方,包含: 一第三電極片;以及 一第四電極片,其中一第二平面電容形成於該第三電極片與該第四電極片之間,其中, 該第四電極片的至少一部份係位於該第一電極片的上方,且一第一縱向電容形成於該第一電極片與該第四電極片之間,以及 該第三電極片的至少一部份係位於該第二電極片的上方,且一第二縱向電容形成於該第二電極片與該第三電極片之間。A metal capacitor, including: A first metal layer, disposed on a substrate, includes: A first electrode sheet; and A second electrode sheet, in which a first planar capacitor is formed between the first electrode sheet and the second electrode sheet; and A second metal layer, disposed above the first metal layer, includes: A third electrode sheet; and A fourth electrode sheet, wherein a second planar capacitor is formed between the third electrode sheet and the fourth electrode sheet, wherein, At least a part of the fourth electrode sheet is located above the first electrode sheet, and a first longitudinal capacitor is formed between the first electrode sheet and the fourth electrode sheet, and At least a part of the third electrode sheet is located above the second electrode sheet, and a second longitudinal capacitor is formed between the second electrode sheet and the third electrode sheet. 如請求項1所述之金屬電容,其中該第一電極片係包含: 一第一共用電極,平行於一第一方向; 一第一電極組,包含: 一第一主電極,平行於一第二方向,其係與該第一共用電極相連;以及, 複數個第一分支電極,平行於該第一方向,其中各該第一分支電極係包含一第一端與一第二端,且各該第一分支電極的該第一端與該第一主電極相連;以及 一第二電極組,包含: 一第二主電極,平行於該第二方向,其係與該第一共用電極相連;以及, 複數個第二分支電極,平行於該第一方向,其中各該第二分支電極係包含一第一端與一第二端,且各該第二分支電極的該第二端與該第二主電極相連, 其中該等第一分支電極的該第二端係朝向該第二主電極,且該等第二分支電極的該第一端係朝向該第一主電極。The metal capacitor according to claim 1, wherein the first electrode sheet includes: A first common electrode, parallel to a first direction; A first electrode group, including: A first main electrode, parallel to a second direction, which is connected to the first common electrode; and, A plurality of first branch electrodes are parallel to the first direction, wherein each of the first branch electrodes includes a first end and a second end, and the first end of each first branch electrode and the first main The electrodes are connected; and A second electrode group, including: A second main electrode, parallel to the second direction, which is connected to the first common electrode; and, A plurality of second branch electrodes are parallel to the first direction, wherein each of the second branch electrodes includes a first end and a second end, and the second end of each second branch electrode and the second main The electrodes are connected, The second ends of the first branch electrodes face the second main electrode, and the first ends of the second branch electrodes face the first main electrode. 如請求項2所述之金屬電容,其中該第二電極片係包含: 一第二共用電極,平行於該第一方向; 一第一彎折電極,包含: 複數個長電極,平行於該第一方向並沿著該第二方向而並列,其中各該長電極具有一第一端與一第二端;以及 複數個短電極,平行於該第二方向,其中該等短電極中的一第一短電極係連接至該第二共用電極, 其中一第一部份的該第一彎折電極的該等短電極在該第一方向上的位置互相對齊,一第二部份的該第一彎折電極的該等短電極在該第一方向上的位置互相對齊,且該第一彎折電極的該等短電極在該第二方向上的位置係彼此交錯, 其中該第一部份的該第一彎折電極的該等短電極係連接至該第一彎折電極的該等長電極的該第一端,且該第二部份的該第一彎折電極的該等短電極係連接至該第一彎折電極的該等長電極的該第二端。The metal capacitor according to claim 2, wherein the second electrode sheet includes: A second common electrode, parallel to the first direction; A first bending electrode, including: A plurality of long electrodes parallel to the first direction and juxtaposed along the second direction, wherein each of the long electrodes has a first end and a second end; and A plurality of short electrodes parallel to the second direction, wherein a first short electrode of the short electrodes is connected to the second common electrode, The positions of the short electrodes of the first bent electrode of a first part in the first direction are aligned with each other, and the short electrodes of the first bent electrode of a second part are in the first direction. The positions in the direction are aligned with each other, and the positions of the short electrodes of the first bending electrode in the second direction are staggered with each other, The short electrodes of the first bent electrode of the first part are connected to the first ends of the long electrodes of the first bent electrode, and the first bent electrode of the second part The short electrodes of the electrode are connected to the second ends of the long electrodes of the first bent electrode. 如請求項3所述之金屬電容,其中該第三電極片係包含: 一第三共用電極,平行於該第一方向; 一第三電極組,包含: 一第三主電極,平行於該第二方向,其係與該第三共用電極相連;以及, 複數個第三分支電極,平行於該第一方向,其中各該第三分支電極係包含一第一端與一第二端,且各該第三分支電極的該第一端與該第三主電極相連;以及 一第四電極組,包含: 一第四主電極,平行於該第二方向,其係與該第三共用電極相連;以及, 複數個第四分支電極,平行於該第一方向,其中各該第四分支電極係包含一第一端與一第二端,且各該第四分支電極的該第二端與該第四主電極相連, 其中該等第三分支電極的該第二端係朝向該第四主電極,且該等第四分支電極的該第一端係朝向該第三主電極。The metal capacitor according to claim 3, wherein the third electrode sheet includes: A third common electrode, parallel to the first direction; A third electrode group, including: A third main electrode, parallel to the second direction, which is connected to the third common electrode; and, A plurality of third branch electrodes are parallel to the first direction, wherein each of the third branch electrodes includes a first end and a second end, and the first end of each third branch electrode and the third main The electrodes are connected; and A fourth electrode group, including: A fourth main electrode, parallel to the second direction, which is connected to the third common electrode; and, A plurality of fourth branch electrodes are parallel to the first direction, wherein each of the fourth branch electrodes includes a first end and a second end, and the second end of each fourth branch electrode and the fourth main The electrodes are connected, The second ends of the third branch electrodes face the fourth main electrode, and the first ends of the fourth branch electrodes face the third main electrode. 如請求項4所述之金屬電容,其中該第四電極片係包含: 一第四共用電極,平行於該第一方向;以及 一第三彎折電極,包含: 複數個長電極,平行於該第一方向並沿著該第二方向而並列,其中各該長電極具有一第一端與一第二端;以及 複數個短電極,平行於該第二方向,其中該第三彎折電極的該等短電極中的一第一短電極係連接至該第四共用電極, 其中一第一部份的該第三彎折電極的該等短電極在該第一方向上的位置互相對齊,一第二部份的該第三彎折電極的該等短電極在該第一方向上的位置互相對齊,且該第三彎折電極的該等短電極在該第二方向上的位置係彼此交錯, 其中該第一部份的該第三彎折電極的該等短電極係連接至該第三彎折電極的該等長電極的該第一端,且該第二部份的該第三彎折電極的該等短電極係連接至該第三彎折電極的該等長電極的該第二端。The metal capacitor according to claim 4, wherein the fourth electrode sheet includes: A fourth common electrode, parallel to the first direction; and A third bending electrode, including: A plurality of long electrodes parallel to the first direction and juxtaposed along the second direction, wherein each of the long electrodes has a first end and a second end; and A plurality of short electrodes parallel to the second direction, wherein a first short electrode of the short electrodes of the third bent electrode is connected to the fourth common electrode, The positions of the short electrodes of the third bent electrode of a first part in the first direction are aligned with each other, and the short electrodes of the third bent electrode of a second part are in the first direction. The positions in the direction are aligned with each other, and the positions of the short electrodes of the third bending electrode in the second direction are staggered with each other, The short electrodes of the third bent electrode of the first part are connected to the first ends of the long electrodes of the third bent electrode, and the third bent electrode of the second part The short electrodes of the electrode are connected to the second ends of the long electrodes of the third bent electrode. 如請求項1所述之金屬電容,其中, 該第一電極片與該第三電極片係接收一第一電壓;以及 該第二電極片與該第四電極片係接收一第二電壓, 其中該第一平面電容、該第二平面電容、該第一縱向電容與該第二縱向電容係彼此並聯。The metal capacitor according to claim 1, wherein: The first electrode sheet and the third electrode sheet receive a first voltage; and The second electrode sheet and the fourth electrode sheet receive a second voltage, The first planar capacitor, the second planar capacitor, the first longitudinal capacitor and the second longitudinal capacitor are connected in parallel with each other. 一種金屬電容,包含: 至少一金屬層,設置於一電晶體電容的上方,包含: 一第一電極片,其係接收一第一電壓;以及 一第二電極片,其係接收一第二電壓。A metal capacitor, including: At least one metal layer, which is disposed above a transistor capacitor, includes: A first electrode sheet, which receives a first voltage; and A second electrode sheet receives a second voltage. 如請求項7所述之金屬電容,其中該至少一金屬層係包含: 一第一金屬層;以及 一第二金屬層, 其中,一第一平面電容形成於該第一金屬層的該第一電極片與該第一金屬層的該第二電極片間,且一第二平面電容形成於該第二金屬層的該第一電極片與該第二金屬層的該第二電極片間,其中 該第二金屬層的該第二電極片的至少一部份係位於該第一金屬層的該第一電極片的位置的上方,且一第一縱向電容形成於該第一金屬層的該第一電極片與該第二金屬層的該第二電極片間,以及, 該第二金屬層的該第一電極片的至少一部份係位於該第一金屬層的該第二電極片的位置的上方,且一第二縱向電容形成於該第一金屬層的該第二電極片與該第二金屬層的該第一電極片間, 其中該第一平面電容、該第二平面電容、該第一縱向電容與該第二縱向電容係彼此並聯。The metal capacitor according to claim 7, wherein the at least one metal layer includes: A first metal layer; and A second metal layer, Wherein, a first planar capacitor is formed between the first electrode plate of the first metal layer and the second electrode plate of the first metal layer, and a second planar capacitor is formed on the first electrode plate of the second metal layer. Between an electrode sheet and the second electrode sheet of the second metal layer, wherein At least a part of the second electrode piece of the second metal layer is located above the position of the first electrode piece of the first metal layer, and a first vertical capacitor is formed on the first electrode piece of the first metal layer Between an electrode sheet and the second electrode sheet of the second metal layer, and, At least a part of the first electrode piece of the second metal layer is located above the position of the second electrode piece of the first metal layer, and a second vertical capacitor is formed on the first metal layer of the first metal layer. Between the two electrode sheets and the first electrode sheet of the second metal layer, The first planar capacitor, the second planar capacitor, the first longitudinal capacitor and the second longitudinal capacitor are connected in parallel with each other. 如請求項8所述之金屬電容,其中 該第一金屬層的該第一電極片具有一第一電極圖樣、該第一金屬層的該第二電極片具有一第二電極圖樣、該第二金屬層的該第一電極片具有一第三電極圖樣,以及該第二金屬層的該第二電極片具有一第四電極圖樣,其中 該第一電極圖樣所包含的複數個電極係與該第二電極圖樣所包含的複數個電極互相交錯排列,且該第三電極圖樣所包含的複數個電極係與第四電極圖樣所包含的複數個電極互相交錯排列, 其中該第一電極圖樣與該第三電極圖樣相似,且該第二電極圖樣與該第四電極圖樣相似。The metal capacitor according to claim 8, wherein The first electrode sheet of the first metal layer has a first electrode pattern, the second electrode sheet of the first metal layer has a second electrode pattern, and the first electrode sheet of the second metal layer has a first electrode pattern. A three-electrode pattern, and the second electrode sheet of the second metal layer has a fourth electrode pattern, wherein The plurality of electrodes included in the first electrode pattern and the plurality of electrodes included in the second electrode pattern are arranged alternately, and the plurality of electrodes included in the third electrode pattern are arranged with the plurality of electrodes included in the fourth electrode pattern. The electrodes are arranged alternately, The first electrode pattern is similar to the third electrode pattern, and the second electrode pattern is similar to the fourth electrode pattern. 如請求項8所述之金屬電容,其中 該第一金屬層的該第一電極片具有一第一電極圖樣、該第一金屬層的該第二電極片具有一第二電極圖樣、該第二金屬層的該第一電極片具有一第三電極圖樣,以及該第二金屬層的該第二電極片具有一第四電極圖樣,其中 該第一電極圖樣所包含的複數個電極係與該第二電極圖樣所包含的複數個電極互相交錯排列,且該第三電極圖樣所包含的複數個電極係與第四電極圖樣所包含的複數個電極互相交錯排列, 其中該第一電極圖樣與該第四電極圖樣相似,且該第二電極圖樣與該第三電極圖樣相似。The metal capacitor according to claim 8, wherein The first electrode sheet of the first metal layer has a first electrode pattern, the second electrode sheet of the first metal layer has a second electrode pattern, and the first electrode sheet of the second metal layer has a first electrode pattern. A three-electrode pattern, and the second electrode sheet of the second metal layer has a fourth electrode pattern, wherein The plurality of electrodes included in the first electrode pattern and the plurality of electrodes included in the second electrode pattern are arranged alternately, and the plurality of electrodes included in the third electrode pattern are arranged with the plurality of electrodes included in the fourth electrode pattern. The electrodes are arranged alternately, The first electrode pattern is similar to the fourth electrode pattern, and the second electrode pattern is similar to the third electrode pattern.
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