TW202044522A - 微機電系統及其製造方法 - Google Patents

微機電系統及其製造方法 Download PDF

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TW202044522A
TW202044522A TW108133659A TW108133659A TW202044522A TW 202044522 A TW202044522 A TW 202044522A TW 108133659 A TW108133659 A TW 108133659A TW 108133659 A TW108133659 A TW 108133659A TW 202044522 A TW202044522 A TW 202044522A
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base
cavity
semiconductor substrate
metal
patent application
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TW108133659A
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TWI717022B (zh
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曾李全
謝元智
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台灣積體電路製造股份有限公司
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    • B81B7/02—Microstructural systems; Auxiliary parts of microstructural devices or systems containing distinct electrical or optical devices of particular relevance for their function, e.g. microelectro-mechanical systems [MEMS]
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Abstract

本發明的一些方面提供一種微機電系統，其包含具有第一凹穴的半導體基底。半導體基底形成與第一凹穴相鄰的底座。裝置上覆於底座且通過第一凹穴內的金屬接合到半導體基底。多個第二凹穴形成於裝置下方的底座的表面中，其中第二凹穴小於第一凹穴。在一些教示中，第二凹穴是空隙。在一些教示中，第一凹穴中的金屬包括共熔混合物。此結構涉及一種微機電系統的製造方法，其中將提供遮罩以蝕刻第一凹穴的層分段為使得能夠容易地從底座上方的區域去除遮罩提供層。

Description

微機電系統及其製造方法
對於半導體製造（尤其是微機電系統（micro-electromechanical systems，MEMS）的製造）的許多情況，期望將單獨製造的裝置接合到半導體基底上。MEMS的應用範圍很廣泛。舉例來說，MEMS出現在如下裝置中：手持式裝置（例如加速計、陀螺儀、數位羅盤）、壓力感測器（例如碰撞感測器）、微流控元件（例如閥門、泵）、光學開關（例如鏡）以及光探測和測距（light detection and ranging，LiDAR）。
本公開提供用於實施本公開的不同特徵的許多不同實施例或實例。下文描述了組件和布置的具體實例來簡化本公開。當然，這些僅僅是實例而並非旨在作為限制。舉例來說，在以下描述中，在第二特徵上方或在第二特徵上形成第一特徵可包含第一特徵與第二特徵直接接觸地形成的實施例，並且還可包含在第一特徵與第二特徵之間可形成有額外特徵，使得第一特徵與第二特徵可以不直接接觸的實施例。
本文中可能使用例如“在…下方（beneath）”、“在…下面（below）”、“下部（lower）”、“在…上方（above）”、“上部（upper）”等空間相對術語來描述如圖中所示出的一個元件或特徵與另一（些）元件或特徵的關係。除圖中所描繪的定向之外，這些空間相對術語旨在涵蓋裝置或設備在使用或操作時的不同定向。裝置或設備可被另外定向（旋轉90度或處於其它定向），而本文中所使用的空間相對描述詞因此可相應地作出解釋。術語“第一”、“第二”、“第三”、“第四”等僅僅是通用標識符，且因此可在各種實施例中互換。舉例來說，雖然元件（例如開口）在一些實施例中可被稱為“第一”元件，但所述元件在其它實施例中可被稱為“第二”元件。
本公開涉及一種微機電系統（MEMS），所述微機電系統包含：使用接合製程（例如壓縮接合、固液擴散接合（solid-liquid inter-diffusion bonding，SLiD）等）附接到半導體基底的裝置。裝置和基底可以鎖與鑰布置（lock and key arrangement）的形式配置在一起，其中基底上的凹穴提供鎖，而裝置上的金屬凸塊提供鑰。所述裝置可放置在由基底的與凹穴相鄰的部分所形成的底座上。
根據本發明教示的一些方面，底座刻有緊密相鄰的開口。當在基底中蝕刻凹穴時，這些開口對應於形成在作為遮罩的層中的開口。開口在遮罩提供層上覆於底座的位置處減小遮罩提供層的與蝕刻製程相關的臨界尺寸。在那些位置處減小遮罩提供層的臨界尺寸使得能夠用簡化的蝕刻製程從底座區域去除遮罩提供層。簡化用於從底座去除遮罩提供層的蝕刻製程可避免在去除製程期間附帶地對其它結構造成的損壞。
如在本公開中所使用的，與蝕刻製程相關的臨界尺寸表徵出通過蝕刻去除結構所花費的時間的近似值，且此花費的時間正比於所述結構的任何部分距離最接近的暴露表面的最大深度。立方體的臨界尺寸將為側面長度的二分之一。球體的臨界尺寸將為其半徑。只有一側曝光的固態膜的臨界尺寸將為膜的厚度。固態膜的臨界尺寸可通過將膜圖案化為具有臨界尺寸比膜厚度小的圖案而減小。舉例來說，如果將膜分段為具有比膜厚度小的溝槽到溝槽的間距（trench-to-trench spacing）的周期性間隔開的溝槽，則臨界尺寸減小為溝槽到溝槽的間距的二分之一。
本發明教示的一些方面涉及一種將第二裝置接合到基底的方法，在所述基底上形成有第一裝置。在一些教示中，第一裝置形成於基底上的介電基質內。介電基質可以是氧化物。所述製程包含：在介電基質上方形成遮罩，其中所述遮罩包含用於形成凹穴的開口和與凹穴開口相鄰的底座區域中的多個較小開口。遮罩用於蝕刻介電基質中的對應圖案。隨後，蝕穿經圖案化的介電基質，將凹穴形成於基底中。較小開口可產生與具有刻痕表面的底座，且此底座相鄰於凹穴。在形成凹穴之後從底座區域去除介電基質。較小開口減少如下階段所需的時間：通過減小待去除的介電基質的所述部分的臨界尺寸來進行處理的階段。處理時間減少和相鄰於底座區域的介電基質的橫向蝕刻的減少有關，這可以提升所產生的裝置的功能。在一些實施例中，第一裝置是波導管，所述波導管從介電基質延伸到在底座區域上方形成的介電基質中的開口中。減少橫向蝕刻可減少所述開口內的所述波導管的懸伸，這又可便於維持波導管的適當定向。
第二裝置可在從底座區域去除介電基質之後接合到基底。在一些教示中，第二裝置包含當將第二裝置置放於基底上時插入到凹穴中的金屬凸塊。在一些教示中，在抵靠基底而加壓第二裝置時使金屬擴散或流動。在完成接合製程之前，第二裝置將會抵靠在底座上，從而通過底座高度來確定第二裝置與第一裝置豎直對齊。在一些教示中，第二裝置是雷射裝置，第一裝置是波導管，且豎直定位將雷射裝置與波導管對齊。在所產生的結構中，第二裝置通過容納於凹穴內的金屬接合結構結合到基底。在一些教示中，接合製程包含SLiD接合。
圖1示出根據本發明教示的一些方面的MEMS 100。MEMS 100包含基底115。介電基質119形成於基底115上方。波導管117或其它裝置可形成於介電基質119內。第二裝置（裝置109）接合到介電基質119中的開口101內的半導體基底115。裝置109通過凹穴105內的金屬接合結構107接合到基底115，所述金屬接合結構已形成於接合區域123內的基底115中。在一些教示中，裝置109是雷射裝置。在一些教示中，金屬接合結構107包含兩種金屬的共熔混合物（eutectic mixture）。
裝置109抵靠基底115的與接合區域123相鄰的支撐區域125內的底座103。底座103是基底115的與凹穴105相鄰的區域。在使裝置109放置於底座103上的情況下，裝置109的輸出裝置111與波導管117對齊。波導管117從介電基質119突出一距離112。根據一些教示，距離112比介電基質119的厚度114小。在一些教示中，厚度114在1微米到40微米的範圍內。在一些教示中，厚度114在2微米到20微米（例如5微米）的範圍內。在一些教示中，距離112是厚度114的二分之一或小於二分之一。在一些教示中，距離112是厚度114的四分之一或小於四分之一。在一些教示中，距離112是厚度114的十分之一或小於十分之一。縮短距離112將使波導管117的懸伸部分下陷（sag）而影響波導管117與輸出裝置111對齊的任何可能性降到最低。
底座103刻有開口102。刻痕是周期性的，由此在底座103的上表面中反映出的圖案的臨界尺寸大約是相鄰開口102之間的距離126的二分之一。在一些教示中，距離126在0.1微米到10微米的範圍內。
凹穴105具有適合於容納將裝置109接合到基底115的金屬接合結構107的尺寸。在一些教示中，凹穴105具有在10微米到2000微米的範圍內的寬度108。在一些教示中，凹穴105具有在0.5微米到20微米的範圍內的深度110。開口102可具有比深度110小的深度128。在一些教示中，深度128是深度110的75%或小於75%。開口102具有比凹穴105的寬度108小得多的寬度124。在一些教示中，寬度124在0.1微米到10微米的範圍內。底座103具有適合於支撐裝置109的寬度122。底座103可具有額外寬度，以使將裝置109定位於凹穴105上方時底座103可具有一些靈活性以支撐裝置109的位於凹穴105任一側的一些部分。在一些教示中，底座103具有在5微米到2000微米的範圍內的寬度122。在一些教示中，底座103具有在10微米到200微米（例如50微米）的範圍內的寬度122。
硬遮罩121可存在於介電基質119上方。硬遮罩121可在形成凹穴105和底座103的製程期間保護介電基質119和介電基質119內的裝置。形成於介電基質119內的裝置可包含波導管117。在一些教示中，波導管117是氮化矽（SiN）。在一些教示中，用介電基質119形成可經操作以改變波導管117內的折射率的加熱器。此加熱器可用於相位調諧（phase tuining）或相位掃描（phase scanning）。介電基質119還可包含裝置，例如光學偏轉裝置（optical delection device）、繞射光柵（diffraction grating）、光束發射器、相位調諧器、光學相控陣（optical phased array）、光探測器等。雖然MEMS 100可以是任何類型的MEMS裝置，但在一些教示中，MEMS 100是光探測和測距系統（light detection and ranging system，LiDAR）或飛行時間（a time-of-flight，TOF）深度相機。在一些教示中，MEMS 100是無線通信裝置。在一些教示中，MEMS 100包含光學開關。在一些教示中，MEMS 100包含用於處理由光探測器產生的數據的電路。
在一些教示中，基底115是塊狀矽基底。基底115還可以是二元半導體基底（例如GaAs）、三元半導體基底（例如AlGaAs）、更多元的半導體基底、或甚至藍寶石基底。在一些教示中，基底115是絕緣體上覆半導體（semiconductor-on-insulator，SOI）基底（例如絕緣體上覆矽基底）。
裝置109可以是可適宜接合到基底115的任何類型的裝置。在一些教示中，裝置109是相對於基底115上的其它裝置豎直對齊以增強MEMS 100功能的裝置。在一些教示中，裝置109包含半導體基底。在一些教示中，裝置109是雷射裝置。在一些教示中，裝置109是雷射二極體。
在一些教示中，金屬接合結構107包含銅（Cu）、錫（Sn）、金（Au）、銦（In）、鈦（Ti）、其合金、其組合等中的一種或多種。在一些教示中，金屬接合結構107包含前述物質中的兩種或多於兩種。舉例來說，金屬接合結構107可包含CuSn、AuSn或Auln。在一些教示中，金屬接合結構107包含CuSn-Cu鍵結（bond）、CuSn-CuSn鍵結、AuSn-Au鍵結、Auln-Au鍵結等。在一些教示中，金屬接合結構107包含具有300℃或低於300℃的熔點溫度的一種或多種材料。低熔點能夠實現較低溫度的接合製程。
圖2到圖10根據本公開的一些方面示出在MEMS裝置的各個製造階段下的一系列橫截面視圖（橫截面視圖200到橫截面視圖1000）。儘管參照一系列動作描述了圖2到圖10，但應瞭解，這些動作的順序可在某些狀況下變更，且這一系列動作可適用於除所示出的結構外的結構。在一些實施例中，這些動作中的一些可完全或部分地省略。此外，應瞭解，圖2到圖10所示的結構不限於製造方法，而是可單獨作為獨立於所述方法的結構。
如圖2的橫截面視圖200所示出，根據本公開的製程可從基底115開始，在所述基底115上方，已在介電基質119內形成波導管117或其它裝置。在一些實施例中，基底115在此加工階段呈晶圓（wafer）形式且在與裝置109接合之前不進行分割。在呈晶圓形式時，基底115可具有例如1英寸（25毫米）；2英寸（51毫米）；3英寸（76毫米）；4英寸（100毫米）；5英寸（130毫米）或125毫米（4.9英寸）；150毫米（5.9英寸，通常被稱作“6英寸”）；200毫米（7.9英寸，通常被稱作“8英寸”）；300毫米（11.8英寸，通常被稱作“12英寸”）；或450毫米（17.7英寸，通常被稱作“18英寸”）的直徑。
介電基質119可包含一層或多層的不同介電質。在一些教示中，介電基質119包含氧化物，例如二氧化矽。介電基質119可以是低介電常數（低κ）介電質。如本文中所使用，低κ介電質是具有小於約3.9的介電常數κ的介電材料。介電質119可以是極低K介電質，所述極低ĸ介電質可以是具有減小整體介電常數的孔隙的低K介電質。除波導管117之外或替代波導管117，介電基質119可包含任何數目的任何合適類型的裝置。在一些教示中，在介電基質119內形成有後段製程（back-end-of-line，BEOL）金屬內連線結構。
如圖3的橫截面視圖300所示出，可於介電基質119上方形成並圖案化硬遮罩121。硬遮罩121可以由任何合適材料形成。合適的材料可為SiN。可通過光微影或任何其它方法圖案化硬遮罩121，以使硬遮罩121包含開口301，所述開口301定義出裝置附接區域。開口301可具有在100微米到10,000微米的範圍內的寬度。可將開口301定位成具有在波導管117的外邊緣處或稍微超出與波導管117的外邊緣對齊的位置302的邊緣303。
如圖4的橫截面視圖400所示出，遮罩層401形成於介電基質119和硬遮罩121上方。遮罩層401可以是光阻或可使用光阻進行圖案化的另一種類型的遮罩。
如圖5的橫截面視圖500所示出，遮罩層401經圖案化為具有凹穴開口501和分段開口503。凹穴開口501具有在10微米到2000微米的範圍內的寬度。分段開口503形成於凹穴開口501的任一側的底座區域505中。底座區域505可具有在5微米到2000微米的範圍內的寬度。分段開口503可具有在0.1微米到10微米的範圍內的寬度。分段開口503可呈溝槽或其它形狀形式。分段開口503可分布在整個底座區域505中以使底座區域505中的遮罩層401圖案化，從而得到在0.05微米到5微米的範圍內的臨界尺寸。
如圖6的橫截面視圖600所示出，進行蝕刻以將遮罩層401的圖案轉印到介電基質119中。在一些教示中，蝕刻製程是各向異性蝕刻製程。在一些教示中，用於此圖案轉印的蝕刻製程是乾式蝕刻製程，例如電漿蝕刻。蝕刻化學物質（etch chemistry）可用於選擇性地氧化物，而使氮化物保留下來。在一些教示中，蝕刻製程是用於自對準接觸氧化物蝕刻的製程。蝕刻製程可暴露波導管117的端部。遮罩（遮罩層401）可在此蝕刻製程之後剝除。遮罩（遮罩層401）可通過灰化或任何其它合適的製程進行剝除。
如圖7的橫截面視圖700所示出，進行其中介電基質119作為遮罩以便蝕刻基底115的另一蝕刻製程。在一些教示中，用於蝕刻基底115的蝕刻製程是乾式蝕刻製程。在一些教示中，蝕刻製程是各向異性蝕刻製程。蝕刻化學物質可用於選擇性地去除矽，而使氧化物與氮化物保留下來。此蝕刻製程在基底115中製造凹穴105且在凹穴105的側面的底座區域（底座103）中產生開口102。由於底座區域103中的開口的高寬比（aspect ratio）較小，因此開口102具有比凹穴105的深度110小的深度128。蝕刻製程可包含使用氟化學物質的電漿蝕刻。電漿可用以下物質產生：四氟化碳（CF4 ）、三氯甲烷（CHF3 ）、二氟甲烷（例如CH2 F2 ）、六氟化硫（SF6 ）、六氟乙烷（C2 F6 ）、六氟丙烯（C3 F6 ）、八氟環丁烷（C4 F8 ）、八氟環戊烷（C5 F8 ）、另一（些）合適的氟化合物、前述的任何組合等。還可以將氬氣、氧氣以及其它合適的氣體包含在蝕刻化學物質中。在一些教示中，蝕刻製程是用於形成高高寬比的電漿蝕刻製程，例如波什蝕刻製程（Bosch etching process）。波什蝕刻製程是包含用六氟化硫（SF6 ）等蝕刻基底115和用八氟環丁烷（C4 F8 ）等在用於提供遮罩的介電基質119上產生保護層的交替步驟的循環製程。
如圖8的橫截面視圖800所示出，進行蝕刻製程以從底座103上方的區域去除介電基質119。此蝕刻增大開口101的尺寸和波導管117懸伸出開口101的距離112。距離112的增大可受限為開口101內的介電基質119的臨界尺寸，此可受限為開口102之間的間距的二分之一（見圖7）。在一些教示中，蝕刻製程是各向同性蝕刻製程。在一些教示中，蝕刻製程是濕式蝕刻。在一些教示中，濕式蝕刻製程包含用氫氟酸（HF）蝕刻。
如圖9的橫截面視圖900所示出，接合製程可通過將金屬901引入凹穴105中而開始。金屬901可以是用於將裝置109結合到基底115的金屬接合結構107的全部或一部分（見圖1）。在一些教示中，金屬901是晶種層。在一些教示中，金屬901是銅（Cu）。沉積金屬901可包含物理氣相沉積、化學氣相沉積、電鍍或任何其它合適的製程中的一種或多種。可沉積到凹穴105中的其它金屬包含（但不限於）錫（Sn）、金(Au)、銦（In）、鈦(Ti)、其合金等。
如圖10的橫截面視圖1000所示出，隨後將裝置109置放於凹穴105上方。在一些教示中，在將裝置109置放於凹穴105上方之前，金屬凸塊1001形成於裝置109上。在一些教示中，金屬凸塊1001裝配在凹穴105內並且有助於將裝置109正確定位於基底115上。在一些教示中，金屬凸塊1001包含形成金屬接合結構107（見圖1）的所有金屬，除了在將裝置109置放於凹穴105上方之前引入到凹穴105中的金屬901。在加工階段，裝置109可以是隨後經分割的晶片、晶圓晶片（wafer chip）或另一裝置結構的一部分。可將裝置109置放於底座103上，但在一些教示中，金屬凸塊1001防止裝置109在接合製程之前放置於底座103上。
圖1示出將接合製程應用於圖10的橫截面視圖1000所示出的結構的結果。接合製程可使金屬901和金屬凸塊1001通過流動（flowing）、混合（mixing）和/或擴散（inter-diffusing）而組合。如圖1中所示，在接合製程結束時，裝置109抵靠底座103，從而得到裝置109的期望的豎直對齊。接合製程可包含：使裝置109抵靠基底115而被按壓。用於此接合的合適製程的實例包含：壓縮接合、固液擴散接合（SLiD）等。接合製程可包含加熱。在一些教示中，加熱包含以高於用以形成金屬接合結構107的一些部分的兩個金屬的共熔點的溫度來加熱。在一些教示中，將溫度限制為低於形成共熔混合物的金屬中的一種的熔點。
圖11提供根據本公開的一些方面的製程1100的流程圖，所述過程可用於製造根據本公開的MEMS裝置。雖然在本文中將製程1100示出且描述為一系列動作或事件，但應瞭解，不應以限制意義來解釋此類動作或事件的所示出的排序。舉例來說，除本文中所示出和/或所描述的動作或事件之外，一些動作可與其它動作或事件以不同次序和/或同時出現。另外，可能需要並非所有的所示出動作以實施本文中的所描述的一個或多個方面或實施例。另外，本文中所描繪的動作中的一個或多個可以一個或多個單獨動作和/或階段進行。
製程1100從動作1101開始，在基底115上形成具有嵌入式裝置的介電層以製造結構，所述結構例如是如圖2的橫截面視圖200所示出的結構。動作1101可包含前段製程（front-end-of-line，FEOL）加工和BEOL加工。FEOL加工可包含：摻雜基底115中或所述基底上的區域且形成晶體管和類似裝置。BEOL加工可包含：在介電基質119內形成多級金屬內連線結構。嵌入式裝置可包含波導管117。
製程1100繼續進行動作1103：形成硬遮罩121且使所述硬遮罩圖案化（如圖3的橫截面視圖300所示出的）。硬遮罩121將介電基質119中的開口101限制於敞開以附接裝置109的區域。硬遮罩121在根據本公開的製程中是選擇性設置的。如圖5和圖6中所示，遮罩（遮罩層401）可在將底座103上方的介電基質119分段的期間保護介電基質119的開口101以外的的區域。底座103上方的介電基質119的分段允許用持續時間過短而不足以蝕穿介電基質119的蝕刻製程去除介電基質119的一些部分。參看圖7和圖8，如果不存在硬遮罩121，那麼在僅從基底115上方的其它位置處的介電基質119的頂部去除較薄的層時可去除介電基質119的分段式部分。
製程1100繼續進行動作1105：形成如圖４所示的遮罩（遮罩層401）；和動作1107：將遮罩（遮罩層401）圖案化為具有用於形成凹穴105的開口501和用於將底座103上方的介電基質119分段的開口503（如圖5中所示）。遮罩（遮罩層401）可以是光阻遮罩並且可使用光微影或任何其它方法圖案化遮罩（遮罩層401）。
製程1100繼續進行動作1107：使用遮罩（遮罩層401）來使介電基質119圖案化（如圖6的橫截面視圖600所示出的）。圖案化可以是蝕刻製程。蝕刻製程可以是各向異性乾式蝕刻製程，例如各向異性電漿蝕刻。此圖案化在介電基質119的凹穴105期望位置處形成開口，並且可於底座103的期望位置上方將介電基質119分段。可在此步驟結束時剝除遮罩（遮罩層401）。
製程1100繼續進行動作1109，將介電基質119用作遮罩來蝕刻基底115（如圖7的橫截面視圖700所示出的）。蝕刻製程可以是各向異性乾式蝕刻製程，例如各向異性電漿蝕刻。此蝕刻利用開口102在凹穴105中形成帶刻痕的底座區域103。
製程1100繼續進行動作1109：蝕刻以從底座103上去除介電基質119的分段式部分（如圖8的橫截面視圖800所示出的）。蝕刻製程可以是各向同性濕式蝕刻製程。對分段介電基質11的先前加工顯著地加快了此蝕刻製程。在一些實施例中，此蝕刻製程暴露波導管117。如果已暴露波導管117，那麼此蝕刻可增大波導管117懸伸出開口101的程度。在一些教示中，此蝕刻在一小時或小於一小時內完成。
製程1100繼續進行一系列動作1113、動作1115、動作1117以及動作1119，通過這些動作使裝置109放置於底座103上並經由凹穴105中的金屬接合結構107接合到基底115。不同順序的不同動作可提供相同功能。在一些教示中，這些動作提供鎖與鑰製程（lock-and-key process），其中附接到裝置109的金屬接合結構107的一部分提供鑰，而凹穴105提供鎖。在一些教示中，在將裝置109置放於基底115上方之前將金屬接合結構107的一部分引入到凹穴105中。動作1113提供實例。動作1113是在凹穴105中形成金屬901的晶種層（如圖9的橫截面視圖900所示出的）。晶種層（金屬901）可以是銅（Cu）或任何其它金屬。晶種層（金屬901）可通過濺鍍或任何其它合適的製程形成。金屬接合結構107的一部分還可以通過在將裝置109置放於基底115上方之前形成於裝置109上的金屬凸塊1001來設置。動作1117是將裝置109與金屬凸塊1001置放於基底115上方（如圖10的橫截面視圖1000所示出的）。在金屬凸塊1001與晶種層（金屬901）之間，可通過動作1117的結束來將用於將裝置109接合到基底115的所有金屬接合結構107引入到凹穴105中。
動作1119是在使裝置109放置於底座103上的同時施加熱和壓力以使金屬凸塊1001和晶種層（金屬901）軟化、混合並擴散以形成金屬接合結構107，從而製造與圖1所示出的裝置100類似的產物。在一些教示中，此接合製程是低溫熱壓縮接合製程。低溫是300℃或低於300℃。可以使用任何合適的製程。在一些教示中，動作119包含金屬擴散接合。金屬擴散接合可包含類似金屬，實例包含鋁金（Al-Au）、銅（Cu-Cu）等。在一些教示中，所使用的製程包含共熔接合。共熔接合可在銅與錫（Cu-Sn）、金與錫（Au-Sn）、錫與鉛（Sn-Pd）等之間產生。還可使用這些金屬的合金和三種金屬層結構。所產生的金屬接合結構107可包含具有不同組合物的不同層，所述層包含至少一層共熔混合物和至少另一層純金屬或具有不同於共熔混合物的混合比例的混合物。
本發明教示的一些方面涉及一種微機電系統，所述系統包含具有第一凹穴的半導體基底。半導體基底形成與第一凹穴相鄰的底座。裝置上覆於底座且通過第一凹穴內的金屬接合到半導體基底。多個第二凹穴形成於裝置下方的底座的表面中，其中第二凹穴小於第一凹穴。在一些教示中，第二凹穴是空隙。在一些教示中，第一凹穴中的金屬包括共熔混合物。此結構涉及一種微機電系統的製造方法，其中將提供遮罩以蝕刻第一凹穴的層分段為使得能夠容易地從底座上方的區域去除遮罩提供層。
本發明教示的一些方面涉及一種微機電系統。所述系統包含：半導體基底和裝置，所述裝置通過接合區域中的金屬接合結構接合到半導體基底。裝置接觸於與接合區域相鄰的支撐區域中的半導體基底上方。半導體基底在支撐區域中具有底座結構。第一裝置抵靠帶刻痕的底座結構的上表面。在一些教示中，金屬接合結構形成於半導體結構中的凹穴內，所述凹穴具有一寬度，且底座結構的上表面刻有具有比凹穴的寬度小的寬度的溝槽。在一些教示中，凹穴具有一深度，且溝槽具有比凹穴的深度小的深度。
在一些教示中，金屬接合結構低於底座結構的上表面的高度。在一些教示中，底座結構的上表面與金屬接合結構的頂部對齊。在一些教示中，金屬接合結構是固液擴散接合的產物。在一些教示中，第二裝置形成於半導體基底中或形成於半導體基底上，且微機電系統的功能取決於所述第一裝置與所述第二裝置之間的豎直對齊。在一些教示中，波導管形成於在半導體基底上方形成的介電基質內，且第一裝置是雷射裝置。在一些教示中，介電基質具有一厚度，波導管從介電基質伸出到介電基質中的開口中，雷射裝置位於所述開口內，且波導管以比介電基質的厚度小的距離伸出到開口中。
本發明教示的一些方面涉及一種微機電系統的製造方法，所述方法包含：在半導體基底上方形成介電基質。第一裝置結構容納於介電基質內。將介電基質圖案化為具有開口和與所述開口相鄰的介電基質的區域中的多個縫隙。開口比縫隙寬。將介電基質用作遮罩來蝕刻半導體基底以在開口和與開口相鄰的底座下方形成凹穴，其中底座刻有由蝕穿縫隙而產生的溝槽。隨後通過蝕刻從底座去除介電基質。將第二裝置置放於凹穴和底座上方的半導體基底上，且使用凹穴中的金屬將所述第二裝置接合到半導體基底以製造其中第二裝置抵靠底座的結構。
在一些教示中，所述方法包含：在接合製程期間至少直到第二裝置抵靠底座之後，將第二裝置和半導體基底壓在一起。在一些教示中，縫隙將底座上方的介電基質的臨界尺寸減小到小於介電基質的厚度。在一些教示中，所述方法包含：在第二裝置上形成金屬凸塊，且將第二裝置接合到半導體基底包含：使用來自金屬凸塊的金屬進行接合。在一些教示中，將第二裝置接合到半導體基底包含固液擴散接合（solid-liquid inter-diffusional bonding）。在一些教示中，縫隙減少待完成的從底座去除介電基質的蝕刻所需的時間。在一些教示中，縫隙以比介電基質的厚度小的間距周期性地形成在底座上方的介電基質上。在這些教示內容中的一些中，介電基質是氧化物。
雖然本發明已以實施例揭露如上，然其並非用以限定本發明，任何所屬技術領域中具有通常知識者，在不脫離本發明的精神和範圍內，當可作些許的更動與潤飾，故本發明的保護範圍當視後附的申請專利範圍所界定者為準。
100:微機電系統 101、102、301:開口 103:底座 105:凹穴 107:金屬接合結構 108、122、124:寬度 109:裝置 110、128:深度 111:輸出裝置 112、126:距離 114:厚度 115:基底 117:波導管 119:介電基質 121:硬遮罩 123:接合區域 125:支撐區域 200、300、400、500、600、700、800、900、1000:橫截面視圖 302:位置 303:邊緣 401:遮罩層 501:開口 503:開口 505:底座區域 901:金屬 1001:金屬凸塊 1100:製程 1101、1103、1105、1107、1109、1111、1113、1115、1117、1119:動作
圖1示出根據本公開的一些方面的微機電系統（MEMS）的橫截面視圖。 圖2到圖10根據本公開的一些方面示出在MEMS的製造製程期間各階段的橫截面視圖。 圖11根據本公開的一些方面示出製造MEMS裝置的方法的流程圖。
100:微機電系統
101、102:開口
103:底座
105:凹穴
107:金屬接合結構
108、122、124:寬度
109:裝置
110、128:深度
111:輸出裝置
112、126:距離
114:厚度
115:基底
117:波導管
119:介電基質
121:硬遮罩
123:接合區域
125:支撐區域

Claims (20)

  1. 一種微機電系統，包括： 半導體基底，具有第一凹穴； 底座，由與所述第一凹穴相鄰的區域中的所述半導體基底形成； 裝置，上覆於所述底座且通過所述第一凹穴內的金屬接合到所述半導體基底；以及 多個第二凹穴，形成於所述裝置下方的所述底座的表面中，其中所述第二凹穴小於所述第一凹穴。
  2. 如申請專利範圍第1項所述的微機電系統，其中所述第二凹穴是空隙。
  3. 如申請專利範圍第1項所述的微機電系統，其中所述第一凹穴中的所述金屬包括共熔混合物。
  4. 一種微機電系統，包括： 半導體基底；以及 其中裝置通過接合區域中的金屬接合結構接合到半導體基底；以及 所述裝置接觸於與所述接合區域相鄰的支撐區域中的所述半導體基底上方； 所述半導體基底在所述支撐區域中具有底座結構；以及 所述第一裝置抵靠帶刻痕的所述底座結構的上表面。
  5. 如申請專利範圍第4項所述的微機電系統，其中： 所述金屬接合結構形成於所述半導體結構中的凹穴內； 所述凹穴具有一寬度；以及 所述底座結構的所述上表面刻有具有比所述凹穴的所述寬度小的寬度的溝槽。
  6. 如申請專利範圍第5項所述的微機電系統，其中： 所述凹穴具有一深度；以及 所述溝槽具有比所述凹穴的所述深度小的深度。
  7. 如申請專利範圍第4項所述的微機電系統，其中所述金屬接合結構低於所述底座結構的所述上表面的高度。
  8. 如申請專利範圍第4項所述的微機電系統，其中所述金屬接合結構是固液擴散接合的產物。
  9. 如申請專利範圍第4項所述的微機電系統，更包括： 第二裝置，形成於所述半導體基底中或所述半導體基底上； 其中所述微機電系統的功能取決於所述第一裝置與所述第二裝置之間的豎直對齊。
  10. 如申請專利範圍第4項所述的微機電系統，更包括： 介電基質內的波導管，形成於所述半導體基底上方； 其中所述第一裝置是雷射裝置。
  11. 如申請專利範圍第10項所述的微機電系統，其中： 所述介電基質具有一厚度； 所述波導管從所述介電基質伸出到所述介電基質中的開口中，所述雷射裝置位於所述開口內；以及 所述波導管以比所述介電基質的所述厚度小的距離伸出到所述開口中。
  12. 如申請專利範圍第4項所述的微機電系統，其中所述底座結構的所述上表面與所述金屬接合結構的頂部對齊。
  13. 一種微機電系統的製造方法，包括： 在半導體基底上方形成介電基質，其中第一裝置結構容納於所述介電基質內； 將所述介電基質圖案化為具有開口及與所述開口相鄰的所述介電基質的區域中的多個縫隙，其中所述開口比所述縫隙寬； 經由所述介電基質蝕刻所述半導體基底以在所述開口及與所述開口相鄰的底座下方形成凹穴，其中所述底座刻有由蝕穿所述縫隙而產生的溝槽； 蝕刻以從所述底座去除所述介電基質； 將第二裝置置放於所述凹穴及所述底座上方的所述半導體基底上；以及 使用所述凹穴中的金屬將所述第二裝置接合到所述半導體基底以製造其中所述第二裝置抵靠所述底座的結構。
  14. 如申請專利範圍第13項所述的微機電系統的製造方法，更包括：在所述接合期間，至少直到所述第二裝置抵靠所述底座之後，將所述第二裝置及所述半導體基底壓在一起。
  15. 如申請專利範圍第13項所述的微機電系統的製造方法，其中所述縫隙將所述底座上方的所述介電基質的臨界尺寸減小到小於所述介電基質的厚度。
  16. 如申請專利範圍第13項所述的微機電系統的製造方法，更包括： 在所述第二裝置上形成金屬凸塊； 其中將所述第二裝置接合到所述半導體基底包括：使用來自所述金屬凸塊的金屬進行接合。
  17. 如申請專利範圍第13項所述的微機電系統的製造方法，其中將所述第二裝置接合到所述半導體基底包括固液擴散接合。
  18. 如申請專利範圍第13項所述的微機電系統的製造方法，其中所述縫隙減少從待完成的所述底座去除所述介電基質的所述蝕刻所需的時間。
  19. 如申請專利範圍第13項所述的微機電系統的製造方法，其中述縫隙以比所述介電基質的厚度小的間距周期性地形成於所述底座上方的所述介電基質上。
  20. 如申請專利範圍第13項所述的微機電系統的製造方法，其中所述介電基質是氧化物。
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