TW202025126A - 像素補償電路 - Google Patents

像素補償電路 Download PDF

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TW202025126A
TW202025126A TW108121319A TW108121319A TW202025126A TW 202025126 A TW202025126 A TW 202025126A TW 108121319 A TW108121319 A TW 108121319A TW 108121319 A TW108121319 A TW 108121319A TW 202025126 A TW202025126 A TW 202025126A
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signal
transistor
light
control signal
terminal
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鄭士嵩
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創王光電股份有限公司
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Abstract

一像素電路經配置以補償與一主動矩陣有機發光二極體顯示器或類似照明系統中薄膜電晶體之元件的電子特性相關之臨界參數，以避免電壓降效應導致的亮度不均勻。像素補償電路係界定於一子像素區域中，其中有七個薄膜電晶體與一個電容器，且所述電路係由兩個控制信號而操作。相較之下，傳統技術使用了三個控制信號。使用較少的控制信號有益於佈局彈性與規格設計。

Description

像素補償電路
本發明係關於一種像素補償電路，更明確地說，是關於用以改善一主動矩陣有機發光二極體(AMOLED)之亮度均勻性的像素補償電路。
近來顯示器領域的焦點之一為主動矩陣有機發光二極體(active matrix organic light emitting diode，AMOLED)顯示器，因為其具有極佳的影像品質且光學規格優於傳統顯示器。
AMOLED顯示器使用透過有機發光二極體的電流而作為發光裝置，所述電流係由主動矩陣所控制，且灰階的亮度是由發光過程中的電流量所決定。
主動矩陣係由一群像素單元所組成，且有效發光面積係由解析度所定義。有效發光區域為像素單元面積乘以垂直方向的解析度再乘以水平方向的解析度。
常見的像素單元是由三個子像素單元所組成。一般來說，一個子像素單元是由複數個薄膜電晶體與電容器所組成，一子像素面積的發光亮度之灰階是由薄膜電晶體所控制，且電容器係作為一儲存電位以穩定驅動電流。
然而，相較於其他顯示器(譬如，液晶顯示器)，由於主動矩陣有機發光二極體顯示器的特性為電流驅動發光，灰階的亮度差異會直接受到薄膜電晶體之元件的電子特性所影響。當不同子像素間的薄膜電晶體之元件電子特性差異過大時，會形成不均勻的影像特性。譬如，會出現雲紋(mura)效應。
因此，為了克服上述問題，會使用像素補償電路來補償關鍵元件的電子特性參數(例如閾值電壓Vth)，以便修復因不同元件間特性差異造成的影響品質低落。
除此之外，現有驅動系統中另一種常見的問題是電壓降(IR-drop)效應，這是當系統的電子負載造成遠端電壓降所產生的。大量輸出電流對應於大的電子負載，而使得通常經設計為共用電源之主動矩陣有機發光二極體(AMOLED)顯示器中接近電源端的亮度高於遠離電源端之亮度。可利用補償電路來克服亮度均勻性的問題。
然而，隨著顯示器技術的進步，一個單元尺寸中有越來越多的像素，因此每一像素中的元件尺寸也相應地變小。傳統像素補償電路至少需要三個信號，因此需要至少三個信號產生器或線路，這使得尺寸的減小受到限制。
綜上所述，傳統技術有許多缺點亟待改進。有鑒於此，本發明提出一種像素補償電路以改善AMOLED的亮度並可減少所需之控制信號數目。
本發明係關於一種像素補償電路，更明確地說，是關於用以改善一主動矩陣有機發光二極體(AMOLED)之亮度均勻性的像素補償電路。
本發明的一實施例提出一種像素補償電路。根據本揭示內容一實施方式，所述像素補償電路包括一輸入模塊、一重置模塊、一資料處理模塊及一切換模塊。輸入模塊接收一參考值及一資料信號，並回應一發光控制信號及一掃描信號而產生一第一信號。重置模塊接收參考值並回應一子發光控制信號及掃描信號而產生一重置信號。資料處理模塊接收第一信號、重置信號及一第一電壓，並回應掃描信號而產生一第二信號。切換模塊接收第二信號並回應發光控制信號而產生一發光信號。
輸入模塊包括一第一電晶體、一第六電晶體及一儲存電容器。第一電晶體包括一第一汲極端其經施予資料信號、一第一閘極端其經施予掃描信號及一第一源極端其連接至一第二節點。第六電晶體包括一第六源極端其經施予參考值、一第六閘極端其經施予發光控制信號及一第六汲極端其連接至第二節點。儲存電容器包括一第一電極及一第二電極，第一電極連接至第二節點，且第二電極連接至資料處理模塊。
又，資料處理模塊包括一第四電晶體及一第二電晶體。第四電晶體包括一第四源極端其經施予第一電壓、一第四閘極端其連接至輸入模塊及一第四汲極端其連接至切換模塊。第二電晶體包括一第二源極端其連接至第三節點、一第二閘極端其經施予掃描信號及一第二汲極端其連接至第四汲極端。
此外，重置模塊包括一第五電晶體及一第三電晶體。第五電晶體包括一第五汲極端其經施予參考值及一第五閘極端其經施予一子發光控制信號。第三電晶體包括一第三汲極端其連接至第五電晶體的一第五源極端、一第三閘極端其經施予掃描信號及一第三源極端其連接至第三節點。
在實際應用中，當複數個像素補償電路經串聯連接而形成一組像素補償電路時，則一第(N+1)級像素補償電路的發光控制信號作為一第Nth級像素補償電路的子發光控制信號，且N為一正整數。
像素補償電路還包括一發光元件，用以接收發光信號且之後發出光線。
相較於傳統技術，本發明的像素補償電路可用於補償與主動矩陣有機發光二極體顯示器或類似照明系統中薄膜電晶體之元件的電子特性相關之臨界參數，以改善影像品質與避免因電壓降(IR-drop)效應導致的亮度不均勻。本發明的像素補償電路係界定於一子像素區域中，其中有八個薄膜電晶體與一個電容器，且所述電路係由兩個控制信號而操作。相較之下，傳統技術使用了三個控制信號。本發明使用較少的控制信號，這有益於佈局彈性與規格設計。
在閱讀了下文實施方式以及附隨圖式時，能夠最佳地理解本揭示內容的優點與精神。
參照附隨圖式詳細描述本發明，以清楚地說明本發明之目的、技術方案與優點。
請參照圖1，其概要繪示了電路根據本發明一實施方式的像素補償。本發明的一態樣提出了一種像素補償電路(PCC) 1。根據本揭示內容一實施方式，像素補償電路1包括一輸入模塊12、一重置模塊14、一資料處理模塊16及一切換模塊18。輸入模塊12接收一參考值Vref及一資料信號DATA，並可回應一發光控制信號EM及一掃描信號SN，以產生一第一信號。重置模塊14接收參考值Vref及回應一子發光控制信號EM+1及掃描信號SN，以產生一重置信號。資料處理模塊16接收第一信號、重置信號及一第一電壓VDD，並回應掃描信號SN，以產生一第二信號。切換模塊18接收第二信號，並回應發光控制信號EM，以產生一發光信號。
子發光控制信號EM+1為發光控制信號EM，其具有一個列時間的偏移。
輸入模塊12包括一第一電晶體T1、一第六電晶體T6及一儲存電容器C1。第一電晶體T1具有一第一汲極端其經施予一資料信號DATA、一第一閘極端其經施予一掃描信號SN、及一第一源極端其連接至一第二節點Q2 。第六電晶體T6包括一第六源極端其經施予一參考值Vref、一第六閘極端其經施予一發光控制信號EM、及一第六汲極端其連接至第二節點Q2 。儲存電容器C1具有一第一電極及一第二電極、第一電極連接至第二節點Q2 、及第二電極連接至資料處理模塊16。
資料處理模塊16包括一第四電晶體T4及一第二電晶體T2。第四電晶體T4具有一第四源極端其經施予一第一電壓VDD、一第四閘極端其連接至輸入模塊12、及一第四汲極端其連接至切換模塊18。第二電晶體T2具有一第二汲極端其連接至第四汲極端、一第二閘極端其經施予一掃描信號SN、及一第二源極端其連接至一第三節點Q3 。
重置模塊14包括一第五電晶體T5及一第三電晶體T3。第五電晶體T5具有一第五汲極端其經施予一參考值Vref、及一第五閘極端其經施予一子發光控制信號EM+1。第三電晶體T3具有一第三汲極端其連接至第五電晶體T5的一第五源極端、一第三電晶體T3的一第三閘極端其經施予一掃描信號SN、及一第三源極端其連接至一第三節點Q3 。
切換模塊18包括一第七電晶體T7，其具有一第七源極端其連接至資料處理模塊16、一第七閘極端其經施予一發光控制信號EM、及一第七汲極端用以輸出一發光信號。
像素補償電路1還包括一發光元件用以接收發光信號且之後發出光線。
在實際應用中，發光元件包括一第一極點及一第二極點。第一極點係用於接收發光信號，且第二極點係連接至一第二電壓VEE，其電壓值與第一電壓VDD不同。
此外，發光元件可以是主動矩陣有機發光二極體(AMOLED)。
在實際運用中，可藉由連接至接地而得到第二電壓VEE。
請參照圖2，其概要繪示了本發明的像素補償電路1，其以串聯連接而形成一組像素補償電路1。在實際運用中，當複數個像素補償電路1經串聯連接而形成一組像素補償電路1時，第(N+1)級像素補償電路1的發光控制信號EM可作為第N級像素補償電路1的子發光控制信號EM+1，其中N為一正整數。
由於第N級補償電路1因為連接至下一級發光控制信號EM+1而可作為子發光控制信號EM+1，因而能夠減少所需的信號產生器以及該信號產生器之線路所佔據的空間。因此，相較於傳統的像素補償電路需要使用三個控制信號，本發明的像素補償電路1僅需要兩個控制信號，這有利於佈局的最佳化。
請參照圖3，其概要繪示了利用本發明像素補償電路1之顯示器系統。於一實施方式中，可將具有[N+1]*[M+1]解析度的顯示器系統分成兩個區域，其中一個是閘極驅動電路陣列(gate driver on array，GOA)電路區域2另一個是顯示像素電路區域3，其中顯示像素電路區域3是由串聯連接的複數個像素補償電路1所組成。將兩倍的列時間作為GOA電路區域2的時間偏移單位以掃描傳遞，且可利用具有相同功能的積體電路IC來取代GOA電路2。顯示像素電路區域3中的每一子像素電路即為本發明的像素補償電路1，且其係由GOA電路區域2控制與驅動。在一GOA掃描方向中依SN[1]àSN[2]…、EM[1]àEM[2]…的順序啟動作業。在圖3中，每一像素補償電路1僅需要兩個控制信號，且可視佈局排列的空間與方式將第一電壓VDD、第二電壓VEE及參考值Vref的線路佈局於一水平或垂直方向中，因而能夠提升佈局排列的彈性。
請參照圖4，此時序圖繪示了根據本發明一實施方式之像素補償電路1的作業。圖4為本發明之補償電路1的作業順序圖，應注意到其中僅繪示了第N級與第(N+1)級發光控制信號EM、EM+1以及掃描信號SN、SN+1，且發光控制信號EM、EM+1以及掃描信號SN、SN+1分別偏移一個列時間(L-T)。譬如，在第N級像素補償電路1中，像素補償電路1會在三個階段中運作：一重置階段(第一時點t1 )、一補償階段(第二時點t2 )及一寫入發光階段(第三時點t3 )，下文將分別詳述之。在後文所述的圖中，加入一第一節點Q1 以利說明，其中第一節點Q1 為儲存電容器C1、第二電晶體T2及第四電晶體T4的電性連接接點。
請參照圖4及圖5。圖5的概要圖式繪示了圖4之像素補償電路於第一時點t1 的操作。在重置階段中，由於發光控制信號EM、第六電晶體T6及第七電晶體T7為關閉，且剩餘的電晶體導通。此時，第一節點Q1 的信號為參考值Vref、第二節點Q2 的信號為資料信號DATA且第三節點Q3 的信號為參考值Vref。
同一時間，用於驅動的第四電晶體T4的閘極電位Vg 是由第一節點Q1 (Vref)所供應，源極電位Vs 係由第一電壓VDD供應，且滿足Vsg = VDD – Vref ＞ Vth ，其中Vth 為閾值偏壓。
由於儲存電容器C1的兩端為第一節點Q1 供應的參考值Vref以及第二節點Q2 供應的資料信號DATA，能夠重置儲存電容器C1兩端的電位。
請參照圖4及圖6。圖6的概要圖式繪示了圖4之像素補償電路於第二時點t2 的操作。在補償階段中，由於發光控制信號EM及子發光控制信號EM+1，第五電晶體T5、第六電晶體T6及第七電晶體T7為關閉的。此時，第一節點Q1 的電壓由Vref變為VDD- |Vth |，第二節點Q2 保持先前的狀態(DATA)，而第三節點Q3 的電壓由Vref變為VDD - |Vth |。
同一時間，用於驅動的第四電晶體T4的閘極電位Vg 為VDD - |Vth |，且源極電位Vs 為VDD。由VDD透過第四電晶體T4來充電第一節點Q1 ，直到第四電晶體T4中出現夾斷，因此使得Vsg = |Vth |。
此外，由於儲存電容器C兩端的電極電位分別為VDD - |Vth |以及DATA，能夠使得儲存電容器C兩端的電位重新平衡。
請參照圖4及圖7。圖7的概要圖式繪示了圖4之像素補償電路於第三時點t3 的操作。在寫入發光階段中，由於掃描信號SN，第一電晶體T1、第二電晶體T2、及第三電晶體T3為關閉的。此時，第一節點Q1 的電壓由VDD - |Vth |變為VDD – DATA + Vref - |Vth |，第二節點Q2 的電壓由DATA變為Vref，且第三節點Q3 可保持先前狀態(VDD - |Vth |)。
同一時間，用於驅動的第四電晶體T4的閘極電位為VDD – DATA + Vref - |Vth|，且源極電位Vs 為VDD。第二節點Q2 的電位改變使得第一節點Q1 因為儲存電容器的耦合效應而寫入DATA值，使得Vsg = DATA – Vref + |Vth |。
此時，此一階段的作業不會受到第五電晶體T5的開啟或關閉而影響。
在補償之後，用以驅動電晶體的電流可表示為以下方程式。 |Isd | = κ* (|Vsg | - |Vth |)2 = κ * (DATA - Vref)2 上述方程式中沒有Vth及VDD，因而能夠補償閾值偏壓電壓Vth 且可改善電壓降(IR-drop)效應。
如此一來，本發明的像素補償電路1可運用於主動矩陣有機發光二極體顯示器中，以便補償薄膜電晶體的閾值偏壓Vth 且可避免因為元件間電性差異而導致的影像劣化，譬如雲紋效應(Mura)。此時，亦可補償因為系統電力分布而導致的電壓降(IR-drop)以改善顯示器發光時的面板亮度。
相較於傳統技術，本發明的像素補償電路可用以補償主動矩陣有機發光二極體顯示器或類似照明系統中薄膜電晶體之元件的電子特性相關之臨界參數，譬如臨界電壓Vth，以便改善影像品質以及避免因的電壓降(IR-drop)效應而導致的亮度不均。本發明之像素補償電路係界定於一子像素區域中，其中有八個薄膜電晶體與一個電容器，且電路係由兩個控制信號所操作。相較之下，傳統技術需使用三個控制信號。本發明所需的控制信號較少，這有助於佈局彈性與規格設計。
上文的實施方式已明確描述本發明之特徵與範圍，但本發明不限於此。此外，各種改變與均等的排置皆屬於本發明之申請專利範圍之內容。
1:像素補償電路 2:閘極驅動電路陣列(GOA)電路區域 3:顯示像素電路區域 12:輸入模塊 14:重置模塊 16:資料處理模塊 18:切換模塊18 C1:儲存電容器 DATA:資料信號 EM:發光控制信號 EM+1:子發光控制信號 Q1、Q2、Q3:節點 SN:掃描信號 T1、T2、T3、T4、T5、T6、T7:電晶體 VDD:第一電壓 Vref:參考值 t1、t2、t3:時點
在閱讀了下文實施方式以及附隨圖式時，能夠最佳地理解本揭露的多種態樣。應注意到，根據本領域的標準作業習慣，圖中的各種特徵並未依比例繪製。事實上，為了能夠清楚地進行描述，可能會刻意地放大或縮小某些特徵的尺寸。 圖1的概要圖式繪示了根據本發明一實施方式的像素補償電路 圖2的概要圖式繪示了本發明的像素補償電路，其以串聯連接而形成一組像素補償電路。 圖3的概要圖式繪示了利用本發明之像素補償電路的顯示器系統。 圖4的時序圖繪示了根據本發明一實施方式之像素補償電路的操作圖。 圖5的概要圖式繪示了在圖4之像素補償電路在第一時點的操作。 圖6的概要圖式繪示了在圖4之像素補償電路在第二時點的操作。 圖7的概要圖式繪示了在圖4之像素補償電路在第三時點的操作。
1:像素補償電路
12:輸入模塊
14:重置模塊
16:資料處理模塊
18:切換模塊
C1:儲存電容器
DATA:資料信號
EM:發光控制信號
EM+1:子發光控制信號
Q1、Q2、Q3:節點
SN:掃描信號
T1、T2、T3、T4、T5、T6、T7:電晶體
VDD:第一電壓
Vref:參考值

Claims (20)

  1. 一種像素補償電路，包含： 一輸入模塊，接收一參考值與一資料信號並回應一發光控制信號與一掃描信號而產生一第一信號； 一重置模塊，接收該參考值並回應一子發光控制信號及該掃描信號而產生一重置信號，其中該子發光控制信號及該發光控制信號偏移一個列時間； 一資料處理模塊，接收該第一信號、該重置信號及一第一電壓，並回應該掃描信號而產生一第二信號；以及 一切換模塊，接收該第二信號並及回應該發光控制信號而產生一發光信號， 其中該重置模塊包括一第三電晶體且該資料處理模塊包括一第四電晶體，其中該第三電晶體的一第三源極端其連接至該第四電晶體的一第四閘極端。
  2. 如請求項1所述的像素補償電路，其中該輸入模塊包含： 一第一電晶體，具有一第一汲極端其經施予該資料信號、一第一閘極端其經施予該掃描信號及一第一源極端其連接至一第二節點； 一第六電晶體，具有一第六源極端其經施予該參考值、一第六閘極端其經施予該發光控制信號及一第六汲極端其連接至該第二節點；以及 一儲存電容器，具有一第一電極及一第二電極，其中該第一電極連接至該第二節點，且該第二電極連接至該資料處理模塊。
  3. 如請求項1所述的像素補償電路，其中該資料處理模塊還包含： 一第二電晶體，具有一第二汲極端其連接至該第四電晶體的一第四汲極端、一第二閘極端其經施予該掃描信號及一第二源極端其連接至一第三節點， 其中該第四電晶體具有一第四源極端其經施予該第一電壓，該第四閘極端其連接至該輸入模塊及該第四源極端其連接至該切換模塊。
  4. 如請求項3所述的像素補償電路，其中該重置模塊還包含： 一第五電晶體，具有一第五汲極端其經施予該參考值及一第五閘極端其經施予一子發光控制信號， 其中該第三電晶體具有一第三汲極端其連接至該第五電晶體的一第五源極端、一第三閘極端其經施予該掃描信號及該第三源極端其連接至該第三節點。
  5. 如請求項1所述的像素補償電路，其中該切換模塊包含： 一第七電晶體，具有一第七源極端其連接至該資料處理模塊、一第七閘極端其經施予該發光控制信號及一第七汲極端用於輸出該發光信號。
  6. 如請求項1所述的像素補償電路，其中當複數個該像素補償電路為串聯連接以形成一組像素補償電路時，則一第(N+1)級像素補償電路的該發光控制信號作為一第Nth級像素補償電路的該子發光控制信號，且N為一正整數。
  7. 一種主動矩陣有機發光二極體顯示器，包含： 一像素補償電路，包含： 一輸入模塊，接收一參考值及一資料信號並回應一發光控制信號及一掃描信號而產生一第一信號； 一重置模塊，接收該參考值並回應一子發光控制信號及該掃描信號而產生一重置信號，其中該子發光控制信號及該發光控制信號偏移一個列時間； 一資料處理模塊，接收該第一信號、該重置信號及一第一電壓，並回應該掃描信號而產生一第二信號；以及 一切換模塊，接收該第二信號並回應該發光控制信號而產生一發光信號， 其中該重置模塊包括一第三電晶體且該資料處理模塊包括一第四電晶體，其中該第三電晶體的一第三源極端其連接至該第四電晶體的一第四閘極端。
  8. 如請求項7所述的主動矩陣有機發光二極體顯示器，其中該輸入模塊包含： 一第一電晶體，具有一第一汲極端其經施予該資料信號、一第一閘極端其經施予該掃描信號及一第一源極端其連接至一第二節點； 一第六電晶體，具有一第六源極端其經施予該參考值、一第六閘極端其經施予該發光控制信號及一第六汲極端其連接至該第二節點；以及 一儲存電容器，具有一第一電極及一第二電極，其中該第一電極連接至該第二節點，且該第二電極連接至該資料處理模塊。
  9. 如請求項7所述的主動矩陣有機發光二極體顯示器，其中該資料處理模塊包含： 一第二電晶體，具有一第二汲極端其連接至該第四電晶體的一第四汲極端、一第二閘極端其經施予該掃描信號及一第二源極端其連接至一第三節點， 其中該第四電晶體具有一第四源極端其經施予該第一電壓，該第四閘極端其連接至該輸入模塊，且該第四汲極端其連接至該切換模塊。
  10. 如請求項9所述的主動矩陣有機發光二極體顯示器，其中該重置模塊包含： 一第五電晶體，具有一第五汲極端其經施予該參考值及一第五閘極端其經施予一子發光控制信號， 其中該第三電晶體具有一第三汲極端其連接至該第五電晶體的一第五源極端、一第三閘極端其經施予該掃描信號及該第三源極端其連接至該第三節點。
  11. 如請求項7所述的主動矩陣有機發光二極體顯示器，其中該切換模塊包含： 一第七電晶體，具有一第七源極端其連接至該資料處理模塊、一第七閘極端其經施予該發光控制信號、及一第七汲極端用以輸出該發光信號。
  12. 如請求項7所述的主動矩陣有機發光二極體顯示器，其中當複數個該像素補償電路為串聯連接以形成一組像素補償電路時，則一第(N+1)級像素補償電路的該發光控制信號作為一第Nth級像素補償電路的該子發光控制信號，且N為一正整數。
  13. 如請求項7所述的主動矩陣有機發光二極體顯示器，其中該像素補償電路還包括一發光元件，該發光元件具有一第一極點及一第二極點，該第一極點係用於接收該發光信號，且該第二極點連接至一第二電壓，其中該第二電壓的電壓值與該第一電壓不同。
  14. 一顯示器系統，包含： 一像素補償電路，包含： 一輸入模塊，接收一參考值及一資料信號並回應一發光控制信號及一掃描信號而產生一第一信號； 一重置模塊，接收該參考值並回應一子發光控制信號及該掃描信號而產生一重置信號，其中該子發光控制信號及該發光控制信號偏移一個列時間； 一資料處理模塊，接收該第一信號、該重置信號及一第一電壓，並回應該掃描信號而產生一第二信號；以及 一切換模塊，接收該第二信號並回應該發光控制信號而產生一發光信號， 其中該重置模塊包括一第三電晶體且該資料處理模塊包括一第四電晶體，其中該第三電晶體的一第三源極端其連接至該第四電晶體的一第四閘極端。
  15. 如請求項14所述的顯示器系統，其中該輸入模塊包含： 一第一電晶體，具有一第一汲極端其經施予該資料信號、一第一閘極端其經施予該掃描信號及一第一源極端其連接至一第二節點； 一第六電晶體，具有一第六源極端其經施予該參考值、一第六閘極端其經施予該發光控制信號及一第六汲極端其連接至該第二節點；以及 一儲存電容器，具有一第一電極及一第二電極，其中該第一電極連接至該第二節點，且該第二電極連接至該資料處理模塊。
  16. 如請求項14所述的顯示器系統，其中該資料處理模塊包含： 一第二電晶體，具有一第二汲極端其連接至該第四電晶體的一第四汲極端、一第二閘極端其經施予該掃描信號及一第二源極端其連接至一第三節點， 其中該第四電晶體具有一第四源極端其經施予該第一電壓，該第四閘極端其連接至該輸入模塊，且該第四汲極端其連接至該切換模塊。
  17. 如請求項16所述的顯示器系統，其中該重置模塊包含： 一第五電晶體，具有一第五汲極端其經施予該參考值及一第五閘極端其經施予一子發光控制信號， 其中該第三電晶體具有一第三汲極端其連接至該第五電晶體的一第五源極端、一第三閘極端其經施予該掃描信號及該源極端其連接至該第三節點。
  18. 如請求項14所述的顯示器系統，其中該切換模塊包含： 一第七電晶體，具有一第七源極端其連接至該資料處理模塊、一第七閘極端其經施予該發光控制信號及一第七汲極端用以輸出該發光信號。
  19. 如請求項14所述的顯示器系統，其中當複數個該像素補償電路為串聯連接以形成一組像素補償電路時，則一第(N+1)級像素補償電路的該發光控制信號作為一第Nth級像素補償電路的該子發光控制信號，且N為一正整數。
  20. 如請求項14所述的顯示器系統，還包含一顯示像素電路區域，其係由複數個串聯連結與並聯連結的該像素補償電路所組成。
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