TW202018878A - 半導體器件的封裝方法 - Google Patents

半導體器件的封裝方法 Download PDF

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TW202018878A
TW202018878A TW108134915A TW108134915A TW202018878A TW 202018878 A TW202018878 A TW 202018878A TW 108134915 A TW108134915 A TW 108134915A TW 108134915 A TW108134915 A TW 108134915A TW 202018878 A TW202018878 A TW 202018878A
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semiconductor device
patent application
voltage
packaging
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TW108134915A
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TWI827688B (zh
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曹培炎
劉雨潤
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大陸商深圳幀觀德芯科技有限公司
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Abstract

本文公開了一種方法，所述方法包括：在半導體基板的第一表面上形成第一導電層，其中第一導電層與半導體電接觸；在第一導電層處，將支撐晶片接合到半導體基板；使半導體基板變薄。

Description

半導體器件的封裝方法
本公開涉及半導體器件的封裝方法。
隨著電子應用尺寸的縮小，積體電路（IC）封裝器件的占地面積和厚度都減小了。驅動較小封裝的開發的是對諸如存儲卡、智慧卡、行動電話和可擕式計算等可擕式通信器件的需求。
本文公開了一種方法，所述方法包括：在半導體的基板的第一表面上形成第一導電層，其中所述第一導電層與所述半導體電接觸；在所述第一導電層處，將支撐晶片接合到所述半導體基板；使所述半導體基板變薄。
根據實施例，所述方法還包括在所述半導體基板的與所述第一表面相對的第二表面上形成電觸點。
根據實施例，所述方法還包括：獲得其中具有電路的晶片；通過在所述第二表面處將所述晶片接合到所述半導體基板，將所述電路電連接到所述電觸點。
根據實施例，所述方法還包括封裝所述晶片和所述半導體基板。
根據實施例，所述方法還包括通過去除所述支撐晶片來暴露所述第一導電層的至少一部分。
根據實施例，所述方法還包括在所述半導體基板中形成p-n接合或p-i-n接合。
根據實施例，所述第一表面是拋光的。
根據實施例，所述第一導電層包含金屬。
根據實施例，所述金屬包括Al、Au或其組合。
根據實施例，所述支撐晶片包含氧化矽層。
根據實施例，所述支撐晶片包含在接合之後與所述第一導電層接觸的第二導電層。
根據實施例，所述方法還包括對所述半導體基板進行雷射退火。
根據實施例，所述方法還包括使所述半導體基板變薄，使所述半導體基板變薄包括在所述半導體基板上進行化學機械平坦化、蝕刻所述半導體基板或兩者。
根據實施例，所述方法還包括將所述第一導電層電接地。
根據實施例，所述電路包括被配置為處理或分析從所述半導體基板產生的電信號的電子系統。
根據實施例，所述電子系統包括接觸墊。
根據實施例，所述電子系統包括：第一電壓比較器，被配置為將所述接觸墊的電壓與第一閾值進行比較；第二電壓比較器，被配置為將所述電壓與第二閾值進行比較；計數器，被配置為記錄由所述基板吸收的輻射粒子的數量；控制器；其中，所述控制器被配置為從所述第一電壓比較器確定所述電壓的絕對值等於或超過所述第一閾值的絕對值的時間開始時間延遲；其中，所述控制器被配置為在所述時間延遲期間啟動所述第二電壓比較器；其中，所述控制器被配置為：如果所述第二電壓比較器確定所述電壓的絕對值等於或超過所述第二閾值的絕對值，則使所述計數器記錄的數量增加1。
根據實施例，所述電子系統還包括電連接到所述接觸墊的積分器，其中所述積分器被配置為從所述接觸墊收集電荷載流子。
根據實施例，所述控制器被配置為在所述時間延遲開始或期滿時啟動所述第二電壓比較器。
根據實施例，所述電子系統還包括電壓表，其中所述控制器被配置為使得所述電壓表在所述時間延遲期滿時測量所述電壓。
根據實施例，所述控制器被配置為基於在所述時間延遲期滿時測量的電壓值來確定輻射粒子的能量。
根據實施例，所述控制器被配置為將所述接觸墊連接到電接地。
根據實施例，在所述時間延遲期滿時，所述電壓的變化率基本上為零。
根據實施例，在所述時間延遲期滿時，所述電壓的變化率基本上不為零。
圖1示意性地示出了半導體基板110的橫截面圖。基板110具有第一表面110A和第二表面110B。第二表面110B與第一表面110A相對。第一表面110A、第二表面110B或兩者可以是拋光的。基板110的半導體可以是矽、鍺、GaAs、CdTe、CdZnTe或其組合。基板110的半導體可以是其他合適的半導體材料。基板可以包括第一摻雜區111和本徵區112。第一摻雜區111可以小於10微米厚。基板110的總厚度可以是幾百微米。
圖2A至圖2G示意性地示出了根據實施例的方法。
圖2A示意性地示出了在基板110的第一表面110A上形成第一導電層130。第一導電層130與基板110電接觸。如果存在第一摻雜區111，則第一導電層130可以與第一摻雜區111電接觸。第一導電層130可以包含金屬，比如Al、Au或其組合。第一導電層130可以包含其他合適的材料。第一導電層130的厚度可以小於1微米。
圖2B示意性地示出了支撐晶片140在第一導電層130處接合到基板110。支撐晶片140可以包含絕緣體層142。絕緣體可以是諸如氧化矽之類的氧化物，諸如氮化矽之類的氮化物，諸如氮氧化矽的氮氧化物，或其他合適的材料。支撐晶片140可以包含半導體層141。支撐晶片140可以包含在接合之後與第一導電層130接觸的第二導電層143。第二導電層143包含金屬，比如Al、Au或其組合。第二導電層143可以包含其他合適的材料。可以通過直接接合來接合支撐晶片140和基板110。直接接合可以在高溫下進行，但不一定如此。
圖2C示意性地示出了基板110可以被變薄。使基板110變薄可以通過在基板110的第二表面110B上進行化學機械平坦化、濕法蝕刻或其組合來進行。例如，變薄之後的基板110可以具有200微米以下、100微米以下、50微米以下、20微米以下或5微米以下的厚度。第一導電層130可以被電接地。
圖2D示意性地示出了電觸點119可以形成在基板110的第二表面110B上。圖2D還示意性地示出了可以在基板110中形成p-n接合或p-i-n接合。在第一摻雜區111存在於基板中的示例中，具有離散部分114的第二摻雜區113可以形成在基板110中。如果存在本徵區112，則第二摻雜區113可以通過本徵區112與第一摻雜區111分離。如果存在本徵區112，則離散部分114可以通過第一摻雜區111或本徵區112彼此分離。第一摻雜區111和第二摻雜區113具有相反類型的摻雜（例如，區域111是p型，區域113是n型，或者，區域111是n型，區域113是p型）。第二摻雜區113的各離散部分114與第一摻雜區111形成p-n接合，或者與第一摻雜區111和本徵區112形成p-i-n接合。第一摻雜區111也可以具有離散部分。電觸點119可以是金、銅、鉑、鈀、摻雜矽或其他合適的材料。電觸點119可以分別與離散部分114電接觸。在一個實施例中，例如在形成第二摻雜區113之後，在基板110上進行雷射退火。
圖2E和圖2F示意性地示出了可以獲得其中包括電路的晶片120，並且電路可以電連接到電觸點119，例如，通過在第二表面110B處將晶片120接合到基板110。將晶片120接合到基板110可以通過合適的技術，例如直接接合或倒裝晶片接合。該電路可以包括被配置為處理或分析從基板110產生的電信號的電子系統121。電子系統121可以包括接觸墊125。接觸墊125可以被配置為電連接到基板110的電觸點119之一。接觸墊125可以是金屬層或摻雜半導體層。例如，接觸墊125可以是金、銅、鉑、鈀、摻雜矽等。
圖2G示意性地示出了可以通過去除支撐晶片140來暴露第一導電層130的至少一部分。例如，可以將支撐晶片140磨掉，蝕刻掉或者與基板110分離。圖2G還示意性地示出了晶片120和基板110可以被封裝在例如基質925中。基質925可以是聚合物、玻璃或其他合適的材料。
圖3A和圖3B均示出了根據實施例的電子系統121的元件圖。電子系統121可以包括第一電壓比較器301、第二電壓比較器302、計數器320、開關305、電壓表306和控制器310。
第一電壓比較器301被配置為將接觸墊125的電壓與第一閾值進行比較。第一電壓比較器301可以被配置為直接監視電壓，或者通過在一段時間內對流過接觸墊125的電流進行積分來計算電壓。第一電壓比較器301可以由控制器310可控地啟動或去啟動。第一電壓比較器301可以是連續比較器。即，第一電壓比較器301可以被配置為連續啟動並連續監視電壓。第一閾值可以是一個入射輻射粒子在基板110中可以產生的最大電壓的5-10%、10%-20%、20-30%、30-40%或40-50%。最大電壓可以取決於輻射粒子的能量、基板110的材料和其他因素。例如，第一閾值可以是50mV、100mV、150mV或200mV。
第二電壓比較器302被配置為將電壓與第二閾值進行比較。第二電壓比較器302可以被配置為直接監視電壓，或者通過在一段時間內對流過接觸墊125的電流進行積分來計算電壓。第二電壓比較器302可以由控制器310可控地啟動或去啟動。當第二電壓比較器302被去啟動時，第二電壓比較器302的功耗可以小於在第二電壓比較器302被啟動時的功耗的1%、5%、10%或者20%。第二閾值的絕對值大於第一閾值的絕對值。如本文所使用的，實數
Figure 02_image001
的術語「絕對值」或「模數」
Figure 02_image003
是不考慮其符號的
Figure 02_image001
的非負值。即，
Figure 02_image005
。第二閾值可以是第一閾值的200%-300%。第二閾值可以是一個入射輻射粒子在基板110中可以產生的最大電壓的至少50%。例如，第二閾值可以是100mV、150mV、200mV、250mV或300mV。第二電壓比較器302和第一電壓比較器310可以是同一元件。即，系統121可以具有一個電壓比較器，其可以在不同時間將電壓與兩個不同的閾值進行比較。
第一電壓比較器301或第二電壓比較器302可以包括一個或多個運算放大器或任何其他合適的電路。第一電壓比較器301或第二電壓比較器302可以具有使得電子系統121可在高通量的入射輻射下操作的高速。
計數器320被配置為記錄到達基板110的輻射粒子的數量。計數器320可以是軟體元件（例如，存儲在電腦記憶體中的數量）或硬體元件（例如，4017 IC和7490 IC）。
控制器310可以是硬體元件，例如微控制器和微處理器。控制器310被配置為從第一電壓比較器301確定電壓的絕對值等於或超過第一閾值的絕對值（例如，電壓的絕對值從低於第一閾值的絕對值增加為等於或高於第一閾值的絕對值的值）的時間開始時間延遲。這裡使用絕對值是因為電壓可以是負的或正的。控制器310可以被配置為在第一電壓比較器301確定電壓的絕對值等於或超過第一閾值的絕對值的時間之前，將第二電壓比較器302、計數器320和第一電壓比較器301的操作不需要的任何其他電路保持為去啟動。時間延遲可以在電壓變得穩定即電壓的變化率基本上為零之前或之後期滿。「電壓的變化率基本上為零」的短語意指電壓的時間變化小於0.1%/ns。「電壓的變化率基本上不為零」的短語意指電壓的時間變化至少為0.1%/ns。
控制器310可以被配置為在時間延遲期間（包括開始和期滿）啟動第二電壓比較器302。在實施例中，控制器310被配置為在時間延遲開始時啟動第二電壓比較器302。術語「啟動」意指使元件進入操作狀態（例如，通過發送諸如電壓脈衝或邏輯準位之類的信號，通過提供電力等）。術語「去啟動」意指使元件進入非操作狀態（例如，通過發送諸如電壓脈衝或邏輯準位之類的信號，通過切斷電力等）。操作狀態可以具有比非操作狀態更高的功耗（例如，為非操作狀態的10倍，100倍，1000倍）。控制器310本身可以被去啟動，直到當電壓的絕對值等於或超過第一閾值的絕對值時第一電壓比較器301的輸出啟動控制器310為止。
控制器310可以被配置為如果在時間延遲期間，第二電壓比較器302確定電壓的絕對值等於或超過第二閾值的絕對值，則使得由計數器320記錄的數量增加1。
控制器310可以被配置為使得電壓表306在時間延遲期滿時測量電壓。控制器310可以被配置為將接觸墊125連接到電接地，以便使電壓重定並對在接觸墊125上累積的任何電荷載流子進行放電。在實施例中，接觸墊125在時間延遲期滿之後連接到電接地。在實施例中，接觸墊125在有限的復位時間段內連接到電接地。控制器310可以通過控制開關305將接觸墊125連接到電接地。開關可以是諸如場效應電晶體（FET）之類的電晶體。
在實施例中，系統121不具有類比濾波器網路（例如，RC網路）。在實施例中，系統121沒有類比電路。
電壓表306可以將其測量的電壓作為類比或數位信號饋送到控制器310。
電子系統121可以包括電連接到接觸墊125的積分器309，其中積分器被配置為從接觸墊125收集電荷載流子。積分器可以在放大器的回饋路徑中包括電容器。這樣配置的放大器稱為電容互阻抗放大器（CTIA）。CTIA通過阻止放大器飽和而具有高動態範圍，並通過限制信號路徑中的頻寬來提高信噪比。在一段時間（「積分期」）（例如，如圖4所示，在t0 到t1 或t1 -t2 之間）內來自接觸墊125的電荷載流子累積在電容器上。積分期期滿後，對電容器電壓進行採樣，然後通過重定開關使電容器電壓重定。積分器309可包括直接連接到接觸墊125的電容器。
圖4示意性地示出了由入射在基板110上的輻射粒子產生的電荷載流子引起的流過接觸墊125的電流的時間變化（上部曲線），以及接觸墊125的電壓的相應時間變化（下部曲線）。電壓可以是電流相對於時間的積分。在時間t0 ，輻射粒子撞擊基板110，電荷載流子開始在基板110中產生，電流開始流過接觸墊125，並且接觸墊125的電壓的絕對值開始增加。在時間t1 ，第一電壓比較器301確定電壓的絕對值等於或超過第一閾值V1的絕對值，並且控制器310開始時間延遲TD1，並且控制器310可以在TD1開始時去啟動第一電壓比較器301。如果控制器310在t1 之前被去啟動，則控制器310在t1 被啟動。在TD1期間，控制器310啟動第二電壓比較器302。如這裡使用的術語「在......期間」意指開始和期滿（即結束）以及它們之間的任何時間。例如，控制器310可以在TD1期滿時啟動第二電壓比較器302。如果在TD1期間，第二電壓比較器302在時間t2 確定電壓的絕對值等於或超過第二閾值的絕對值，則控制器310使得由計數器320記錄的數量增加1。在時間te ，由輻射粒子產生的所有電荷載流子漂移出基板110。在時間ts ，時間延遲TD1期滿。在圖4的示例中，時間ts 在時間te 之後；即，在由輻射粒子產生的所有電荷載流子漂移出基板110之後，TD1期滿。因此，電壓的變化率在ts 處基本上為零。控制器310可以被配置為在TD1期滿時或在t2 或在其間的任何時間去啟動第二電壓比較器302。
控制器310可以被配置為使得電壓表306在時間延遲TD1期滿時測量電壓。在實施例中，控制器310使電壓表306在時間延遲TD1期滿之後電壓的變化率基本上變為零之後測量電壓。此時刻的電壓與由輻射粒子產生的電荷載流子的量成比例，其與輻射粒子的能量有關。控制器310可以被配置為基於電壓表306測量的電壓來確定輻射粒子的能量。確定能量的一種方法是對電壓進行分區。計數器320可以具有用於各分區的子計數器。當控制器310確定輻射粒子的能量落入一分區中時，控制器310可以使在用於該分區的子計數器中記錄的數量增加1。因此，電子系統121可能能夠檢測輻射圖像並且可能能夠分辨各輻射粒子的能量。
在TD1期滿之後，控制器310在復位期RST內將接觸墊125連接到電接地，以使得累積在接觸墊125上的電荷載流子可以流到地並使電壓重定。在RST之後，電子系統121準備好檢測另一個入射輻射粒子。如果第一電壓比較器301已經被去啟動，則控制器310可以在RST期滿之前的任何時間啟動它。如果控制器310已經被去啟動，則可以在RST期滿之前啟動它。
雖然本文已經公開了各個方面和實施例，但是其他方面和實施例對於本領域技術人員而言將是顯而易見的。本文公開的各個方面和實施例是出於說明的目的而不意圖是限制性的，真正的範圍和精神由所附申請專利範圍指示。
110:基板 110A:第一表面 110B:第二表面 111:第一摻雜區 112:本徵區 113:第二摻雜區 114:離散部分 119:電觸點 120:晶片 121:電子系統 125:接觸墊 130:第一導電層 140:支撐晶片 141:半導體層 142:絕緣體層 143:第二導電層 301:第一電壓比較器 302:第二電壓比較器 305:開關 306:電壓表 309:積分器 310:控制器 320:計數器 925:基質 RST:復位期 t0、t1、t2、te、ts:時間 TD1:時間延遲 V1:第一閾值
圖1示意性地示出了半導體基板的示例性橫截面圖。 圖2A至圖2G示意性地示出了根據實施例的方法。 圖3示意性地示出了電子系統的組件圖。 圖3A和圖3B均示出了電子系統的組件圖。 圖4示意性地示出了流過半導體基板的電觸點的電流的時間變化（上部曲線），以及電觸點的電壓的相應時間變化（下部曲線），該電流是由入射在半導體基板上的輻射粒子產生的電荷載流子引起的。
110:基板
110A:第一表面
110B:第二表面
111:第一摻雜區
112:本徵區

Claims (24)

  1. 一種半導體器件的封裝方法，包括： 在半導體的基板的第一表面上形成第一導電層，其中，所述第一導電層與所述半導體電接觸； 在所述第一導電層處，將支撐晶片接合到所述半導體基板； 使所述半導體基板變薄。
  2. 如申請專利範圍第1項所述的半導體器件的封裝方法，還包括在所述半導體基板的與所述第一表面相對的第二表面上形成電觸點。
  3. 如申請專利範圍第2項所述的半導體器件的封裝方法，還包括： 獲得其中具有電路的晶片； 通過在所述第二表面處將所述晶片接合到所述半導體基板，將所述電路電連接到所述電觸點。
  4. 如申請專利範圍第3項所述的半導體器件的封裝方法，還包括封裝所述晶片和所述半導體基板。
  5. 如申請專利範圍第3項所述的半導體器件的封裝方法，還包括通過去除所述支撐晶片來暴露所述第一導電層的至少一部分。
  6. 如申請專利範圍第1項所述的半導體器件的封裝方法，還包括在所述半導體基板中形成p-n接合或p-i-n接合。
  7. 如申請專利範圍第1項所述的半導體器件的封裝方法，其中，所述第一表面是拋光的。
  8. 如申請專利範圍第1項所述的半導體器件的封裝方法，其中，所述第一導電層包含金屬。
  9. 如申請專利範圍第8項所述的半導體器件的封裝方法，其中，所述金屬包括Al、Au或其組合。
  10. 如申請專利範圍第1項所述的半導體器件的封裝方法，其中，所述支撐晶片包含氧化矽層。
  11. 如申請專利範圍第1項所述的半導體器件的封裝方法，其中，所述支撐晶片包含在接合之後與所述第一導電層接觸的第二導電層。
  12. 如申請專利範圍第1項所述的半導體器件的封裝方法，還包括對所述半導體基板進行雷射退火。
  13. 如申請專利範圍第1項所述的半導體器件的封裝方法，其中，使所述半導體基板變薄包括在所述半導體基板上進行化學機械平坦化、蝕刻所述半導體基板或兩者。
  14. 如申請專利範圍第1項所述的半導體器件的封裝方法，還包括將所述第一導電層電接地。
  15. 如申請專利範圍第3項所述的半導體器件的封裝方法，其中，所述電路包括被配置為處理或分析從所述半導體基板產生的電信號的電子系統。
  16. 如申請專利範圍第15項所述的半導體器件的封裝方法，其中，所述電子系統包括接觸墊。
  17. 如申請專利範圍第16項所述的半導體器件的封裝方法，其中，所述電子系統包括： 第一電壓比較器，被配置為將所述接觸墊的電壓與第一閾值進行比較； 第二電壓比較器，被配置為將所述電壓與第二閾值進行比較； 計數器，被配置為記錄由所述基板吸收的輻射粒子的數量； 控制器； 其中，所述控制器被配置為從所述第一電壓比較器確定所述電壓的絕對值等於或超過所述第一閾值的絕對值的時間開始時間延遲； 其中，所述控制器被配置為在所述時間延遲期間啟動所述第二電壓比較器； 其中，所述控制器被配置為：如果所述第二電壓比較器確定所述電壓的絕對值等於或超過所述第二閾值的絕對值，則使所述計數器記錄的數量增加1。
  18. 如申請專利範圍第17項所述的半導體器件的封裝方法，其中，所述電子系統還包括電連接到所述接觸墊的積分器，其中所述積分器被配置為從所述接觸墊收集電荷載流子。
  19. 如申請專利範圍第17項所述的半導體器件的封裝方法，其中，所述控制器被配置為在所述時間延遲開始或期滿時啟動所述第二電壓比較器。
  20. 如申請專利範圍第17項所述的半導體器件的封裝方法，其中，所述電子系統還包括電壓表，其中所述控制器被配置為使得所述電壓表在所述時間延遲期滿時測量所述電壓。
  21. 如申請專利範圍第20項所述的半導體器件的封裝方法，其中，所述控制器被配置為基於在所述時間延遲期滿時測量的電壓值來確定輻射粒子的能量。
  22. 如申請專利範圍第17項所述的半導體器件的封裝方法，其中，所述控制器被配置為將所述接觸墊連接到電接地。
  23. 如申請專利範圍第17項所述的半導體器件的封裝方法，其中，在所述時間延遲期滿時，所述電壓的變化率基本上為零。
  24. 如申請專利範圍第17項所述的半導體器件的封裝方法，其中，在所述時間延遲期滿時，所述電壓的變化率基本上不為零。
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