TW201937179A - A method for estimating contact resistances of a MOS transistor - Google Patents

Abstract

A method for estimating resistances of a source contact and a drain contact of a MOS transistor includes the following steps. A MOS transistor is provided. The MOS transistor includes a substrate, a gate, a source region and a drain region, a source contact electrically connected to the source region, and a drain contact electrically connected to the drain region. A resistance difference between a source contact resistance and a drain contact resistance is obtained. A resistance sum of the source contact resistance and the drain contact resistance is obtained. The source contact resistance and the drain contact resistance are calculated based on the resistance sum of the source contact resistance and the drain contact resistance, and on the resistance difference between the source contact resistance and the drain contact resistance.

Description

Method for measuring contact resistance of MOS transistor

This application claims the priority and benefits of U.S. Provisional Application No. 62 / 595,800 for 2017/12/07 and U.S. Formal Application No. 15 / 911,529 for 2018/03/05. The contents of the official US application are incorporated herein by reference in their entirety.

The present disclosure relates to a method for measuring the contact resistance of a metal-oxide semiconductor (MOS) transistor, and more particularly to a method for obtaining the contact resistance from the overall resistance of a MOS transistor.

The metal oxide semiconductor transistor has a plurality of resistance sources connected in series, including the resistance of the source contact, the resistance of the source region, the resistance of the drain region, and the resistance of the drain contact. For evaluating the performance of an integrated circuit. It is important to accurately measure the individual resistance values of the source, source, drain, and source contacts.

As the gate length of MOS transistors is reduced to continue to pursue better device performance and higher integration, parasitic source and drain resistances have become very important in the model construction and characteristics of MOS transistors. The parasitic source resistance and drain resistance generated by the source and drain contacts may cause the drive current to decrease. Therefore, when obtaining the performance of the integrated circuit, it is necessary to accurately measure the source contact resistance and the drain contact resistance.

The above description of the "prior art" is only for providing background technology. It does not recognize that the above description of the "prior technology" reveals the subject of this disclosure, does not constitute the prior technology of this disclosure, and any description of the "prior technology" above Neither shall be part of this case.

The embodiment of the present disclosure provides a method for measuring the contact resistance of a MOS transistor, including the following steps: providing a MOS transistor, the MOS transistor including: a substrate, a gate, a source region and a drain region; And a source contact electrically connected to the source region and a drain contact electrically connected to the drain region; obtaining a resistance difference between a source contact resistance and a drain contact resistance; Obtaining a resistance sum of the source contact resistance and the drain contact resistance; and according to the resistance sum of the source contact resistance and the drain contact resistance, and the source contact resistance and the drain The resistance difference between the contact resistances is used to calculate the source contact resistance and the drain contact resistance.

In the disclosed embodiment, the measuring method further includes operating the MOS transistor in a forward configuration, including: grounding the substrate and the source contact; applying a set of first gate voltages to the gate; and when applying the When the first group of gate voltages reaches the gate, a set of potentials across the gate and the source contact, a set of potentials across the drain contact and the source contact, and A set of currents from the pole contact to the source contact.

In the disclosed embodiment, the measuring method further includes operating the MOS transistor in a reverse configuration, including: grounding the substrate and the drain; applying a set of second gate voltages to the gate; and when the set of second When a gate voltage is applied to the gate, a set of potentials across the gate and the drain contact, a set of potentials across the source contact and the drain contact, and a connection from the source are measured A set of currents from the point to the drain contact.

In the disclosed embodiment, the resistance difference between the source contact resistance and the drain contact resistance is given by equation (1) Vgs = VgS + RSC * Idsn, and equation (2) Vgd = VgD + RDC * Idsi is obtained, where Vgs is a potential across the gate and the source contact; VgS is a potential across the gate and the source region; RSC is the resistance of the source contact; Idsn is the current from the drain contact to the source contact; Vgd is a potential across the gate and the drain contact; VgD is a potential across the gate and the drain region RDC is the resistance of the drain contact; Idsi is the current from the source contact to the drain contact.

In the embodiment of the present disclosure, the resistance difference between the source contact resistance and the drain contact resistance is obtained by a double variable equation.

In the embodiment of the present disclosure, the sum of the resistances of the source contact resistance and the drain contact resistance is determined by the formula (3) Vds = VDS + (RDC + RSC) * Idsn, and the equation (4) (RDC + RSC) * Idsi obtained, where Vds is a potential across the gate and source contacts; VDS is a potential across the drain and source regions; Vsd is across the source A potential of the contact and the drain contact; VSD is a potential across the source region and the drain region.

In the disclosed embodiment, the sum of the resistances of the source contact resistance and the drain contact resistance is calculated in the form of a double variable equation.

In the embodiment of the present disclosure, the dual variable equation is a curve fitting method to calculate the sum of the resistances of the source contact resistance and the drain contact resistance.

In the disclosed embodiment, the bivariate equation is a least square method to calculate the sum of the resistances of the source contact resistance and the drain contact resistance.

In the embodiment of the present disclosure, by solving the double variable equation of the sum of the resistance of the source contact resistance and the drain contact resistance, and the relationship between the source contact resistance and the drain contact resistance, The dual variable equation of the resistance difference calculates the resistance of the source contact and the resistance of the drain contact.

The embodiment of the disclosure provides a method for measuring the contact resistance of a MOS transistor. This measurement method uses four equations derived from Ohm's law to estimate the source contact resistance and the drain contact resistance of a MOS transistor. This measurement method can estimate the source contact resistance and the drain contact resistance of a single MOS transistor. Therefore, it can be applied to various semiconductor devices, such as vertical MOS transistors and horizontal MOS transistors. This measurement method can accurately obtain the source contact resistance and the drain contact resistance from the overall resistance of the MOS transistor through a simple methodology, and can reduce the influence of parasitic resistance. Therefore, the performance of the integrated circuit can be accurately obtained.

In contrast, traditional methods use complex measurement techniques to connect voltage and ammeters to MOS transistors, which can lead to additional parasitic resistance.

The technical features and advantages of this disclosure have been outlined quite extensively above, so that the detailed description of this disclosure below can be better understood. Other technical features and advantages that constitute the subject matter of the patent application of this disclosure will be described below. Those with ordinary knowledge in the technical field to which this disclosure belongs should understand that the concepts and specific embodiments disclosed below can be used quite easily to modify or design other structures or processes to achieve the same purpose as this disclosure. Those with ordinary knowledge in the technical field to which this disclosure belongs should also understand that such equivalent constructions cannot be separated from the spirit and scope of this disclosure as defined by the scope of the attached patent application.

The following description of this disclosure is accompanied by drawings that form a part of the description to illustrate the embodiment of the disclosure, but the disclosure is not limited to this embodiment. In addition, the following embodiments can be appropriately integrated with the following embodiments to complete another embodiment.

"One embodiment", "embodiment", "exemplified embodiment", "other embodiment", "another embodiment", etc. refer to the embodiment described in this disclosure may include specific features, structures, or characteristics, however Not every embodiment must include the particular feature, structure, or characteristic. Furthermore, the repeated use of the phrase "in the embodiment" does not necessarily refer to the same embodiment, but may be the same embodiment.

In order that this disclosure may be fully understood, the following description provides detailed steps and structures. Obviously, the implementation of this disclosure does not limit the specific details known to those skilled in the art. In addition, the known structures and steps are not described in detail, so as not to unnecessarily limit the present disclosure. The preferred embodiments of the present disclosure are detailed below. However, in addition to the embodiments, the disclosure can be widely implemented in other embodiments. The scope of this disclosure is not limited to the content of the embodiments, but is defined by the scope of patent application.

Some embodiments of the present disclosure provide a method for measuring the contact resistance of a MOS transistor. This measurement method is designed to estimate the circuit solution of a single MOS transistor. The source contact resistance and the drain contact resistance can be used in various semiconductor devices.

FIG. 1A is a schematic diagram illustrating a MOS transistor 1 according to an embodiment of the present disclosure. FIG. 1B is a cross-sectional view illustrating the MOS transistor 1 according to the embodiment of the present disclosure. As shown in FIGS. 1A and 1B, the MOS transistor 1 includes a substrate 10, a gate 12, a source region 14, and a drain region 16. The MOS transistor 1 is electrically connected to the source contact 18 of the source region 14 and is electrically connected to the drain. The drain contact 20 of the region 16. The MOS transistor 1 may further include a gate oxide layer (not shown) between the gate electrode 12 and the substrate 10, and a channel (not labeled) between the source region 14 and the drain region 16.

FIG. 2 is an equivalent circuit diagram illustrating an equivalent circuit diagram of the MOS transistor of FIGS. 1A and 1B. As shown in FIGS. 1A, 1B, and 2, the equivalent circuit of the MOS transistor 1 includes a source contact resistance RSC, a source resistance RS, a drain resistance RD, and a drain contact resistance RDC which are electrically connected in series. . In the embodiment of the present disclosure, the equivalent circuit of the MOS transistor 1 has four nodes, including a base node Nb, a gate node Ng, a source node Ns, and a drain node Nd, which are respectively provided to the substrate 10 and the gate. 12. The source contact 18 and the drain contact 20 provide signals or receive signals. The base node Nb is electrically connected to the substrate 10. The gate node Ng is electrically connected to the gate 12. The source node Ns is electrically connected to the source contact 18. The drain node Nd is electrically connected to the drain contact 20.

FIG. 3 is a flowchart illustrating a method 100 for measuring the contact resistance of a MOS transistor according to an embodiment of the disclosure. As shown in FIG. 3, the measurement method 100 starts from step 110, in which a MOS transistor is provided; the MOS transistor includes: a substrate, a gate, a source region, and a drain region, and is electrically connected to the source. A source contact of the region and a drain contact electrically connected to the drain region. The measurement method 100 proceeds to step 120 in which a resistance difference between the source contact resistance and the drain contact resistance is obtained. The measurement method 100 proceeds to step 130 in which the resistance sum of the source contact resistance and the drain contact resistance is obtained. The measurement method 100 proceeds to step 140, in which the source contact resistance and the drain contact resistance are calculated based on the resistance and the difference from the resistance.

The measurement method 100 is only one embodiment of the disclosure. Although the disclosure and its advantages have been described in detail, it should be understood that various changes, substitutions and substitutions can be made without departing from the spirit and scope of the disclosure as defined by the scope of the patent application. For example, many of the steps described above can be performed in different ways, and many of the steps described above can be replaced with other steps or combinations thereof.

The measurement method 100 further includes operating the MOS transistor in a forward configuration and a reverse configuration, and measuring a related potential and current in the forward configuration and the reverse configuration. 4A and 4B are schematic diagrams. FIG. 4A illustrates a forward configuration of a MOS transistor, and FIG. 4B illustrates a reverse configuration of the MOS transistor. As shown in FIG. 1A, FIG. 1B, and FIG. 4A, the MOS transistor, in a forward configuration, grounds the substrate 10 and the source contact 18. When the MOS transistor is configured in the forward direction, a set of first gate voltages Vg1 of different voltage values are applied to the gate 12 through a gated power supply through a gate node Ng. When this set of first gate voltage Vg1 is applied to the gate 12, a set of potentials Vgs across the gate 12 and the source contact 18, one across the drain contact 20 and the source contact 18 can be measured. The group potential Vds and a group of currents Idsn from the drain contact 20 to the source contact 18.

As shown in FIGS. 1A, 1B, and 4B, in a reverse configuration, the substrate 10 and the drain contact 20 are grounded. When the MOS transistor is in the reverse configuration, a set of second gate voltages Vg2 with different voltage values are applied to the gate 12 through a gated power supply through an adjustable power supply. When this set of second gate voltage Vg2 is applied to gate 12, a set of potentials Vgd across gate 12 and drain contact 20, one across source contact 18 and drain contact 20 can be measured. The group potential Vsd and a group of currents Isdi from the source contact 18 to the drain contact 20.

In the embodiment of the present disclosure, in the forward configuration and / or the reverse configuration, the source contact resistance RSC and the sink can be obtained by measuring the potential and current through the following equations (1) and (2) The resistance difference between the pole contact resistance RDC: Vgs = VgS + RSC * Idsn (1); and Vgd = VgD + RDC * Idsi (2), where: Vgs is across the gate and the source contact Potential; VgS is the potential across the gate and the source region; RSC is the resistance of the source contact; Idsn is the current from the drain contact to the source contact; Vgd is the current across the gate And the potential of the drain contact; VgD is the potential across the gate and the drain region; RDC is the resistance of the drain contact; Idsi is the current from the source contact to the drain contact.

In the embodiment of the disclosure, the resistance difference (RSC-RDC) between the source contact resistance RSC and the drain contact resistance RDC is obtained by the following calculation: Equation (2) is subtracted from Equation (1) to obtain Equation (2) ) -1: Vgs-Vgd = (VgS + RSC * Idsn)-(VgD + RDC * Idsi) (2) -1;

Under the condition that VgS-VTn = VgD-VTi (where VTn is the critical voltage of the MOS transistor in the forward configuration and VTi is the critical voltage of the MOS transistor in the reverse configuration), Idsn is equal to Idsi (that is, Idsn = Idsi) ; Therefore, Idsn and Idsi can be represented by Ids, and Ids is replaced with Idsn and Idsi to obtain Equation (2) -2: Vgs-Vgd = VgS-VgD + Ids (RSC-RDC) (2) -2; VTi replaces VgS-VgD to obtain equation (2) -3: Vgs-Vgd = VTn-VTi + Ids (RSC-RDC) (2) -3;

Derive equation (2) -3 and obtain equation (a): Ids (RSC-RDC) = (Vgs-Vgd)-(VTn-VTi) (a);

Because Ids, Vgs, Vgd, VTn and VTi can be obtained by measuring MOS transistors and are known, the resistance difference (RSC-RDC) between the source contact resistance RSC and the drain contact resistance RDC can be transmitted To obtain the form of a variable equation.

In the embodiment of the present disclosure, the resistance sum (RSC + RDC) of the source contact resistance RSC and the drain contact resistance RDC can be obtained from the following equations (3) and (4): Vds = VDS + (RDC + RSC) * Idsn (3); and Vsd = VSD + (RDC + RSC) * Idsi (4), where: Vds is the potential across the drain and source contacts; VDS is across the drain region and source Vsd is the potential across the source and drain contacts; VSD is the potential across the source and drain regions.

In the embodiment of the present disclosure, the resistance sum (RSC + RDC) of the source contact resistance RSC and the drain contact resistance RDC is obtained by the following calculation: Equation (3) is divided by Idsn to obtain: Vds / Idsn = VDS / Idsn + (RDC + RSC) (3) -1.

Because the source contact resistance RSC, the source resistance RS, the drain resistance RD, and the drain contact resistance RDC are electrically connected in series, Idsn is equal to IDSn (where IDSn is the current from the drain region to the source region); Therefore, IDSn and Idsi can be represented by IDS; Idsn is replaced by IDS in equation (3) -1 to obtain equation (3) -2: Vds / Idsn = VDS / IDS + (RDC + RSC) (3) -2,

Because IDS can be calculated from the following theoretical formula: IDS = u * Cox (W / L) (Vgs-VTn) VDS, where: u is carrier mobility; Cox is per unit area of gate oxide of MOS transistor Capacitance; W is the width of the MOS transistor channel; and L is the length of the MOS transistor channel; Derive equation (2) -3 to obtain equation (3) -3: Vds / Idsn≅ VDS / (u * Cox (W / L) (VgS-VTn) VDS) + (RDC + RSC) (3) -3. Because VDS is significantly larger than Idsn * VTn, equation (1) can be rewritten as: VgS = Vgs-Idsn * RSC≈Vgs (1) -1. In equation (3) -3, replace VgS with Vgs to obtain equation (b): Vds / Idsn≅ [(1 / (u * Cox (W / L)) (1 / (Vgs-VTn))] + (RDC + RSC) (b).

In the embodiment of the present disclosure, equation (4) can be derived by using a method similar to obtaining equation (b '). Vsd / Idsi [(1 / (u * C _ox (W / L)) (1 / (Vgd-VTi))] + (RDC + RSC) (b ').

In the embodiment of the present disclosure, the resistance sum (RSC + RDC) of the source contact resistance RSC and the drain contact resistance RDC can be estimated by a curve fitting method. For example, a set of potentials Vds, a set of potentials Vgs, and a set of currents Idsn can be used as data to plot equation (b) or equation (b ') to estimate the source contact resistance RSC and the drain contact The sum of the resistance values of the resistor RDC (RSC + RDC).

FIG. 5 is a graph illustrating the relationship between Rtot (Vds / Idsn) and 1 / (Vgs-VTn) when different potentials are applied to the gate according to the embodiment of the disclosure. As shown in Figure 5, when 1 / (Vgs-VTn) is close to zero, that is, when Vgs is close to infinity, the resistance sum (RSC + RDC) of the source contact resistance RSC and the drain contact resistance RDC is known. . Therefore, the total resistance (RSC + RDC) of the source contact resistance RSC and the drain contact resistance RDC can be estimated from the point where the slope of the curve intersects the Y axis. In this way, the resistance sum (RSC + RDC) of the source contact resistance RSC and the drain contact resistance RDC can be obtained in the form of a double variable equation. In the embodiment of the present disclosure, the resistance sum (RSC + RDC) of the source contact resistance RSC and the drain contact resistance RDC (RSC + RDC) can be obtained through another mathematical calculation such as a least square method.

The resistance measured through complex silicon hardware is approximately 42613.5 ohms. The estimated resistance sum (RSC + RDC) of the source contact resistance RSC and the drain contact resistance RDC measured by the method disclosed in this disclosure is approximately 49624 ohms. Close to the resistance sum measured through complex silicon hardware.

Because the resistance of the source contact resistance RSC and the drain contact resistance RDC and (RSC + RDC) and the source contact resistance RSC and the drain contact resistance RDC are calculated by the equation (RSC-RDC). By solving two simultaneous equations of two variables, the individual values of the source contact resistance RSC and the drain contact resistance RDC can be calculated.

In the embodiment of the present disclosure, the calculation can be realized by a processing unit such as a computer, and the calculation is stored in a storage device such as a memory element. The voltage signal or current signal can be provided and measured by simple voltmeter or ammeter detection.

The embodiment of the disclosure provides a method for measuring the contact resistance of a MOS transistor. This measurement method uses four equations derived from Ohm's law to estimate the source contact resistance and the drain contact resistance of a MOS transistor. This measurement method can estimate the source contact resistance and the drain contact resistance of a single MOS transistor. Therefore, it can be applied to various semiconductor devices, such as vertical MOS transistors and horizontal MOS transistors. This measurement method can accurately obtain the source contact resistance and the drain contact resistance from the overall resistance of the MOS transistor through a simple methodology, and can reduce the influence of parasitic resistance. Therefore, the performance of the integrated circuit can be accurately obtained.

In contrast, traditional methods use complex measurement techniques to connect voltage and ammeters to MOS transistors, which can lead to additional parasitic resistance.

This disclosure provides a method for measuring the contact resistance of a MOS transistor. The measuring method includes the following steps: providing a MOS transistor, the MOS transistor comprising: a substrate, a gate, a source region and a drain region, and a source contact electrically connected to the source region And a drain contact electrically connected to the drain region; obtaining a resistance difference between a source contact resistance and a drain contact resistance; obtaining the source contact resistance and the drain contact resistance A resistance sum of the source; calculate the source connection based on the resistance sum of the source contact resistance and the drain contact resistance, and the resistance difference between the source contact resistance and the drain contact resistance. Point resistance and the drain contact resistance.

Although the disclosure and its advantages have been described in detail, it should be understood that various changes, substitutions and substitutions can be made without departing from the spirit and scope of the disclosure as defined by the scope of the patent application. For example, many of the processes described above can be implemented in different ways, and many of the processes described above can be replaced with other processes or combinations thereof.

Moreover, the scope of the present application is not limited to the specific embodiments of the processes, machinery, manufacturing, material compositions, means, methods and steps described in the description. Those skilled in the art can understand from the disclosure of this disclosure that according to this disclosure, they can use existing, or future developmental processes, machinery, manufacturing, materials that have the same functions or achieve substantially the same results as the corresponding embodiments described herein. Composition, means, method, or step. Accordingly, such processes, machinery, manufacturing, material compositions, means, methods, or steps are included in the scope of the patent application of this application.

1‧‧‧MOS transistor

10‧‧‧ substrate

12‧‧‧Gate

14‧‧‧Source area

16‧‧‧ Drain

18‧‧‧Source contact

20‧‧‧ Drain contacts

100‧‧‧ Method

110‧‧‧step

120‧‧‧ steps

130‧‧‧ steps

140‧‧‧step

Nb‧‧‧base node

Nd‧‧‧Drain Node

Ng‧‧‧Gate Node

Ns‧‧‧Source Node

RD‧‧‧Drain region resistance

RDC‧‧‧Drain contact resistance

RS‧‧‧Source area resistance

RSC‧‧‧Source contact resistance

Vg1‧‧‧First gate voltage

Vg2‧‧‧Second gate voltage

When referring to the drawings combined with the embodiments and the scope of the patent application, the disclosure in this application can be understood more fully. The same component symbols in the drawings refer to the same components. FIG. 1A is a schematic diagram illustrating the MOS transistor of the embodiment of the disclosure; FIG. 1B is a cross-sectional view illustrating the MOS transistor of FIG. 1A; FIG. 2 is an equivalent circuit diagram illustrating the MOS transistor of FIG. 1A and FIG. 1B; FIG. 3 is a flowchart illustrating a method for measuring the contact resistance of the MOS transistor of the present disclosure; FIG. 4A is a schematic diagram illustrating the forward configuration of the MOS transistor of the present disclosure; FIG. 4B is A schematic diagram illustrating the reverse configuration of the MOS transistor in the embodiment of the present disclosure. FIG. 5 is a graph illustrating the relationship between Rtot (Vds / Idsn) and 1 / (Vgs-VTn) when different potentials are applied to the gate according to the embodiment of the present disclosure.

Claims (10)

A method for measuring the contact resistance of a MOS transistor includes: providing a MOS transistor including: a substrate; a gate; a source region and a drain region; a source contact electrically connected to the source An electrode region; and a drain contact, electrically connected to the drain region; obtaining a resistance difference between a source contact resistance and a drain contact resistance; obtaining the source contact resistance and the drain electrode A resistance sum of the contact resistances; and calculating the source contact resistance and the drain contact resistance based on the resistance sum and the resistance difference. The measuring method according to claim 1, further comprising: operating the MOS transistor in a forward configuration, comprising: grounding the substrate and the source contact; applying a set of first gate voltages to the gate; and When the first set of gate voltages is applied to the gate, a set of potentials across the gate and the source contact, a set of potentials across the drain contact and the source contact, and A set of currents from the drain contact to the source contact. The measuring method according to claim 2, further comprising: operating the MOS transistor in a reverse configuration, comprising: grounding the substrate and the drain contact; applying a set of second gate voltages to the gate; and When the set of second gate voltages is applied to the gate, measure a set of potentials across the gate and the drain contact, a set of potentials across the source and the drain contact, and A set of currents from the source contact to the drain contact. The measuring method according to claim 3, wherein the resistance difference between the source contact resistance and the drain contact resistance is obtained by the following equation: Vgs = VgS + RSC * Idsn (1); and Vgd = VgD + RDC * Idsi (2), where Vgs is the potential across the gate and the source contact; VgS is the potential across the gate and the source; RSC is the source contact resistance; Idsn Is the current from the drain contact to the source contact; Vgd is the potential across the gate and the drain contact; VgD is the potential across the gate and the drain region; RDC is the The resistance of the drain contact; Idsi is the current from the source contact to the drain contact. The measuring method according to claim 4, wherein the resistance difference between the source contact resistance and the drain contact resistance is calculated in the form of a double variable equation. The measuring method according to claim 5, wherein the sum of the resistances of the source contact resistance and the drain contact resistance is obtained by: Vds = VDS + (RDC + RSC) * Idsn (3); and Vsd = VSD + (RDC + RSC) * Idsi (4), where Vds is the potential across the drain and source contacts; VDS is the potential across the drain and source regions; Vsd is horizontal The potential across the source and drain contacts; VSD is the potential across the source and drain regions. The measuring method according to claim 6, wherein the sum of the resistances of the source contact resistance and the drain contact resistance is calculated in the form of a double variable equation. The measuring method according to claim 7, wherein the bivariate equation is a curve fitting method to calculate the resistance sum of the source contact resistance and the drain contact resistance. The measuring method according to claim 7, wherein the bivariate equation is a least square method to calculate the sum of the resistances of the source contact resistance and the drain contact resistance. The measuring method according to claim 8, wherein the bivariate equation of the sum of the resistance of the source contact resistance and the drain contact resistance is solved, and the source contact resistance and the drain contact resistance are solved. The bivariate equation of the resistance difference between the two calculates the resistance of the source contact and the resistance of the drain contact.