TW201928924A - Display device and method for operating same - Google Patents

Abstract

Provided is a display device having high display quality. The display device includes: a first pixel section in which first pixels are arranged in a matrix; and a second pixel section in which second pixels are arranged in a matrix. First, a first correction filter including a function of correcting an image displayed by the first pixel section and a second correction filter including a function of correcting an image displayed by the second pixel section are created. Next, a filter value of the first correction filter and a correction value of the second correction filter are compared. Thereafter, the filter value of the first correction filter is corrected on the basis of the comparison results.

Description

   Display device and working method thereof   

An embodiment of the present invention relates to a display device and a method of operating the same.

Note that one embodiment of the present invention is not limited to the above technical field. Examples of the technical field of an embodiment of the present invention include a semiconductor device, a display device, a light-emitting device, a display system, an electronic device, a lighting device, an input device (for example, a touch sensor, etc.), and an input / output. A device (for example, a touch panel, etc.) and a driving method or a manufacturing method of the above device.

Note that in this specification and the like, a semiconductor device refers to all devices capable of operating by utilizing semiconductor characteristics. A display device (a liquid crystal display device, a light-emitting display device, etc.), a projection device, a lighting device, an electro-optical device, a power storage device, a memory device, a semiconductor circuit, an imaging device, and an electronic device may be referred to as a semiconductor device. Alternatively, it can sometimes be said that they include semiconductor devices.

In recent years, a display device with a high resolution is required. For example, there are many pixels such as Full HD (1920 × 1080 pixels) display devices, 4K (3840 × 2160 or 4096 × 2160 pixels) display devices, and 8K (7680 × 4320 or 8192 × 4320 pixels) display devices. The development of display devices is booming.

In addition, there is a demand for a larger display device. For example, the mainstream of home televisions is display devices whose screen size exceeds a diagonal of 50 inches. The larger the screen size, the more information can be displayed at one time, so digital signage and the like are required to be larger.

Flat panel displays typified by liquid crystal display devices and light-emitting display devices are widely used as display devices. Silicon is mainly used as a semiconductor material for transistors constituting these display devices. However, in recent years, a technology using a transistor using a metal oxide for a pixel of a display device has also been developed.

Patent Document 1 discloses a technique of using amorphous silicon as a semiconductor material for a transistor. Patent Literature 2 and Patent Literature 3 disclose technologies using a metal oxide as a semiconductor material for a transistor. Patent Document 4 discloses a technology for manufacturing a large-scale display device by arranging a plurality of display panels.

[Patent Document 1] Japanese Patent Application Laid-Open No. 2001-53283

[Patent Document 2] Japanese Patent Application Publication No. 2007-123861

[Patent Document 3] Japanese Patent Application Laid-Open No. 2007-96055

[Patent Document 4] Japanese Patent Application Laid-Open No. 2015-180924

In addition, a display device in which a plurality of display panels are arranged to be used as a large display area can easily see the boundary between the display panels due to variations in the characteristics of each display panel.

The larger the number of pixels provided in the display panel, the larger the number of transistors and display elements included in the display panel. Therefore, unevenness in displaying an image on the display panel caused by the characteristic deviation of the transistor and the characteristic deviation of the display element is deteriorated.

An object of one embodiment of the present invention is to provide a display device with high display quality. An object of one embodiment of the present invention is to provide a display device with improved display unevenness. An object of one embodiment of the present invention is to provide a display device with high resolution. An object of one embodiment of the present invention is to provide a display device including a large display area. An object of one embodiment of the present invention is to provide a display device capable of operating at a high frame frequency. An object of one embodiment of the present invention is to provide a display device with low power consumption. An object of one embodiment of the present invention is to provide a thin display device. An object of one embodiment of the present invention is to provide a flexible display device. An object of one embodiment of the present invention is to provide a display device with a large viewing angle. An object of one embodiment of the present invention is to provide a display device that can be manufactured using a small manufacturing device. An object of one embodiment of the present invention is to provide an inexpensive display device. An object of one embodiment of the present invention is to provide a highly reliable display device. An object of one embodiment of the present invention is to provide a novel display device. An object of one embodiment of the present invention is to provide a novel semiconductor device and the like.

An object of one embodiment of the present invention is to provide a method for operating a display device with high display quality. An object of one embodiment of the present invention is to provide a method for operating a display device with improved display unevenness. An object of one embodiment of the present invention is to provide a method for operating a display device with high resolution. An object of one embodiment of the present invention is to provide a method for operating a display device including a large display area. An object of one embodiment of the present invention is to provide a method for operating a display device capable of operating at a high frame frequency. An object of one embodiment of the present invention is to provide a method for operating a display device with low power consumption. An object of one embodiment of the present invention is to provide a method for operating a thin display device. It is an object of one embodiment of the present invention to provide a method for operating a flexible display device. An object of one embodiment of the present invention is to provide a method for operating a display device with a large viewing angle. An object of one embodiment of the present invention is to provide a method of operating a display device that can be manufactured using a small manufacturing device. An object of one embodiment of the present invention is to provide a method for operating an inexpensive display device. An object of one embodiment of the present invention is to provide a method for operating a highly reliable display device. An object of one embodiment of the present invention is to provide a novel method of operating a display device. An object of one embodiment of the present invention is to provide a novel method of operating a semiconductor device or the like.

Note that the description of these purposes does not prevent the existence of other purposes. It is not necessary for one embodiment of the present invention to achieve all the above-mentioned objects. Purposes other than those described above can be extracted from descriptions, drawings, and descriptions of the scope of patent applications.

An embodiment of the present invention is a method of operating a display device including a first pixel portion in which first pixels are arranged in a matrix and a second pixel portion in which second pixels are arranged in a matrix, wherein A first correction filter having a function of displaying an image displayed in a first pixel portion and a second correction filter having a function of correcting an image displayed in a second pixel portion, filtering values of the first correction filter and a second correction filter The filter values of the filters are compared, and the filter values of the first correction filter are corrected according to the comparison result.

Alternatively, an embodiment of the present invention is a method of operating a display device including a first pixel portion in which first pixels in m rows and n columns (m, n are integers of 2 or more) are arranged in a matrix, and The second pixels in m rows and n columns are arranged in a matrix-like second pixel portion, and the first pixel in the m-th row and the second pixel in the first row are adjacent to each other, and a pixel having a function of correcting an image displayed on the first pixel portion is formed. A first correction filter and a second correction filter having a function of correcting an image displayed on a second pixel portion; the first correction filter has a filter value corresponding to the first pixel; the second correction filter has a value corresponding to the second pixel The corresponding filter value is an average value of the filter value corresponding to the first pixel provided in the boundary portion with the second pixel portion and the filter value corresponding to the second pixel provided in the boundary portion with the first pixel portion Compare the average values of the two and correct the filter value of the first correction filter according to the comparison result.

Alternatively, in the above manner, the brightness of the light emitted from the first pixel and the gray of the first pixel may be obtained by measuring the brightness of the light emitted from the first pixel for a plurality of grayscale values of the first pixel. The data of the correspondence of the order values is obtained by displaying an image of a predetermined gray-scale value on the first pixel portion and measuring the brightness of the light emitted from the first pixel to obtain the luminance data. Then, the data of the correspondence and the The luminance data forms a first correction filter.

Alternatively, an embodiment of the present invention is a working method of a display device including a first pixel portion in which first pixels are arranged in a matrix and a second pixel portion in which second pixels are arranged in a matrix, wherein The first image is displayed on the first pixel portion and the second image is displayed on the second pixel portion. The brightness of the light emitted from the first pixel and the brightness of the light emitted from the second pixel are compared, and from The brightness of the light emitted by the first pixel.

Alternatively, an embodiment of the present invention is a method of operating a display device including a first pixel portion in which first pixels in m rows and n columns (m, n are integers of 2 or more) are arranged in a matrix, and The second pixels in m rows and n columns are arranged in a matrix-like second pixel portion. The first pixel in the m-th row and the second pixel in the first row are adjacent to each other. The first image is displayed on the first pixel portion and the second pixel is displayed. The image is displayed in the second pixel portion, and the average value of the brightness of light emitted from the first pixel provided in the boundary portion with the second pixel portion and the average value of the light emitted from the second pixel provided in the boundary portion with the first pixel portion The average value of the brightness of the emitted light is compared, and the brightness of the light emitted from the first pixel is corrected based on the comparison result.

Alternatively, in the above manner, before displaying the first image on the first pixel portion and displaying the second image on the second pixel portion, the grayscale values of the first pixel may be changed from the first pixel by Measurement of the brightness of the emitted light to obtain data on the correspondence between the brightness of the light emitted from the first pixel and the grayscale value of the first pixel, and by displaying an image of a predetermined grayscale value on the first pixel portion, and The brightness of the light emitted from the first pixel is measured to obtain brightness data, a correction filter is formed using the correspondence data and the brightness data, and the first image is an image corrected using the correction filter.

Alternatively, in the above manner, the image with the predetermined grayscale value may be an image with the same grayscale value of all the first pixels.

Alternatively, an embodiment of the present invention is a display device including a pixel portion and a processing portion. The pixels are arranged in a matrix in the pixel portion. The pixel includes a display element and a memory circuit. The brightness data obtained from the image forms the function of the correction filter, and the memory circuit has the function of holding the correction filter.

Alternatively, in the above manner, the pixel may include a display element, a first transistor, a body, a second transistor, a third transistor, a fourth transistor, a first capacitor, and a second capacitor. The source of the first transistor One of the electrode and the drain is electrically connected to one electrode of the first capacitor, the other electrode of the first capacitor is electrically connected to one of the source and the drain of the second transistor, and the source and the drain of the second transistor are electrically connected One of the electrodes is electrically connected to the gate of the third transistor, the gate of the third transistor is electrically connected to one electrode of the second capacitor, and the other electrode of the second capacitor is connected to the source and drain of the third transistor One of the source and the drain of the third transistor is electrically connected to one of the source and the drain of the fourth transistor, and the other of the source and the drain of the fourth transistor is electrically connected One is electrically connected to one electrode of the display charger.

Alternatively, in the above aspect, the display element may be an organic EL element.

Alternatively, in the above aspect, the second transistor may contain a metal oxide in the channel formation region, and the metal oxide may have In, Zn, M (M is Al, Ti, Ga, Sn, Y, Zr, La , Ce, Nd or Hf).

According to an embodiment of the present invention, a display device with high display quality can be provided. According to an embodiment of the present invention, a display device with improved display unevenness can be provided. According to an embodiment of the present invention, a display device with high resolution can be provided. According to an embodiment of the present invention, a display device including a large display area can be provided. According to an embodiment of the present invention, a display device capable of operating at a high frame frequency can be provided. According to an embodiment of the present invention, a display device with low power consumption can be provided. According to an embodiment of the present invention, a thin display device can be provided. According to an embodiment of the present invention, a flexible display device can be provided. According to an embodiment of the present invention, a display device with a large viewing angle can be provided. According to an embodiment of the present invention, a display device that can be manufactured using a small manufacturing device can be provided. According to an embodiment of the present invention, an inexpensive display device can be provided. According to an embodiment of the present invention, a highly reliable display device can be provided. According to an embodiment of the present invention, a novel display device can be provided. According to one embodiment of the present invention, a novel semiconductor device and the like can be provided.

According to an embodiment of the present invention, a method for operating a display device with high display quality can be provided. According to an embodiment of the present invention, it is possible to provide a method for operating a display device with improved display unevenness. According to an embodiment of the present invention, a method for operating a display device with high resolution can be provided. According to an embodiment of the present invention, a method for operating a display device including a large display area can be provided. According to an embodiment of the present invention, a method for operating a display device capable of operating at a high frame frequency can be provided. According to an embodiment of the present invention, a method for operating a display device with low power consumption can be provided. According to an embodiment of the present invention, a method for operating a thin display device can be provided. According to an embodiment of the present invention, a method for operating a flexible display device can be provided. According to an embodiment of the present invention, a method for operating a display device with a large viewing angle can be provided. According to an embodiment of the present invention, it is possible to provide a method of operating a display device that can be manufactured using a small manufacturing device. According to an embodiment of the present invention, a method for operating an inexpensive display device can be provided. According to an embodiment of the present invention, a method for operating a highly reliable display device can be provided. According to an embodiment of the present invention, a novel method of operating a display device can be provided. According to one embodiment of the present invention, a novel method of operating a semiconductor device or the like can be provided.

Note that the description of these purposes does not prevent the existence of other purposes. It is not necessary for one embodiment of the present invention to achieve all the above-mentioned objects. Purposes other than those described above can be extracted from descriptions, drawings, and descriptions of the scope of patent applications.

10A‧‧‧ display device

10B‧‧‧Display device

20A‧‧‧Display

20B‧‧‧Display

20C‧‧‧Display

21‧‧‧pixel section

21A‧‧‧Pixel section

21B‧‧‧Pixel

22‧‧‧scan line driver circuit

22A‧‧‧Scan Line Drive Circuit

22B‧‧‧Scan Line Drive Circuit

23‧‧‧Signal line drive circuit

23A‧‧‧Signal line driver circuit

23B‧‧‧Signal line driver circuit

24A‧‧‧Sequence Controller

24B‧‧‧Sequence Controller

25‧‧‧ pixels

26‧‧‧ pixels

27‧‧‧area

28A‧‧‧Border

28B‧‧‧Border

28C‧‧‧Border

28D‧‧‧Border

29‧‧‧display area

29A‧‧‧Border

29B‧‧‧Border

29C‧‧‧Border

29D‧‧‧Border

29E‧‧‧Border

29F‧‧‧Border

29G‧‧‧Border

29H‧‧‧Border

30A‧‧‧Signal generation department

30B‧‧‧Signal generation department

31‧‧‧ front end

32‧‧‧ decoder

33‧‧‧Treatment Department

34‧‧‧Receiving Department

35‧‧‧ interface

36‧‧‧Control Department

40A‧‧‧Processing Department

40B‧‧‧Treatment Department

45A‧‧‧Division

45B‧‧‧Division

50‧‧‧Calculation processing device

72‧‧‧area

73‧‧‧area

74‧‧‧FPC

101‧‧‧ Transistor

102‧‧‧Transistor

103‧‧‧Capacitor

104‧‧‧Light-emitting element

111‧‧‧ Transistor

112‧‧‧Transistor

113‧‧‧Capacitor

121‧‧‧ Transistor

122‧‧‧ Transistor

123‧‧‧Transistor

124‧‧‧Capacitor

125‧‧‧Capacitor

126‧‧‧LCD element

128‧‧‧ potential supply line

129‧‧‧Common wiring

132‧‧‧Common wiring

133‧‧‧Common wiring

170‧‧‧Light-emitting element

180‧‧‧LCD element

215‧‧‧Display

221‧‧‧scan line driver circuit

229A‧‧‧Border

229B‧‧‧Border

229C‧‧‧Border

229D‧‧‧Border

251‧‧‧Transistor

433‧‧‧Capacitor

444‧‧‧Transistor

445‧‧‧node

446‧‧‧Transistor

447‧‧‧node

723‧‧‧electrode

726‧‧‧ Insulation

728‧‧‧ Insulation

729‧‧‧Insulation

741‧‧‧Insulation

742‧‧‧Semiconductor layer

744a‧‧‧electrode

744b‧‧‧electrode

746‧‧‧electrode

771‧‧‧ substrate

772‧‧‧ Insulation

810‧‧‧Transistor

811‧‧‧Transistor

820‧‧‧Transistor

821‧‧‧ Transistor

825‧‧‧Transistor

826‧‧‧Transistor

842‧‧‧Transistor

843‧‧‧Transistor

844‧‧‧Transistor

845‧‧‧Transistor

846‧‧‧Transistor

847‧‧‧Transistor

4001‧‧‧ substrate

4005‧‧‧ Sealant

4006‧‧‧ substrate

4008‧‧‧LCD layer

4010‧‧‧ Transistor

4011‧‧‧Transistor

4013‧‧‧LCD element

4014‧‧‧Wiring

4015‧‧‧electrode

4017‧‧‧electrode

4018‧‧‧FPC

4019‧‧‧Anisotropic conductive layer

4020‧‧‧Capacitor

4021‧‧‧electrode

4030‧‧‧electrode layer

4031‧‧‧electrode layer

4032‧‧‧Insulation

4033‧‧‧Insulation

4035‧‧‧spacer

4102‧‧‧Insulation

4103‧‧‧Insulation

4104‧‧‧Insulation

4110‧‧‧Insulation

4111‧‧‧ Insulation

4112‧‧‧Insulation

4131‧‧‧Color Layer

4132‧‧‧Light-shielding layer

4133‧‧‧Insulation

4510‧‧‧ partition

4511‧‧‧Light-emitting layer

4513‧‧‧Light-emitting element

4514‧‧‧Filling material

7000‧‧‧Display

7100‧‧‧TV

7101‧‧‧shell

7103‧‧‧Scaffold

7111‧‧‧Remote control

7200‧‧‧Notebook PC

7211‧‧‧shell

7212‧‧‧Keyboard

7213‧‧‧pointing device

7214‧‧‧External port

7300‧‧‧ Digital Signage

7301‧‧‧Shell

7303‧‧‧Speaker

7311‧‧‧Information terminal equipment

7400‧‧‧ Digital Signage

7401‧‧‧post

7411‧‧‧Information terminal equipment

1A and 1B are diagrams showing an example of a display device; FIG. 2 is a diagram showing an example of a display section; FIGS. 3A and 3B are diagrams showing an example of a display panel; FIGS. 4A and 4B FIG. 5A and FIG. 5B are diagrams illustrating an example of the operation of the display device; FIGS. 6A to 6C are diagrams illustrating an example of the operation of the display device; 7C is a diagram showing an example of the operation of the display device; FIGS. 8A and 8B are diagrams showing an example of a pixel; FIG. 9 is a diagram showing an example of a display device; and FIG. 10 is a diagram showing a display section FIG. 11 is a diagram showing an example of a pixel; FIG. 12A and FIG. 12B are diagrams showing an example of the operation of a pixel; FIG. 13 is a diagram showing an example of a pixel; 14B is a diagram showing an example of the operation of a pixel; FIG. 15 is a diagram showing an example of the operation of a display device; FIG. 16A-1, FIG. 16A-2, FIG. 16B-1, and FIG. 16B-2 are views A diagram showing an example of the operation of the display device.

17A to 17C are diagrams showing an example of the operation of the display device; FIGS. 18A and 18B are diagrams showing an example of the display device; FIGS. 19A1, 19A2, 19B1, 19B2, 19C1, and 19C 19C2 is a diagram showing an example of a transistor; FIGS. 20A1, 20A2, 20B1, 20B2, 20C1, and 20C2 are diagrams showing an example of a transistor; FIG. 21A1, FIG. 21A2, FIG. 21B1, FIG. 21B2, 21C1, and 21C2 are diagrams showing examples of transistors; FIGS. 22A1, 22A2, 22B1, 22B2, 22C1, and 22C2 are diagrams showing examples of transistors; FIGS. 23A to 23 23D is a diagram showing an example of an electronic device; FIG. 24 is a diagram showing a display device used in Embodiment 1; FIGS. 25A and 25B are photographs showing a display result of Embodiment 1; FIG. 26A and FIG. 26B is a photograph showing a luminance profile of Example 2.

A selection diagram of the present invention is shown in Figs. 5A and 5B.

The embodiment will be described in detail with reference to the drawings. Note that the present invention is not limited to the following description, but a person of ordinary skill in the art can easily understand the fact that the manner and details can be changed into various kinds without departing from the spirit and scope of the present invention. Kind of form. Therefore, the present invention should not be construed as being limited to the content described in the embodiments shown below.

Note that in the invention structure described below, the same element symbols are commonly used in different drawings to represent the same parts or parts having the same functions, and repeated descriptions are omitted. In addition, the same hatching is sometimes used when representing parts having the same function, and element symbols are not particularly attached.

In addition, for ease of understanding, the positions, sizes, and ranges of the components shown in the drawings may not indicate the actual positions, sizes, and ranges of the components. Therefore, the disclosed invention is not necessarily limited to the position, size, scope, etc. disclosed in the drawings.

In addition, depending on the situation or state, the "film" and "layer" can be interchanged with each other. For example, the “conductive layer” can be transformed into a “conductive film”. In addition, the "insulation film" can be converted into an "insulation layer".

In this specification and the like, metal oxide refers to an oxide of a metal in a broad sense. Metal oxides are classified into oxide insulators, oxide conductors (including transparent oxide conductors), and oxide semiconductors (also referred to as OS). For example, when a metal oxide is used for a semiconductor layer of a transistor, the metal oxide is sometimes referred to as an oxide semiconductor. In other words, the OS FET can be referred to as a transistor including a metal oxide or an oxide semiconductor.

In addition, in this specification and the like, a metal oxide containing nitrogen may also be referred to as a metal oxide. In addition, a metal oxide containing nitrogen may be referred to as a metal oxynitride.

Embodiment 1

In this embodiment, a display device according to an embodiment of the present invention will be described with reference to FIGS. 1A to 17C.

An embodiment of the present invention relates to a display device and a working method thereof in which a boundary between the display panels is not easily recognized even if a plurality of display panels are arranged to realize a large display area.

<1-1. Configuration Example 1 of Display Device>

1A and 1B are block diagrams showing a configuration example of a display device 10A.

The display device 10A has a function of generating image data using data received from the outside, and a function of displaying an image based on the image data.

As shown in FIG. 1A, the display device 10A includes a display section 20A and a signal generation section 30A. The display section 20A includes a plurality of display panels DP. The signal generating unit 30A has a function of generating video data from data received from the outside. The display panel DP has a function of displaying an image based on the image data.

FIG. 1A shows an example in which the display panels DP are arranged in two rows and one column in the display section 20A. The display of the display panel DP can be controlled independently. Note that in the display section 20A, the display panels DP may be arranged in three or more rows, or may be arranged in two or more columns.

In this specification and the like, the display panel DP provided in the p-th row and the q-th column (p, q is an integer of 1 or more) is referred to as a display panel DP [p, q].

By arranging a plurality of display panels DP, a display portion 20A having a large display area can be manufactured.

A configuration example of the display panel DP [1, 1] and the display panel DP [2, 1] is shown in FIG. 1B. The display panel DP [1, 1] includes a pixel portion 21A, a scanning line driving circuit 22A (also referred to as a gate driver), a signal line driving circuit 23A (also referred to as a source driver), and a timing controller 24A. The display panel DP [2, 1] includes a pixel portion 21B, a scanning line driving circuit 22B, a signal line driving circuit 23B, and a timing controller 24B. The signal generating section 30A includes a front end section 31, a decoder 32, a processing section 33, a receiving section 34, an interface 35, a control section 36, a processing section 40A, and a division section 45A.

Note that in this specification and the like, a pixel portion such as the pixel portion 21A and the pixel portion 21B provided in a display portion included in a display device according to an embodiment of the present invention may be referred to as a pixel portion 21. In addition, a scanning line driving circuit such as a scanning line driving circuit 22A and a scanning line driving circuit 22B provided in a display unit included in a display device according to an embodiment of the present invention may be referred to as a scanning line driving circuit 22. Furthermore, the signal line driving circuit such as the signal line driving circuit 23A and the signal line driving circuit 23B provided in the display section included in the display device according to an embodiment of the present invention may be referred to as a signal line driving circuit 23.

Hereinafter, each component included in the display panel DP and the signal generating section 30A will be described.

The pixel portion 21A and the pixel portion 21B include a plurality of pixels. The pixel portion 21A and the pixel portion 21B have a function of displaying an image.

The pixel includes a display element. The pixel has a function of emitting light of brightness corresponding to a grayscale value. The gray scale of the pixel is controlled based on the signals supplied from the scanning line driving circuit 22A and the signal line driving circuit 23A, so that a specified image is displayed on the pixel portion 21A. In addition, by controlling the gray scale of a pixel based on signals supplied from the scanning line driving circuit 22B and the signal line driving circuit 23B, a specified image is displayed on the pixel portion 21B.

The scanning line driving circuit 22A has a function of supplying a signal (also referred to as a selection signal) for selecting a pixel to the pixel section 21A. The scanning line driving circuit 22B has a function of supplying a selection signal to the pixel section 21B.

The signal line driving circuit 23A has a function of supplying a signal (also referred to as a video signal) showing a gray scale represented by a pixel to the pixel portion 21A. The signal line driving circuit 23B has a function of supplying a video signal to the pixel section 21B. By supplying an image signal to a pixel to which a selection signal is supplied, the pixel emits light corresponding to a grayscale value, thereby displaying a specified image on the pixel portion 21A and the pixel portion 21B.

The timing controller 24A has a function of generating timing signals (such as a clock signal and a start pulse signal) used by the scanning line driving circuit 22A and the signal line driving circuit 23A. The timing controller 24B has a function of generating timing signals used by the scanning line driving circuit 22B, the signal line driving circuit 23B, and the like. The timing signal generated by the timing controller 24A controls one or both of the timing of outputting a selection signal from the scanning line driving circuit 22A and the timing of outputting an image signal from the signal line driving circuit 23A. The timing signal generated by the timing controller 24B controls one or both of the timing of outputting a selection signal from the scanning line driving circuit 22B and the timing of outputting an image signal from the signal line driving circuit 23B. In addition, when the display panel DP [1, 1] includes a plurality of scanning line driving circuits, the timing of the signals output from the plurality of scanning line driving circuits is synchronized by the timing signals generated by the timing controller 24A. When the display panel DP [2,1] includes a plurality of scanning line driving circuits, the timing of the signals output from the plurality of scanning line driving circuits is synchronized by the timing signals generated by the timing controller 24B. Similarly, when the display panel DP [1, 1] includes a plurality of signal line driving circuits, the timing of the signals output from the signal line driving circuits is synchronized by the timing signals generated by the timing controller 24A. When the display panel DP [2,1] includes a plurality of signal line driving circuits, the timing of the signals output from the signal line driving circuits is synchronized by the timing signals generated by the timing controller 24B.

The front end portion 31 has a function of receiving a signal input from the outside and performing signal processing appropriately. For example, a broadcast signal or the like modulated and coded in a specified manner is input to the front end portion 31. The front end portion 31 may have a function of demodulating a received video signal, performing analog-digital conversion, and the like. The front end portion 31 may have a function of performing error correction. The signal received by the front end portion 31 and processed by the signal is output to the decoder 32.

The decoder 32 has a function of decrypting the encoded signal. When the video data included in the broadcast signal or the like input to the front end portion 31 is compressed, it is decompressed by the decoder 32. For example, the decoder 32 may have a function of performing inverse orthogonal transforms such as entropy decoding, inverse quantization, inverse discrete cosine transform (IDCT), or inverse discrete sine transform (IDST), intra-frame prediction, inter-frame prediction, and the like. The video data generated by the decryption processing by the decoder 32 is output to the processing unit 33.

The processing unit 33 has a function of performing image processing on the image data input from the decoder 32 to generate a first image data SD1 and outputting the first image data SD1 to the processing unit 40A.

Examples of image processing include noise removal processing, grayscale conversion processing, hue correction processing, brightness correction processing, and the like. The tone correction process or the brightness correction process can be performed using gamma correction or the like.

Examples of the noise removal processing include removal of various noises such as mosquito noise generated near the outline of characters, block noise generated in high-speed moving images, and random noise generated by flickering. Wait.

The gray scale conversion processing refers to processing for converting the gray scale of the first image data SD1 into a gray scale corresponding to the output characteristics of the display section 20A. For example, when increasing the number of gray levels, smoothing the bar graph can be performed by supplementing and assigning gray level values corresponding to each pixel to the image data input with a smaller number of gray levels. In addition, high dynamic range (HDR) processing for expanding dynamic range is also included in the grayscale conversion processing.

The tone correction process is a process of correcting the tone of an image. In addition, the brightness correction process refers to a process of correcting the brightness (luminance contrast) of an image. For example, the brightness or hue of an image displayed on the display unit 20A is corrected to the most suitable brightness or hue according to the type of illumination, brightness, color purity, and the like of the space in which the display unit 20A is provided.

The supplementary processing between frames is processing for generating an image of a frame (supplementary frame) which does not exist when the frame frequency of the displayed image is increased. For example, the difference between two images is used to generate an image of a supplementary frame inserted between the two images. Alternatively, multiple supplementary frame images can be generated between two images. For example, when the frame frequency of the image data is 60 Hz, by generating a plurality of supplementary frames, the frame frequency of the image signal output to the display section 20A can be increased to twice 120 Hz, four times 240 Hz, or eight. 480Hz and so on.

The image processing described above may be performed using an image processing section provided separately from the processing section 33. In addition, one or more of the image processing described above are performed by the processing unit 40A.

The receiving unit 34 has a function of receiving data or a control signal input from the outside. Data or control signals can be input to the receiving unit 34 using the arithmetic processing device 50, a remote controller, a portable information terminal (such as a smartphone or tablet terminal), operation buttons provided in the display section 20A, and a touch panel. Examples of the arithmetic processing device 50 include computers having excellent arithmetic processing capabilities, such as a computer, a server, and a cloud server.

The interface 35 has a function of appropriately performing signal processing on data or control signals received by the receiving unit 34 and outputting the signals or control signals to the control unit 36.

The control unit 36 has a function of supplying a control signal to each circuit included in the signal generation unit 30A. For example, the control unit 36 has a function of supplying control signals to the decoder 32, the processing unit 33, and the processing unit 40A and the division unit 45A. The control by the control unit 36 may be performed based on a control signal or the like received by the reception unit 34.

The processing unit 40A has a function of forming a correction filter. The processing unit 40A has a function of generating the second image data SD2 by correcting the first image data SD1 input from the processing unit 33 using the formed correction filter. For example, the processing unit 40A has a function of correcting the first image data SD1 to reduce display unevenness of an image displayed on the display unit 20A. For example, the processing unit 40A has a function of correcting the first image data SD1 so that the border of the display panel is not easily seen, and the details will be described later. The second video data SD2 generated by the processing unit 40A is output to the division unit 45A.

The division unit 45A has a function of dividing the second video data SD2 input from the processing unit 40A. The second image data SD2 may be divided into the same number as the display panel DP provided in the display section 20A. In FIG. 1A, the second image data SD2 is divided into 2 × 1 pieces (the second image data SD2 [1,1] and the second image data SD2 [2,1]) and output to the display unit 20A. The second image data SD2 [1,1] is image data corresponding to the image displayed on the display panel DP [1,1], and the second image data SD2 [2,1] is corresponding to the image displayed on the display panel DP [2,1] 1] Image data corresponding to the image on. The division unit 45A outputs the second video data SD2 [1,1] to the signal line drive circuit 23A, and outputs the second video data SD2 [2,1] to the signal line drive circuit 23B.

FIG. 2 shows a specific configuration example of the display panel DP [1, 1] and the display panel DP [2, 1].

The pixel portion 21A and the pixel portion 21B each include a plurality of pixels 25. FIG. 2 illustrates an example in which the pixel portion 21A and the pixel portion 21B each include a plurality of pixels 25 arranged in a matrix in m rows and n columns (m and n are each an integer of 1 or more).

In this specification and the like, a pixel provided in the pixel portion 21A may be referred to as a first pixel. In addition, a pixel provided in the pixel portion 21B may be referred to as a second pixel.

A boundary portion between the pixel portion 21A and the pixel portion 21B is referred to as a boundary portion 28A. A boundary portion between the pixel portion 21B and the pixel portion 21A is referred to as a boundary portion 28B. For example, a pixel 25 in the m-th row is provided in the boundary portion 28A. For example, the pixels 25 from the (7/8) m + 1th line to the mth line are provided in the boundary portion 28A. For example, the pixels 25 in the (3/4) m + 1th line to the mth line are provided in the boundary portion 28A. Alternatively, the pixels 25 in the (1/2) m1 + 1th line to the mth line are provided in the boundary portion 28A.

In addition, for example, the pixels 25 in the first row are provided in the boundary portion 28B. For example, pixels 25 in the first to (1/8) mth rows are provided in the boundary portion 28B. For example, the pixels 25 in the first to (1/4) mth rows are provided in the boundary portion 28B. For example, the pixels 25 in the first to (1/2) th rows are provided in the boundary portion 28B.

The display panel DP [1, 1] includes m scanning lines GLa (also referred to as selection signal lines, gate lines, etc.). The display panel DP [2,1] includes m scanning lines GLb. The m scanning lines GLa and m scanning lines GLb each extend in the row direction. The m scanning lines GLa and the m scanning lines GLb are each electrically connected to the pixels 25 arranged in the row direction.

In this specification and the like, a scanning line provided in a display device according to an embodiment of the present invention, such as the scanning line GLa and the scanning line GLb, may be referred to as a scanning line GL.

In this specification and the like, the scanning line GL electrically connected to the pixel 25 in the i-th row (i is an integer from 1 to m) is referred to as a scanning line GL [i]. Note that in addition to the scanning line GL, [i] is sometimes added to a mark or symbol representing an element of the i-th row to distinguish it.

One end of the scanning line GLa is electrically connected to the scanning line driving circuit 22A, and one end of the scanning line GLb is electrically connected to the scanning line driving circuit 22B. The scanning line driving circuit 22A has a function of supplying a selection signal to the scanning line GLa, and the scanning line driving circuit 22B has a function of supplying a selection signal to the scanning line GLb. The selection signal is supplied to the pixels 25 included in the pixel portion 21A through the scanning line GLa and is supplied to the pixels 25 included in the pixel portion 21B through the scanning line GLa.

In addition, the scanning line driving circuit 22A has a function of sequentially supplying a selection signal to the scanning lines GLa [1] to GLa [m]. In other words, the scanning line driving circuit 22A has a function of sequentially scanning the scanning lines GLa [1] to GLa [m]. After scanning to the scanning line GLa [m], scanning is sequentially performed from the scanning line GLa [1]. The scanning line driving circuit 22B has a function of sequentially supplying a selection signal to the scanning lines GLb [1] to GLb [m]. In other words, the scanning line driving circuit 22B has a function of sequentially scanning the scanning lines GLb [1] to GLb [m]. After scanning to the scanning line GLb [m], scanning is performed sequentially from the scanning line GLb [1].

Note that, in addition to the scanning line driving circuit 22A, another scanning line driving circuit may be provided in the display panel DP [1, 1]. The scanning line driving circuit is electrically connected to the other end of the scanning line GLa. Therefore, the two scanning line driving circuits are provided at positions facing each other across the pixel portion 21A. In addition, in addition to the scanning line driving circuit 22B, another scanning line driving circuit may be provided in the display panel DP [2, 1]. The scanning line driving circuit is electrically connected to the other end of the scanning line GLb. Therefore, the two scanning line driving circuits are provided at positions facing each other across the pixel portion 21B.

In a case where two scanning line driving circuits are provided in one display panel DP, the selection signals for the scanning lines can be improved by supplying the scanning signals to the scanning lines GLa or GLb from the two scanning line driving circuits simultaneously. Supply capacity.

The display panel DP [1, 1] includes n signal lines SLa (also referred to as image signal lines, source lines, etc.), and the display panel DP [2, 1] includes n signal lines SLb. The n signal lines SLa and the n signal lines SLb each extend in the column direction. Each of the n signal lines SLa and the n signal lines SLb is electrically connected to a plurality of pixels 25 arranged in the column direction.

In this specification and the like, signal lines such as the signal line SLa and the signal line SLb provided in the display device according to an embodiment of the present invention may be referred to as a signal line SL.

In this specification and the like, the signal line SL electrically connected to the pixel 25 in the j-th column (j is an integer from 1 to n) is referred to as a signal line SL [j]. Note that, in addition to the signal line SL, [j] is sometimes added to a mark or symbol representing an element in the j-th column to distinguish it.

The signal line SLa is electrically connected to the signal line driving circuit 23A, and the signal line SLb is electrically connected to the signal line driving circuit 23B. The signal line driving circuit 23A has a function of supplying an image signal to the signal line SLa, and the signal line driving circuit 23B has a function of supplying an image signal to the signal line SLb. The image signal is supplied to the pixels 25 included in the pixel portion 21A through the signal line SLa and is supplied to the pixels 25 included in the pixel portion 21B through the signal line SLb.

The pixel 25 includes a display element. Examples of the display element provided in the pixel 25 include a light emitting element. Examples of the light-emitting element include OLED (Organic Light Emitting Diode), LED (Light Emitting Diode), and QLED (Quantum-dot Light Emitting Diode). And semiconductor lasers. By using a light-emitting element as a display element, especially OLED or Micro-LED, a clear image can be displayed and display quality can be improved. In addition, since a display device including a light-emitting element does not require a backlight, a thin display device can be provided. In addition, a flexible display device can be provided. Furthermore, a display device with a large viewing angle can be provided.

As the display element, a liquid crystal element can be used. Examples of the liquid crystal element include a transmissive liquid crystal element, a reflective liquid crystal element, and a semi-transmissive liquid crystal element. By using a liquid crystal element as a display element, a display device with low power consumption can be provided.

As the display element, a shutter type MEMS (Micro Electro Mechanical Systems) element, a light interference type MEMS element, a microcapsule type, an electrophoresis type, an electrowetting method, an electronic powder fluid (registered trademark) method, or the like can be used. Display elements, etc.

The number of pixels 25 provided in the display section 20A can be freely set. In order to make the display portion 20A large and display a high-definition image, it is preferable to arrange the pixels 25 in a plurality. For example, when displaying 2K images, it is preferable to set 1920 × 1080 or more pixels. In addition, when displaying a 4K image, it is preferable to set 3840 × 2160 or more pixels or 4096 × 2160 or more pixels. In addition, when displaying 8K images, it is preferable to set 7680 × 4320 or more pixels or 8192 × 4320 or more pixels. Further, more pixels may be provided in the display section 20A.

When a large display portion 20A is manufactured using a plurality of display panels DP, the size of one display panel DP need not be large. Thereby, there is no need to increase the size of the manufacturing apparatus for manufacturing the display panel DP, and space can be saved. In addition, since a manufacturing apparatus for a small-to-medium-sized display panel can be used, there is no need to use a novel manufacturing apparatus accompanying the enlargement of the display section 20A, and manufacturing costs can be suppressed. In addition, it is possible to suppress a decrease in yield due to an increase in the size of the display panel DP.

When the size of the display panel DP is the same, the display area of a display portion including a plurality of display panels DP is larger than that of a display portion including one display panel DP, thereby exerting effects such as a larger amount of information that can be displayed simultaneously. .

Note that the plurality of pixels 25 shown in FIG. 2 may have a structure that has a function of emitting red (R), green (G), or blue (B) light, respectively. Alternatively, the plurality of pixels 25 shown in FIG. 2 may have a structure that has a function of emitting red (R), green (G), blue (B), or white (W) light, respectively. As described above, by providing the pixels 25 capable of emitting light of different colors in the pixel portion 21A and the pixel portion 21B, full-color display can be performed. Note that in a case where a pixel 25 capable of emitting light of different colors is provided in the pixel portion 21A and the pixel portion 21B, the pixel 25 may be referred to as a sub-pixel.

Here, a case where a non-display area is included in the display panel DP so as to surround the pixel portion 21 is considered. At this time, for example, when the output images of the plurality of display panels DP are combined to display one image, the one image is regarded as a separate image by the user of the display device 10A.

Although the non-display area of the display panel DP is reduced (display panel DP using a narrow bezel), the display of each display panel DP can be suppressed from being viewed as separated, but it is difficult to completely eliminate the non-display area of the display panel DP.

In addition, when the area of the non-display area of the display panel DP is small, the distance between the end of the display panel DP and the elements in the display panel DP is short, so that the elements may be easy due to impurities invaded from the outside of the display panel DP. Degradation.

Therefore, in one embodiment of the present invention, the plurality of display panels DP are arranged so that a part of them overlap each other. At least one of the two display panels DP overlapping each other has a display panel DP located on the display surface side (upper side) and has a region adjacent to the pixel portion 21 that transmits visible light. In one embodiment of the present invention, the pixel portion 21 of the display panel DP arranged on the lower side overlaps with the visible light transmitting region of the display panel DP arranged on the upper side. Therefore, the non-display area between the pixel portions 21 of the two overlapping display panels DP can be reduced, and even the non-display area can be eliminated. This makes it possible to realize a large display portion 20A in which it is difficult for a user to see the seams of the display panel DP.

At least a part of the non-display area of the display panel DP located on the upper side is a region that transmits visible light, and may overlap the pixel portion 21 of the display panel DP located on the lower side. In addition, at least a part of the non-display area of the display panel DP located on the lower side may overlap the pixel portion 21 of the display panel DP located on the upper side or a region that blocks visible light. Since these portions do not affect the narrow frame (reduction of the area other than the display portion) of the display portion 20A, the area reduction may not be performed.

When the non-display area of the display panel DP is large, the distance between the end of the display panel DP and the elements in the display panel DP is long, so that it is possible to suppress the deterioration of the elements due to impurities intruding from the outside of the display panel DP. For example, when an organic EL element is used as a display element, the longer the distance between the end of the display panel DP and the organic EL element, the less likely it is that impurities such as moisture or oxygen will invade (or reach) from the outside of the display panel DP. Organic EL element. In the display device according to an embodiment of the present invention, the area of the non-display area of the display panel DP can be sufficiently ensured. Therefore, even if a display panel DP using an organic EL element or the like is applied, a large-sized display portion 20A with high reliability can be realized. .

As described above, when a plurality of display panels DP are provided on the display portion 20A, it is preferable that the plurality of display panels DP are arranged so that the pixel portions 21 are continuous between adjacent display panels DP.

FIG. 3A illustrates a configuration example of the display panel DP, and FIG. 3B illustrates a configuration example of the display panel DP.

The display panel DP shown in FIG. 3A includes a pixel portion 21, a region 72 that transmits visible light, and a region 73 that blocks visible light. A region 72 that transmits visible light and a region 73 that blocks visible light are provided adjacent to the pixel portion 21, respectively. FIG. 3A shows an example in which an FPC (Flexible Printed Circuit) 74 is provided on the display panel DP.

As shown in FIG. 2, the pixel section 21 includes a plurality of pixels 25. A region 72 that transmits visible light may be provided with a pair of substrates constituting the display panel DP, a sealant for sealing a display element sandwiched between the pair of substrates, and the like. At this time, as a member provided in the region 72 that transmits visible light, a material that is transparent to visible light is used. In addition, wirings or the like electrically connected to the pixels 25 included in the pixel portion 21 may be provided in the region 73 that blocks visible light. In addition, one or both of the scanning line driving circuit 22 and the signal line driving circuit 23 may be provided in the region 73 that blocks visible light. In addition, a terminal 73 connected to the FPC 74, a wiring connected to the terminal, and the like may be provided in the region 73 that blocks visible light.

FIG. 3B is an example in which two display panels DP shown in FIG. 3A are arranged in the vertical direction (row direction), and is a perspective view of the display surface side of the display panel DP.

The two display panels DP (the display panel DP [1, 1] and the display panel DP [2, 1]) are arranged so as to include regions overlapping each other. Specifically, the area 72 included in the display panel DP [2, 1] that transmits visible light is arranged to overlap the pixel portion 21A (on the display surface side). Accordingly, a region where the pixel portion 21A and the pixel portion 21B are arranged with almost no seams can be referred to as the display area 29 of the display portion 20A.

Here, the display panel DP is preferably flexible. For example, the pair of substrates constituting the display panel DP is preferably flexible. Thereby, the display panel DP [2,1] can be slowly bent so that the height of the top surface of the pixel portion 21B and the height of the top surface of the pixel portion 21A coincide. This makes it possible to make the heights of the respective display regions uniform except for the vicinity of the area where the display panel DP [1,1] overlaps with the display panel DP [2,1], thereby improving the display quality of the image displayed on the display region 29. .

Note that, in order to reduce the step between two adjacent display panels DP, it is preferable that the thickness of the display panel DP is thin. For example, the thickness of the display panel DP is preferably 1 mm or less, more preferably 300 μm or less, and even more preferably 100 μm or less.

As shown in FIG. 4A, there is a region adjacent to the display panel DP in the display portion 20A, that is, a seam region (region S in the figure) of the display panel DP. When displaying images using a plurality of display panels DP, it is preferable to ensure the continuity of the images in the area S.

However, the characteristics of the transistor or the size of the capacitor included in the pixel 25, the parasitic resistance or parasitic capacitance of the signal line SL, and the driving ability of the signal line driving circuit 23 may differ depending on the display panel DP. Therefore, when an image signal is supplied to each display panel DP, an error occurs in the image displayed by each display panel DP, and therefore, the image is discontinuous in the seam area. In addition, as shown in FIG. 3B, when the pixel portion 21 of one display panel DP includes an area that overlaps with the area 72 that transmits visible light of the other display panel DP, the image displayed on the pixel portion 21 in the joint area is caused by The visible light transmitted region 72 is seen, so a grayscale error occurs. As a result, the data (the first image data SD1 [1, 1] and the first image data SD1 [2, 1]) obtained by directly dividing the first image data SD1 generated by the processing unit 33 is supplied to each display. When the panel is DP, as shown in FIG. 4B, a discontinuous image is seen in the area S.

Here, the processing unit 40A included in the display device 10A may correct the first image data SD1 so that the discontinuity of the images in the joint between the two display panels DP is not easily seen. Therefore, when the display section 20A is configured using a plurality of display panels DP, it is possible to make it difficult to see image distortion in the joints of the display panel DP. In addition, unevenness in color tone of each display panel can be reduced, for example, unevenness in color tone of an image displayed on the display panel DP [1, 1] and unevenness of color tone of an image displayed on the display panel DP [2, 1] can be reduced. . This can improve display quality.

<1-2. An example of the operation method of a display device 1>

Next, an example of an operation method of the display device 10A will be described. 5A and 5B are flowcharts illustrating a method of forming a correction filter for making discontinuities in images in the seams of the display panel DP difficult to be seen.

An example of the working method shown in FIG. 5A will be described. First, the processing section 40A forms a correction filter for correcting image data corresponding to the image displayed on the display panel DP [1, 1] and a correction filter for correcting the image data corresponding to the image displayed on the display panel DP [2, 1]. A correction filter for the image data (step S01). Here, in this specification and the like, a correction filter for correcting image data corresponding to an image displayed on the display panel DP [1, 1] is referred to as a first correction filter. In addition, a correction filter used to correct image data corresponding to an image displayed on the display panel DP [2, 1] is referred to as a second correction filter.

The first correction filter may be, for example, a correction filter for reducing display unevenness of an image displayed on the display panel DP [1, 1]. The second correction filter may be, for example, a correction filter for reducing display unevenness of an image displayed on the display panel DP [2, 1]. The formation method of the first correction filter and the second correction filter will be described later. For example, the first correction filter can be formed in the following manner, that is, the display of a predetermined grayscale value on the display panel DP [1, 1] is reduced. The brightness of the light emitted from the pixels 25 is uneven among the pixels 25 at the time of the image. In addition, for example, the second correction filter may be formed in such a manner as to reduce the brightness of the light emitted from the pixel 25 when the image of a predetermined grayscale value is displayed on the display panel DP [2, 1]. Uneven.

In this specification and the like, for example, an image with a predetermined grayscale value means an image with the same grayscale value for all pixels.

Here, when an image of a middle gray scale is displayed, the unevenness between pixels of the brightness of the light emitted from the pixel is increased in many cases. Therefore, when an image with a predetermined grayscale value is an image with the same grayscale value of all the pixels 25, for example, the grayscale value of all the pixels 25 is preferably an intermediate grayscale. For example, in a case where the grayscale value that the pixel 25 can represent is 0 to 255, the grayscale value of all the pixels 25 is preferably 127 or in the vicinity thereof. For example, it is preferable that the entire surface is a gray image.

The first correction filter has, for example, data showing a correction intensity for each pixel 25 showing the brightness of light emitted from the pixels 25 included in the display panel DP [1, 1]. The second correction filter has, for example, data showing a correction intensity for each pixel 25 showing the brightness of light emitted from the pixels 25 included in the display panel DP [2, 1]. Note that, in this specification and the like, the correction intensity equivalents shown by the data included in the correction filter are referred to as filter values. For example, it can be said that the first correction filter has the same number of filter values as the number of pixels of the pixels 25 provided in the display panel DP [1, 1]. For example, it can be said that the second correction filter has the same number of filter values as the number of pixels of the pixels 25 provided in the display panel DP [2, 1].

Next, the processing section 40A uses the first correction filter to correct the image data corresponding to the image of the predetermined grayscale value, and displays the image corresponding to the corrected image data on the display panel DP [1, 1]. In addition, the processing unit 40A uses a second correction filter to correct image data corresponding to an image of a predetermined grayscale value, and displays an image corresponding to the corrected image data on the display panel DP [2, 1]. Then, the brightness of light emitted from the pixels 25 provided in the boundary portion 28A and the boundary portion 28B is measured by using a two-dimensional luminance meter or the like (step S02).

Next, the brightness of the light emitted from the pixel 25 provided in the boundary portion 28A and the brightness of the light emitted from the pixel 25 provided in the boundary portion 28B are compared (step S03). For example, the average value of the brightness of the light emitted from the pixel 25 provided in the boundary portion 28A and the average value of the brightness of the light emitted from the pixel 25 provided in the boundary portion 28B are compared.

Then, based on the comparison result, the processing unit 40A corrects the correction filter (step S04). For example, in a case where the average value of the brightness of the light emitted from the pixel 25 provided in the boundary portion 28A is L _A and the average value of the brightness of the light emitted from the pixel 25 provided in the boundary portion 28B is L _B Next, the second correction filter is corrected so that the brightness of the light emitted from the pixel 25 provided in the pixel section 21B is L _A / L _B times. Alternatively, for example, the first correction filter is corrected so that the brightness of the light emitted from the pixel 25 provided in the pixel section 21A is L _B / L _A times. Alternatively, for example, the first correction filter is corrected so that the brightness of light emitted from the pixel 25 provided in the pixel section 21A is (L _A + L _B ) / 2L _A times, and the The second correction filter is corrected so that the brightness of the light emitted by the pixel 25 in the pixel portion 21B is (L _A + L _B ) / 2L _B times. A new correction filter is formed in the above manner. The above is an example of the method of forming the correction filter used in the display device 10A.

Note that although the case where the correction filter is modified to correct the brightness of light emitted from all the pixels 25 provided in the pixel portion 21A and / or the pixel portion 21B is shown above, one embodiment of the present invention The method is not limited to this. For example, the correction filter may be modified to correct the brightness of the light emitted from the pixel 25 provided in the boundary portion 28A and / or the boundary portion 28B based on the comparison result. For example, the correction filter may be modified to correct the brightness of the light emitted from all the pixels 25 provided in the boundary portion 28A and / or the boundary portion 28B based on the above-mentioned comparison result, and from the areas provided otherwise. The brightness of the light emitted by a part of the pixels 25. For example, as shown in FIG. 3B, the correction filter may be modified to correct the brightness of light emitted from the pixel 25 provided in the area overlapping the area 72 based on the above-mentioned comparison result.

An example of the working method shown in FIG. 5B will be described. First, similar to step S01 shown in FIG. 5A, the processing unit 40A forms a first correction filter and a second correction filter (step S11).

Next, the filter value corresponding to the pixel 25 provided in the boundary portion 28A of the first correction filter and the filter value corresponding to the pixel 25 provided in the boundary portion 28B of the second correction filter are compared. (Step S12). For example, the average value of the filter value corresponding to the pixel 25 provided in the boundary portion 28A and the average value of the filter value corresponding to the pixel 25 provided in the boundary portion 28B are compared.

Then, as in step S04 shown in FIG. 5A, the correction filter is corrected based on the comparison result. For example, in a case where the average value of the filter value corresponding to the pixel 25 provided in the boundary portion 28A is D _A and the average value of the filter value corresponding to the pixel 25 provided in the boundary portion 28B is D _B , The second correction filter is corrected so that the filter values of the second correction filter are respectively D _A / D _B times. Alternatively, for example, the first correction filter is corrected so that the filter values of the first correction filter are respectively D _B / D _A times. Or, for example, the first correction filter is corrected such that the filter values of the first correction filter are (D _A + D _B ) / 2D _A times, respectively, and the second correction filter has The second correction filter is corrected in such a manner that the filtering values are (D _A + D _B ) / 2D _B times. A new correction filter is formed in the above manner. The above is an example of the method of forming the correction filter used in the display device 10A.

Note that although the above illustrates a case where the correction filter is modified to correct the filter values corresponding to all the pixels 25 provided in the pixel portion 21A and / or the pixel portion 21B according to the above comparison result, one embodiment of the present invention Not limited to this. For example, the correction filter may be modified to correct the filter value corresponding to the pixel 25 provided in the boundary portion 28A and / or the boundary portion 28B based on the comparison result. For example, the correction filter may be modified to correct the filter values corresponding to all the pixels 25 provided in the boundary portion 28A and / or the boundary portion 28B and the filter values corresponding to those provided in other regions based on the comparison result. A filter value corresponding to a part of the pixel 25. For example, as shown in FIG. 3B, the correction filter may be modified to correct the filter value corresponding to the pixel 25 provided in the area overlapping the area 72 based on the comparison result.

After a new correction filter is formed by the method shown in FIG. 5A and FIG. 5B, the correction filter may be further modified, and the correction intensity may be adjusted for each pixel 25. For example, the correction strength for pixels 25 provided outside the boundary portion 28A of the pixels 25 provided in the pixel portion 21A may be made weaker than the correction strength for pixels 25 provided in the boundary portion 28A. In addition, for example, the correction strength for pixels 25 provided outside the boundary portion 28B of the pixels 25 provided in the pixel portion 21B may be made weaker than the correction strength for pixels 25 provided in the boundary portion 28B.

After a new correction filter is formed by the above method, for example, the processing unit 40A uses the correction filter to correct the first image data SD1 corresponding to a signal input from the outside, and generates the second image data SD2. Next, the dividing section 45A divides the second image data SD2 into image data SD2 [1,1] corresponding to the image displayed on the display panel DP [1,1] and with the image data SD2 [1,1] displayed on the display panel DP [1,1] The corresponding image data SD2 [2,1]. Then, an image corresponding to the image data SD2 [1, 1] is displayed on the pixel portion 21A, and an image corresponding to the image data SD2 [2, 1] is displayed on the pixel portion 21B. The above is an example of the operation method of the display device 10A.

Note that after the processing unit 40A forms a new correction filter, the correction filter may be further corrected. For example, the correction filter may be modified to remove noise that is difficult to remove by the correction filter formed by the method shown in FIGS. 5A and 5B. For example, the correction filter may be modified so that defects such as bad pixels are not easily seen. For example, the correction filter may be modified so that the same processing as the image processing that can be performed by the processing unit 33 can be performed. For example, the correction filter is corrected so that the correction filter formed by the method shown in FIGS. 5A and 5B has a function as a smoothing filter. This can further improve the display quality of the display device according to an embodiment of the present invention.

Note that the correction of the correction filter described above may be performed, for example, between steps S01 and S02 and between steps S11 and S12. In addition, when a new correction filter is formed by the processing unit 40A, and further correction is performed on the correction filter, the processing unit 33 may be omitted.

By forming an image after forming a new correction filter by the method shown in FIGS. 5A and 5B, it is possible to make it difficult to see the distortion of the image in the joints of the display panel DP. In addition, it is possible to reduce unevenness in the color tone of the image displayed on the display panel DP [1, 1] and the color tone of the image displayed on the display panel DP [2, 1]. This can improve display quality.

Even if the two display panels DP are arranged in a horizontal direction (column direction), for example, when the display panel DP [1, 1] and the display panel DP [1, 2] are provided in the display section 20A, FIG. 1A may be used. Up to the structure and operation shown in FIG. 5B. At this time, for example, “row” is appropriately replaced with “column”, “m-th row” is replaced with “n-th column”, and “display panel DP [2,1]” is replaced with “display panel DP [1 ,2]".

Next, an example of a method of forming a correction filter when the display panel DP is arranged in two rows and two columns in the display section 20A will be described. 6A, 6B, and 6C are schematic diagrams illustrating an example of a method for forming a correction filter, and work is performed in the order of FIGS. 6A, 6B, and 6C.

In FIGS. 6A, 6B, and 6C, the display panel DP [1,1], the display panel DP [2,1], the display panel DP [1,2], and the display are shown as the display panel DP of two rows and two columns. Panel DP [2, 2]. In FIG. 6A, a boundary portion between the display panel DP [1, 1] and the display panel DP [2, 1] is referred to as a boundary portion 28A. The boundary portion between the display panel DP [2, 1] and the display panel DP [1, 1] is referred to as a boundary portion 28B. A boundary portion between the display panel DP [1, 2] and the display panel DP [2, 2] is referred to as a boundary portion 28C. A boundary portion between the display panel DP [2, 2] and the display panel DP [1, 2] is referred to as a boundary portion 28D.

In addition, in FIG. 6B, a boundary portion between the display panel DP [1, 1] and the display panel DP [1, 2] is referred to as a boundary portion 29A. A boundary portion between the display panel DP [2, 1] and the display panel DP [2, 2] is referred to as a boundary portion 29B. A boundary portion between the display panel DP [1, 2] and the display panel DP [1, 1] is referred to as a boundary portion 29C. A boundary portion between the display panel DP [2, 2] and the display panel DP [2, 1] is referred to as a boundary portion 29D.

When forming the correction filter, first, the operation shown in FIG. 5A or FIG. 5B is performed on the display panel DP [1, 1] and the display panel DP [2, 1]. In addition, the operations shown in FIG. 5A or 5B are performed on the display panel DP [1, 2] and the display panel DP [2, 2]. At this time, in step S03 shown in FIG. 5A, the brightness of the light emitted from the pixel 25 provided in the boundary portion 28C and the brightness of the light emitted from the pixel 25 provided in the boundary portion 28D are compared. Alternatively, in step S12 shown in FIG. 5B, the filter value corresponding to the pixel 25 provided in the boundary portion 28C and the filter value corresponding to the pixel 25 provided in the boundary portion 28D are compared. In the above-mentioned manner, the image of the joint between the display panel DP [1, 1] and the display panel DP [2, 1] and the joint between the display panel DP [1, 2] and the display panel DP [2, 2] Discontinuities are not easy to see.

Note that the brightness of light emitted from the pixels 25 provided in the boundary portion 28A and the boundary portion 28C and the brightness of light emitted from the pixels 25 provided in the boundary portion 28B and the boundary portion 28D may be compared in total. In other words, for example, the average value L _AC of the brightness of the light emitted from the pixel 25 provided in the border portion 28A and the brightness of the light emitted from the pixel 25 provided in the border portion 28C and the brightness L _AC The brightness of the light emitted by the pixel 25 is compared with the average value L _BD of the brightness of the light emitted from the pixel 25 provided in the boundary portion 28D. In addition, the filter values corresponding to the pixels 25 provided in the boundary portions 28A and 28C and the filter values corresponding to the pixels 25 provided in the boundary portions 28B and 28D may be compared in total. In other words, for example, the average value D _AC of the filter value corresponding to the pixel 25 provided in the boundary portion 28A and the filter value corresponding to the pixel 25 provided in the boundary portion 28C and the pixel The filter value corresponding to 25 is compared with the average value D _BD of the filter value corresponding to the pixel 25 provided in the boundary portion 28D.

Next, the operation shown in FIG. 5A or FIG. 5B is performed on the display panel DP [1, 1] and the display panel DP [1, 2]. At this time, in step S03 shown in FIG. 5A, the brightness of light emitted from the pixel 25 provided in the boundary portion 29A and the brightness of light emitted from the pixel 25 provided in the boundary portion 29C are compared. Alternatively, in step S12 shown in FIG. 5B, the filter value corresponding to the pixel 25 provided in the boundary portion 29A and the filter value corresponding to the pixel 25 provided in the boundary portion 29C are compared.

The display panel DP [2, 1] and the display panel DP [2, 2] are operated as shown in FIG. 5A or FIG. 5B. At this time, in step S03 shown in FIG. 5A, the brightness of the light emitted from the pixel 25 provided in the boundary portion 29B and the brightness of the light emitted from the pixel 25 provided in the boundary portion 29D are compared. Alternatively, in step S12 shown in FIG. 5B, the filter value corresponding to the pixel 25 provided in the boundary portion 29B and the filter value corresponding to the pixel 25 provided in the boundary portion 29D are compared.

In the above manner, the image of the display panel DP [1, 1] and the display panel DP [1,2] and the display panel DP [2,1] and the display panel DP [2,2] are in a seam. Discontinuities are not easy to see. Note that the brightness of light emitted from the pixels 25 provided in the boundary portion 29A and the boundary portion 29B may be compared with the brightness of light emitted from the pixels 25 provided in the boundary portion 29C and the boundary portion 29D. In addition, the filter values corresponding to the pixels 25 provided in the boundary portion 29A and the boundary portion 29B and the filter values corresponding to the pixels 25 provided in the boundary portion 29C and the boundary portion 29D may be compared in total.

Note that it is not necessary to make a comparison of the brightness of light emitted from the pixel 25 provided in the boundary portion 29A and the brightness of light emitted from the pixel 25 provided in the boundary portion 29C. In addition, it is not necessary to perform a comparison between the filter value corresponding to the pixel 25 provided in the boundary portion 29A and the filter value corresponding to the pixel 25 provided in the boundary portion 29C.

In addition, an example of a method of forming a correction filter when the display panel DP is arranged in two rows and three columns in the display section 20A will be described. 7A to 7C are schematic diagrams illustrating an example of a method for forming a correction filter, and work is performed in the order of FIGS. 7A, 7B, and 7C.

In FIGS. 7A to 7C, the display panel DP as two rows and three columns shows the display panel DP [1,1], the display panel DP [2,1], the display panel DP [1,2], and the display panel DP [ 2, 2], the display panel DP [1, 3], and the display panel DP [2, 3]. In FIG. 7B, a boundary portion between the display panel DP [1, 2] and the display panel DP [1, 3] is referred to as a boundary portion 29E. A boundary portion between the display panel DP [2, 2] and the display panel DP [2, 3] is referred to as a boundary portion 29F. A boundary portion between the display panel DP [1, 3] and the display panel DP [1, 2] is referred to as a boundary portion 29G. A boundary portion between the display panel DP [2, 3] and the display panel DP [2, 2] is referred to as a boundary portion 29H.

When forming the correction filter, first, the display panel DP [1, 1], the display panel DP [2, 1], the display panel DP [1, 2], and the display panel DP [2, 2] are shown in FIG. 6A and FIG. 6B and 6C. In addition, the operations shown in FIG. 5A or FIG. 5B are performed on the display panel DP [1, 3] and the display panel DP [2, 3].

Next, the operations shown in FIG. 5A or FIG. 5B are performed on the display panel DP [1, 2] and the display panel DP [1, 3]. At this time, in step S03 shown in Fig. 5A, the brightness of light emitted from the pixel 25 provided in the boundary portion 29E and the brightness of light emitted from the pixel 25 provided in the boundary portion 29G are compared. Alternatively, in step S12 shown in FIG. 5B, the filter value corresponding to the pixel 25 provided in the boundary portion 29E and the filter value corresponding to the pixel 25 provided in the boundary portion 29G are compared.

In addition, the operations shown in FIG. 5A or FIG. 5B are performed on the display panel DP [2, 2] and the display panel DP [2, 3]. At this time, in step S03 shown in FIG. 5A, the brightness of the light emitted from the pixel 25 provided in the boundary portion 29F and the brightness of the light emitted from the pixel 25 provided in the boundary portion 29H are compared. Alternatively, in step S12 shown in FIG. 5B, the filter value corresponding to the pixel 25 provided in the boundary portion 29F and the filter value corresponding to the pixel 25 provided in the boundary portion 29H are compared.

In the above-mentioned manner, the image of the joint between the display panel DP [1,2] and the display panel DP [1,3] and the joint between the display panel DP [2,2] and the display panel DP [2,3] Discontinuities are not easy to see. Note that the brightness of light emitted from the pixels 25 provided in the boundary portion 29E and the boundary portion 29F and the brightness of light emitted from the pixels 25 provided in the boundary portion 29G and the boundary portion 29H may be compared in total. In addition, the filter values corresponding to the pixels 25 provided in the boundary portion 29E and the boundary portion 29F and the filter values corresponding to the pixels 25 provided in the boundary portion 29G and the boundary portion 29H may be compared in total.

Even when the display panel DP is arranged in three or more rows or four or more rows in the display section 20C, it can be formed by using the methods shown in FIGS. 6A, 6B, 6C, 7A, 7B, and 7C. A correction filter for correcting image data corresponding to an image displayed on each display panel DP.

<1-3. Example of pixel structure 1>

A configuration example of the pixel 25 is described below with reference to FIGS. 8A and 8B. FIG. 8A is a circuit diagram illustrating a configuration example of a pixel 25 including a light emitting element. 8B is a circuit diagram illustrating a configuration example of a pixel 25 including a liquid crystal element.

The pixel 25 shown in FIG. 8A includes a transistor 446, a capacitor 433, a transistor 251, a transistor 444, and a light emitting element 170.

One of a source and a drain of the transistor 446 is electrically connected to a signal line SL to which an image signal is supplied. The gate of the transistor 446 is electrically connected to the scanning line GL to which a selection signal is supplied.

The transistor 446 has a function of controlling writing of a video signal to the node 445.

One electrode of the capacitor 433 is electrically connected to the node 445, and the other electrode of the capacitor 433 is electrically connected to the node 447. In addition, the other of the source and the drain of the transistor 446 is electrically connected to the node 445.

The capacitor 433 has a function of a storage capacitor that holds data written in the node 445.

One of the source and the drain of the transistor 251 is electrically connected to the potential supply line VL_a, and the other of the source and the drain of the transistor 251 is electrically connected to the node 447. The gate of the transistor 251 is electrically connected to the node 445.

One of the source and the drain of the transistor 444 is electrically connected to the potential supply line V0, and the other of the source and the drain of the transistor 444 is electrically connected to the node 447. The gate of the transistor 444 is electrically connected to the scanning line GL.

One electrode of the light emitting element 170 is electrically connected to the potential supply line VL_b, and the other electrode of the light emitting element 170 is electrically connected to the node 447.

Note that, as the power supply potential, for example, a potential on a relatively high potential side or a potential on a low potential side can be used. The power supply potential on the high potential side is referred to as a high power supply potential (also referred to as "VDD"), and the power supply potential on the low potential side is referred to as a low power supply potential (also referred to as "VSS"). In addition, the ground potential may be used as a high power supply potential or a low power supply potential. For example, when the high power source potential is a ground potential, the low power source potential is a potential lower than the ground potential, and when the low power source potential is a ground potential, the high power source potential is a potential higher than the ground potential.

For example, a high power supply potential VDD is supplied to one of the potential supply lines VL_a and VL_b, and a low power supply potential VSS is supplied to the other of the potential supply line VL_a and the potential supply line VL_b.

In a display device including the pixels 25 having the structure shown in FIG. 8A, the pixels 25 of each row are sequentially selected by the scan line driving circuit 22, so that the transistor 446 and the transistor 444 are turned on to write an image signal to a node. 445.

Since the transistor 446 and the transistor 444 are turned off, the pixel 25 in which data is written to the node 445 is held. Furthermore, the amount of current flowing between the source and the drain of the transistor 251 is controlled according to the potential of the data written to the node 445, and the light emitting element 170 emits light at a brightness corresponding to the amount of the current flowing. By performing the above steps one by one in a row, an image can be displayed.

The pixel 25 shown in FIG. 8B includes a transistor 446, a capacitor 433, and a liquid crystal element 180.

The potential of one electrode of the liquid crystal element 180 is appropriately set in accordance with the specifications of the pixel 25. The alignment state of the liquid crystal element 180 is set based on the data written in the node 445. In addition, a common potential may be supplied to one electrode of the liquid crystal element 180 included in each of the plurality of pixels 25. In addition, a different potential may be supplied to one electrode of each of the liquid crystal elements 180 of the pixels 25 in each row.

In the pixel 25, one of the source and the drain of the transistor 446 is electrically connected to the signal line SL, and the other of the source and the drain of the transistor 446 is electrically connected to the node 445. The gate of the transistor 446 is electrically connected to the scanning line GL. The transistor 446 has a function of controlling writing of a video signal to the node 445.

One electrode of the capacitor 433 is electrically connected to a wiring (hereinafter referred to as a capacitance line CL) to which a predetermined potential is supplied, and the other electrode of the capacitor 433 is electrically connected to a node 445. The other electrode of the liquid crystal element 180 is electrically connected to the node 445. The potential value of the capacitor line CL is appropriately set in accordance with the specifications of the pixel 25. The capacitor 433 has a function of a storage capacitor that holds data written in the node 445.

In a display device including the pixels 25 of FIG. 8B, the pixels 25 of each row are sequentially selected by the scan line driving circuit 22, thereby turning on the transistor 446 to write the image signal to the node 445.

Since the transistor 446 is turned off, the pixel 25 where the video signal is written to the node 445 is held. By performing the above steps one by one in a row, an image can be displayed.

<1-4. Configuration Example 2 of Display Device>

FIG. 9 is a block diagram showing a configuration example of the display device 10B.

Like the display device 10A, the display device 10B has a function of generating image data using data received from the outside, and a function of displaying an image based on the image data.

As shown in FIG. 9, the display device 10B includes a display section 20B and a signal generating section 30B. Like the display section 20A, the display section 20B includes a plurality of display panels DP. Like the signal generating unit 30A, the signal generating unit 30B has a function of generating video data from data received from the outside.

FIG. 9 shows an example in which the display panels DP are arranged in two rows and one column in the display section 20B. The display of the display panel DP can be controlled independently. Note that, like the display section 20A, the display panel DP may be arranged in three or more rows in the display section 20B or in two or more columns.

The signal generating section 30B includes a front end section 31, a decoder 32, a processing section 33, a receiving section 34, an interface 35, a control section 36, a processing section 40B, and a division section 45B.

Like the processing unit 40A, the processing unit 40B has a function of forming a correction filter. In contrast, the processing unit 40B is different from the processing unit 40A, and the processing unit 40B may not have a function of correcting the first image data SD1 using the formed correction filter. Then, the formed correction filter is used as a correction filter FIL and is output to the division unit 45B together with the first image data SD1 of the image data before correction.

The division unit 45B has a function of dividing the first image data SD1 input from the processing unit 40A and the correction filter FIL. The first image data SD1 and the correction filter FIL may be divided into the same number as the display panel DP provided in the display section 20B. In FIG. 9, the first video data SD1 is divided into 2 × 1 pieces (the first video data SD1 [1, 1] and the first video data [2, 1]) and output to the display unit 20B. In addition, the correction filter FIL is divided into 2 × 1 (the correction filter FIL [1,1] and the correction filter FIL [2,1]) and output to the display section 20B. Specifically, the first image data SD1 [1,1] and the correction filter FIL [1,1] are output to the display panel DP [1,1], and the first image data SD1 [2,1] and the correction filter FIL [2,1] is output to the display panel DP [2,1].

The pixels provided in the display panel DP include a memory circuit in which the correction filter FIL can be held. Thereby, the first image data SD1 can be corrected in the pixel, not in the processing unit 40B. Therefore, the configuration of the processing unit 40B can be simplified, and power consumption of the display device according to an embodiment of the present invention can be reduced.

FIG. 10 shows a configuration example of the display panel DP [1, 1] and the display panel DP [2, 1] provided in the display device 10B having the structure shown in FIG.

The display panel DP [1, 1] having the structure shown in FIG. 2 is the same as the display panel DP [1, 1] having the structure shown in FIG. 10 and includes a pixel portion 21A, a scanning line driving circuit 22A, and a signal line driving circuit 23A. Similar to the display panel DP [2,1] of the structure shown in FIG. 2, the display panel DP [2,1] of the structure shown in FIG. 10 includes a pixel portion 21B, a scanning line driving circuit 22B, and a signal line driving circuit 23B.

As shown in FIG. 10, each of the pixel portion 21A and the pixel portion 21B includes a plurality of pixels 26. FIG. 10 shows an example in which each of the pixel portion 21A and the pixel portion 21B includes a plurality of pixels 26 arranged in a matrix having m rows and n columns.

A memory circuit MEM is provided in the pixel 26. The memory circuit MEM has a function of holding the correction filter FIL. As the pixel 26 is provided with a memory circuit MEM, as described above, the first image data SD1 can be corrected without being in the processing unit 40B but inside the pixel.

The display panel DP [1,1] includes m scanning lines GL1a, m scanning lines GL2a, and m scanning lines GL3a, and the display panel DP [2,1] includes m scanning lines GL1b, m scanning lines GL2b, and m Scan line GL3b. The m scanning lines GL1a, GL1b, scanning lines GL2a, scanning lines GL2b, scanning lines GL3a, and scanning lines GL3b each extend in the row direction. The m scanning lines GL1a are each electrically connected to the memory circuit MEM provided in the pixel 26 arranged in the row direction in the pixel section 21A, and the m scanning lines GL1b are respectively provided in the pixel 26 arranged in the row direction in the pixel section 21B. The memory circuit MEM is electrically connected. The m scan lines GL2a and GL3a are each electrically connected to the pixels 26 arranged in the row direction in the pixel portion 21A, and the m scan lines GL2b and scan lines GL3b are each electrically connected to the pixels 26 arranged in the row direction in the pixel portion 21B. connection.

One end of the scanning line GL1a, scanning line GL2a, and scanning line GL3a is electrically connected to the scanning line driving circuit 22A, and one end of the scanning line GL1b, scanning line GL2b, and scanning line GL3b is electrically connected to the scanning line driving circuit 22B. The scanning line driving circuit 22A has a function of supplying a selection signal to the scanning line GL1a, the scanning line GL2a, and the scanning line GL3a. The scanning line driving circuit 22B has a function of supplying a selection signal to the scanning line GL1b, scanning line GL2b, and scanning line GL3b.

In this specification and the like, a scanning line provided in a display device according to an embodiment of the present invention, such as the scanning line GL1a and the scanning line GL1b, may be referred to as a scanning line GL1. The scanning lines provided in the display device according to an embodiment of the present invention, such as the scanning lines GL2a and GL2b, may be referred to as the scanning lines GL2. In addition, the scanning lines provided in the display device according to an embodiment of the present invention, such as the scanning lines GL3a and GL3b, may be referred to as the scanning lines GL3.

The display panel DP [1,1] includes n signal lines SL1a and n signal lines SL2a, and the display panel DP [2,1] includes n signal lines SL1b and n signal lines SL2b. The n signal lines SL, the signal line SL1b, the signal line SL2a, and the signal line SL2b each extend in the column direction. The n signal lines SL1a are each electrically connected to a memory circuit MEM provided in a plurality of pixels 26 arranged in a column direction in the pixel portion 21A, and the n signal lines SL1b are each connected to a plurality of pixels arranged in a column direction in the pixel portion 21B The memory circuit MEM provided in the pixel 26 is electrically connected. Each of the n signal lines SL2a is electrically connected to a plurality of pixels 26 arranged in a column direction in the pixel portion 21A, and each of the n signal lines SL2b is electrically connected to a plurality of pixels 26 arranged in a column direction in the pixel portion 21B.

The signal line SL1a and the signal line SL2a are electrically connected to the signal line driving circuit 23A, and the signal line SL1b and the signal line SL2b are electrically connected to the signal line driving circuit 23B. The signal line driving circuit 23A has a function of supplying a signal corresponding to the correction filter to the signal line SL1a, and the signal line driving circuit 23B has a function of supplying a signal corresponding to the correction filter to the signal line SL1b. Note that in this specification and the like, a signal corresponding to a correction filter is referred to as a correction filter signal. The correction filter signal is supplied to the memory circuit MEM through the signal line SL1a or the signal line SL1b.

In addition, the signal line driving circuit 23A has a function of supplying an image signal to the signal line SL2a, and the signal line driving circuit 23B has a function of supplying an image signal to the signal line SL2b. The image signal is supplied to the pixel 26 through the signal line SL2a or the signal line SL2b.

In this specification and the like, a signal line such as the signal line SL1a and the signal line SL1b provided in a display device according to an embodiment of the present invention may be referred to as a signal line SL1. In addition, a signal line provided in a display device according to an embodiment of the present invention, such as the signal line SL2a and the signal line SL2b, may be referred to as a signal line SL2.

The pixel 26 includes a display element. As the display element provided in the pixel 25, as the display element provided in the pixel 26, for example, a light emitting element and a liquid crystal element can be used.

Similar to the pixel 25, the plurality of pixels 26 shown in FIG. 10 may adopt a structure that has a function of emitting red (R), green (G), or blue (B) light, respectively. Alternatively, the plurality of pixels 26 shown in FIG. 10 may have a structure that has a function of emitting red (R), green (G), blue (B), or white (W) light, respectively.

9 can be used even when the two display panels DP are arranged in a horizontal direction (column direction), for example, when the display panel DP [1, 1] and the display panel DP [1, 2] are provided in the display section 20B. And the structure shown in FIG. 10. At this time, for example, the “display panel DP [2, 1]” is appropriately replaced with the “display panel DP [1, 2]”.

<1-5. Pixel Structure Example 2>

A configuration example of the pixel 26 will be described below with reference to FIG. 11.

FIG. 11 is a circuit diagram showing a configuration example of the pixel 26. The pixel 26 having the structure shown in FIG. 11 includes a transistor 101, a transistor 102, a transistor 111, a transistor 112, a capacitor 103, a capacitor 113, and a light emitting element 104. Note that as the light emitting element 104, an organic EL element, an inorganic EL element, or the like can be used.

One of the source and the drain of the transistor 101 is electrically connected to one electrode of the capacitor 113. The other electrode of the capacitor 113 is electrically connected to one of a source and a drain of the transistor 111. One of the source and the drain of the transistor 111 is electrically connected to the gate of the transistor 112. The gate of the transistor 112 is electrically connected to one electrode of the capacitor 103. The other electrode of the capacitor 103 is electrically connected to one of the source and the drain of the transistor 112. One of the source and the drain of the transistor 112 is electrically connected to one of the source and the drain of the transistor 102. The other of the source and the drain of the transistor 102 is electrically connected to one electrode of the light emitting element 104.

Here, a wiring connected to the other electrode of the capacitor 113, one of the source and the drain of the transistor 111, the gate of the transistor 112, and one electrode of the capacitor 103 is referred to as a node NM1. The wiring connected to the other of the source and the drain of the transistor 102 and one electrode of the light emitting element 104 is referred to as a node NA1.

The gate of the transistor 101 is electrically connected to the scanning line GL2. The gate of the transistor 102 is electrically connected to the scanning line GL3. The gate of the transistor 111 is electrically connected to the scanning line GL1. The other of the source and the drain of the transistor 101 is electrically connected to the signal line SL2. The other of the source and the drain of the transistor 111 is electrically connected to the signal line SL1.

The other of the source and the drain of the transistor 112 is electrically connected to the potential supply line 128. The other electrode of the light emitting element 104 is electrically connected to the common wiring 129. Here, the potential supply line 128 can supply, for example, a high power supply potential VDD. In addition, an arbitrary potential can be supplied to the common wiring 129.

The transistor 111 and the capacitor 113 constitute a memory circuit MEM. The node NM1 is a storage node. By turning on the transistor 111, a signal supplied to the signal line SL1 can be written into the node NM1. By using a transistor having an extremely low off-state current as the transistor 111, the potential of the node NM1 can be maintained for a long time. As the transistor, for example, a transistor using a metal oxide for a channel formation region (hereinafter referred to as an OS transistor) can be used.

Note that the OS transistor can be used not only for the transistor 111 but also for other transistors constituting the pixel 26. In addition, as the transistor 111, an transistor containing Si in the channel formation region (hereinafter referred to as a Si transistor) may be used. Alternatively, both an OS transistor and a Si transistor may be used. Note that examples of the Si transistor include a transistor including amorphous silicon, a transistor including crystalline silicon (typically, low-temperature polycrystalline silicon), and a transistor including single crystal silicon.

As the semiconductor material used for the OS transistor, a metal oxide having an energy gap of 2 eV or more, preferably 2.5 eV or more, and more preferably 3 eV or more can be used. Typical examples include oxide semiconductors containing indium. For example, CAAC-OS or CAC-OS mentioned later can be used. In CAAC-OS, the atoms that make up a crystal are stable, and it is suitable for transistors that value reliability. CAC-OS exhibits high mobility characteristics and is suitable for transistors that are driven at high speeds.

OS transistors have large energy gaps and exhibit extremely low off-state current characteristics. Unlike Si transistors, OS transistors do not experience collision ionization, sudden collapse, short channel effects, etc., so they can form highly reliable circuits.

When an EL element is used as a display element, a silicon substrate can be used, and a region where a Si transistor and an OS transistor overlap each other can be formed. Accordingly, even if the number of transistors is large, a high pixel density can be achieved.

In the pixel 26, the signal written in the node NM1 and the image signal supplied from the signal line SL2 can be capacitively coupled and output to the node NA1. The transistor 101 has a function of selecting a pixel. The transistor 102 has a function of a switch that controls the light emission of the light emitting element 104.

For example, when the potential of the signal written from the signal line SL1 to the node NM1 is greater than the threshold voltage (V _th ) of the transistor 112, the transistor 112 will be turned on before the image signal is written to cause the light emitting element 104 to emit light. Therefore, it is preferable to set the transistor 102 and turn on the transistor 102 after the potential of the node NM1 is fixed to cause the light emitting element 104 to emit light.

That is, as long as the correction filter signal corresponding to the correction filter FIL formed by the processing unit 40B is stored in the node NM1, the correction filter signal can be added to the video signal. This makes it possible to correct the image signal. Note that the correction filter signal may be attenuated due to factors on the transmission path, so it is preferable to generate the correction filter signal in consideration of the attenuation.

Next, an example of the operation method of the pixel 26 will be described using the timing charts shown in FIGS. 12A and 12B. As the correction filter signal (Vp) supplied to the signal line SL1, a signal with a positive potential or a signal with a negative potential can be used. Here, a case where a signal with a positive potential is supplied will be described.

First, an operation of writing the correction filter signal (Vp) into the node NM1 will be described with reference to FIG. 12A.

At time T1, the potential of the scanning line GL1 is low, the potential of the scanning line GL2 is high, the potential of the signal line SL2 is low, and the potential of the scanning line GL3 is low, so that the transistor 101 becomes conductive. The potential of the other electrode of the capacitor 113 becomes a low potential.

This work is for resetting the capacitive coupling later. Before time T1, the light-emitting element 104 emits light in the previous frame. However, since the potential of the reset working node NM1 changes, the current flowing through the light-emitting element 104 changes, so it is preferable to make the transistor 102 non-conductive Then, the light emitting element 104 stops emitting light.

At time T2, the potential of the scanning line GL1 is high, the potential of the scanning line GL2 is high, the potential of the signal line SL2 is low, and the potential of the scanning line GL3 is low, so that the transistor 111 becomes conductive. The potential (correction filter signal (Vp)) of the signal line SL1 is written to the node NM1.

At time T3, the potential of the scanning line GL1 is low, the potential of the scanning line GL2 is high, the potential of the signal line SL2 is low, and the potential of the scanning line GL3 is low, so that the transistor 111 becomes non-conductive. The correction filter signal (Vp) is held at the node NM1.

At time T4, the potential of the scanning line GL1 is low, the potential of the scanning line GL2 is low, the potential of the signal line SL2 is low, and the potential of the scanning line GL3 is low, so that the transistor 101 becomes non-conductive. , And the writing of the correction filter signal (Vp) ends.

Next, the operation of correcting the video signal (Vs) and the operation of causing the light emitting element 104 to emit light will be described with reference to FIG. 12B.

At time T11, the potential of the scanning line GL1 is low, the potential of the scanning line GL2 is high, the potential of the signal line SL1 is low, and the potential of the scanning line GL3 is low. As a result, the transistor 101 is turned on. Due to the capacitive coupling of the capacitor 113, the potential of the signal line SL2 is added to the potential of the node NM1. That is, the node NM1 becomes the potential (Vs + Vp) of the video signal (Vs) plus the correction filter signal (Vp).

At time T12, the potential of the scanning line GL1 is low, the potential of the scanning line GL2 is low, the potential of the signal line SL1 is low, and the potential of the scanning line GL3 is low, so that the transistor 101 becomes non-conductive The potential of the node NM1 is fixed to Vs + Vp.

At time T13, the potential of the scanning line GL1 is low, the potential of the scanning line GL2 is low, the potential of the signal line SL1 is low, and the potential of the scanning line GL3 is high, so that the transistor 102 is turned on. The potential of the node NA1 becomes Vs + Vp, and the light emitting element 104 emits light. Strictly speaking, the potential of the node NA1 is equivalent to a value obtained by subtracting the threshold voltage (V _th ) of the transistor 112 from Vs + Vp. Here, V _th is a negligible minimum value.

The above is the operation of correcting the video signal (Vs) and the operation of causing the light emitting element 104 to emit light. Note that although the writing of the correction filter signal (Vp) and the input of the image signal (Vs) described previously can be performed continuously, it is possible to write the correction filter signal (Vp) to all pixels before performing the image The signal (Vs) input works.

Note that, in a case where no correction operation is performed, the image signal may be supplied to the signal line SL1 to control the conduction and non-conduction of the transistor 111 and the transistor 102 to perform the operation of emitting light from the light emitting element 104. At this time, the transistor 101 is often in a non-conductive state.

<1-6. Pixel structure example 3>

Hereinafter, another configuration example of the pixel 26 will be described with reference to FIG. 13.

FIG. 13 is a circuit diagram showing a configuration example of the pixel 26 different from that of FIG. 11. The pixel 26 having the structure shown in FIG. 13 includes a transistor 121, a transistor 122, a transistor 123, a capacitor 124, a capacitor 125, and a liquid crystal element 126.

One of the source and the drain of the transistor 121 is electrically connected to one electrode of the capacitor 124. The other electrode of the capacitor 124 is electrically connected to one of a source and a drain of the transistor 122. One of the source and the drain of the transistor 122 is electrically connected to one of the source and the drain of the transistor 123. The other of the source and the drain of the transistor 123 is electrically connected to one electrode of the capacitor 125. One electrode of the capacitor 125 is electrically connected to one electrode of the liquid crystal element 126.

Here, the wiring connected to the other electrode of the capacitor 124, one of the source and the drain of the transistor 122, and one of the source and the drain of the transistor 123 is referred to as a node NM2. In addition, a wiring connected to the other of the source and the drain of the transistor 123, one electrode of the capacitor 125, and one electrode of the liquid crystal element 126 is referred to as a node NA2.

The gate of the transistor 121 is electrically connected to the scanning line GL2. The gate of the transistor 122 is electrically connected to the scanning line GL1. The gate of the transistor 123 is electrically connected to the scanning line GL3. The other of the source and the drain of the transistor 121 is electrically connected to the signal line SL2. The other of the source and the drain of the transistor 122 is electrically connected to the signal line SL1.

The other electrode of the capacitor 125 is electrically connected to the common wiring 132. The other electrode of the liquid crystal element 126 is electrically connected to the common wiring 133. Note that an arbitrary potential can be supplied to the common wiring 132 and the common wiring 133. The common wiring 132 may be electrically connected to the common wiring 133.

The transistor 122 and the capacitor 124 constitute a memory circuit MEM. The node NM2 is a storage node. By turning on the transistor 122 and making the transistor 123 non-conductive, the signal supplied to the signal line SL1 can be written into the node NM2. By using transistors having extremely low off-state currents as the transistors 122 and 123, the potential of the node NM2 can be maintained for a long time. As this transistor, for example, an OS transistor can be used.

Note that the OS transistor can be used for other transistors included in the pixel. The transistor included in the pixel may be a Si transistor. Alternatively, both an OS transistor and a Si transistor may be used.

When a reflective liquid crystal element is used as a display element, a silicon substrate can be used, and a region where a Si transistor and an OS transistor overlap each other can be formed. Accordingly, even if the number of transistors is large, a high pixel density can be achieved.

In the pixel 26, a signal written in the node NM2 and a video signal supplied from the signal line SL2 can be capacitively coupled and output to the node NA2. The transistor 121 has a function of selecting pixels and supplying an image signal. The transistor 123 has a function of a switch that controls the operation of the liquid crystal element 126.

When the potential of the signal written from the signal line SL1 to the node NM2 is greater than a threshold value for operating the liquid crystal element 126, the liquid crystal element 126 will operate before the image signal is written. Therefore, it is preferable to set the transistor 123 and turn on the transistor 123 after the potential of the node NM2 is fixed to operate the liquid crystal element 126.

That is, as long as the correction filter signal corresponding to the correction filter FIL formed by the processing unit 40B is stored in the node NM2, the correction filter signal can be added to the video signal. Thereby, a video signal can be corrected. Note that the correction filter signal may be attenuated due to factors on the transmission path, so it is preferable to generate the correction filter signal in consideration of the attenuation.

Next, an example of the operation method of the pixel 26 will be described using the timing charts shown in FIGS. 14A and 14B. As the correction filter signal (Vp) supplied to the signal line SL1, a signal with a positive potential or a signal with a negative potential can be used. Here, a case where a signal with a positive potential is supplied will be described.

First, an operation of writing the correction filter signal (Vp) into the node NM2 will be described with reference to FIG. 14A.

At time T1, the potential of the scanning line GL1 is high, the potential of the scanning line GL2 is low, the potential of the signal line SL2 is low, and the potential of the scanning line GL3 is high. It becomes conductive, and the potential of the node NA2 becomes the potential of the signal line SL1. At this time, by changing the potential of the signal line SL1 to a reset potential (for example, a reference potential such as 0 V), the operation of the liquid crystal element 126 can be reset.

Note that the display operation of the liquid crystal element 126 of the previous frame is performed before time T1.

At time T2, the potential of the scanning line GL1 is low, the potential of the scanning line GL2 is high, the potential of the signal line SL2 is low, and the potential of the scanning line GL3 is low, so that the transistor 121 is turned on. The potential of the other electrode of the capacitor 124 becomes a low potential. This work is for resetting the capacitive coupling later.

At time T3, the potential of the scanning line GL1 is high, the potential of the scanning line GL2 is high, the potential of the signal line SL2 is low, and the potential of the scanning line GL3 is low, so that the transistor 122 is turned on. The potential (correction filter signal (Vp)) of the signal line SL1 is written into the node NM2. Note that the potential of the signal line SL1 is preferably fixed to a desired value (correction filter signal (Vp)) after time T2 and before time T3.

At time T4, the potential of the scanning line GL1 is low, the potential of the scanning line GL2 is high, the potential of the signal line SL2 is low, and the potential of the scanning line GL3 is low, so that the transistor 122 becomes non-conductive. The correction filter signal (Vp) is held at the node NM2.

At time T5, the potential of the scanning line GL1 is low, the potential of the scanning line GL2 is low, the potential of the signal line SL2 is low, and the potential of the scanning line GL3 is low, so that the transistor 121 becomes non-conductive. , And the writing of the correction filter signal (Vp) ends.

Next, a correction operation of the video signal (Vs) and a display operation of the liquid crystal element 126 will be described with reference to FIG. 14B.

At time T11, the potential of the scanning line GL1 is low, the potential of the scanning line GL2 is low, the potential of the signal line SL1 is low, and the potential of the scanning line GL3 is high, so that the transistor 123 becomes conductive. The potential of the node NM2 is distributed to the node NA2. Note that it is preferable to set the correction filter signal (Vp) held in the node NM2 in consideration of the potential allocated to the node NA2.

At time T12, the potential of the scanning line GL1 is low, the potential of the scanning line GL2 is high, the potential of the signal line SL1 is low, and the potential of the scanning line GL3 is high. As a result, the transistor 121 is turned on. Due to the capacitive coupling of the capacitor 124, the potential of the signal line SL2 is added to the potential of the node NA2. That is, the node NA2 becomes a potential (Vs + Vp) 'corresponding to the potential of the video signal (Vs) plus the correction filter signal (Vp). Note that the potential (Vs + Vp) 'includes variations in the potential due to the capacitive coupling of the capacitance between the wirings, and the like.

At time T13, the potential of the scanning line GL1 is low, the potential of the scanning line GL2 is low, the potential of the signal line SL1 is low, and the potential of the scanning line GL3 is low, so that the transistor 121 becomes non-conductive. The potential (Vs + Vp) 'is maintained at the node NA2. The liquid crystal element 126 performs a display operation based on the potential.

The above is the description of the correction operation of the video signal (Vs) and the display operation of the liquid crystal element 126. Note that although the writing of the correction filter signal (Vp) and the input of the image signal (Vs) described previously can be performed continuously, it is possible to write the correction filter signal (Vp) to all pixels before performing the image The signal (Vs) input works.

Note that in the case where no correction operation is performed, the display operation by the liquid crystal element 126 may be performed by controlling the conduction and non-conduction of the transistor 122 and the transistor 123 by supplying an image signal to the signal line SL1. At this time, the transistor 121 is often in a non-conductive state.

<1-7. An example of the operation method of a display device 2>

Next, a specific example of step S01 shown in FIG. 5A and step S11 shown in FIG. 5B is an example of a method of forming a correction filter corresponding to one display panel DP with reference to the flowchart shown in FIG. 15. For example, the method shown in FIG. 15 may be used to form a first correction filter corresponding to the display panel DP [1,1] and a second correction filter corresponding to the display panel DP [2,1]. Correction filter. The correction filter formed by the method shown in FIG. 15 has, for example, a function of correcting image data to reduce display unevenness of an image displayed on the display panel DP.

First, a plurality of grayscale values are measured for the brightness of light emitted from a pixel provided in the display panel DP. Here, the brightness of light is measured with a brightness meter or the like (step S21). Next, based on the measurement result, for example, the processing unit 40A or the processing unit 40B obtains data on the correspondence between the brightness and the grayscale value of the light emitted from the pixel (step S22). 16A-1 and 16B-1 are graphs showing the relationship between the brightness of light emitted from the pixels and the grayscale value, and the plot shown in FIG. 16A-1 is the brightness measured in step S21. In addition, the solid line shown in FIG. 16B-1 is a correspondence relationship between the brightness of the light emitted from the pixel and the grayscale value calculated in step S22 based on the measurement result shown in FIG. 16A-1.

Here, in step S21, the luminance of the light emitted from the pixel may be measured for all the grayscale values. For example, in a case where the grayscale value that the pixel can represent is 0 to 255, the brightness of the light emitted from the pixel can be measured for all grayscale values with a grayscale value of 0 to 255. Alternatively, a part of the grayscale values is measured for the brightness of light emitted from the pixels. Note that even in the case of measuring the brightness of a part of the grayscale values, in order to improve the accuracy of the data of the correspondence relationship, it is preferable to measure the brightness of at least white, black, and intermediate grayscales. For example, when the grayscale value that the pixel can represent is 0 to 255, it is preferable to measure the brightness of light emitted from the pixel at least for the grayscale value 0, the grayscale value 127, and the grayscale value 255.

Based on the measurement results shown in FIG. 16A-1, the data of the correspondence relationship shown in FIG. 16B-1 can be obtained by, for example, regression analysis. For example, through the curve regression analysis, the data of the correspondence relationship shown in FIG. 16B-1 can be obtained. Alternatively, for example, by using a neural network, such as a fully-connected neural network, the corresponding relationship data shown in FIG. 16B-1 can be obtained. By using the neural network to obtain the correspondence data shown in FIG. 16B-1, even if the number of measurements shown in FIG. 16A-1 is small, the accuracy of the correspondence data can be improved.

FIG. 16A-2 shows the measurement value when the measurement of the wide luminance emitted from the pixel is performed on each of the red (R), green (G), and blue (B) in step S21. FIG. 16B-2 shows the brightness and gray of light emitted from a pixel of each of red (R), green (G), and blue (B) calculated in step S22 based on the measurement results shown in FIG. 16A-2. Correspondence of order values.

As shown in FIGS. 16A-2 and 16B-2, by obtaining data on the correspondence between the brightness and grayscale value of each color of light emitted from a pixel, a correction filter that can perform high-precision correction can be formed. .

FIG. 17A, FIG. 17B, and FIG. 17C show an example of the position of a pixel which measures the brightness of the emitted light in step S21. Here, the pixel portion 21 refers to a pixel portion provided in one display panel DP, such as the pixel portion 21A and the pixel portion 21B. In step S21, the brightness of light emitted from the pixels included in the area 27 shown in Figs. 17A, 17B, and 17C is measured.

As shown in FIG. 17A, the brightness of light emitted from a pixel may be measured so as to include the center portion of the pixel portion 21. Alternatively, as shown in FIG. 17B, a plurality of portions of the pixel portion 21 may be measured, such as four portions of an upper left portion, an upper right portion, a lower left portion, and a lower right portion. Alternatively, as shown in FIG. 17C, the entire pixel portion 21 may be measured. When the total area of the area 27 is small, the brightness of the light emitted from the pixels can be measured in a simple method. On the other hand, when the total area of the area 27 is large, a correction filter capable of performing high-precision correction can be formed.

Note that when the brightness of light emitted from each of a plurality of pixels is measured separately, for example, the brightness and Correspondence data of grayscale values.

After step S22 is ended, an image of a predetermined grayscale value is displayed on the pixel section 21 and the brightness of light emitted from the pixel is measured using a two-dimensional luminance meter or the like to obtain brightness data (step S23). For example, the brightness data is obtained by measuring the brightness of light emitted from all pixels provided in the pixel section 21 using a two-dimensional luminance meter or the like.

When an image having a predetermined grayscale value is displayed on the pixel portion 21 as an image having the same grayscale value of all pixels, it is preferable that the brightness of light emitted from all the pixels provided in one display panel DP is the same. . However, unevenness in the characteristics of the transistors included in the pixels, unevenness in the characteristics of the display elements, and the like may cause unevenness in the brightness of the light emitted from the pixels. In step S23, in order to obtain information about unevenness between pixels of the brightness of the light emitted from the pixels, brightness data is obtained.

Next, using the brightness data obtained in step S23 and the correspondence data obtained in step S22, the processing unit forms a correction filter for correcting unevenness between pixels of the brightness of the light emitted from the pixel (step S24). For example, a correction filter is formed, that is, when the brightness of a grayscale value 127 of a pixel obtained according to the brightness data is 100 and the brightness of the grayscale value 127 is 120 according to the data of the corresponding relationship, the correction filter Make the brightness of this pixel 1.2 times.

At this time, in step S22, for example, data on the correspondence relationship with the brightness for all grayscale values is obtained. Therefore, in step S23, two or more kinds of images are displayed and the brightness data of each image is obtained, and a correction filter capable of performing higher-precision correction can be formed. For example, in a case where the grayscale value that the pixel can represent is 0 to 255, in step S23, the brightness data of the image with the grayscale of 0 for all pixels and the brightness of the image with the grayscale of 127 for all pixels can be obtained. Data and brightness data of all pixels with a gray level of 255. Note that in order to make the measurement of the brightness of the light in step S23 simple, the type of the brightness data obtained in step S23 is preferably less than the number of grayscale values of the brightness of the light measured in step S21.

Then, the image data is input to the processing unit 40A or the processing unit 40B and the input image data is corrected using the correction filter formed in step S24 (step S25). Here, the image data input to the processing unit 40A or the processing unit 40B is preferably image data corresponding to an image of a predetermined grayscale value, for example. For example, image data corresponding to an image whose gray level is the same as that of the image displayed in step S23 is preferable.

Next, an image corresponding to the image data corrected in step S25 is displayed on the pixel section 21, and the brightness of the light emitted from the pixel is measured using a two-dimensional luminance meter or the like in step S23 (step S26). Then, in each pixel, the brightness corresponding to the corrected image measured in step S26 and the brightness calculated from the data of the correspondence relationship obtained in step S22 are compared. For example, when the difference between the luminance corresponding to the corrected image and the luminance calculated from the data of the correspondence obtained in step S22 is less than a fixed value, it is determined that the accuracy of the correction is equal to or greater than a predetermined value, and the formation of the correction filter is ended. On the other hand, when the difference between the brightness corresponding to the corrected image and the brightness calculated from the data of the correspondence relationship obtained in step S22 is greater than a predetermined value, it is determined that the accuracy of the correction is less than a predetermined value, and then steps S24 and S27 are performed. To form a correction filter again (step S27). The above is an example of the method of forming the correction filter used in the display device 10A and the display device 10B. Note that steps S26 and S27 may be omitted.

Note that when two or more types of images are displayed in step S23, the brightness of the light emitted from the pixels is measured for each image in step S26, and the accuracy of the correction for each image is determined in step S27.

The above is a specific example of step S01 shown in FIG. 5A and step S11 shown in FIG. 5B. In other words, an example of a method of forming a correction filter corresponding to one display panel DP.

By forming the correction filter by the method shown in FIG. 15, for example, it is possible to reduce display unevenness of a displayed image, and therefore, it is possible to improve display quality of a display device according to an embodiment of the present invention.

This embodiment can be implemented in appropriate combination with the structures described in the other embodiments and the like.

Embodiment 2

In this embodiment, a configuration example of a display device using a liquid crystal element and a configuration example of a display device using an EL element will be described. Note that components, operations, and functions of the display device described in Embodiment Mode 1 are omitted in this embodiment mode.

18A and 18B are cross-sectional views illustrating a configuration example of a display device according to an embodiment of the present invention. The display device shown in FIGS. 18A and 18B includes an electrode 4015, and the electrode 4015 and the terminal of the FPC 4018 are electrically connected through an anisotropic conductive layer 4019. In FIGS. 18A and 18B, the electrode 4015 is electrically connected to the wiring 4014 through the opening formed in the insulating layer 4112, the insulating layer 4111, and the insulating layer 4110.

The electrode 4015 and the first electrode layer 4030 are formed using the same conductive layer, and the wiring 4014 is formed with the source electrode and the drain electrode of the transistor 4010 and the transistor 4011 using the same conductive layer.

In addition, the display portion 215 and the scanning line driving circuit 221 provided on the first substrate 4001 include a plurality of transistors. In FIGS. 18A and 18B, the transistor 4010 in the display section 215 and the transistor 4011 in the scan line driving circuit 221 are shown. Although the bottom-gate transistor is shown as the transistor 4010 and the transistor 4011 in FIGS. 18A and 18B, a top-gate transistor may be used.

In FIGS. 18A and 18B, an insulating layer 4112 is provided on the transistor 4010 and the transistor 4011. In addition, in FIG. 18B, a partition wall 4510 is formed on the insulating layer 4112.

The transistor 4010 and the transistor 4011 are provided on the insulating layer 4102. The transistor 4010 and the transistor 4011 include an electrode 4017 formed on the insulating layer 4111. The electrode 4017 can be used as a back gate electrode.

The display device shown in FIGS. 18A and 18B includes a capacitor 4020. The capacitor 4020 includes an electrode 4021 formed by the same process as the gate electrode of the transistor 4010 and an electrode formed by the same process as the source electrode and the drain electrode. Each electrode has a region overlapping each other via the insulating layer 4103.

In general, the capacitance of a capacitor provided in a pixel portion of a display device is set in consideration of a leakage current of a transistor disposed in the pixel portion and the like so that the capacitor can retain a charge for a predetermined period. The capacity of the capacitor may be set in consideration of the off-state current of the transistor.

The transistor 4010 provided in the display portion 215 is electrically connected to a display element. FIG. 18A is an example of a liquid crystal display device using a liquid crystal element as a display element. In FIG. 18A, a liquid crystal element 4013 as a display element includes a first electrode layer 4030, a second electrode layer 4031, and a liquid crystal layer 4008. Note that an insulating layer 4032 and an insulating layer 4033 used as an alignment film are provided so as to sandwich the liquid crystal layer 4008. The second electrode layer 4031 is disposed on the second substrate 4006 side, and the first electrode layer 4030 and the second electrode layer 4031 overlap with the liquid crystal layer 4008.

The spacer 4035 is a columnar spacer obtained by selectively etching the insulating layer, and it is provided to control the interval (cell gap) between the first electrode layer 4030 and the second electrode layer 4031. Note that spherical spacers can also be used.

In addition, as needed, an optical member (optical substrate) such as a black matrix (light-shielding layer), a color layer (color filter), a polarizing member, a retardation member, an anti-reflection member, and the like may be appropriately provided. For example, circular polarization using a polarizing substrate and a retardation substrate may be used. In addition, as the light source, a backlight, an edge light, or the like may be used. As the backlight or the side light, a micro-LED or the like may be used.

In the display device shown in FIG. 18A, a light-shielding layer 4132, a color layer 4131, and an insulating layer 4133 are provided between the second substrate 4006 and the second electrode layer 4031.

Examples of the material that can be used for the light-shielding layer include carbon black, titanium black, metal, metal oxide, and a composite oxide containing a solid solution of a plurality of metal oxides. The light-shielding layer may be a film containing a resin material or a thin film containing an inorganic material such as a metal. In addition, a laminated film including a film of a material of a color layer may be used for the light-shielding layer. For example, a laminated structure of a film containing a material of a color layer for transmitting light of a certain color and a film containing a material of a color layer for transmitting light of another color may be employed. By making the material of the color layer and the light-shielding layer the same, in addition to using the same equipment, the process can be simplified, which is preferable.

Examples of the material that can be used for the color layer include a metal material, a resin material, and a resin material containing a pigment or a dye. The light-shielding layer and the color layer can be formed in the same manner as the formation method of each layer described above. For example, it can be formed by an inkjet method.

The display device shown in FIGS. 18A and 18B includes an insulating layer 4111 and an insulating layer 4104. As the insulating layer 4111 and the insulating layer 4104, an insulating layer that does not easily penetrate an impurity element is used. By sandwiching the semiconductor layer of the transistor between the insulating layer 4111 and the insulating layer 4104, it is possible to prevent the incorporation of impurities from the outside.

In addition, as a display element included in the display device, a light-emitting element (also referred to as an EL element) using electroluminescence can be applied. The EL element has a layer (also referred to as an EL layer) containing a light-emitting compound between a pair of electrodes. When a potential difference higher than the critical voltage of the EL element is caused between a pair of electrodes, holes are injected into the EL layer from the anode side, and electrons are injected into the EL layer from the cathode side. The injected electrons and holes are recombined in the EL layer, whereby the light-emitting compound contained in the EL layer emits light.

EL elements are distinguished according to whether the light-emitting material is an organic compound or an inorganic compound. The former is generally referred to as an organic EL element and the latter is referred to as an inorganic EL element.

In the organic EL element, by applying a voltage, electrons are injected into the EL layer from one electrode, and holes are injected into the EL layer from the other electrode. By recombination of these carriers (electrons and holes), the light-emitting organic compound forms an excited state, and emits light when the excited state returns to the ground state. Due to this mechanism, such a light-emitting element is called a current-excitation light-emitting element.

The EL layer may include, in addition to the light-emitting compound, a substance having a high hole injection property, a substance having a high hole transport property, a hole blocking material, a substance having a high electron transport property, a substance having a high electron injection property, or a bipolar substance ( Substances with high electron transport and hole transport).

The EL layer can be formed by a method such as a vapor deposition method (including a vacuum vapor deposition method), a transfer method, a printing method, an inkjet method, and a coating method.

Inorganic EL elements are classified into dispersed inorganic EL elements and thin-film inorganic EL elements according to their element structure. The dispersion-type inorganic EL element includes a light-emitting layer in which particles of a light-emitting material are dispersed in a binder, and its light-emitting mechanism is a donor-acceptor recombination-type light emission using a donor energy level and an acceptor energy level. The thin-film inorganic EL element is a structure in which a light-emitting layer is sandwiched between dielectric layers, and the dielectric layer sandwiching the light-emitting layer is sandwiched between electrodes. The light-emitting mechanism is a local light-emitting device that utilizes the electronic transition of the inner shell layer of metal ions . Note that here, an organic EL element is used as a light-emitting element for description.

In order to extract light, at least one of a pair of electrodes of the light-emitting element is made transparent. A transistor and a light emitting element are formed on the substrate. As the light-emitting element, a top emission structure that emits light from a surface opposite to the substrate; a bottom emission structure that emits light from a surface on one side of the substrate; and a double-sided emission structure that emits light from both surfaces can be used.

FIG. 18B is an example of a light-emitting display device (also referred to as an “EL display device”) using a light-emitting element as a display element. A light-emitting element 4513 used as a display element is electrically connected to a transistor 4010 provided in the display portion 215. Although the light emitting element 4513 has a laminated structure of the first electrode layer 4030, the light emitting layer 4511, and the second electrode layer 4031, it is not limited to this structure. The structure of the light-emitting element 4513 can be appropriately changed according to the direction in which light is taken out from the light-emitting element 4513 and the like.

The partition wall 4510 is formed using an organic insulating material or an inorganic insulating material. It is particularly preferable to use a photosensitive resin material to form an opening in the first electrode layer 4030, and to form a side surface of the opening as an inclined surface having a continuous curvature.

The light emitting layer 4511 may be configured using one layer, or may be configured using a stack of a plurality of layers.

The light emitting color of the light emitting element 4513 may be white, red, green, blue, cyan, magenta, or yellow, depending on the material constituting the light emitting layer 4511.

As a method for implementing color display, there are the following methods: a method of combining a light-emitting element 4513 with a white emission color and a color layer; and a method of providing a light-emitting element 4513 with a different emission color at each pixel. The former method has higher productivity than the latter method. On the other hand, in the latter method, since the light-emitting layer 4511 needs to be formed for each pixel, the productivity is lower than that in the former method. However, in the latter method, it is possible to obtain a light emitting color whose color purity is higher than that in the former method. By providing the light-emitting element 4513 with a microcavity structure in the latter method, color purity can be further improved.

The light emitting layer 4511 may include an inorganic compound such as a quantum dot. For example, by using a quantum dot for a light emitting layer, it can also be used as a light emitting material.

In order to prevent oxygen, hydrogen, moisture, carbon dioxide, and the like from entering the light-emitting element 4513, a protective layer may be formed on the second electrode layer 4031 and the partition wall 4510. As the protective layer, silicon nitride, silicon oxynitride, aluminum oxide, aluminum nitride, aluminum oxynitride, aluminum nitride, DLC (Diamond Like Carbon), or the like can be formed. A filler 4514 is provided in the space sealed by the first substrate 4001, the second substrate 4006, and the sealant 4005, and is sealed. As described above, in order not to be exposed to the outside gas, it is preferable to use a protective film (adhesive film, ultraviolet curable resin film, etc.) having high air tightness and low outgassing, and a cover material for encapsulation (sealing).

As the filler 4514, in addition to an inert gas such as nitrogen or argon, an ultraviolet curable resin or a thermosetting resin may be used. For example, PVC (polyvinyl chloride), acrylic resin, polyimide, epoxy resin, silicon Ketone resin, PVB (polyvinyl butyral) or EVA (ethylene-vinyl acetate), etc. The filler 4514 may contain a desiccant.

As the sealant 4005, a glass material such as glass frit or a resin material, such as a two-liquid mixed resin, such as a cured resin cured at room temperature, a photocurable resin, a thermosetting resin, and the like can be used. The sealant 4005 may contain a desiccant.

In addition, a polarizing plate or a circular polarizing plate (including an elliptically polarizing plate), a retardation plate (λ / 4 plate, λ / 2 plate), and a color filter may be appropriately provided on the light emitting surface of the light emitting element as required. And other optical films. In addition, an anti-reflection film may be provided on a polarizing plate or a circularly polarizing plate. For example, an anti-glare treatment may be performed, which is a treatment for reducing the reflected glare by diffusing the reflected light using the unevenness on the surface.

By providing the light-emitting element with a microcavity structure, light with high color purity can be extracted. In addition, by combining a microcavity structure and a color filter, reflection glare can be prevented, and image visibility can be improved.

Regarding the first electrode layer and the second electrode layer (also referred to as a pixel electrode layer, a common electrode layer, and an opposite electrode layer) that apply a voltage to a display element, according to the direction of light extraction, the place where the electrode layer is provided, and the pattern of the electrode layer The structure can be selected for its light transmittance and reflectivity.

As the first electrode layer 4030 and the second electrode layer 4031, indium oxide including tungsten oxide, indium zinc oxide including tungsten oxide, indium oxide including titanium oxide, indium tin oxide, and indium tin oxide including titanium oxide can be used. Materials, indium zinc oxide, silicon oxide-added indium tin oxide, and other light-transmitting conductive materials.

In addition, as the first electrode layer 4030 and the second electrode layer 4031, tungsten (W), molybdenum (Mo), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), tantalum (Ta), Chromium (Cr), cobalt (Co), nickel (Ni), titanium (Ti), platinum (Pt), aluminum (Al), copper (Cu), silver (Ag) and other metals, or alloys or nitrides thereof More than one of them is formed.

The first electrode layer 4030 and the second electrode layer 4031 can be formed using a conductive composition containing a conductive polymer (also referred to as a conductive polymer). As the conductive polymer, a so-called π-electron conjugated conductive polymer can be used. Examples include polyaniline or a derivative thereof, polypyrrole or a derivative thereof, polythiophene or a derivative thereof, or a copolymer or a derivative thereof composed of two or more of aniline, pyrrole, and thiophene.

In addition, since the transistor is easily damaged by static electricity or the like, it is preferable to provide a protection circuit for protecting the driving circuit. The protection circuit is preferably configured using a non-linear element.

This embodiment can be implemented in appropriate combination with the structures described in the other embodiments and the like.

Embodiment 3

In this embodiment, an example of a transistor that can be used in place of each transistor described in the above embodiment will be described with reference to the drawings.

The display device according to one embodiment of the present invention can be manufactured using various types of transistors, such as a bottom-gate transistor or a top-gate transistor. Therefore, the semiconductor layer material or the transistor structure used can be easily replaced according to a conventional production line.

[Bottom gate transistor 1

19A1 is a cross-sectional view in the channel length direction of a channel protection transistor 810, which is one of the bottom gate transistors. In FIG. 19A1, a transistor 810 is formed on a substrate 771. The transistor 810 includes an electrode 746 on the substrate 771 via an insulating layer 772. The electrode 746 includes a semiconductor layer 742 via an insulating layer 726. The electrode 746 may be used as a gate electrode. The insulating layer 726 may be used as a gate insulating layer.

In addition, an insulating layer 741 is included on a channel formation region of the semiconductor layer 742. The insulating layer 726 includes an electrode 744 a and an electrode 744 b so as to be in contact with a part of the semiconductor layer 742. The electrode 744a may be used as one of a source electrode and a drain electrode. The electrode 744b may be used as the other of the source electrode and the drain electrode. A part of the electrode 744a and a part of the electrode 744b are formed on the insulating layer 741.

The insulating layer 741 may be used as a channel protection layer. By providing the insulating layer 741 on the channel formation region, it is possible to prevent the semiconductor layer 742 from being exposed when the electrodes 744a and 744b are formed. This can prevent the channel formation region of the semiconductor layer 742 from being etched when the electrodes 744a and 744b are formed. According to one embodiment of the present invention, a transistor having good electrical characteristics can be realized.

The transistor 810 includes an insulating layer 728 on the electrode 744a, the electrode 744b, and the insulating layer 741, and includes an insulating layer 729 on the insulating layer 728.

When an oxide semiconductor is used for the semiconductor layer 742, it is preferable to use a material capable of extracting oxygen from a part of the semiconductor layer 742 to generate an oxygen defect for at least a portion of the electrodes 744a and 744b that is in contact with the semiconductor layer 742. The carrier concentration in the region where the oxygen defect is generated in the semiconductor layer 742 increases, and this region is n-typed to become an n-type region (n ⁺ layer). Therefore, this region can be used as a source region or a drain region. When an oxide semiconductor is used for the semiconductor layer 742, examples of a material capable of extracting oxygen from the semiconductor layer 742 to generate an oxygen defect include tungsten, titanium, and the like.

By forming a source region and a drain region in the semiconductor layer 742, the contact resistance between the electrode 744a and the electrode 744b and the semiconductor layer 742 can be reduced. Therefore, the electric characteristics of the transistor such as the field effect mobility and the threshold voltage can be made good.

When a semiconductor such as silicon is used for the semiconductor layer 742, a layer used as an n-type semiconductor or a p-type semiconductor is preferably provided between the semiconductor layer 742 and the electrode 744a and between the semiconductor layer 742 and the electrode 744b. A layer used as an n-type semiconductor or a p-type semiconductor may be used as a source region or a drain region of a transistor.

The insulating layer 729 is preferably formed using a material having a function of preventing impurities from diffusing into the transistor from the outside or reducing the diffusion of the impurities. In addition, the insulating layer 729 may be omitted as necessary.

The transistor 811 shown in FIG. 19A2 is different from the transistor 810 in that an electrode 723 serving as a back gate electrode is included on the insulating layer 729. The electrode 723 can be formed using the same material and method as the electrode 746.

Generally speaking, the back gate electrode is formed using a conductive layer, and is provided in such a manner that the channel formation region of the semiconductor layer is sandwiched between the gate electrode and the back gate electrode. Therefore, the back gate electrode can have the same function as the gate electrode. The potential of the back gate electrode may be equal to the potential of the gate electrode, and may also be a ground potential (GND potential) or an arbitrary potential. In addition, the threshold voltage of the transistor can be changed by independently changing the potential of the back gate electrode without linkage with the gate electrode.

In addition, both the electrode 746 and the electrode 723 can be used as a gate electrode. Therefore, the insulating layer 726, the insulating layer 728, and the insulating layer 729 can all be used as the gate insulating layer. The electrode 723 may be provided between the insulating layer 728 and the insulating layer 729.

Note that when one of the electrodes 746 and 723 is called a “gate electrode”, the other is called a “back gate electrode”. For example, in the transistor 811, when the electrode 723 is referred to as a "gate electrode", the electrode 746 is referred to as a "back gate electrode". In addition, when the electrode 723 is used as a "gate electrode", the transistor 811 is one of the top-gate transistors. In addition, one of the electrodes 746 and 723 is sometimes referred to as a “first gate electrode”, and the other is sometimes referred to as a “second gate electrode”.

By providing the electrodes 746 and 723 across the semiconductor layer 742 and setting the potentials of the electrodes 746 and 723 to be the same, the region through which the carriers flow in the semiconductor layer 742 is further enlarged in the film thickness direction, so the carriers move. The amount increases. As a result, the on-state current of the transistor 811 increases, and the field effect mobility also increases.

Therefore, the transistor 811 is a transistor having a large on-state current with respect to the occupied area. That is, the occupied area of the transistor 811 can be reduced with respect to the required on-state current. According to one embodiment of the present invention, the area occupied by the transistor can be reduced. Therefore, according to one embodiment of the present invention, a semiconductor device having a high integration degree can be realized.

In addition, since the gate electrode and the back gate electrode are formed using a conductive layer, they have a function of preventing an electric field generated outside the transistor from affecting the semiconductor layer forming the channel (especially an electric field shielding function such as static electricity). In addition, when the back gate electrode is formed larger than the semiconductor layer to cover the semiconductor layer with the back gate electrode, the electric field shielding function can be improved.

In addition, by forming the back gate electrode using a light-shielding conductive film, it is possible to prevent light from entering the semiconductor layer from the back gate electrode side. Accordingly, it is possible to prevent light deterioration of the semiconductor layer and prevent deterioration of electrical characteristics such as a threshold voltage drift of the transistor.

According to one embodiment of the present invention, a highly reliable transistor can be realized. In addition, a highly reliable semiconductor device can be realized.

FIG. 19B1 is a cross-sectional view in the channel length direction of the channel protection transistor 820 having a structure different from that of FIG. 19A1. The transistor 820 has substantially the same structure as the transistor 810, and the transistor 820 differs from the transistor 810 in that an insulating layer 741 covers an end portion of the semiconductor layer 742. The semiconductor layer 742 is electrically connected to the electrode 744 a in an opening formed by selectively removing a part of the insulating layer 741 having a region overlapping the semiconductor layer 742. In another opening formed by selectively removing a part of the insulating layer 741 having a region overlapping the semiconductor layer 742, the semiconductor layer 742 is electrically connected to the electrode 744b. A region of the insulating layer 741 that overlaps the channel formation region may be used as a channel protection layer.

The transistor 821 shown in FIG. 19B2 is different from the transistor 820 in that an electrode 723 that can be used as a back gate electrode is included on the insulating layer 729.

By providing the insulating layer 741, it is possible to prevent the semiconductor layer 742 from being exposed when the electrodes 744a and 744b are formed. Therefore, it is possible to prevent the semiconductor layer 742 from being thinned when the electrodes 744a and 744b are formed.

In addition, compared with the transistors 810 and 811, the distance between the electrode 744a and the electrode 746 and the distance between the electrode 744b and the electrode 746 of the transistor 820 and the transistor 821 are longer. Therefore, the parasitic capacitance generated between the electrode 744a and the electrode 746 can be reduced. In addition, parasitic capacitance generated between the electrode 744b and the electrode 746 can be reduced. According to one embodiment of the present invention, a transistor having good electrical characteristics can be provided.

FIG. 19C1 is a cross-sectional view in the channel length direction of the channel-etched transistor 825, which is one of the bottom-gate transistors. In the transistor 825, the electrode 744a and the electrode 744b are formed without the insulating layer 741. Therefore, a part of the semiconductor layer 742 exposed when the electrodes 744a and 744b are formed may be etched. On the other hand, since the insulating layer 741 is not provided, the productivity of the transistor can be improved.

The transistor 826 shown in FIG. 19C2 is different from the transistor 825 in that an electrode 723 can be used as the back gate electrode on the insulating layer 729.

20A1 to 20C2 are cross-sectional views in the channel width direction of the transistor 810, the transistor 811, the transistor 820, the transistor 821, the transistor 825, and the transistor 826.

In the structures shown in FIGS. 20B2 and 20C2, the gate electrode and the back gate electrode are connected to each other, so that the potentials of the gate electrode and the back gate electrode are the same. The semiconductor layer 742 is sandwiched between the gate electrode and the back gate electrode.

In the channel width direction, the lengths of the gate electrode and the back gate electrode are longer than the semiconductor layer 742, and the entirety of the channel width direction of the semiconductor layer 742 sandwiches the insulating layer 726, the insulating layer 741, the insulating layer 728, and the insulating layer 729. Covered by the gate electrode and the back gate electrode.

By adopting this structure, the semiconductor layer 742 included in the transistor can be electrically surrounded by the electric field of the gate electrode and the back gate electrode.

A device structure such as a transistor 811, a transistor 821, and a transistor 826 that uses the electric field of the gate electrode and the back gate electrode to surround the transistor forming the semiconductor layer 742 forming the channel formation region may be referred to as a Surrounded channel (S- channel: around the channel) structure.

By using the S-channel structure, one or both of the gate electrode and the back gate electrode can be applied to the semiconductor layer 742 to effectively apply an electric field for causing channel formation. Thereby, the current driving capability of the transistor is improved, and a higher on-state current characteristic can be obtained. In addition, since the on-state current can be increased, the transistor can be miniaturized. In addition, by adopting the S-channel structure, the mechanical strength of the transistor can be improved.

[Top gate type transistor]

The transistor 842 illustrated in FIG. 21A1 is one of top-gate transistors. In the transistor 842, after the insulating layer 729 is formed, an electrode 744a and an electrode 744b are formed. In the openings formed in the insulating layer 728 and the insulating layer 729, the electrode 744a and the electrode 744b are electrically connected to the semiconductor layer 747.

In addition, a part of the insulating layer 726 that does not overlap with the electrode 746 is removed, and impurities are introduced into the semiconductor layer 742 using the electrode 746 and the remaining insulating layer 726 after the removal as a mask, so that the semiconductor layer 742 can be self-aligned. (self-alignment). The transistor 842 includes a region where the insulating layer 726 extends beyond the end of the electrode 746. A region of the semiconductor layer 742 where an impurity is introduced through the insulating layer 726 has a lower impurity concentration than a region where the impurity is not introduced through the insulating layer 726. Therefore, an LDD (Lightly Doped Drain) region is formed in a region of the semiconductor layer 742 that does not overlap the electrode 746.

The transistor 843 shown in FIG. 21A2 is different from the transistor 842 in that the transistor 843 includes an electrode 723. The transistor 843 includes an electrode 723 formed on a substrate 771. A region where the electrode 723 overlaps the semiconductor layer 742 via the insulating layer 772. The electrode 723 may be used as a back gate electrode.

In addition, as in the transistor 844 shown in FIG. 21B1 and the transistor 845 shown in FIG. 21B2, the insulating layer 726 in a region that does not overlap the electrode 746 may be completely removed. In addition, as in the transistor 846 shown in FIG. 21C1 and the transistor 847 shown in FIG. 21C2, the insulating layer 726 may not be removed.

In the transistor 842 to the transistor 847, impurities may be introduced into the semiconductor layer 742 with the electrode 746 as a mask after the electrode 746 is formed, thereby forming an impurity region in the semiconductor layer 742 in a self-aligned manner. According to one embodiment of the present invention, a transistor having good electrical characteristics can be realized. In addition, according to one embodiment of the present invention, a semiconductor device having a high integration degree can be realized.

22A1 to 22C2 are cross-sectional views in the channel width direction of the transistors 842 to 847.

The transistor 843, the transistor 845, and the transistor 847 have the S-channel structure described above. However, the invention is not limited to this, and the transistor 843, the transistor 845, and the transistor 847 may not have the S-channel structure.

This embodiment can be implemented in appropriate combination with the structures described in the other embodiments and the like.

Embodiment 4

In this embodiment, a detailed configuration example of the OS transistor will be described.

As the semiconductor layer in the OS transistor, for example, "In-M-" containing indium, zinc, and M (metals such as aluminum, titanium, gallium, germanium, yttrium, zirconium, lanthanum, cerium, tin, neodymium, or praseodymium) can be used. "Zn-based oxide".

When the oxide semiconductor constituting the semiconductor layer is an In-M-Zn-based oxide, the atomic ratio of the metal elements of the sputtering target used to form the In-M-Zn oxide film preferably satisfies In M and Zn M. The atomic number of the metal element of this sputtering target is preferably In: M: Zn = 1: 1: 1, In: M: Zn = 1: 1: 1: 1.2, In: M: Zn = 3: 1: 1 , In: M: Zn = 4: 2: 3, In: M: Zn = 4: 2: 4.1, In: M: Zn = 5: 1: 6, In: M: Zn = 5: 1: 7, In : M: Zn = 5: 1: 8 and so on. Note that the atomic ratios of the formed semiconductor layers may each vary within a range of ± 40% of the atomic ratio of the metal elements in the sputtering target.

As the semiconductor layer, an oxide semiconductor having a low carrier density can be used. For example, as the semiconductor layer, a carrier density of 1 × 10 ¹⁷ / cm ³ or less, preferably 1 × 10 ¹⁵ / cm ³ or less, more preferably 1 × 10 ¹³ / cm ³ or less, and even more preferably 1 × An oxide semiconductor of 10 ¹¹ / cm ³ or less, more preferably less than 1 × 10 ¹⁰ / cm ³ , and 1 × 10 ^-9 / cm ³ or more. Such an oxide semiconductor is referred to as a high-purity or substantially high-purity oxide semiconductor. Since this oxide semiconductor has a low defect level density, it can be said to be an oxide semiconductor having stable characteristics.

Note that the present invention is not limited to the above description, and a material having an appropriate composition can be used depending on the semiconductor characteristics and electrical characteristics (field-effect mobility, threshold voltage, etc.) of a desired transistor. In addition, it is preferable to appropriately set a carrier density, an impurity concentration, a defect density, a metal element to oxygen atomic ratio, an interatomic distance, a density, etc. of the semiconductor layer to obtain a desired semiconductor characteristic of the transistor.

When the oxide semiconductor constituting the semiconductor layer contains silicon or carbon, which is one of the group 14 elements, oxygen defects increase, and the semiconductor layer becomes n-type. Therefore, the concentration of silicon or carbon in the semiconductor layer (concentration measured by secondary ion mass spectrometry) is set to 2 × 10 ¹⁸ atoms / cm ³ or less, and preferably 2 × 10 ¹⁷ atoms / cm ³ or less. .

In addition, when an alkali metal and an alkaline earth metal are bonded to the oxide semiconductor, carriers are generated, and the off-state current of the transistor may increase. Therefore, the concentration of the alkali metal or alkaline earth metal (concentration measured by secondary ion mass spectrometry) of the semiconductor layer is set to 1 × 10 ¹⁸ atoms / cm ³ or less, and preferably 2 × 10 ¹⁶ atoms / cm ³ the following.

In addition, when the oxide semiconductor constituting the semiconductor layer contains nitrogen, electrons are generated as carriers, the carrier density increases, and the n-type is easily formed. As a result, a transistor using an oxide semiconductor containing nitrogen tends to have a normally-on characteristic. Therefore, the nitrogen concentration (concentration measured by secondary ion mass spectrometry) of the semiconductor layer is preferably 5 × 10 ¹⁸ atoms / cm ³ or less.

The semiconductor layer may have a non-single crystal structure, for example. Examples of non-single-crystal structures include CAAC-OS (C-Axis Aligned Crystalline Oxide Semiconductor), a polycrystalline structure, a microcrystalline structure, or an amorphous structure including crystals having c-axis alignment. Among non-single-crystal structures, the density of defect states is highest in the amorphous structure, while the density of defect states is the lowest in CAAC-OS.

The oxide semiconductor film having an amorphous structure has, for example, an disordered atomic arrangement and does not have a crystalline component. Alternatively, the oxide film having an amorphous structure has, for example, a completely amorphous structure and does not have a crystal portion.

In addition, the semiconductor layer may be a mixture film of two or more of a region having an amorphous structure, a microcrystalline structure region, a polycrystalline structure region, a CAAC-OS region, and a single crystal structure region. The mixed film may have, for example, a single-layer structure or a laminated structure including two or more kinds of the above-mentioned areas.

The configuration of a CAC (Cloud-Aligned Composite) -OS according to an embodiment of the non-single-crystal semiconductor layer is described below.

CAC-OS refers to, for example, a structure in which elements included in an oxide semiconductor are unevenly distributed, and a size of a material including the elements that are unevenly distributed is 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 2 nm or less. Approximate dimensions. Note that, in the following, one or more metal elements are unevenly distributed in the oxide semiconductor and the regions containing the metal elements are mixed in a size of 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 2 nm or less. The state is called mosaic or patch.

The oxide semiconductor preferably contains at least indium. In particular, it is preferable to contain indium and zinc. In addition, it may also contain aluminum, gallium, yttrium, copper, vanadium, beryllium, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, thorium, tantalum, tungsten And one or more of magnesium and the like.

For example, CAC-OS in In-Ga-Zn oxide (In CAC-OS, In-Ga-Zn oxide may be referred to as CAC-IGZO in particular) means that the material is divided into indium oxide (hereinafter, referred to as InO _X1 (X1 is a real number greater than 0)) or indium zinc oxide (hereinafter referred to as In _X2 Zn _Y2 O _Z2 (X2, Y2 and Z2 are real numbers greater than 0)) and gallium oxide (hereinafter referred to as GaO _X3 (X3 is a real number greater than 0)) or gallium zinc oxide (hereinafter referred to as Ga _X4 Zn _Y4 O _Z4 (X4, Y4, and Z4 are real numbers greater than 0)), etc., and become mosaic-like, and mosaic-like InO _X1 Or a structure in which In _X2 Zn _Y2 O _{Z2 is} uniformly distributed in the film (hereinafter, also referred to as a cloud shape).

In other words, CAC-OS is a composite oxide semiconductor having a structure in which a region containing GaO _X3 as a main component and a region containing In _X2 Zn _Y2 O _Z2 or InO _X1 as a main component are mixed together. In this specification, for example, when the atomic ratio of In to the element M in the first region is greater than the atomic ratio of In to the element M in the second region, the In concentration in the first region is higher than that in the second region.

Note that IGZO is a generic term and sometimes refers to a compound containing In, Ga, Zn, and O. As typical examples, InGaO ₃ (ZnO) _m1 (m1 is a natural number) or In _{(1 + x0)} Ga _(1-x0) O ₃ (ZnO) _m0 (-1 x0 1, m0 is an arbitrary number).

The crystalline compound has a single crystal structure, a polycrystalline structure, or a CAAC structure. The CAAC structure is a crystalline structure in which a plurality of nanocrystals of IGZO have c-axis alignment and are connected in a non-alignment manner on the a-b plane.

On the other hand, CAC-OS is related to the material composition of an oxide semiconductor. CAC-OS refers to a structure in which, in a material composition including In, Ga, Zn, and O, a nano-particle region having Ga as a main component is observed in a part and a nano-component having In as a main component is observed in a part. The granular regions are randomly dispersed in a mosaic shape. Therefore, in CAC-OS, the crystal structure is a secondary factor.

CAC-OS does not include a laminated structure of two or more films having different compositions. For example, a structure including two layers of a film containing In as a main component and a film containing Ga as a main component is not included.

Note that a clear boundary between a region containing GaO _X3 as a main component and a region containing In _X2 Zn _Y2 O _Z2 or InO _X1 as a main component may not be observed in some cases.

CAC-OS contains a material selected from the group consisting of aluminum, yttrium, copper, vanadium, beryllium, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, praseodymium, tantalum, tungsten, and magnesium. In the case where one or more types are substituted for gallium, CAC-OS refers to a structure in which a nano-particle region having the element as a main component is observed in a part and a nano-particle region having In as a main component is observed in a part. Spread irregularly in a mosaic pattern.

CAC-OS can be formed by, for example, a sputtering method without intentionally heating the substrate. In the case where the CAC-OS is formed by a sputtering method, as the deposition gas, one or more selected from an inert gas (typically argon), an oxygen gas, and a nitrogen gas can be used. In addition, the lower the oxygen gas flow ratio in the total flow of the deposition gas during film formation, the better. For example, the oxygen gas flow ratio is set to 0% or more and less than 30%, preferably 0% or more and 10 %the following.

CAC-OS has a feature that no clear peak is observed when the measurement is performed by the θ / 2θ scan by the Out-of-plane method, which is one of X-ray diffraction (XRD: X-ray diffraction) measurement methods. That is, from the analysis results of X-ray diffraction, it can be seen that there is no alignment in the a-b plane direction and the c-axis direction in the measurement area.

In addition, in the electron diffraction pattern of CAC-OS obtained by irradiating an electron beam (also referred to as a nanobeam) having a beam diameter of 1 nm, a ring-shaped region with high brightness was observed in the ring-shaped region. Multiple highlights. From this, it can be seen from the electron diffraction pattern that the crystal structure of the CAC-OS has an nc (nano-crystal) structure with no orientation in the planar direction and the cross-sectional direction.

In addition, for example, in the CAC-OS of the In-Ga-Zn oxide, an EDX-mapping image obtained by an energy dispersive X-ray spectroscopy (EDX) can be used. It was confirmed that a region having GaO _X3 as a main component and a region having In _X2 Zn _Y2 O _Z2 or InO _X1 as a main component are unevenly distributed and mixed.

CAC-OS has a different structure from IGZO compounds in which metal elements are uniformly distributed, and has different properties from IGZO compounds. In other words, CAC-OS has a mosaic-like structure in which a region including GaO _X3 and the like as a main component and a region including In _X2 Zn _Y2 O _Z2 or InO _X1 as a main component are separated from each other and a region including each element as a main component.

Here, the region containing In _X2 Zn _Y2 O _Z2 or InO _X1 as the main component has higher conductivity than the region containing GaO _X3 or the like as the main component. In other words, when a carrier flows through a region containing In _X2 Zn _Y2 O _Z2 or InO _X1 as a main component, the conductivity of the oxide semiconductor is exhibited. Therefore, when a region containing In _X2 Zn _Y2 O _Z2 or InO _X1 as a main component is distributed in a cloud shape in the oxide semiconductor, a high field-effect mobility (μ) can be achieved.

On the other hand, regions having GaO _X3 or the like as a main component have higher insulation properties than regions having In _X2 Zn _Y2 O _Z2 or InO _X1 as a main component. In other words, when a region having GaO _X3 or the like as a main component is distributed in the oxide semiconductor, a leakage current can be suppressed and a good switching operation can be achieved.

Therefore, when CAC-OS is used for a semiconductor device, a high on-state current (I _on ) can be achieved by the complementary effects of the insulation due to GaO _X3 and the like and the conductivity due to In _X2 Zn _Y2 O _Z2 or InO _X1 . And high field effect mobility (μ).

In addition, a semiconductor element using CAC-OS has high reliability. Therefore, CAC-OS is suitable as a constituent material of various semiconductor devices.

This embodiment can be implemented in appropriate combination with the structures described in the other embodiments and the like.

Embodiment 5

In this embodiment, an electronic device according to an embodiment of the present invention will be described with reference to FIGS. 23A to 23D.

The electronic device according to this embodiment includes a display device according to an embodiment of the present invention. Thereby, the display quality of the image displayed on the display part of an electronic device can be improved.

The display portion of the electronic device of this embodiment can display, for example, an image having a resolution of Full HD, 2K, 4K, 8K, 16K, or higher. The screen size of the display unit may be 20 inches or more, 30 inches or more, 50 inches or more, 60 inches or more, or 70 inches or more diagonally.

Examples of the electronic device include a large screen such as a television, a desktop or laptop personal computer, a display for a computer, a digital signage, and a large game machine such as a pinball machine. It can also include digital cameras, digital cameras, digital photo frames, mobile phones, portable game consoles, portable information terminals, audio reproduction devices, and the like.

The electronic device according to one embodiment of the present invention may include an antenna. By receiving signals through an antenna, images or information can be displayed on the display. When the electronic device includes an antenna and a secondary battery, the antenna can be used for non-contact power transmission.

The electronic device according to an embodiment of the present invention may also include a sensor (the sensor has a function of measuring the following factors: force, displacement, position, velocity, acceleration, angular velocity, rotational speed, distance, light, liquid, magnetism, temperature , Chemicals, sound, time, hardness, electric field, current, voltage, electricity, radiation, flow, humidity, tilt, vibration, odor, or infrared).

An electronic device according to an embodiment of the present invention may have various functions. For example, it can have the following functions: a function of displaying various information (still images, moving images, text images, etc.) on the display; a function of a touch screen; a function of displaying calendars, dates, or times; executing various software (programs) ) Function; the function of wireless communication; the function of reading programs or data stored in the storage medium; etc.

FIG. 23A shows an example of a television. In the television 7100, a display portion 7000 is incorporated in a casing 7101. Here, the structure which supports the housing 7101 by the bracket 7103 is shown.

A display device according to an embodiment of the present invention can be applied to the display unit 7000.

The operation of the television 7100 shown in FIG. 23A can be performed by using an operation switch provided in the housing 7101 or a remote controller 7111 provided separately. In addition, a touch sensor may be provided in the display unit 7000, and the television 7100 can be operated by touching the display unit 7000 with a finger or the like. The remote controller 7111 may include a display unit that displays information output from the remote controller 7111. By using the operation keys or the touch panel provided in the remote control 7111, the channel and volume can be operated, and the image displayed on the display portion 7000 can be operated.

The television 7100 has a configuration including a receiver, a modem, and the like. It is possible to receive a general television broadcast by using a receiver. Furthermore, the TV set 7100 is connected to a wired or wireless communication network by a modem, so as to perform one-way (from the sender to the receiver) or two-way (between the sender and the receiver or between the receiver, etc.) Newsletter.

FIG. 23B shows an example of a notebook personal computer. The notebook personal computer 7200 includes a housing 7211, a keyboard 7212, a pointing device 7213, an external port 7214, and the like. A display portion 7000 is incorporated in the casing 7211.

A display device according to an embodiment of the present invention can be applied to the display unit 7000.

23C and 23D show examples of digital signage.

The digital signage 7300 shown in FIG. 23C includes a housing 7301, a display portion 7000, a speaker 7303, and the like. In addition, it can also include LED lights, operation keys (including power switch or operation switch), connection terminals, various sensors and microphones.

FIG. 23D shows a digital signage 7400 provided on a cylindrical pillar 7401. The digital signage 7400 includes a display portion 7000 provided along a curved surface of the pillar 7401.

In FIGS. 23C and 23D, a display device according to an embodiment of the present invention can be applied to the display unit 7000.

The larger the display portion 7000 is, the larger the amount of information that the display device can provide at a time. The larger the display portion 7000 is, the easier it is to attract attention, for example, it can improve the effect of advertising.

By using the touch panel for the display section 7000, not only a still image or a moving image can be displayed on the display section 7000, but also a user can intuitively perform operations, which is preferable. In addition, when it is used to provide information such as route information or traffic information, the ease of use can be improved by intuitive operations.

As shown in FIGS. 23C and 23D), the digital kanban 7300 or the digital kanban 7400 is preferably capable of interoperating with an information terminal device 7311 or an information terminal device 7411 such as a smartphone carried by a user through wireless communication. For example, the information of the advertisement displayed on the display section 7000 may be displayed on the screen of the information terminal device 7311 or the information terminal device 7411. In addition, by operating the information terminal device 7311 or the information terminal device 7411, the display of the display section 7000 can be switched.

In addition, a game can be executed on the digital signage 7300 or the digital signage 7400 with the screen of the information terminal device 7311 or the information terminal device 7411 as an operation unit (controller). Thereby, an unspecified number of users can participate in the game at the same time and enjoy the fun of the game.

The display device according to an embodiment of the present invention may be assembled along the inner or outer wall of a house or a high-rise building, the curved surface of the interior decoration or exterior decoration of a vehicle.

This embodiment can be implemented in appropriate combination with the structures described in the other embodiments and the like.

Example 1

In this embodiment, a result of performing image correction when the display device has a structure including four display panels will be described.

FIG. 24 is a diagram illustrating a display device that displays an image in this embodiment. As shown in FIG. 24, the display panels (the display panel DP [1, 1], the display panel DP [2, 1], the display panel DP [1, 2], and the display panel DP [2, 2]) are arranged as 2 Images are displayed on a display device with two rows and two columns. Pixels of 720 rows and 1280 columns are provided in the display panel.

Here, in the display panel DP [1, 1], a region where pixels corresponding to 320 columns are provided from the boundary between the display panel DP [1, 1] and the display panel DP [1, 2] is referred to as a boundary portion 229A. In addition, in the display panel DP [2, 1], a region in which pixels corresponding to 320 columns are set from the boundary between the display panel DP [2, 1] and the display panel DP [2, 2] is referred to as a boundary portion 229B. In addition, in the display panel DP [1, 2], a region in which pixels corresponding to 320 columns are set from the boundary between the display panel DP [1, 1] and the display panel DP [1, 2] is referred to as a boundary portion 229C. In addition, in the display panel DP [2, 2], a region where pixels corresponding to 320 columns are set from the boundary between the display panel DP [2, 1] and the display panel DP [2, 2] is called a boundary portion 229D.

In this embodiment, a correction filter for each display panel is first formed by the method shown in FIG. 15. Here, the pixels set in the display panel can represent grayscale values of 0 to 255, and the images displayed in steps S23 and S26 are images of which the grayscale values of all pixels are 127.

Next, an average value D _AB of the filter values corresponding to the pixels provided in the boundary portions 229A and 229B and an average value D _CD of the filter values corresponding to the pixels in the boundary portions 229C and 229D are calculated. Then, a new correction is formed by correcting the correction filter so that the filter value corresponding to the pixels provided in the display panel DP [1, 2] and the display panel DP [2, 2] is D _AB / D _CD times. filter.

FIG. 25A shows a display result when an image is displayed without correction of the filter formed by the method shown in FIG. 15. FIG. 25B shows a display result when the filter formed by the method shown in FIG. 15 is modified as described above to form a new correction filter and an image is displayed.

The seams of the display panel are clearly seen in the image shown in FIG. 25A. On the other hand, in the image shown in FIG. 25B, compared with the image shown in FIG. 25A, the seams of the display panels are not easily seen, and the unevenness in color tone between the display panels is reduced.

Example 2

In this embodiment, a measurement result of a luminance distribution of light emitted from a pixel included in a display panel when the display device has a structure including a display panel will be described.

In this embodiment, an image corrected by using the correction filter formed by the method shown in FIG. 15 is displayed on one display panel. Here, the pixels provided in the display panel can represent grayscale values of 0 to 255, and the image displayed in step S23 and the corrected image are images with a grayscale value of 127 for all pixels. In addition, in steps S23 and S26, the brightness of light emitted from the pixels is measured using a two-dimensional luminance meter.

FIG. 26A shows brightness data of a display panel on which an image before correction is displayed, and the brightness data is obtained using a two-dimensional brightness meter in step S23. FIG. 26B shows the luminance data of the display panel on which the corrected image is displayed. The luminance data is obtained using a two-dimensional luminance meter after the correction filter is formed.

When the display panel displays an image before correction, as shown in FIG. 26A, the brightness of the central portion of the display panel is higher than the brightness of the peripheral portion of the display panel. On the other hand, when the display panel displays a corrected image, as shown in FIG. 26B, the brightness in the entire display panel is uniformized as compared with that before the correction.

Claims (8)

    A working method of a display device including a first pixel portion in which a first pixel is arranged in a matrix and a second pixel portion in which a second pixel is arranged in a matrix, includes the following steps: forming a correction display on the first pixel portion A first correction filter having a function of the image and a second correction filter having a function of correcting the image displayed on the second pixel portion; a filter value of the first correction filter and a filter of the second correction filter Compare the values; and correct the filtered value of the first correction filter based on the comparison result.         A first pixel portion including first pixels in m rows and n columns (m, n is an integer of 2 or more) and a second pixel portion in which second pixels in m rows and n columns are arranged in a matrix. The working method of a display device, wherein the first pixel in the m-th row and the second pixel in the first row are adjacent, and include the step of forming a first correction filter having a function of correcting an image displayed on the first pixel portion. And a second correction filter having a function of correcting an image displayed on the second pixel portion; the first correction filter has a filter value corresponding to the first pixel; the second correction filter has a value corresponding to the second pixel A corresponding filter value; an average value of the filter values corresponding to the first pixel provided in a boundary portion with the second pixel portion and the second filter value provided in a boundary portion with the first pixel portion The average values of the filtered values of the pixels are compared; and based on the comparison result, the filtered values of the first correction filter are corrected.         The working method of a display device according to item 1 or 2 of the scope of patent application, wherein the first correction filter is formed by the following method: The display device performs a plurality of grayscale values on the first pixel from the first pixel. The brightness of the light emitted from the pixel is measured to obtain data on the correspondence between the brightness of the light emitted from the first pixel and the grayscale value of the first pixel. The display device displays a predetermined grayscale on the first pixel portion. The image of the order value is measured and the brightness of the light emitted from the first pixel is obtained to obtain the brightness data, and then the data of the corresponding relationship and the brightness data are used to form the first correction filter.         According to the working method of the display device according to item 3 of the scope of patent application, the image of the predetermined gray level value is an image of all the first pixels having the same gray level value.         A display device includes a pixel portion and a processing portion, wherein the pixels are arranged in a matrix shape, the pixel includes a display element and a memory circuit, and the processing portion includes an image obtained by using an image displayed by the display element. The brightness data forms a function of a correction filter, and the memory circuit has a function of holding the correction filter.         The display device according to item 5 of the application, wherein the pixel includes the display element, a first transistor, a second transistor, a third transistor, a fourth transistor, a first capacitor, and a second capacitor. One of the source and the drain of the transistor is electrically connected to one electrode of the first capacitor, and the other electrode of the first capacitor is electrically connected to one of the source and the drain of the second transistor. One of the source and the drain of the second transistor is electrically connected to the gate of the third transistor, and the gate of the third transistor is electrically connected to one electrode of the second capacitor and the other of the second capacitor. The electrode is electrically connected to one of the source and the drain of the third transistor, and one of the source and the drain of the third transistor is electrically connected to one of the source and the drain of the fourth transistor. The other of the source and the drain of the fourth transistor is electrically connected to an electrode of the display element.         The display device according to item 6 of the application, wherein the display element is an organic EL element.         The display device according to claim 6 or 7, wherein the second transistor contains a metal oxide in the channel formation region, and the metal oxide has In, Zn, M (M is Al, Ti, Ga, Sn, Y, Zr, La, Ce, Nd or Hf).