JPWO2019111092A1 - Display device and its operation method - Google Patents

Abstract

Provide a display device with high display quality. A display device having a first pixel portion in which the first pixels are arranged in a matrix and a second pixel portion in which the second pixels are arranged in a matrix. First, a first correction filter having a function of correcting an image displayed in the first pixel portion and a second correction filter having a function of correcting an image displayed in the second pixel portion are created. To do. Next, the filter value of the first correction filter and the filter value of the second correction filter are compared. After that, the filter value of the first correction filter is corrected based on the comparison result.

Description

One aspect of the present invention relates to a display device and an operation method thereof.

One aspect of the present invention is not limited to the above technical fields. The technical fields of one aspect of the present invention include semiconductor devices, display devices, light emitting devices, display systems, electronic devices, lighting devices, input devices (for example, touch sensors, etc.), input / output devices (for example, touch panels, etc.), and the like. As an example, the driving method of the above or the manufacturing method thereof can be mentioned.

In the present specification and the like, the semiconductor device refers to all devices that can function by utilizing the semiconductor characteristics. Display devices (liquid crystal display devices, light emission display devices, etc.), projection devices, lighting devices, electro-optical devices, power storage devices, storage devices, semiconductor circuits, image pickup devices, electronic devices, and the like may be said to be semiconductor devices. Alternatively, they may be said to have semiconductor devices.

In recent years, a display device having high resolution has been demanded. For example, display devices with a large number of pixels such as full high-definition (the number of pixels 1920 × 1080), 4K (the number of pixels 3840 × 2160 or 4096 × 2160, etc.), and 8K (the number of pixels 7680 × 4320 or 8192 × 4320, etc.) are popular. Has been developed in.

In addition, there is a demand for larger display devices. For example, most home-use television devices have a screen size of more than 50 inches diagonally. The larger the screen size, the larger the amount of information that can be displayed at one time, so digital signage and the like are required to have a larger screen.

As the display device, a flat panel display typified by a liquid crystal display device or a light emitting display device is widely used. Silicon is mainly used as the semiconductor material of the transistors constituting these display devices, but in recent years, a technique of using a transistor using a metal oxide as a pixel of the display device has also been developed.

Patent Document 1 discloses a technique of using amorphous silicon as a semiconductor material for a transistor. Patent Document 2 and Patent Document 3 disclose a technique for using a metal oxide as a semiconductor material for a transistor. Patent Document 4 discloses a technique for producing a large-sized display device by arranging a plurality of display panels.

Japanese Unexamined Patent Publication No. 2001-53283 Japanese Unexamined Patent Publication No. 2007-123861 JP-A-2007-96055 JP-A-2015-180924

In the case of a display device that realizes a large display area by arranging a plurality of display panels, the boundary between the display panels becomes easily visible due to the variation in the characteristics of each display panel.

Further, as the number of pixels provided on the display panel increases, the number of transistors and display elements included in the display panel increases. For this reason, the display unevenness of the image displayed on the display panel becomes remarkable due to the variation in the characteristics of the transistor and the variation in the characteristics of the display element.

One aspect of the present invention is to provide a display device having high display quality. One aspect of the present invention is to provide a display device in which display unevenness is reduced. One aspect of the present invention is to provide a display device having a high resolution. One aspect of the present invention is to provide a display device having a large display area. One aspect of the present invention is to provide a display device capable of operating at a high frame frequency. One aspect of the present invention is to provide a display device having low power consumption. One aspect of the present invention is to provide a thin display device. One aspect of the present invention is to provide a flexible display device. One aspect of the present invention is to provide a display device having a wide viewing angle. One aspect of the present invention is to provide a display device that can be manufactured by a small manufacturing device. One aspect of the present invention is to provide a low-priced display device. One aspect of the present invention is to provide a highly reliable display device. One aspect of the present invention is to provide a new display device. One aspect of the present invention is to provide a novel semiconductor device or the like.

One aspect of the present invention is to provide a method of operating a display device having high display quality. One of the problems of one aspect of the present invention is to provide an operation method of a display device in which display unevenness is reduced. One aspect of the present invention is to provide a method of operating a display device having a high resolution. One aspect of the present invention is to provide a method of operating a display device having a large display area. One aspect of the present invention is to provide an operation method of a display device capable of operating at a high frame frequency. One aspect of the present invention is to provide a method of operating a display device having low power consumption. One aspect of the present invention is to provide a method of operating a thin display device. One aspect of the present invention is to provide a method of operating a flexible display device. One aspect of the present invention is to provide a method of operating a display device having a wide viewing angle. One aspect of the present invention is to provide a method of operating a display device that can be manufactured by a small manufacturing device. One of the problems of one aspect of the present invention is to provide a method of operating a low-priced display device. One of the problems of one aspect of the present invention is to provide a highly reliable operation method of a display device. One of the problems of one aspect of the present invention is to provide a new operation method of a display device. One of the problems of one aspect of the present invention is to provide a method of operating a novel semiconductor device or the like.

The description of these issues does not prevent the existence of other issues. One aspect of the present invention does not necessarily have to solve all of these problems. It is possible to extract problems other than these from the description, drawings, and claims.

One aspect of the present invention is an operation method of a display device having a first pixel portion in which the first pixels are arranged in a matrix and a second pixel portion in which the second pixels are arranged in a matrix. The first correction filter having a function of correcting the image displayed in the first pixel portion, and the second correction filter having a function of correcting the image displayed in the second pixel portion. Is created, the filter value of the first correction filter is compared with the filter value of the second correction filter, and the filter value of the first correction filter is corrected based on the comparison result. Is.

Alternatively, one aspect of the present invention includes a first pixel portion in which the first pixels of m rows and n columns (m and n are integers of 2 or more) arranged in a matrix, and a second pixel portion of m rows and n columns. It has a second pixel portion in which pixels are arranged in a matrix, and the first pixel in the m-th row and the second pixel in the first row are operating methods of adjacent display devices. , A first correction filter having a function of correcting an image displayed in the first pixel portion and a second correction filter having a function of correcting an image displayed in the second pixel portion are created. , The first correction filter has a filter value corresponding to the first pixel, the second correction filter has a filter value corresponding to the second pixel, and a boundary portion with the second pixel portion. The average value of the filter values corresponding to the first pixel provided in the above and the average value of the filter values corresponding to the second pixel provided at the boundary portion with the first pixel portion are compared and compared. This is an operation method of the display device that corrects the filter value of the first correction filter based on the result.

Alternatively, in the above aspect, the first correction filter is emitted from the first pixel by measuring the brightness of the light emitted from the first pixel with respect to a plurality of gradation values of the first pixel. Data on the correspondence between the brightness of light and the gradation value of the first pixel is acquired, an image of a specific gradation value is displayed on the first pixel portion, and the data is emitted from the first pixel. After acquiring the brightness data by measuring the brightness of the light, it may be created by using the correspondence data and the brightness data.

Alternatively, one aspect of the present invention is a display device having a first pixel portion in which the first pixels are arranged in a matrix and a second pixel portion in which the second pixels are arranged in a matrix. In the operation method, the first image is displayed on the first pixel portion and the second image is displayed on the second pixel portion, and the brightness of the light emitted from the first pixel and the second pixel are displayed. This is an operation method of a display device that compares the brightness of the light emitted from the first pixel with the brightness of the light emitted from the first pixel and corrects the brightness of the light emitted from the first pixel based on the comparison result.

Alternatively, one aspect of the present invention includes a first pixel portion in which the first pixels of m rows and n columns (m and n are integers of 2 or more) arranged in a matrix, and a second pixel portion of m rows and n columns. It has a second pixel portion in which pixels are arranged in a matrix, and the first pixel in the m-th row and the second pixel in the first row are operating methods of adjacent display devices. , The first image is displayed on the first pixel portion, the second image is displayed on the second pixel portion, and the light emitted from the first pixel provided at the boundary with the second pixel portion. The average value of the brightness of the first pixel is compared with the average value of the brightness of the light emitted from the second pixel provided at the boundary with the first pixel portion, and the first pixel is based on the comparison result. This is an operation method of a display device that corrects the brightness of the light emitted from.

Alternatively, in the above aspect, before displaying the first image on the first pixel portion and the second image on the second pixel portion, the brightness of the light emitted from the first pixel is determined by the first. By measuring a plurality of gradation values of the first pixel, data on the correspondence between the brightness of the light emitted from the first pixel and the gradation value of the first pixel is acquired, and the data of the correspondence between the first pixel and the first pixel is acquired. By displaying an image with a specific gradation value in the unit and measuring the brightness of the light emitted from the first pixel, the brightness data is acquired, and the correspondence data and the brightness data are used. , A correction filter is created, and the first image may be an image corrected by using the correction filter.

Alternatively, in the above aspect, the image having a specific gradation value may be an image in which the gradation values of all the first pixels are equal.

Alternatively, one aspect of the present invention is a display device having a pixel unit and a processing unit, in which the pixels are arranged in a matrix, and the pixels include a display element and a memory circuit. However, the processing unit has a function of creating a correction filter using the brightness data acquired based on the image displayed by the display element, and the memory circuit is a display device having a function of holding the correction filter. ..

Alternatively, in the above embodiment, the pixels include a display element, a first transistor, a second transistor, a third transistor, a fourth transistor, a first capacitive element, and a second capacitive element. , One of the source or drain of the first transistor is electrically connected to one electrode of the first capacitive element, and the other electrode of the first capacitive element is the source of the second transistor. Or one of the drains is electrically connected, one of the source or drain of the second transistor is electrically connected to the gate of the third transistor, and the gate of the third transistor is of the second capacitive element. Electrically connected to one electrode, the other electrode of the second capacitive element is electrically connected to one of the source or drain of the third transistor, and one of the source or drain of the third transistor is It may be electrically connected to one of the source or drain of the fourth transistor, and the other of the source or drain of the fourth transistor may be electrically connected to one electrode of the display element.

Alternatively, in the above aspect, the display element may be an organic EL element.

Alternatively, in the above embodiment, the second transistor has a metal oxide in the channel forming region, and the metal oxides are In, Zn, and M (M is Al, Ti, Ga, Sn, Y, Zr, La, Ce, Nd, or Hf) and may have.

According to one aspect of the present invention, it is possible to provide a display device having high display quality. According to one aspect of the present invention, it is possible to provide a display device in which display unevenness is reduced. According to one aspect of the present invention, a display device having a high resolution can be provided. According to one aspect of the present invention, it is possible to provide a display device having a large display area. According to one aspect of the present invention, it is possible to provide a display device capable of operating at a high frame frequency. According to one aspect of the present invention, it is possible to provide a display device having low power consumption. According to one aspect of the present invention, a thin display device can be provided. According to one aspect of the present invention, a flexible display device can be provided. According to one aspect of the present invention, it is possible to provide a display device having a wide viewing angle. According to one aspect of the present invention, it is possible to provide a display device that can be manufactured by a small manufacturing device. According to one aspect of the present invention, a low-cost display device can be provided. According to one aspect of the present invention, a highly reliable display device can be provided. According to one aspect of the present invention, a novel display device can be provided. According to one aspect of the present invention, a novel semiconductor device or the like can be provided.

According to one aspect of the present invention, it is possible to provide an operation method of a display device having high display quality. According to one aspect of the present invention, it is possible to provide an operation method of a display device in which display unevenness is reduced. According to one aspect of the present invention, it is possible to provide a method of operating a display device having a high resolution. According to one aspect of the present invention, it is possible to provide a method of operating a display device having a large display area. According to one aspect of the present invention, it is possible to provide a method of operating a display device capable of operating at a high frame frequency. According to one aspect of the present invention, it is possible to provide a method of operating a display device having low power consumption. According to one aspect of the present invention, it is possible to provide a method of operating a thin display device. According to one aspect of the present invention, it is possible to provide a method of operating a display device having flexibility. According to one aspect of the present invention, it is possible to provide a method of operating a display device having a wide viewing angle. According to one aspect of the present invention, it is possible to provide a method of operating a display device that can be manufactured by a small manufacturing device. According to one aspect of the present invention, it is possible to provide an operation method of a low-priced display device. According to one aspect of the present invention, it is possible to provide a highly reliable operation method of the display device. According to one aspect of the present invention, a novel operation method of a display device can be provided. According to one aspect of the present invention, it is possible to provide a method of operating a novel semiconductor device or the like.

The description of these effects does not preclude the existence of other effects. One aspect of the present invention does not necessarily have all of these effects. It is possible to extract effects other than these from the description, drawings, and claims.

The figure which shows an example of the display device. The figure which shows an example of the display part. The figure which shows an example of the display panel. The figure which shows an example of the display device. The figure which shows an example of the operation of a display device. The figure which shows an example of the operation of a display device. The figure which shows an example of the operation of a display device. The figure which shows an example of a pixel. The figure which shows an example of the display device. The figure which shows an example of the display part. The figure which shows an example of a pixel. The figure which shows an example of the operation of a pixel. The figure which shows an example of a pixel. The figure which shows an example of the operation of a pixel. The figure which shows an example of the operation of a display device. The figure which shows an example of the operation of a display device. The figure which shows an example of the operation of a display device. The figure which shows an example of the display device. The figure which shows an example of a transistor. The figure which shows an example of a transistor. The figure which shows an example of a transistor. The figure which shows an example of a transistor. The figure which shows an example of an electronic device. The figure which shows the display device used in Example 1. FIG. A photograph showing the display result of Example 1. The photograph which shows the luminance data of Example 2.

The embodiment will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it is easily understood by those skilled in the art that the form and details thereof can be variously changed without departing from the gist of the present invention and its scope. Therefore, the present invention is not construed as being limited to the description of the embodiments shown below.

In the configuration of the invention described below, the same reference numerals are commonly used in different drawings for the same parts or parts having similar functions, and the repeated description thereof will be omitted. Further, when referring to the same function, the hatch pattern may be the same and no particular sign may be added.

In addition, the position, size, range, etc. of each configuration shown in the drawings may not represent the actual position, size, range, etc. for the sake of easy understanding. Therefore, the disclosed invention is not necessarily limited to the position, size, range, etc. disclosed in the drawings.

The term "membrane" and the term "layer" can be interchanged with each other in some cases or in some circumstances. For example, the term "conductive layer" can be changed to the term "conductive layer". Alternatively, for example, the term "insulating film" can be changed to the term "insulating layer".

In the present specification and the like, a metal oxide is a metal oxide in a broad sense. Metal oxides are classified into oxide insulators, oxide conductors (including transparent oxide conductors), oxide semiconductors (also referred to as Oxide Semiconducor or simply OS) and the like. For example, when a metal oxide is used in the semiconductor layer of a transistor, the metal oxide may be referred to as an oxide semiconductor. That is, when it is described as an OS FET, it can be rephrased as a transistor having a metal oxide or an oxide semiconductor.

Further, in the present specification and the like, a metal oxide having nitrogen may also be collectively referred to as a metal oxide. Further, a metal oxide having nitrogen may be referred to as a metal oxynitride.

(Embodiment 1)
In the present embodiment, the display device of one aspect of the present invention will be described with reference to FIGS. 1 to 17.

One aspect of the present invention relates to a display device in which boundaries between display panels are difficult to recognize even when a large display area is realized by arranging a plurality of display panels, and an operation method thereof.

<1-1. Display device configuration example 1>
1A and 1B are block diagrams showing a configuration example of the display device 10A.

The display device 10A has a function of generating image data using data received from the outside and a function of displaying an image based on the image data.

As shown in FIG. 1A, the display device 10A includes a display unit 20A and a signal generation unit 30A. The display unit 20A has a plurality of display panel DPs. The signal generation unit 30A has a function of generating image data using data received from the outside. The display panel DP has a function of displaying an image based on the image data.

FIG. 1A shows an example in which display panel DPs are arranged in 2 rows and 1 column on the display unit 20A. The display of the display panel DP can be controlled independently. The display panel DP may be arranged in three or more rows or two or more columns in the display unit 20A.

In the present specification and the like, the display panel DP provided in the p-row and q-th column (p and q are integers of 1 or more) is referred to as a display panel DP [p, q].

By arranging a plurality of display panel DPs, a display unit 20A having a wide display area can be manufactured.

FIG. 1B shows a configuration example of the display panel DP [1,1] and the display panel DP [2,1]. The display panel DP [1,1] includes a pixel unit 21A, a scanning line driving circuit 22A (also referred to as a gate driver), a signal line driving circuit 23A (also referred to as a source driver), and a timing controller 24A. The display panel DP [2,1] includes a pixel unit 21B, a scanning line driving circuit 22B, a signal line driving circuit 23B, and a timing controller 24B. The signal generation unit 30A includes a front end unit 31, a decoder 32, a processing unit 33, a receiving unit 34, an interface 35, a control unit 36, a processing unit 40A, and a dividing unit 45A.

In the present specification and the like, the pixel portion provided in the display unit of the display device according to one aspect of the present invention, such as the pixel unit 21A and the pixel unit 21B, may be referred to as the pixel unit 21. Further, the scanning line driving circuit 22A and the scanning line driving circuit 22B provided in the display unit of the display device of one aspect of the present invention may be referred to as the scanning line driving circuit 22. Further, the signal line drive circuit provided in the display unit of the display device of one aspect of the present invention, such as the signal line drive circuit 23A and the signal line drive circuit 23B, may be referred to as the signal line drive circuit 23.

Hereinafter, each component of the display panel DP and the signal generation unit 30A will be described.

The pixel unit 21A and the pixel unit 21B have a plurality of pixels. The pixel unit 21A and the pixel unit 21B have a function of displaying an image.

The pixel has a display element. The pixel has a function of emitting light having a brightness corresponding to the gradation value. The gradation of the pixels is controlled by the signals supplied from the scanning line driving circuit 22A and the signal line driving circuit 23A, and a predetermined image is displayed on the pixel unit 21A. Further, the gradation of the pixels is controlled by the signals supplied from the scanning line driving circuit 22B and the signal line driving circuit 23B, and a predetermined image is displayed on the pixel unit 21B.

The scanning line drive circuit 22A has a function of supplying a signal (also referred to as a selection signal) for selecting a pixel to the pixel unit 21A. The scanning line drive circuit 22B has a function of supplying a selection signal to the pixel unit 21B.

The signal line drive circuit 23A has a function of supplying a signal (also referred to as an image signal) representing the gradation expressed by the pixels to the pixel unit 21A. The signal line drive circuit 23B has a function of supplying an image signal to the pixel unit 21B. When the image signal is supplied to the pixel to which the selection signal is supplied, the pixel emits light having a brightness corresponding to the gradation value, and a predetermined image is displayed on the pixel unit 21A and the pixel unit 21B.

The timing controller 24A has a function of generating a timing signal (clock signal, start pulse signal, etc.) used in the scanning line driving circuit 22A, the signal line driving circuit 23A, and the like. The timing controller 24B has a function of generating a timing signal used in the scanning line driving circuit 22B, the signal line driving circuit 23B, and the like. One or both of the timing at which the selection signal is output from the scanning line driving circuit 22A and the timing at which the image signal is output from the signal line driving circuit 23A is controlled by the timing signal generated by the timing controller 24A. One or both of the timing at which the selection signal is output from the scanning line driving circuit 22B and the timing at which the image signal is output from the signal line driving circuit 23B is controlled by the timing signal generated by the timing controller 24B. When the display panel DP [1,1] has a plurality of scanning line driving circuits, the timing at which signals are output from the plurality of scanning line driving circuits is synchronized with the timing signals generated by the timing controller 24A. When the display panel DP [2,1] has a plurality of scanning line driving circuits, the timing at which signals are output from the plurality of scanning line driving circuits is synchronized with the timing signals generated by the timing controller 24B. Similarly, when the display panel DP [1,1] has a plurality of signal line drive circuits, the timing at which the signal is output from the signal line drive circuit is synchronized with the timing signal generated by the timing controller 24A. When the display panel DP [2,1] has a plurality of signal line drive circuits, the timing at which the signal is output from the signal line drive circuit is synchronized with the timing signal generated by the timing controller 24B.

The front end unit 31 has a function of receiving a signal input from the outside and appropriately performing signal processing. For example, a broadcast signal encoded and modulated by a predetermined method is input to the front end unit 31. The front end unit 31 can have a function of demodulating the received image signal, performing analog-to-digital conversion, and the like. Further, the front end portion 31 may have a function of performing error correction. The data received by the front end unit 31 and subjected to signal processing is output to the decoder 32.

The decoder 32 has a function of decoding the encoded signal. When the image data included in the broadcast signal or the like input to the front end unit 31 is compressed, the decoder 32 decompresses the image data. For example, the decoder 32 can have functions such as entropy decoding, inverse quantization, inverse discrete cosine transform (IDCT), inverse discrete sine transform (IDST), and other inverse orthogonal transforms, intraframe prediction, and interframe prediction. .. The image data generated by the decoding process by the decoder 32 is output to the processing unit 33.

The processing unit 33 has a function of performing image processing on the image data input from the decoder 32, generating the first image data SD1, and outputting the first image data SD1 to the processing unit 40A.

Examples of image processing include noise removal processing, gradation conversion processing, color tone correction processing, brightness correction processing, and the like. The color tone correction process and the brightness correction process can be performed by using gamma correction or the like.

Examples of the noise removal process include removal of various noises such as mosquito noise generated around the contour of characters and the like, block noise generated in high-speed moving images, and random noise causing flicker.

The gradation conversion process is a process of converting the gradation indicated by the first image data SD1 into a gradation corresponding to the output characteristic of the display unit 20A. For example, when increasing the number of gradations, it is possible to perform a process of smoothing the histogram by interpolating and assigning gradation values corresponding to each pixel to an image input with a small number of gradations. High dynamic range (HDR) processing that expands the dynamic range is also included in the gradation conversion processing.

The color tone correction process is a process for correcting the color tone of an image. The brightness correction process is a process for correcting the brightness (luminance contrast) of an image. For example, the brightness and color tone of the image displayed on the display unit 20A are corrected so as to be optimum according to the type and brightness of the illumination in the space where the display unit 20A is provided, the color purity, and the like.

The interpolation process is a process of generating an image of a frame (interpolation frame) that does not originally exist when the frame frequency of the image to be displayed is increased. For example, an image of an interpolation frame to be inserted between two images is generated from the difference between two images. Alternatively, it is possible to generate an image of a plurality of interpolation frames between two images. For example, when the frame frequency of the image data is 60 Hz, the frame frequency of the image signal output to the display unit 20A can be doubled to 120 Hz or quadrupled to 240 Hz by generating a plurality of interpolated frames. It can be increased eight times to 480 Hz or the like.

The above image processing can also be performed by a processing unit provided separately from the processing unit 33. Further, one or more of the above image processing may be performed by the processing unit 40A.

The receiving unit 34 has a function of receiving data or a control signal input from the outside. For inputting data or control signals to the receiving unit 34, an arithmetic processing device 50, a remote controller, a personal digital assistant (smartphone, tablet, etc.), operation buttons provided on the display unit 20A, a touch panel, or the like can be used. Examples of the arithmetic processing unit 50 include computers, servers, clouds, and other computers having excellent arithmetic processing capabilities.

The interface 35 has a function of appropriately performing signal processing on the data or control signal received by the receiving unit 34 and outputting it to the control unit 36.

The control unit 36 has a function of supplying a control signal to each circuit of the signal generation unit 30A. For example, the control unit 36 has a function of supplying a control signal to the decoder 32, the processing unit 33, the processing unit 40A, and the dividing unit 45A. The control by the control unit 36 can be performed based on the control signal or the like received by the reception unit 34.

The processing unit 40A has a function of creating a correction filter. Further, the processing unit 40A has a function of generating the second image data SD2 by correcting the first image data SD1 input from the processing unit 33 by using the created correction filter. For example, the processing unit 40A has a function of correcting the first image data SD1 so that display unevenness of the image displayed on the display unit 20A is reduced. For example, the processing unit 40A has a function of correcting the first image data SD1 so that the boundary between the display panels is not easily recognized, although the details will be described later. The second image data SD2 generated by the processing unit 40A is output to the division unit 45A.

The dividing unit 45A has a function of dividing the second image data SD2 input from the processing unit 40A. The second image data SD2 can be divided into the same number as the display panel DP provided in the display unit 20A. In FIG. 1A, the second image data SD2 is divided into 2 × 1 pieces (second image data SD2 [1,1] and second image data SD2 [2,1]) and displayed. It is output to unit 20A. The second image data SD2 [1,1] is image data corresponding to the image displayed on the display panel DP [1,1], and the second image data SD2 [2,1] is the display panel DP [2,1]. This is image data corresponding to the image displayed in [2, 1]. The division unit 45A outputs the second image data SD2 [1,1] to the signal line drive circuit 23A, and outputs the second image data SD2 [2,1] to the signal line drive circuit 23B.

FIG. 2 shows a specific configuration example of the display panel DP [1,1] and the display panel DP [2,1].

The pixel unit 21A and the pixel unit 21B each have a plurality of pixels 25. FIG. 2 shows an example in which the pixel unit 21A and the pixel unit 21B each have a plurality of pixels 25 arranged in a matrix of m rows and n columns (m and n are each an integer of 1 or more).

In the present specification and the like, the pixel provided in the pixel portion 21A may be referred to as a first pixel. Further, the pixel provided in the pixel portion 21B may be referred to as a second pixel.

The boundary portion of the pixel portion 21A with the pixel portion 21B is defined as the boundary portion 28A. Further, the boundary portion of the pixel portion 21B with the pixel portion 21A is referred to as a boundary portion 28B. For example, the boundary portion 28A may be provided with the pixel 25 on the m-th row. For example, it is assumed that the boundary portion 28A is provided with the pixels 25 in the (7/8) m + 1th row to the mth row. For example, it can be assumed that the boundary portion 28A is provided with the pixels 25 in the (3/4) m + 1th row to the mth row. Alternatively, the boundary portion 28A may be provided with the pixels 25 in the (1/2) m + 1th row to the mth row.

Further, the boundary portion 28B may be provided with, for example, the pixel 25 in the first row. For example, the boundary portion 28B may be provided with the pixels 25 in the first row to the (1/8) mth row. For example, the boundary portion 28B may be provided with pixels 25 in the first row to the (1/4) mth row. For example, the boundary portion 28B may be provided with the pixels 25 in the first row to the (1/2) m row.

The display panel DP [1,1] has m scanning lines GLa (also referred to as a selection signal line, a gate line, etc.). The display panel DP [2,1] has m scanning lines GLb. The m scanning lines GLa and the m scanning lines GLb extend in the row direction, respectively. The m scanning lines GLa and the m scanning lines GLb are electrically connected to the pixels 25 arranged in the row direction, respectively.

In the present specification and the like, scanning lines provided in the display device of one aspect of the present invention, such as scanning lines GLa and scanning lines GLb, may be referred to as scanning lines GL.

Further, in the present specification and the like, the scanning line GL electrically connected to the pixel 25 on the i-th line (i is an integer of 1 or more and m or less) is referred to as a scanning line GL [i]. In addition to the scanning line GL, the symbol or code representing the element on the i-th line may be distinguished by adding [i].

One end of the scanning line GLa is electrically connected to the scanning line driving circuit 22A, and one end of the scanning line GLb is electrically connected to the scanning line driving circuit 22B. The scanning line drive circuit 22A has a function of supplying a selection signal to the scanning line GLa, and the scanning line driving circuit 22B has a function of supplying a selection signal to the scanning line GLb. The selection signal is supplied to the pixel 25 of the pixel unit 21A via the scanning line GLa, and is supplied to the pixel 25 of the pixel unit 21B via the scanning line GLb.

Further, the scanning line drive circuit 22A has a function of supplying selection signals in order from the scanning line GLa [1] to the scanning line GLa [m]. In other words, the scanning line driving circuit 22A has a function of sequentially scanning the scanning lines GLa [1] to the scanning lines GLa [m]. After scanning up to the scanning line GLa [m], scanning is performed again in order from the scanning line GLa [1]. Further, the scanning line drive circuit 22B has a function of supplying selection signals in order from the scanning line GLb [1] to the scanning line GLb [m]. In other words, the scanning line driving circuit 22B has a function of sequentially scanning the scanning lines GLb [1] to the scanning lines GLb [m]. After scanning to the scanning line GLb [m], scanning is performed again in order from the scanning line GLb [1].

In addition to the scanning line driving circuit 22A, another scanning line driving circuit may be provided on the display panel DP [1,1]. The scanning line drive circuit is electrically connected to the other end of the scanning line GLa. Therefore, the two scanning line drive circuits are provided at positions facing each other with the pixel portion 21A interposed therebetween. Further, the display panel DP [2, 1] may be provided with another scanning line driving circuit in addition to the scanning line driving circuit 22B. The scanning line drive circuit is electrically connected to the other end of the scanning line GLb. Therefore, the two scanning line drive circuits are provided at positions facing each other with the pixel portion 21B in between.

When two scanning line drive circuits are provided in one display panel DP, the scanning lines are supplied to one scanning line GLa or scanning line GLb at the same time by supplying selection signals from the two scanning line driving circuits. It is possible to increase the supply capacity of the selection signal to.

The display panel DP [1,1] has n signal lines SLa (also referred to as an image signal line, a source line, etc.), and the display panel DP [2,1] has n signal lines SLb. The n signal lines SLa and the n signal lines SLb each extend in the row direction. The n signal lines SLa and the n signal lines SLb are each electrically connected to a plurality of pixels 25 arranged in a row direction.

In the present specification and the like, the signal line provided in the display device of one aspect of the present invention, such as the signal line SLa and the signal line SLb, may be referred to as the signal line SL.

Further, in the present specification and the like, the signal line SL electrically connected to the pixel 25 in the jth column (j is an integer of 1 or more and n or less) is referred to as a signal line SL [j]. In addition to the signal line SL, the symbol or code representing the element in the j-th column may be distinguished by adding [j].

The signal line SLa is electrically connected to the signal line drive circuit 23A, and the signal line SLb is electrically connected to the signal line drive circuit 23B. The signal line drive circuit 23A has a function of supplying an image signal to the signal line SLa, and the signal line drive circuit 23B has a function of supplying an image signal to the signal line SLb. The image signal is supplied to the pixel 25 of the pixel unit 21A via the signal line SLa, and is supplied to the pixel 25 of the pixel unit 21B via the signal line SLb.

The pixel 25 has a display element. An example of the display element provided on the pixel 25 is a light emitting element. Examples of the light emitting element include self-luminous light emitting elements such as an OLED (Organic Light Emitting Side), an LED (Light Emitting Side), a QLED (Quantum-dot Light Emitting Side), and a semiconductor laser. By using a light emitting element, particularly an OLED or a micro LED, as a display element, a vivid image can be displayed and the display quality can be improved. Further, since the display device having a light emitting element does not require a backlight, a thin display device can be provided. In addition, a flexible display device can be provided. Further, it is possible to provide a display device having a wide viewing angle.

Further, a liquid crystal element may be used as the display element. Examples of the liquid crystal element include a transmissive type liquid crystal element, a reflective type liquid crystal element, and a semi-transmissive type liquid crystal element. By using a liquid crystal element as the display element, it is possible to provide a display device having low power consumption.

Further, as a display element, a shutter type MEMS (Micro Electro Electro Mechanical System) element, an optical interference type MEMS element, a microcapsule method, an electrophoresis method, an electrowetting method, an electronic powder fluid (registered trademark) method and the like are applied. A display element or the like may be used.

The number of pixels 25 provided on the display unit 20A can be freely set. In order to make the display unit 20A large and to display a high-definition image, it is preferable to arrange a large number of pixels 25. For example, when displaying a 2K image, it is preferable to provide 1920 × 1080 or more pixels. When displaying a 4K image, it is preferable to provide 3840 × 2160 or more pixels or 4096 × 2160 or more pixels. When displaying an 8K image, it is preferable to provide 7680 × 4320 or more pixels or 8192 × 4320 or more pixels. Further, the display unit 20A may be provided with more pixels.

Here, when a large display unit 20A is manufactured by using a plurality of display panel DPs, the size of one display panel DP does not need to be large. Therefore, it is not necessary to increase the size of the manufacturing apparatus for manufacturing the display panel DP, and space can be saved. Further, since it is possible to use a small and medium-sized display panel manufacturing apparatus and it is not necessary to use a new manufacturing apparatus for increasing the size of the display unit 20A, the manufacturing cost can be suppressed. In addition, it is possible to suppress a decrease in yield due to an increase in the size of the display panel DP.

When the size of the display panel DP is the same, the display unit having a plurality of display panel DPs has a wider display area and a larger amount of information that can be displayed at one time than the display unit having one display panel DP. It has the effect of.

The plurality of pixels 25 shown in FIG. 2 can be configured to have a function of emitting red (R), green (G), or blue (B) light, respectively. Alternatively, the plurality of pixels 25 shown in FIG. 2 can be configured to have a function of emitting red (R), green (G), blue (B), or white (W) light, respectively. In this way, by providing the pixel 25 capable of emitting light of different colors in the pixel portion 21A and the pixel portion 21B, full-color display can be performed. When the pixel 25 capable of emitting light of different colors is provided in the pixel portion 21A and the pixel portion 21B, the pixel 25 can be referred to as a sub-pixel.

Here, consider a case where the display panel DP has a non-display area so as to surround the pixel portion 21. At this time, for example, when one image is displayed by combining the output images of the plurality of display panel DPs, the one image is visually recognized as separated by the user of the display device 10A.

By narrowing the non-display area of the display panel DP (using a narrow frame display panel DP), it is possible to prevent the displays of each display panel DP from appearing separately, but the non-display area of the display panel DP is completely reduced. It is difficult to get rid of it.

Further, if the area of the non-display area of the display panel DP is small, the distance between the end of the display panel DP and the element in the display panel DP becomes short, and the element deteriorates due to impurities invading from the outside of the display panel DP. It may be easier.

Therefore, in one aspect of the present invention, a part of the plurality of display panel DPs is arranged so as to overlap each other. Of the two stacked display panel DPs, the display panel DP located at least on the display surface side (upper side) has a region for transmitting visible light adjacent to the pixel unit 21. In one aspect of the present invention, the pixel portion 21 of the display panel DP arranged on the lower side and the region that transmits visible light of the display panel DP arranged on the upper side overlap. Therefore, the non-display area between the pixel portions 21 of the two overlapping display panel DPs can be reduced or even eliminated. As a result, it is possible to realize a large display unit 20A in which the joint of the display panel DP is not easily recognized by the user.

At least a part of the non-display area of the display panel DP located on the upper side is a region that transmits visible light, and can be overlapped with the pixel portion 21 of the display panel DP located on the lower side. Further, at least a part of the non-display area of the display panel DP located on the lower side can be overlapped with the pixel portion 21 of the display panel DP located on the upper side or the area that blocks visible light. Since these portions do not affect the narrowing of the frame of the display unit 20A (reduction of the area other than the pixel portion), it is not necessary to reduce the area.

When the non-display area of the display panel DP is wide, the distance between the end of the display panel DP and the element in the display panel DP becomes long, and it is possible to suppress deterioration of the element due to impurities invading from the outside of the display panel DP. .. For example, when an organic EL element is used as a display element, the longer the distance between the end of the display panel DP and the organic EL element, the more impurities such as moisture or oxygen invade the organic EL element from the outside of the display panel DP. It becomes difficult (or difficult to reach). In the display device of one aspect of the present invention, since a sufficient area of the non-display area of the display panel DP can be secured, a large display unit having high reliability even when the display panel DP using an organic EL element or the like is applied. 20A can be realized.

In this way, when a plurality of display panel DPs are provided in the display unit 20A, it is preferable that the plurality of display panel DPs are arranged so that the pixel units 21 are continuous between the adjacent display panel DPs.

FIG. 3A shows a configuration example of the display panel DP, and FIG. 3B shows an arrangement example of the display panel DP.

The display panel DP shown in FIG. 3A has a pixel portion 21, a region 72 that transmits visible light, and a region 73 that blocks visible light. A region 72 that transmits visible light and a region 73 that blocks visible light are provided adjacent to the pixel portion 21, respectively. FIG. 3A shows an example in which the display panel DP is provided with an FPC (Flexible Printed Circuit) 74.

As shown in FIG. 2, the pixel unit 21 includes a plurality of pixels 25. The region 72 that transmits visible light may be provided with a pair of substrates constituting the display panel DP, a sealing material for encapsulating the display elements sandwiched between the pair of substrates, and the like. At this time, a material having translucency with respect to visible light is used for the member provided in the region 72 that transmits visible light. The region 73 that blocks visible light may be provided with wiring or the like that is electrically connected to the pixels 25 included in the pixel unit 21. Further, one or both of the scanning line driving circuit 22 and the signal line driving circuit 23 may be provided in the region 73 that blocks visible light. Further, the region 73 that blocks visible light may be provided with a terminal connected to the FPC 74, wiring connected to the terminal, and the like.

FIG. 3B is an example in which two display panel DPs shown in FIG. 3A are arranged in the vertical direction (row direction), and is a perspective view of the display panel DP on the display surface side.

The two display panel DPs (display panel DP [1,1] and display panel DP [2,1]) are arranged so as to have regions overlapping each other. Specifically, the region 72 that transmits visible light included in the display panel DP [2, 1] is arranged so as to be superimposed on the pixel portion 21A (display surface side). As a result, the area in which the pixel unit 21A and the pixel unit 21B are arranged substantially seamlessly can be designated as the display area 29 of the display unit 20A.

Here, the display panel DP preferably has flexibility. For example, it is preferable that the pair of substrates constituting the display panel DP have flexibility. As a result, the display panel DP [2,1] can be gently curved so that the height of the upper surface of the pixel portion 21B matches the height of the upper surface of the pixel portion 21A. Therefore, the heights of the respective display areas can be made uniform except for the vicinity of the area where the display panel DP [1,1] and the display panel DP [2,1] overlap, and the display quality of the image to be displayed in the display area 29 can be made uniform. Can be enhanced.

The thickness of the display panel DP is preferably thin in order to reduce the step between the two adjacent display panel DPs. For example, the thickness of the display panel DP is preferably 1 mm or less, more preferably 300 μm or less, and even more preferably 100 μm or less.

As shown in FIG. 4A, the display unit 20A has a region adjacent to the display panel DP, that is, a joint region (region S in the figure) of the display panel DP. When displaying an image using a plurality of display panel DPs, it is preferable that the continuity of the image in the region S is ensured.

However, the characteristics of the transistor or the size of the capacitance element of the pixel 25, the parasitic resistance or capacitance of the signal line SL, the driving ability of the signal line driving circuit 23, and the like may vary depending on the display panel DP. Therefore, when the image signal is supplied to each display panel DP, an error occurs in the display image for each display panel DP, which may cause the image to be discontinuous in the joint region. Further, as shown in FIG. 3B, when the pixel portion 21 of one display panel DP has an area overlapping the region 72 that transmits visible light of the other display panel DP, the pixel portion 21 is in the joint region. Since the image displayed in is visually recognized through the region 72 that transmits visible light, an error may occur in the gradation. Therefore, the data obtained by dividing the first image data SD1 generated by the processing unit 33 as it is (first image data SD1 [1,1] and first image data SD1 [2,1]) is displayed on each display panel DP. As shown in FIG. 4 (B), a discontinuous image can be visually recognized in the region S.

Here, the processing unit 40A included in the display device 10A can correct the first image data SD1 so that the discontinuity of the image at the joint of the two display panel DPs is alleviated. As a result, when the display unit 20A is configured by using a plurality of display panel DPs, it is possible to make it difficult to visually recognize the disorder of the image at the joint of the display panel DPs. Further, the deviation of the color tone of each display panel, for example, the deviation of the color tone of the image displayed on the display panel DP [1,1] and the color tone of the image displayed on the display panel DP [2,1] is reduced. be able to. From the above, the display quality can be improved.

<1-2. Example of operation method of display device 1>
Next, an example of the operation method of the display device 10A will be described. 5 (A) and 5 (B) are flowcharts for explaining a method of creating a correction filter used for alleviating the discontinuity of images at the joints of display panel DPs.

An example of the operation method shown in FIG. 5A will be described. First, the processing unit 40A corresponds to the correction filter used to correct the image data corresponding to the image displayed on the display panel DP [1,1] and the image displayed on the display panel DP [2,1]. A correction filter used to correct the image data to be used is created (step S01). Here, in the present specification and the like, the correction filter used for correcting the image data corresponding to the image displayed on the display panel DP [1,1] is referred to as a first correction filter. The correction filter used to correct the image data corresponding to the image displayed on the display panel DP [2,1] is referred to as a second correction filter.

The first correction filter can be, for example, a correction filter for reducing display unevenness of an image displayed on the display panel DP [1,1]. The second correction filter can be, for example, a correction filter for reducing display unevenness of the image displayed on the display panel DP [2,1]. The details of the method of creating the first correction filter and the second correction filter will be described later, but the first correction filter is used, for example, when an image having a specific gradation value is displayed on the display panel DP [1,1]. It can be created so that the variation in the brightness of the light emitted from the pixels 25 between the pixels 25 is small. Further, in the second correction filter, for example, when an image having a specific gradation value is displayed on the display panel DP [2,1], the variation in the brightness of the light emitted from the pixel 25 between the pixels 25 becomes small. Can be created as follows.

In the present specification and the like, an image having a specific gradation value means, for example, an image in which the gradation values of all pixels are equal.

Here, the variation in the brightness of the light emitted from the pixels among the pixels is often large when displaying an image of intermediate gradation. Therefore, when an image having a specific gradation value is an image in which the gradation values of all the pixels 25 are the same, for example, it is preferable to use an image in which the gradation values of all the pixels 25 are intermediate gradations. For example, when the gradation value that can be expressed by the pixel 25 is 0 to 255, it is preferable to use an image in which the gradation value of all the pixels 25 is 127 or its vicinity. For example, it is preferable that the image is entirely gray.

The first correction filter has, for example, data representing the correction intensity of the brightness of the light emitted from the pixels 25 of the display panel DP [1,1] for each pixel 25. The second correction filter has, for example, data representing the correction intensity of the brightness of the light emitted from the pixels 25 of the display panel DP [2, 1] for each pixel 25. In the present specification and the like, the value such as the correction intensity represented by the data contained in the correction filter is referred to as a filter value. It can be said that the first correction filter has, for example, the same number of filter values as the number of pixels of the pixels 25 provided on the display panel DP [1,1]. It can be said that the second correction filter has, for example, the same number of filter values as the number of pixels of the pixels 25 provided on the display panel DP [2,1].

Next, the processing unit 40A corrects the image data corresponding to the image having a specific gradation value by using the first correction filter, and displays the image corresponding to the corrected image data on the display panel DP [1]. , 1]. Further, the processing unit 40A corrects the image data corresponding to the image having a specific gradation value by using the second correction filter, and displays the image corresponding to the corrected image data on the display panel DP [2, 1] is displayed. After that, the brightness of the light emitted from the pixels 25 provided at the boundary portion 28A and the boundary portion 28B is measured using a two-dimensional luminance meter or the like (step S02).

Next, the brightness of the light emitted from the pixel 25 provided at the boundary portion 28A and the brightness of the light emitted from the pixel 25 provided at the boundary portion 28B are compared (step S03). For example, the average value of the brightness of the light emitted from the pixel 25 provided at the boundary portion 28A and the average value of the brightness of the light emitted from the pixel 25 provided at the boundary portion 28B are compared.

After that, the processing unit 40A corrects the correction filter based on the comparison result (step S04). For example, when the average value of L _A of the luminance of light emitted from the pixel 25 provided in the boundary portion _28A, an average value of the luminance of the light emitted from the pixels 25 provided in the boundary portion 28B and L _B , the luminance of light emitted from the pixel 25 in the pixel portion 21B as multiplied by L _{a /} L _B, to correct the second correction filter. Or, for example, the brightness of the light to multiply L _{B /} L _A emitted from the pixels 25 in the pixel portion 21A, modifying the first correction filter. Or, for example, the brightness of light emitted from the pixel 25 in the pixel portion _{21A (L A + L B)} / 2L A modifies the first correction filter as multiplying the pixels provided in the pixel portion 21B the brightness of light emitted from the 25 as multiplied by _{(L a + L B) /} 2L B modifying the second correction filter. As a result, a new correction filter is created. The above is an example of a method for creating a correction filter used in the display device 10A.

In the above, the case where the correction filter is modified so as to correct the brightness of the light emitted from all the pixels 25 provided in the pixel portion 21A and / or the pixel portion 21B based on the above comparison result. As shown, one aspect of the present invention is not limited to this. For example, the correction filter may be modified so as to correct the brightness of the light emitted from the pixels 25 provided at the boundary portion 28A and / or the boundary portion 28B based on the above comparison result. For example, the brightness of the light emitted from all of the pixels 25 provided in the boundary portion 28A and / or the boundary portion 28B and a part of the pixels 25 provided in the other region is based on the above comparison result. The correction filter may be modified to perform the correction. For example, as shown in FIG. 3B, even if the correction filter is modified so as to correct the brightness of the light emitted from the pixel 25 provided in the region overlapping the region 72 based on the above comparison result. Good.

An example of the operation method shown in FIG. 5B will be described. First, in the same manner as in step S01 shown in FIG. 5A, the processing unit 40A creates the first correction filter and the second correction filter (step S11).

Next, the filter value of the first correction filter corresponding to the pixel 25 provided on the boundary portion 28A and the filter value of the second correction filter corresponding to the pixel 25 provided on the boundary portion 28B , Are compared (step S12). For example, the average value of the filter values corresponding to the pixels 25 provided in the boundary portion 28A and the average value of the filter values corresponding to the pixels 25 provided in the boundary portion 28B are compared.

After that, the correction filter is modified based on the comparison result in the same manner as in step S04 shown in FIG. 5 (A). For example, the average value of the filter value corresponding to the pixel 25 provided in the boundary portion 28A D _A, the average value of the filter value corresponding to the pixel 25 provided in the boundary portion 28B if a D _B, of the second The second correction filter is modified so that the filter values of the correction filters are multiplied by D _A / D _B , respectively. Or, for example, the first correction filter filter value having as multiplying D _{B /} D _A, respectively, to correct the first correction filter. Or, for example, the first correction filter value filter has to modify the respective _{(D A + D B) /} 2D A multiplying the first correction filter as the filter value with the second correction filter, respectively (D _A + _D B) / modifying the second correction filter to multiply 2D _B. As a result, a new correction filter is created. The above is an example of a method for creating a correction filter used in the display device 10A.

In the above description, the case where the correction filter is modified so as to perform the correction based on the above comparison result is shown for the filter values corresponding to all the pixels 25 provided in the pixel portion 21A and / or the pixel portion 21B. , One aspect of the present invention is not limited to this. For example, the correction filter may be modified so that the filter values corresponding to the pixels 25 provided in the boundary portion 28A and / or the boundary portion 28B are corrected based on the above comparison result. For example, the filter values corresponding to all of the pixels 25 provided in the boundary portion 28A and / or the boundary portion 28B and a part of the pixels 25 provided in the other regions are corrected based on the above comparison result. The correction filter may be modified to do so. For example, as shown in FIG. 3B, the correction filter may be modified so as to perform correction based on the above comparison result with respect to the filter value corresponding to the pixel 25 provided in the region overlapping the region 72.

After creating a new correction filter by the method shown in FIGS. 5A and 5B, the correction filter may be further modified to adjust the correction intensity for each pixel 25. For example, among the pixels 25 provided in the pixel portion 21A, the correction strength of the pixel 25 provided outside the boundary portion 28A may be weaker than the correction strength of the pixel 25 provided in the boundary portion 28A. .. Further, for example, among the pixels 25 provided in the pixel portion 21B, the correction strength of the pixel 25 provided outside the boundary portion 28B is made weaker than the correction strength of the pixel 25 provided in the boundary portion 28B. May be good.

After creating a new correction filter by the above method, the processing unit 40A corrects the first image data SD1 corresponding to, for example, a signal input from the outside by the correction filter to generate the second image data SD2. .. Next, the division unit 45A uses the second image data SD2 as the image data SD2 [1,1] corresponding to the image displayed on the display panel DP [1,1], and the display panel DP [2,1]. It is divided into image data SD2 [2,1] corresponding to the image displayed in. After that, the image corresponding to the image data SD2 [1,1] is displayed on the pixel unit 21A, and the image corresponding to the image data SD2 [2,1] is displayed on the pixel unit 21B. The above is an example of the operation method of the display device 10A.

After the processing unit 40A creates a new correction filter, the correction filter may be further modified. For example, the correction filter may be modified so that noise that is difficult to remove by the correction filter created by the methods shown in FIGS. 5A and 5B can be removed. For example, the correction filter may be modified so that defects such as missing pixels are difficult to see. For example, the correction filter may be modified so that the same processing as the image processing that can be performed by the processing unit 33 can be performed. The correction of the correction filter can be performed so that the correction filter created by the methods shown in FIGS. 5A and 5B has a function as a smoothing filter, for example. Thereby, the display quality of the display device of one aspect of the present invention can be further improved.

The correction of the correction filter may be performed, for example, between steps S01 and S02, and between steps S11 and S12. Further, when the processing unit 40A further modifies the correction filter after creating a new correction filter, the processing unit 33 can be omitted.

By displaying the image after creating a new correction filter by the method shown in FIGS. 5A and 5B, it is possible to make it difficult to visually recognize the disorder of the image at the joint of the display panel DP. Further, it is possible to reduce the deviation between the color tone of the image displayed on the display panel DP [1,1] and the color tone of the image displayed on the display panel DP [2,1]. From the above, the display quality can be improved.

In the configuration and operation shown in FIGS. 1 to 5, two display panel DPs are arranged in the horizontal direction (column direction), for example, the display panel DP [1, 1] and the display panel DP [1, 1] are arranged on the display unit 20A. It can be applied even when 2] is provided. In this case, for example, the term "row" is referred to as "column", the term "mth row" is referred to as "nth column", and the term "display panel DP [2,1]" is referred to as "display panel DP [1]. , 2] ”should be paraphrased as appropriate.

Next, an example of a method for creating a correction filter when the display panel DPs are arranged in 2 rows and 2 columns on the display unit 20A will be described. 6 (A), (B), and (C) are schematic views showing an example of a method for creating a correction filter, and the operations proceed in the order of (A), (B), and (C).

In FIGS. 6A, 6B, and 6C, the display panel DP [1,1], the display panel DP [2,1], and the display panel DP [1,] are shown as the display panel DP having 2 rows and 2 columns. 2] and the display panel DP [2, 2] are shown. In FIG. 6A, the boundary portion of the display panel DP [1,1] with the display panel DP [2,1] is defined as the boundary portion 28A. Further, the boundary portion of the display panel DP [2,1] with the display panel DP [1,1] is defined as the boundary portion 28B. Further, the boundary portion of the display panel DP [1, 2] with the display panel DP [2, 2] is defined as the boundary portion 28C. Further, the boundary portion of the display panel DP [2, 2] with the display panel DP [1, 2] is defined as the boundary portion 28D.

Further, in FIG. 6B, the boundary portion of the display panel DP [1,1] with the display panel DP [1,2] is defined as the boundary portion 29A. Further, the boundary portion of the display panel DP [2,1] with the display panel DP [2,2] is defined as the boundary portion 29B. Further, the boundary portion of the display panel DP [1, 2] with the display panel DP [1, 1] is defined as the boundary portion 29C. Further, the boundary portion of the display panel DP [2,2] with the display panel DP [2,1] is defined as the boundary portion 29D.

When creating the correction filter, first, the operation shown in FIG. 5A or FIG. 5B is performed on the display panel DP [1,1] and the display panel DP [2,1]. Further, the display panel DP [1, 2] and the display panel DP [2, 2] perform the operations shown in FIG. 5 (A) or FIG. 5 (B). At this time, in step S03 shown in FIG. 5A, the brightness of the light emitted from the pixel 25 provided at the boundary portion 28C and the brightness of the light emitted from the pixel 25 provided at the boundary portion 28D are determined. To compare. Alternatively, in step S12 shown in FIG. 5B, the filter value corresponding to the pixel 25 provided at the boundary portion 28C is compared with the filter value corresponding to the pixel 25 provided at the boundary portion 28D. As a result, there is no image at the joint between the display panel DP [1,1] and the display panel DP [2,1], and at the joint between the display panel DP [1,2] and the display panel DP [2,2]. The continuity is relaxed.

The brightness of the light emitted from the pixels 25 provided at the boundary portion 28A and the boundary portion 28C is compared with the brightness of the light emitted from the pixels 25 provided at the boundary portion 28B and the boundary portion 28D. May be good. That is, provided, for example pixels 25 provided in the boundary portion 28A, and the light emitted from the pixel 25 provided in the boundary portion 28C Average value _{L AC} luminance pixels 25 provided in the boundary portion 28B, and the boundary portion 28D it may be compared with the average value L _BD of the luminance of light emitted from the pixel 25 to be. Further, the filter values corresponding to the pixels 25 provided in the boundary portion 28A and the boundary portion 28C may be compared together with the filter values corresponding to the pixels 25 provided in the boundary portion 28B and the boundary portion 28D. In other words, pixels to be provided, for example pixels 25 provided in the boundary portion 28A, and the average value _{D AC} filter values corresponding to the pixels 25 provided in the boundary portion 28C, the pixels 25 provided in the boundary portion 28B, and the boundary portion 28D It may be compared with the average value _DBD of the filter values corresponding to 25.

Next, the display panel DP [1,1] and the display panel DP [1,2] perform the operations shown in FIGS. 5 (A) or 5 (B). At this time, in step S03 shown in FIG. 5A, the brightness of the light emitted from the pixel 25 provided at the boundary portion 29A and the brightness of the light emitted from the pixel 25 provided at the boundary portion 29C are determined. To compare. Alternatively, in step S12 shown in FIG. 5B, the filter value corresponding to the pixel 25 provided at the boundary portion 29A and the filter value corresponding to the pixel 25 provided at the boundary portion 29C are compared.

Further, the display panel DP [2,1] and the display panel DP [2,2] perform the operations shown in FIG. 5 (A) or FIG. 5 (B). At this time, in step S03 shown in FIG. 5A, the brightness of the light emitted from the pixel 25 provided at the boundary portion 29B and the brightness of the light emitted from the pixel 25 provided at the boundary portion 29D are determined. To compare. Alternatively, in step S12 shown in FIG. 5B, the filter value corresponding to the pixel 25 provided in the boundary portion 29B and the filter value corresponding to the pixel 25 provided in the boundary portion 29D are compared.

As a result, there is no image at the joint between the display panel DP [1,1] and the display panel DP [1,2], and at the joint between the display panel DP [2,1] and the display panel DP [2,2]. The continuity is relaxed. The brightness of the light emitted from the pixels 25 provided at the boundary portion 29A and the boundary portion 29B is compared with the brightness of the light emitted from the pixels 25 provided at the boundary portion 29C and the boundary portion 29D. May be good. Further, the filter values corresponding to the pixels 25 provided at the boundary portion 29A and the boundary portion 29B may be compared together with the filter values corresponding to the pixels 25 provided at the boundary portion 29C and the boundary portion 29D.

It is not always necessary to compare the brightness of the light emitted from the pixel 25 provided at the boundary portion 29A with the brightness of the light emitted from the pixel 25 provided at the boundary portion 29C. Further, it is not always necessary to compare the filter value corresponding to the pixel 25 provided in the boundary portion 29A with the filter value corresponding to the pixel 25 provided in the boundary portion 29C.

Further, an example of a method of creating a correction filter when display panel DPs are arranged in 2 rows and 3 columns on the display unit 20A will be described. 7 (A), (B), and (C) are schematic views showing an example of a method for creating a correction filter, and the operations proceed in the order of (A), (B), and (C).

7 (A), (B), and (C) show the display panel DP [1,1], the display panel DP [2,1], and the display panel DP [1,] as the display panel DP of 2 rows and 3 columns. 2], display panel DP [2,2], display panel DP [1,3], and display panel DP [2,3] are shown. In FIG. 7B, the boundary portion of the display panel DP [1, 2] with the display panel DP [1, 3] is defined as the boundary portion 29E. Further, the boundary portion of the display panel DP [2, 2] with the display panel DP [2, 3] is defined as the boundary portion 29F. Further, the boundary portion of the display panel DP [1,3] with the display panel DP [1,2] is defined as the boundary portion 29G. Further, the boundary portion of the display panel DP [2,3] with the display panel DP [2,2] is defined as the boundary portion 29H.

When creating the correction filter, first, the display panel DP [1,1], the display panel DP [2,1], the display panel DP [1,2], and the display panel DP [2,2] are shown in the figure. 6 The operations shown in (A), (B), and (C) are performed. Further, the display panel DP [1,3] and the display panel DP [2,3] perform the operations shown in FIG. 5 (A) or FIG. 5 (B).

Next, with respect to the display panel DP [1, 2] and the display panel DP [1, 3], the operation shown in FIG. 5 (A) or FIG. 5 (B) is performed. At this time, in step S03 shown in FIG. 5A, the brightness of the light emitted from the pixel 25 provided at the boundary portion 29E and the brightness of the light emitted from the pixel 25 provided at the boundary portion 29G are determined. To compare. Alternatively, in step S12 shown in FIG. 5B, the filter value corresponding to the pixel 25 provided on the boundary portion 29E and the filter value corresponding to the pixel 25 provided on the boundary portion 29G are compared.

Further, the display panel DP [2,2] and the display panel DP [2,3] perform the operations shown in FIG. 5A or FIG. 5B. At this time, in step S03 shown in FIG. 5A, the brightness of the light emitted from the pixel 25 provided at the boundary portion 29F and the brightness of the light emitted from the pixel 25 provided at the boundary portion 29H are determined. To compare. Alternatively, in step S12 shown in FIG. 5B, the filter value corresponding to the pixel 25 provided at the boundary portion 29F and the filter value corresponding to the pixel 25 provided at the boundary portion 29H are compared.

As a result, the image is not displayed at the joint between the display panel DP [1, 2] and the display panel DP [1, 3], and at the joint between the display panel DP [2, 2] and the display panel DP [2, 3]. The continuity is relaxed. The brightness of the light emitted from the pixels 25 provided at the boundary portion 29E and the boundary portion 29F is compared with the brightness of the light emitted from the pixels 25 provided at the boundary portion 29G and the boundary portion 29H. May be good. Further, the filter values corresponding to the pixels 25 provided at the boundary portion 29E and the boundary portion 29F may be compared together with the filter values corresponding to the pixels 25 provided at the boundary portion 29G and the boundary portion 29H.

Even when the display panel DP is arranged in 3 rows or more or 4 columns or more on the display unit 20C, FIGS. 6 (A), (B), (C) and 7 (A), (B), ( By applying the method shown in C), a correction filter used for correcting the image data corresponding to the image displayed on each display panel DP can be created.

<1-3. Pixel configuration example 1>
Hereinafter, a configuration example of the pixel 25 will be described with reference to FIGS. 8A and 8B. FIG. 8A is a circuit diagram showing a configuration example of a pixel 25 having a light emitting element. Further, FIG. 8B is a circuit diagram showing a configuration example of a pixel 25 having a liquid crystal element.

The pixel 25 shown in FIG. 8A includes a transistor 446, a capacitance element 433, a transistor 251 and a transistor 444, and a light emitting element 170.

One of the source and drain of the transistor 446 is electrically connected to the signal line SL to which the image signal is supplied. Further, the gate of the transistor 446 is electrically connected to the scanning line GL to which the selection signal is supplied.

The transistor 446 has a function of controlling the writing of the image signal to the node 445.

One electrode of the capacitive element 433 is electrically connected to the node 445, and the other electrode of the capacitive element 433 is electrically connected to the node 447. Also, the other of the source or drain of the transistor 446 is electrically connected to the node 445.

The capacitance element 433 has a function as a holding capacitance for holding the data written in the node 445.

One of the source or drain of the transistor 251 is electrically connected to the potential supply line VL_a, and the other of the source or drain of the transistor 251 is electrically connected to the node 447. Further, the gate of transistor 251 is electrically connected to node 445.

One of the source or drain of transistor 444 is electrically connected to the potential supply line V0, and the other of the source or drain of transistor 444 is electrically connected to node 447. Further, the gate of the transistor 444 is electrically connected to the scanning line GL.

One electrode of the light emitting element 170 is electrically connected to the potential supply line VL_b, and the other electrode of the light emitting element 170 is electrically connected to the node 447.

As the power supply potential, for example, a relatively high potential side potential or a low potential side potential can be used. The power supply potential on the high potential side is referred to as a high power supply potential (also referred to as "VDD"), and the power supply potential on the low potential side is referred to as a low power supply potential (also referred to as "VSS"). Further, the ground potential can be used as a high power supply potential or a low power supply potential. For example, when the high power supply potential is the ground potential, the low power supply potential is lower than the ground potential, and when the low power supply potential is the ground potential, the high power supply potential is higher than the ground potential.

For example, one of the potential supply line VL_a or the potential supply line VL_b is supplied with the high power potential VDD, and the other of the potential supply line VL_a or the potential supply line VL_b is supplied with the low power potential VSS.

In the display device having the pixel 25 having the configuration shown in FIG. 8A, the pixel 25 in each row is sequentially selected by the scanning line drive circuit 22, the transistor 446 and the transistor 444 are turned on, and the image signal is written to the node 445.

The pixel 25 in which data is written to the node 445 is in a holding state when the transistor 446 and the transistor 444 are turned off. Further, the amount of current flowing between the source and drain of the transistor 251 is controlled according to the potential of the data written in the node 445, and the light emitting element 170 emits light with brightness corresponding to the amount of flowing current. By doing this sequentially line by line, the image can be displayed.

The pixel 25 shown in FIG. 8B includes a transistor 446, a capacitance element 433, and a liquid crystal element 180.

The potential of one electrode of the liquid crystal element 180 is appropriately set according to the specifications of the pixel 25. The orientation state of the liquid crystal element 180 is set by the data written to the node 445. A common potential (common potential) may be applied to one electrode of the liquid crystal element 180 possessed by each of the plurality of pixels 25. Further, different potentials may be applied to one electrode of the liquid crystal element 180 for each pixel 25 in each row.

At pixel 25, one of the source or drain of the transistor 446 is electrically connected to the signal line SL and the other is electrically connected to the node 445. The gate of the transistor 446 is electrically connected to the scanning line GL. The transistor 446 has a function of controlling the writing of the image signal to the node 445.

One electrode of the capacitance element 433 is electrically connected to a wiring to which a specific potential is supplied (hereinafter, capacitance line CL), and the other electrode of the capacitance element 433 is electrically connected to the node 445. Further, the other electrode of the liquid crystal element 180 is electrically connected to the node 445. The potential value of the capacitance line CL is appropriately set according to the specifications of the pixel 25. The capacitance element 433 has a function as a holding capacitance for holding the data written in the node 445.

In the display device having the pixel 25 of FIG. 8B, the pixel 25 of each row is sequentially selected by the scanning line drive circuit 22, the transistor 446 is turned on, and the image signal is written to the node 445.

The pixel 25 in which the image signal is written to the node 445 is in the holding state when the transistor 446 is turned off. By doing this sequentially line by line, the image can be displayed.

<1-4. Display device configuration example 2>
FIG. 9 is a block diagram showing a configuration example of the display device 10B.

Similar to the display device 10A, the display device 10B has a function of generating image data using data received from the outside and a function of displaying an image based on the image data.

As shown in FIG. 9, the display device 10B includes a display unit 20B and a signal generation unit 30B. The display unit 20B has a plurality of display panel DPs like the display unit 20A. Similar to the signal generation unit 30A, the signal generation unit 30B has a function of generating image data using data received from the outside.

FIG. 9 shows an example in which display panel DPs are arranged in 2 rows and 1 column on the display unit 20B. The display of the display panel DP can be controlled independently. Similar to the display unit 20A, the display panel DP may be arranged in three or more rows or two or more columns in the display unit 20B.

The signal generation unit 30B includes a front end unit 31, a decoder 32, a processing unit 33, a receiving unit 34, an interface 35, a control unit 36, a processing unit 40B, and a dividing unit 45B.

The processing unit 40B has a function of creating a correction filter, similarly to the processing unit 40A. On the other hand, unlike the processing unit 40A, the processing unit 40B may not have a function of correcting the first image data SD1 by using the created correction filter. Then, the created correction filter is output as the correction filter FIL to the division unit 45B together with the first image data SD1 which is the image data before correction.

The dividing unit 45B has a function of dividing the first image data SD1 input from the processing unit 40A and the correction filter FIL. The first image data SD1 and the correction filter FIL can be divided into the same number as the display panel DP provided on the display unit 20B. In FIG. 9, the first image data SD1 is divided into 2 × 1 pieces (first image data SD1 [1,1] and first image data [2,1]) and output to the display unit 20B. To. Further, the correction filter FIL is divided into 2 × 1 pieces (correction filter FIL [1,1] and correction filter FIL [2,1]) and output to the display unit 20B. Specifically, the first image data SD1 [1,1] and the correction filter FIL [1,1] are output to the display panel DP [1,1], and the first image data SD1 [2,1] and the correction filter FIL [1,1] are output. The correction filter FIL [2,1] is output to the display panel DP [2,1].

The pixel provided on the display panel DP has a memory circuit, and the correction filter FIL can be held in the memory circuit. As a result, the correction of the first image data SD1 can be performed inside the pixel without being corrected by the processing unit 40B. Therefore, the configuration of the processing unit 40B can be simplified, and the power consumption of the display device according to one aspect of the present invention can be reduced.

FIG. 10 shows a configuration example of the display panel DP [1,1] and the display panel DP [2,1] provided in the display device 10B having the configuration shown in FIG.

The display panel DP [1,1] having the configuration shown in FIG. 10 has a pixel unit 21A, a scanning line drive circuit 22A, and a signal line drive circuit 23A, similarly to the display panel DP [1,1] having the configuration shown in FIG. Has. The display panel DP [2,1] having the configuration shown in FIG. 10 has a pixel unit 21B, a scanning line drive circuit 22B, and a signal line drive circuit 23B, similarly to the display panel DP [2,1] having the configuration shown in FIG. Has.

As shown in FIG. 10, the pixel portion 21A and the pixel portion 21B each have a plurality of pixels 26. FIG. 10 shows an example in which the pixel portion 21A and the pixel portion 21B each have a plurality of pixels 26 arranged in a matrix of m rows and n columns.

A memory circuit MEM is provided on the pixel 26. The memory circuit MEM has a function of holding a correction filter FIL. By providing the memory circuit MEM in the pixel 26, as described above, the correction of the first image data SD1 can be performed inside the pixel without being performed by the processing unit 40B.

The display panel DP [1,1] has m scanning lines GL1a, m scanning lines GL2a, and m scanning lines GL3a, and the display panel DP [2,1] has m scanning lines. It has GL1b, m scanning lines GL2b, and m scanning lines GL3b. The m scanning lines GL1a, scanning lines GL1b, scanning lines GL2a, scanning lines GL2b, scanning lines GL3a, and scanning lines GL3b each extend in the row direction. The m scanning lines GL1a are electrically connected to the memory circuit MEM provided in the pixels 26 arranged in the row direction in the pixel portion 21A, and the m scanning lines GL1b are respectively connected in the row direction in the pixel portion 21B. It is electrically connected to the memory circuit MEM provided in the pixels 26 arranged in the line. The m scanning lines GL2a and the scanning lines GL3a are electrically connected to the pixels 26 arranged in the row direction in the pixel section 21A, and the m scanning lines GL2b and the scanning lines GL3b are respectively connected to the pixel section 21B. Is electrically connected to the pixels 26 arranged in the row direction.

One end of the scanning line GL1a, the scanning line GL2a, and the scanning line GL3a is electrically connected to the scanning line driving circuit 22A, and one end of the scanning line GL1b, the scanning line GL2b, and the scanning line GL3b is connected to the scanning line driving circuit 22B. It is electrically connected. The scanning line driving circuit 22A has a function of supplying a selection signal to the scanning lines GL1a, the scanning line GL2a, and the scanning line GL3a, and the scanning line driving circuit 22B is provided on the scanning line GL1b, the scanning line GL2b, and the scanning line GL3b. It has a function of supplying a selection signal.

In the present specification and the like, the scanning line provided in the display device of one aspect of the present invention, such as the scanning line GL1a and the scanning line GL1b, may be referred to as the scanning line GL1. Further, the scanning line provided in the display device of one aspect of the present invention, such as the scanning line GL2a and the scanning line GL2b, may be referred to as the scanning line GL2. Further, the scanning line provided in the display device of one aspect of the present invention, such as the scanning line GL3a and the scanning line GL3b, may be referred to as the scanning line GL3.

The display panel DP [1,1] has n signal lines SL1a and n signal lines SL2a, and the display panel DP [2,1] has n signal lines SL1b and n signals. It has line SL2b. The n signal lines SL1a, signal line SL1b, signal line SL2a, and signal line SL2b each extend in the row direction. The n signal lines SL1a are electrically connected to the memory circuits MEM provided in the plurality of pixels 26 arranged in the column direction in the pixel unit 21A, and the n signal lines SL1b are respectively in the pixel unit 21B. It is electrically connected to a memory circuit MEM provided on a plurality of pixels 26 arranged in a row direction. Each of the n signal lines SL2a is electrically connected to a plurality of pixels 26 arranged in a column direction in the pixel unit 21A, and each of the n signal lines SL2b is a plurality of pixels arranged in a column direction in the pixel unit 21B. It is electrically connected to 26.

The signal line SL1a and the signal line SL2a are electrically connected to the signal line drive circuit 23A, and the signal line SL1b and the signal line SL2b are electrically connected to the signal line drive circuit 23B. The signal line drive circuit 23A has a function of supplying a signal corresponding to the correction filter to the signal line SL1a, and the signal line drive circuit 23B has a function of supplying a signal corresponding to the correction filter to the signal line SL1b. In the present specification and the like, the signal corresponding to the correction filter is referred to as a correction filter signal. The correction filter signal is supplied to the memory circuit MEM via the signal line SL1a or the signal line SL1b.

Further, the signal line drive circuit 23A has a function of supplying an image signal to the signal line SL2a, and the signal line drive circuit 23B has a function of supplying an image signal to the signal line SL2b. The image signal is supplied to the pixel 26 via the signal line SL2a or the signal line SL2b.

In the present specification and the like, the signal line provided in the display device of one aspect of the present invention, such as the signal line SL1a and the signal line SL1b, may be referred to as the signal line SL1. Further, the signal line provided in the display device of one aspect of the present invention, such as the signal line SL2a and the signal line SL2b, may be referred to as the signal line SL2.

The pixel 26 has a display element. As the display element provided on the pixel 26, for example, a light emitting element or a liquid crystal element can be used in the same manner as the display element provided on the pixel 25.

Like the pixel 25, the plurality of pixels 26 shown in FIG. 10 can be configured to have a function of emitting red (R), green (G), or blue (B) light, respectively. Alternatively, the plurality of pixels 26 shown in FIG. 10 may be configured to have a function of emitting red (R), green (G), blue (B), or white (W) light, respectively.

In the configuration shown in FIGS. 9 and 10, two display panel DPs are arranged in the horizontal direction (column direction), for example, the display panel DP [1,1] and the display panel DP [1,2] are displayed on the display unit 20B. Can be applied even when is provided. In this case, for example, the term "display panel DP [2,1]" may be appropriately paraphrased as "display panel DP [1,2]".

<1-5. Pixel configuration example 2>
In the following, a configuration example of the pixel 26 will be described with reference to FIG.

FIG. 11 is a circuit diagram showing a configuration example of the pixel 26. The pixel 26 having the configuration shown in FIG. 11 includes a transistor 101, a transistor 102, a transistor 111, a transistor 112, a capacitance element 103, a capacitance element 113, and a light emitting element 104. As the light emitting element 104, an organic EL element, an inorganic EL element, or the like can be used.

One of the source and drain of the transistor 101 is electrically connected to one electrode of the capacitive element 113. The other electrode of the capacitive element 113 is electrically connected to one of the source or drain of the transistor 111. One of the source and drain of transistor 111 is electrically connected to the gate of transistor 112. The gate of the transistor 112 is electrically connected to one electrode of the capacitive element 103. The other electrode of the capacitive element 103 is electrically connected to one of the source or drain of the transistor 112. One of the source or drain of the transistor 112 is electrically connected to one of the source or drain of the transistor 102. The other of the source or drain of the transistor 102 is electrically connected to one electrode of the light emitting element 104.

Here, the wiring to which the other electrode of the capacitance element 113, one of the source or drain of the transistor 111, the gate of the transistor 112, and one electrode of the capacitance element 103 are connected is referred to as a node NM1. Further, the wiring to which the other electrode of the source or drain of the transistor 102 and one electrode of the light emitting element 104 are connected is referred to as node NA1.

The gate of the transistor 101 is electrically connected to the scanning line GL2. The gate of the transistor 102 is electrically connected to the scanning line GL3. The gate of the transistor 111 is electrically connected to the scanning line GL1. The other of the source or drain of the transistor 101 is electrically connected to the signal line SL2. The other of the source or drain of the transistor 111 is electrically connected to the signal line SL1.

The other of the source or drain of the transistor 112 is electrically connected to the potential supply line 128. The other electrode of the light emitting element 104 is electrically connected to the common wiring 129. Here, for example, a high power supply potential VDD can be supplied to the potential supply line 128. Further, an arbitrary potential can be supplied to the common wiring 129.

The transistor 111 and the capacitive element 113 form a memory circuit MEM. The node NM1 is a storage node, and by conducting the transistor 111, the signal supplied to the signal line SL1 can be written to the node NM1. By using a transistor having an extremely low off current for the transistor 111, the potential of the node NM1 can be maintained for a long time. For the transistor, for example, a transistor using a metal oxide in the channel forming region (hereinafter, OS transistor) can be used.

The OS transistor may be applied not only to the transistor 111 but also to other transistors constituting the pixel 26. Further, a transistor having Si in the channel forming region (hereinafter, Si transistor) may be applied to the transistor 111. Alternatively, both the OS transistor and the Si transistor may be used. Examples of the Si transistor include a transistor having amorphous silicon, a transistor having crystalline silicon (typically, low-temperature polysilicon), and a transistor having single crystal silicon.

As the semiconductor material used for the OS transistor, a metal oxide having an energy gap of 2 eV or more, preferably 2.5 eV or more, more preferably 3 eV or more can be used. A typical example is an oxide semiconductor containing indium, and for example, CAAC-OS or CAC-OS described later can be used. CAAC-OS is suitable for transistors and the like in which the atoms constituting the crystal are stable and reliability is important. Further, CAC-OS is suitable for a transistor or the like that performs high-speed driving because it exhibits high mobility characteristics.

Since the OS transistor has a large energy gap, it exhibits extremely low off-current characteristics. Further, the OS transistor has features different from those of the Si transistor such as impact ionization, avalanche breakdown, short channel effect, etc., and can form a highly reliable circuit.

When an EL element is used as the display element, a silicon substrate can be used, and the Si transistor and the OS transistor can be formed so as to have an overlapping region. Therefore, the pixel density can be improved even if the number of transistors is relatively large.

In the pixel 26, the signal written in the node NM1 is capacitively coupled with the image signal supplied from the signal line SL2 and can be output to the node NA1. The transistor 101 has a function of selecting pixels. The transistor 102 has a function as a switch for controlling the light emission of the light emitting element 104.

For example, when the potential of the signal written from the signal line SL1 to the node NM1 is larger than the threshold voltage ( _Vth ) of the transistor 112, the transistor 112 conducts before the image signal is written, and the light emitting element 104 emits light. It ends up. Therefore, it is preferable to provide the transistor 102, and after the potential of the node NM1 is determined, conduct the transistor 102 to cause the light emitting element 104 to emit light.

That is, if the correction filter signal corresponding to the correction filter FIL created by the processing unit 40B is stored in the node NM1, the correction filter signal can be added to the image signal. Thereby, the image signal can be corrected. Since the correction filter signal may be attenuated by an element on the transmission path, it is preferable to generate the correction filter signal in consideration of the attenuation.

Next, an example of the operation method of the pixel 26 will be described with reference to the timing charts shown in FIGS. 12A and 12B. The correction filter signal (Vp) supplied to the signal line SL1 can be any positive or negative signal, but here, a case where a positive potential signal is supplied will be described.

First, the operation of writing the correction filter signal (Vp) to the node NM1 will be described with reference to FIG. 12A.

When the potential of the scanning line GL1 is low, the potential of the scanning line GL2 is high, the potential of the signal line SL2 is low, and the potential of the scanning line GL3 is low at time T1, the transistor 101 conducts and the capacitance element 113 The potential of the other electrode of is low.

This operation is a reset operation for performing a later capacitive coupling operation. Further, before the time T1, the light emitting operation of the light emitting element 104 in the previous frame is performed, but the potential of the node NM1 changes due to the reset operation and the current flowing through the light emitting element 104 changes, so that the transistor 102 is non-conducting. It is preferable to stop the light emission of the light emitting element 104.

When the potential of the scanning line GL1 is high, the potential of the scanning line GL2 is high, the potential of the signal line SL2 is low, and the potential of the scanning line GL3 is low at time T2, the transistor 111 becomes conductive and the signal line SL1 The potential (correction filter signal (Vp)) of is written to the node NM1.

When the potential of the scanning line GL1 is low, the potential of the scanning line GL2 is high, the potential of the signal line SL2 is low, and the potential of the scanning line GL3 is low at time T3, the transistor 111 becomes non-conducting and the node NM1 The correction filter signal (Vp) is held in.

When the potential of the scanning line GL1 is low, the potential of the scanning line GL2 is low, the potential of the signal line SL2 is low, and the potential of the scanning line GL3 is low at time T4, the transistor 101 becomes non-conducting and the correction filter is used. The signal (Vp) writing operation ends.

Next, an operation of correcting the image signal (Vs) and an operation of causing the light emitting element 104 to emit light will be described with reference to FIG. 12B.

When the potential of the scanning line GL1 is low, the potential of the scanning line GL2 is high, the potential of the signal line SL1 is low, and the potential of the scanning line GL3 is low at time T11, the transistor 101 conducts and the capacitance element 113 The potential of the signal line SL2 is added to the potential of the node NM1 by the capacitance coupling of. That is, the node NM1 has a potential (Vs + Vp) in which a correction filter signal (Vp) is added to the image signal (Vs).

When the potential of the scanning line GL1 is low, the potential of the scanning line GL2 is low, the potential of the signal line SL1 is low, and the potential of the scanning line GL3 is low at time T12, the transistor 101 becomes non-conducting and the node NM1 The potential of is determined to be Vs + Vp.

When the potential of the scanning line GL1 is low, the potential of the scanning line GL2 is low, the potential of the signal line SL1 is low, and the potential of the scanning line GL3 is high at time T13, the transistor 102 conducts and the node NA1 becomes conductive. The potential becomes Vs + Vp, and the light emitting element 104 emits light. Strictly speaking, the potential of the node NA1 is lower than Vs + Vp by the threshold voltage (V _th ) of the transistor 112, but here V _th is sufficiently small and can be ignored.

The above is the operation of correcting the image signal (Vs) and the operation of causing the light emitting element 104 to emit light. The correction filter signal (Vp) writing operation and the image signal (Vs) input operation described above may be performed continuously, but after the correction filter signal (Vp) is written to all the pixels, It is also possible to perform an image signal (Vs) input operation.

When the correction operation is not performed, the image signal may be supplied to the signal line SL1 and the light emitting element 104 may be made to emit light by controlling the continuity and non-conduction of the transistor 111 and the transistor 102. At this time, the transistor 101 may always be non-conducting.

<1-6. Pixel configuration example 3>
In the following, another configuration example of the pixel 26 will be described with reference to FIG.

FIG. 13 is a circuit diagram showing a configuration example of the pixel 26 different from that of FIG. The pixel 26 having the configuration shown in FIG. 13 includes a transistor 121, a transistor 122, a transistor 123, a capacitance element 124, a capacitance element 125, and a liquid crystal element 126.

One of the source or drain of the transistor 121 is electrically connected to one electrode of the capacitive element 124. The other electrode of the capacitive element 124 is electrically connected to one of the source or drain of the transistor 122. One of the source or drain of the transistor 122 is electrically connected to one of the source or drain of the transistor 123. The other of the source or drain of the transistor 123 is electrically connected to one electrode of the capacitive element 125. One electrode of the capacitive element 125 is electrically connected to one electrode of the liquid crystal element 126.

Here, the wiring to which the other electrode of the capacitive element 124, one of the source or drain of the transistor 122, and one of the source or drain of the transistor 123 is connected is referred to as a node NM2. Further, the wiring to which one electrode of the capacitance element 125 and one electrode of the liquid crystal element 126 are connected to the source or drain of the transistor 123 is referred to as a node NA2.

The gate of the transistor 121 is electrically connected to the scanning line GL2. The gate of the transistor 122 is electrically connected to the scanning line GL1. The gate of the transistor 123 is electrically connected to the scanning line GL3. The other of the source or drain of the transistor 121 is electrically connected to the signal line SL2. The other of the source or drain of the transistor 122 is electrically connected to the signal line SL1.

The other electrode of the capacitive element 125 is electrically connected to the common wiring 132. The other electrode of the liquid crystal element 126 is electrically connected to the common wiring 133. An arbitrary potential can be supplied to the common wiring 132 and the common wiring 133. Further, the common wiring 132 and the common wiring 133 may be electrically connected.

The transistor 122 and the capacitive element 124 form a memory circuit MEM. The node NM2 is a storage node, and by making the transistor 122 conductive and the transistor 123 non-conductive, the signal supplied to the signal line SL1 can be written to the node NM2. By using a transistor having an extremely low off current for the transistor 122 and the transistor 123, the potential of the node NM2 can be maintained for a long time. For the transistor, for example, an OS transistor can be used.

The OS transistor may be applied to other transistors of the pixel. Further, a Si transistor may be applied to the transistor included in the pixel. Alternatively, both the OS transistor and the Si transistor may be used.

When a reflective liquid crystal element is used as the display element, a silicon substrate can be used, and the Si transistor and the OS transistor can be formed so as to have an overlapping region. Therefore, the pixel density can be improved even if the number of transistors is relatively large.

In the pixel 26, the signal written in the node NM2 is capacitively coupled with the image signal supplied from the signal line SL2 and can be output to the node NA2. The transistor 121 has a function of selecting pixels and supplying an image signal. The transistor 123 has a function as a switch for controlling the operation of the liquid crystal element 126.

When the potential of the signal written from the signal line SL1 to the node NM2 is larger than the threshold value for operating the liquid crystal element 126, the liquid crystal element 126 may operate before the image signal is written. Therefore, it is preferable to provide the transistor 123, and after the potential of the node NM2 is determined, conduct the transistor 123 to operate the liquid crystal element 126.

That is, if the correction filter signal corresponding to the correction filter FIL created by the processing unit 40B is stored in the node NM2, the correction filter signal can be added to the image signal. Thereby, the image signal can be corrected. Since the correction filter signal may be attenuated by an element on the transmission path, it is preferable to generate the correction filter signal in consideration of the attenuation.

Next, an example of the operation method of the pixel 26 will be described with reference to the timing charts shown in FIGS. 14A and 14B. Any positive or negative signal can be used as the correction filter signal (Vp) supplied to the signal line SL1, but a case where a positive potential signal is supplied will be described here.

First, the operation of writing the correction filter signal (Vp) to the node NM2 will be described with reference to FIG. 14A.

When the potential of the scanning line GL1 is high, the potential of the scanning line GL2 is low, the potential of the signal line SL2 is low, and the potential of the scanning line GL3 is high at time T1, the transistor 122 and the transistor 123 are conducted. The potential of node NA2 becomes the potential of signal line SL1. At this time, the operation of the liquid crystal element 126 can be reset by setting the potential of the signal line SL1 as the reset potential (for example, a reference potential such as 0V).

Before the time T1, the display operation of the liquid crystal element 126 in the front frame is performed.

When the potential of the scanning line GL1 is low, the potential of the scanning line GL2 is high, the potential of the signal line SL2 is low, and the potential of the scanning line GL3 is low at time T2, the transistor 121 conducts and the capacitive element 124 The potential of the other electrode of is low. This operation is a reset operation for performing a later capacitive coupling operation.

When the potential of the scanning line GL1 is high, the potential of the scanning line GL2 is high, the potential of the signal line SL2 is low, and the potential of the scanning line GL3 is low at time T3, the transistor 122 becomes conductive and the signal line SL1 The potential (correction filter signal (Vp)) of is written to the node NM2. It is preferable that the potential of the signal line SL1 is set to a desired value (correction filter signal (Vp)) after the time T2 and before the time T3.

When the potential of the scanning line GL1 is low, the potential of the scanning line GL2 is high, the potential of the signal line SL2 is low, and the potential of the scanning line GL3 is low at time T4, the transistor 122 becomes non-conducting and the node NM2 The correction filter signal (Vp) is held in.

When the potential of the scanning line GL1 is low, the potential of the scanning line GL2 is low, the potential of the signal line SL2 is low, and the potential of the scanning line GL3 is low at time T5, the transistor 121 becomes non-conducting and the correction filter The signal (Vp) writing operation ends.

Next, the image signal (Vs) correction operation and the display operation of the liquid crystal element 126 will be described with reference to FIG. 14 (B).

When the potential of the scanning line GL1 is low, the potential of the scanning line GL2 is low, the potential of the signal line SL1 is low, and the potential of the scanning line GL3 is high at time T11, the transistor 123 conducts to the node NA2. The potential of node NM2 is distributed. The correction filter signal (Vp) held in the node NM2 is preferably set in consideration of distribution to the node NA2.

When the potential of the scanning line GL1 is low, the potential of the scanning line GL2 is high, the potential of the signal line SL1 is low, and the potential of the scanning line GL3 is high at time T12, the transistor 121 conducts and the capacitance element 124 The potential of the signal line SL2 is added to the potential of the node NA2 by the capacitance coupling of. That is, the node NA2 becomes a potential (Vs + Vp)'corresponding to the potential at which the correction filter signal (Vp) is added to the image signal (Vs). The potential (Vs + Vp)'includes potential fluctuations due to capacitive coupling of interwiring capacitances.

When the potential of the scanning line GL1 is low, the potential of the scanning line GL2 is low, the potential of the signal line SL1 is low, and the potential of the scanning line GL3 is low at time T13, the transistor 121 becomes non-conducting and the node NA2 The potential (Vs + Vp)'is held in. Then, the liquid crystal element 126 performs a display operation according to the potential.

The above is the description of the image signal (Vs) correction operation and the display operation of the liquid crystal element 126. The correction filter signal (Vp) writing operation and the image signal (Vs) input operation described above may be performed continuously, but after the correction filter signal (Vp) is written to all the pixels, It is also possible to perform an image signal (Vs) input operation.

When the correction operation is not performed, the display operation by the liquid crystal element 126 may be performed by supplying the image signal to the signal line SL1 and controlling the continuity and non-conduction of the transistor 122 and the transistor 123. At this time, the transistor 121 may always be non-conducting.

<1-7. Example of operation method of display device 2>
Next, FIG. 15 shows a specific example of step S01 shown in FIG. 5 (A) and step S11 shown in FIG. 5 (B), that is, an example of a method of creating a correction filter corresponding to one display panel DP. This will be described with reference to the flowchart shown. For example, the first correction filter which is the correction filter corresponding to the display panel DP [1,1] and the second correction filter which is the correction filter corresponding to the display panel DP [2,1] are shown in FIG. It can be created by the method. The correction filter created by the method shown in FIG. 15 has, for example, a function of correcting image data so as to reduce display unevenness of the image displayed on the display panel DP.

First, the brightness of the light emitted from the pixels provided on the display panel DP is measured for a plurality of gradation values. Here, the brightness of the light is measured using a luminance meter or the like (step S21). Next, for example, the processing unit 40A or the processing unit 40B acquires data on the correspondence between the brightness of the light emitted from the pixels and the gradation value based on the measurement result (step S22). 16 (A-1) and 16 (B-1) are graphs showing the relationship between the brightness of the light emitted from the pixels and the gradation value, and are the plots shown in FIG. 16 (A-1). Is the brightness measured in step S21. The solid line shown in FIG. 16 (B-1) is the brightness of the light emitted from the pixel and the scale calculated in step S22 based on the measurement result shown in FIG. 16 (A-1). It is the correspondence between the adjustment price and.

Here, in step S21, the brightness of the light emitted from the pixel may be measured for all the gradation values. For example, when the gradation value that can be expressed by the pixel is 0 to 255, the brightness of the light emitted from the pixel may be measured for all the gradation values 0 to 255. Alternatively, the brightness of the light emitted from the pixel may be measured for some gradation values. Even when measuring the luminance for some gradation values, it is preferable to measure the luminance for white, black, and intermediate gradations in order to improve the accuracy of the corresponding data. For example, when the gradation value that can be expressed by the pixel is 0 to 255, the brightness of the light emitted from the pixel can be measured for the gradation value 0, the gradation value 127, and the gradation value 255. preferable.

The correspondence data shown in FIG. 16 (B-1) can be obtained, for example, by regression analysis based on the measurement results shown in FIG. 16 (A-1). For example, it can be obtained by curve regression analysis. Alternatively, it can be acquired using, for example, a neural network, for example, a fully connected neural network. By acquiring the correspondence data shown in FIG. 16 (B-1) using a neural network, the accuracy of the correspondence data can be improved even if the number of measurement points shown in FIG. 16 (A-1) is small. it can.

FIG. 16A-2 shows the measured values when measuring the brightness of the light emitted from the pixels for each of the red (R), green (G), and blue (B) in step S21. FIG. 16 (B-2) is calculated for each of red (R), green (G), and blue (B) in step S22 based on the measurement results shown in FIG. 16 (A-2). This is the correspondence between the brightness of the light emitted from the pixel and the gradation value.

As shown in FIGS. 16A-2 and 16B-2, highly accurate data is obtained by acquiring data on the correspondence between the brightness and the gradation value for each color of the light emitted from the pixels. It is possible to create a correction filter that can be corrected.

17 (A), (B), and (C) show an example of the position of the pixel for measuring the brightness of the emitted light in step S21. Here, the pixel unit 21 indicates a pixel unit provided on one display panel DP, such as the pixel unit 21A and the pixel unit 21B. The brightness of the light emitted from the pixels included in the region 27 shown in FIGS. 17A, 17B, and 17C is measured in step S21.

As shown in FIG. 17A, the brightness of the light emitted from the pixels may be measured so as to include the central portion of the pixel portion 21. Alternatively, as shown in FIG. 17B, a plurality of locations of the pixel portion 21, for example, four locations of upper left, upper right, lower left, and lower right may be measured. Alternatively, as shown in FIG. 17C, the entire pixel portion 21 may be measured. When the total area of the region 27 is small, the brightness of the light emitted from the pixel can be measured by a simple method. On the other hand, when the total area of the region 27 is large, a correction filter capable of highly accurate correction can be created.

When measuring the brightness of the light emitted from a pixel for a plurality of pixels, for example, the brightness of the light emitted from the pixel and the brightness of the light emitted from the pixel are determined based on the average value of the brightness of the light emitted from each pixel. The data of the correspondence relationship with the gradation value can be acquired in step S22.

After the end of step S22, an image having a specific gradation value is displayed on the pixel unit 21, and the brightness of the light emitted from the pixel is measured by using a two-dimensional luminance meter or the like to acquire the luminance data ( Step S23). For example, the brightness data is acquired by measuring the brightness of the light emitted from all the pixels provided in the pixel unit 21 using a two-dimensional luminance meter or the like.

When an image having the same gradation value of all pixels is displayed on the pixel unit 21 as an image having a specific gradation value, the brightness of light emitted from all the pixels provided on one display panel DP is the same. Is preferable. However, the brightness of the light emitted from the pixel may vary due to the variation in the characteristics of the transistor of the pixel, the variation in the characteristics of the display element, and the like. In step S23, the luminance data is acquired in order to acquire the information regarding the variation in the luminance of the light emitted from the pixels between the pixels.

Next, using the brightness data acquired in step S23 and the correspondence data acquired in step S22, a correction filter for correcting the variation in the brightness of the light emitted from the pixels between pixels is processed. Created by the unit (step S24). For example, if the luminance of a pixel at the gradation value 127, which can be read from the luminance data, is 100, and the luminance at the gradation value 127 is 120 in the corresponding data, the luminance of a certain pixel is 1.2 times. Create a correction filter to do so.

Here, in step S22, for example, for all the gradation values, the data of the correspondence relationship with the brightness is acquired. Therefore, in step S23, by displaying two or more types of images and acquiring luminance data for each image, it is possible to create a correction filter capable of performing correction with higher accuracy. For example, when the gradation value that can be expressed by a pixel is 0 to 255, in step S23, an image in which the gradation of all pixels is 0, an image in which the gradation of all pixels is 127, and all pixels. Brightness data can be acquired for each of the images having a gradation of 255. In order to simplify the measurement of the light brightness in step S23, the number of types of brightness data acquired in step S23 may be less than the number of gradation values obtained by measuring the light brightness in step S21. preferable.

After that, the image data is input to the processing unit 40A or the processing unit 40B, and the input image data is corrected by using the correction filter created in step S24 (step S25). Here, it is preferable that the image data input to the processing unit 40A or the processing unit 40B is, for example, image data corresponding to an image having a specific gradation value. For example, it is preferable to use image data corresponding to an image having the same gradation as the image displayed in step S23.

Next, the image corresponding to the image data corrected in step S25 is displayed on the pixel unit 21, and the brightness of the light emitted from the pixel is measured using a two-dimensional luminance meter or the like in the same manner as in step S23. (Step S26). After that, the brightness corresponding to the corrected image measured in step S26 and the brightness calculated from the correspondence data acquired in step S22 are compared for each pixel. For example, if the difference between the brightness corresponding to the corrected image and the brightness calculated from the correspondence data acquired in step S22 is less than a certain value, it is assumed that the correction accuracy is equal to or higher than the specified value. Finish creating the correction filter. On the other hand, if the difference between the brightness corresponding to the corrected image and the brightness calculated from the correspondence data acquired in step S22 is a certain value or more, it is assumed that the correction accuracy is less than the specified value. Step S24 and step S27 are performed again, and the correction filter is created again (step S27). The above is an example of a method for creating a correction filter used in the display device 10A and the display device 10B. In addition, step S26 and step S27 may be omitted.

When two or more types of images are displayed in step S23, the brightness of the light emitted from the pixels for each image can be measured in step S26, and the accuracy of correction can be determined for each image in step S27. preferable.

The above is a specific example of step S01 shown in FIG. 5 (A) and step S11 shown in FIG. 5 (B), that is, an example of a method of creating a correction filter corresponding to one display panel DP.

By creating the correction filter by the method shown in FIG. 15, for example, the display unevenness of the displayed image can be reduced, so that the display quality of the display device of one aspect of the present invention can be improved.

This embodiment can be carried out in combination with the configurations described in other embodiments and the like as appropriate.

(Embodiment 2)
In the present embodiment, a configuration example of a display device using a liquid crystal element and a configuration example of a display device using an EL element will be described. In the present embodiment, the description of the elements, operations, and functions of the display device described in the first embodiment will be omitted.

18 (A) and 18 (B) are cross-sectional views showing a configuration example of a display device according to an aspect of the present invention. The display devices shown in FIGS. 18A and 18B have an electrode 4015, and the electrode 4015 is electrically connected to a terminal of the FPC 4018 via an anisotropic conductive layer 4019. Further, in FIGS. 18A and 18B, the electrode 4015 is electrically connected to the wiring 4014 at the openings formed in the insulating layer 4112, the insulating layer 4111, and the insulating layer 4110.

The electrode 4015 is formed of the same conductive layer as the first electrode layer 4030, and the wiring 4014 is formed of the same conductive layer as the transistor 4010 and the source electrode and drain electrode of the transistor 4011.

Further, the display unit 215 and the scanning line drive circuit 221 provided on the first substrate 4001 have a plurality of transistors, and are included in the display unit 215 in FIGS. 18A and 18B. The transistor 4010 and the transistor 4011 included in the scanning line drive circuit 221 are illustrated. Although the bottom gate type transistor is illustrated as the transistor 4010 and the transistor 4011 in FIGS. 18A and 18B, the top gate type transistor may be used.

In FIGS. 18A and 18B, an insulating layer 4112 is provided on the transistor 4010 and the transistor 4011. Further, in FIG. 18B, a partition wall 4510 is formed on the insulating layer 4112.

Further, the transistor 4010 and the transistor 4011 are provided on the insulating layer 4102. Further, the transistor 4010 and the transistor 4011 have an electrode 4017 formed on the insulating layer 4111. Electrode 4017 can function as a backgate electrode.

Further, the display device shown in FIGS. 18A and 18B has a capacitance element 4020. The capacitive element 4020 has an electrode 4021 formed in the same process as the gate electrode of the transistor 4010, and an electrode formed in the same process as the source electrode and the drain electrode. Each electrode has an overlapping region via an insulating layer 4103.

Generally, the capacitance of the capacitance element provided in the pixel portion of the display device is set so that the electric charge can be held for a predetermined period in consideration of the leakage current of the transistor arranged in the pixel portion. The capacitance of the capacitive element may be set in consideration of the off-current of the transistor and the like.

The transistor 4010 provided on the display unit 215 is electrically connected to the display element. FIG. 18A is an example of a liquid crystal display device using a liquid crystal element as a display element. In FIG. 18A, the liquid crystal element 4013, which is a display element, includes a first electrode layer 4030, a second electrode layer 4031, and a liquid crystal layer 4008. An insulating layer 4032 and an insulating layer 4033 that function as an alignment film are provided so as to sandwich the liquid crystal layer 4008. The second electrode layer 4031 is provided on the side of the second substrate 4006, and the first electrode layer 4030 and the second electrode layer 4031 are superimposed via the liquid crystal layer 4008.

Further, the spacer 4035 is a columnar spacer obtained by selectively etching the insulating layer, and is provided to control the distance (cell gap) between the first electrode layer 4030 and the second electrode layer 4031. ing. A spherical spacer may be used.

Further, if necessary, an optical member (optical substrate) such as a black matrix (light-shielding layer), a colored layer (color filter), a polarizing member, a retardation member, and an antireflection member may be appropriately provided. For example, circular polarization using a polarizing substrate and a retardation substrate may be used. Further, a backlight, a side light or the like may be used as the light source. Further, a micro LED or the like may be used as the backlight and the side light.

In the display device shown in FIG. 18A, a light-shielding layer 4132, a colored layer 4131, and an insulating layer 4133 are provided between the second substrate 4006 and the second electrode layer 4031.

Examples of the material that can be used as the light-shielding layer include carbon black, titanium black, metal, metal oxide, and composite oxide containing a solid solution of a plurality of metal oxides. The light-shielding layer may be a film containing a resin material or a thin film of an inorganic material such as metal. Further, as the light-shielding layer, a laminated film of a film containing a material of a colored layer can also be used. For example, a laminated structure of a film containing a material used for a colored layer that transmits light of a certain color and a film containing a material used for a colored layer that transmits light of another color can be used. By using the same material for the colored layer and the light-shielding layer, it is preferable because the device can be shared and the process can be simplified.

Examples of the material that can be used for the colored layer include a metal material, a resin material, a resin material containing a pigment or a dye, and the like. The light-shielding layer and the colored layer may be formed in the same manner as in the method for forming each layer described above. For example, it may be performed by an inkjet method or the like.

Further, the display device shown in FIGS. 18A and 18B has an insulating layer 4111 and an insulating layer 4104. As the insulating layer 4111 and the insulating layer 4104, an insulating layer that does not easily transmit impurity elements is used. By sandwiching the semiconductor layer of the transistor between the insulating layer 4111 and the insulating layer 4104, it is possible to prevent the infiltration of impurities from the outside.

Further, as a display element included in the display device, a light emitting element (EL element) utilizing electroluminescence can be applied. The EL element has a layer (also referred to as an "EL layer") containing a luminescent compound between a pair of electrodes. When a potential difference larger than the threshold voltage of the EL element is generated between the pair of electrodes, holes are injected into the EL layer from the anode side and electrons are injected from the cathode side. The injected electrons and holes are recombined in the EL layer, and the luminescent compound contained in the EL layer emits light.

Further, the EL element is distinguished by whether the light emitting material is an organic compound or an inorganic compound, and the former is generally called an organic EL element and the latter is called an inorganic EL element.

In the organic EL element, by applying a voltage, electrons are injected into the EL layer from one electrode and holes are injected into the EL layer from the other electrode. Then, when these carriers (electrons and holes) are recombined, the luminescent organic compound forms an excited state, and when the excited state returns to the ground state, it emits light. From such a mechanism, such a light emitting element is called a current excitation type light emitting element.

In addition to the luminescent compound, the EL layer is a substance having a high hole injecting property, a substance having a high hole transporting property, a hole blocking material, a substance having a high electron transporting property, a substance having a high electron injecting property, or a bipolar. It may have a sex substance (a substance having high electron transport property and hole transport property) and the like.

The EL layer can be formed by a method such as a vapor deposition method (including a vacuum vapor deposition method), a transfer method, a printing method, an inkjet method, or a coating method.

The inorganic EL element is classified into a dispersed inorganic EL element and a thin film type inorganic EL element according to the element configuration. The dispersed inorganic EL element has a light emitting layer in which particles of a light emitting material are dispersed in a binder, and the light emitting mechanism is donor-acceptor recombination type light emission utilizing a donor level and an acceptor level. The thin film type inorganic EL element has a structure in which a light emitting layer is sandwiched between dielectric layers and further sandwiched between electrodes, and the light emitting mechanism is localized light emission utilizing the inner shell electronic transition of metal ions. Here, an organic EL element will be used as the light emitting element.

In order to extract light emitted from the light emitting element, at least one of the pair of electrodes may be transparent. Then, a top emission (top emission) structure in which a transistor and a light emitting element are formed on the substrate and light emission is taken out from the surface opposite to the substrate, and a bottom injection (bottom emission) structure in which light emission is taken out from the surface on the substrate side. , There is a light emitting element having a double-sided injection (dual emission) structure that extracts light emission from both sides, and any light emitting element having an injection structure can be applied.

FIG. 18B is an example of a light emitting display device (also referred to as “EL display device”) using a light emitting element as a display element. The light emitting element 4513, which is a display element, is electrically connected to the transistor 4010 provided in the display unit 215. The configuration of the light emitting element 4513 is a laminated structure of the first electrode layer 4030, the light emitting layer 4511, and the second electrode layer 4031, but is not limited to this configuration. The configuration of the light emitting element 4513 can be appropriately changed according to the direction of the light extracted from the light emitting element 4513 and the like.

The partition wall 4510 is formed by using an organic insulating material or an inorganic insulating material. In particular, it is preferable to use a photosensitive resin material to form an opening on the first electrode layer 4030 so that the side surface of the opening becomes an inclined surface formed with a continuous curvature.

The light emitting layer 4511 may be composed of a single layer or may be configured such that a plurality of layers are laminated.

The emission color of the light emitting element 4513 can be white, red, green, blue, cyan, magenta, yellow, or the like, depending on the material constituting the light emitting layer 4511.

As a method of realizing color display, there are a method of combining a light emitting element 4513 having a white light emitting color and a colored layer, and a method of providing a light emitting element 4513 having a different light emitting color for each pixel. The former method is more productive than the latter method. On the other hand, in the latter method, since it is necessary to create the light emitting layer 4511 separately for each pixel, the productivity is inferior to that of the former method. However, in the latter method, it is possible to obtain an luminescent color having higher color purity than the former method. In addition to the latter method, the color purity can be further increased by imparting a microcavity structure to the light emitting element 4513.

The light emitting layer 4511 may have an inorganic compound such as a quantum dot. For example, by using quantum dots in the light emitting layer, it can function as a light emitting material.

A protective layer may be formed on the second electrode layer 4031 and the partition wall 4510 so that oxygen, hydrogen, water, carbon dioxide, etc. do not enter the light emitting element 4513. As the protective layer, silicon nitride, silicon nitride, aluminum oxide, aluminum nitride, aluminum nitride, aluminum nitride, DLC (Diamond Like Carbon) and the like can be formed. Further, a filler 4514 is provided and sealed in the space sealed by the first substrate 4001, the second substrate 4006, and the sealing material 4005. As described above, it is preferable to package (enclose) with a protective film (bonded film, ultraviolet curable resin film, etc.) or a cover material having high airtightness and little degassing so as not to be exposed to the outside air.

As the filler 4514, in addition to an inert gas such as nitrogen or argon, an ultraviolet curable resin or a thermosetting resin can be used, and PVC (polyvinyl chloride), acrylic resin, polyimide, epoxy resin, silicone resin can be used. , PVB (polyvinyl butyral), EVA (ethylene vinyl acetate) and the like can be used. Further, the filler 4514 may contain a desiccant.

As the sealing material 4005, a glass material such as glass frit, a curable resin such as a two-component mixed type resin that cures at room temperature, a photocurable resin, and a resin material such as a thermosetting resin can be used. Further, the sealing material 4005 may contain a desiccant.

If necessary, an optical film such as a polarizing plate or a circular polarizing plate (including an elliptical polarizing plate), a retardation plate (λ / 4 plate, λ / 2 plate), and a color filter is attached to the ejection surface of the light emitting element. It may be provided as appropriate. Further, an antireflection film may be provided on the polarizing plate or the circular polarizing plate. For example, it is possible to apply an anti-glare treatment that can diffuse the reflected light due to the unevenness of the surface and reduce the reflection.

Further, by making the light emitting element have a microcavity structure, it is possible to extract light having high color purity. Further, by combining the microcavity structure and the color filter, the reflection can be reduced and the visibility of the displayed image can be improved.

In the first electrode layer and the second electrode layer (also referred to as a pixel electrode layer, a common electrode layer, a counter electrode layer, etc.) for applying a voltage to the display element, the direction of the light to be taken out, the place where the electrode layer is provided, and Translucency and reflectivity may be selected according to the pattern structure of the electrode layer.

The first electrode layer 4030 and the second electrode layer 4031 are indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide, and indium containing titanium oxide. A translucent conductive material such as tin oxide, indium zinc oxide, and indium tin oxide to which silicon oxide is added can be used.

Further, the first electrode layer 4030 and the second electrode layer 4031 are tungsten (W), molybdenum (Mo), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), and tantalum (Ta). , Chromium (Cr), Cobalt (Co), Nickel (Ni), Titanium (Ti), Platinum (Pt), Aluminum (Al), Copper (Cu), Silver (Ag) and other metals, or alloys thereof, or their alloys. It can be formed from metal nitride using one or more.

Further, as the first electrode layer 4030 and the second electrode layer 4031, a conductive composition containing a conductive polymer (also referred to as a conductive polymer) can be used. As the conductive polymer, a so-called π-electron conjugated conductive polymer can be used. Examples thereof include polyaniline or a derivative thereof, polypyrrole or a derivative thereof, polythiophene or a derivative thereof, or a copolymer composed of two or more kinds of aniline, pyrrole and thiophene or a derivative thereof.

Further, since the transistor is easily destroyed by static electricity or the like, it is preferable to provide a protection circuit for protecting the drive circuit. The protection circuit is preferably configured by using a non-linear element.

This embodiment can be implemented in combination with the configurations described in other embodiments and the like as appropriate.

(Embodiment 3)
In this embodiment, an example of a transistor that can be used in place of each of the transistors shown in the above embodiment will be described with reference to the drawings.

The display device of one aspect of the present invention can be manufactured by using various types of transistors such as a bottom gate type transistor and a top gate type transistor. Therefore, the material of the semiconductor layer and the transistor structure to be used can be easily replaced according to the existing production line.

[Bottom gate type transistor]
FIG. 19 (A1) is a cross-sectional view of a channel protection type transistor 810, which is a kind of bottom gate type transistor, in the channel length direction. In FIG. 19 (A1), the transistor 810 is formed on the substrate 771. Further, the transistor 810 has an electrode 746 on the substrate 771 via an insulating layer 772. Further, the semiconductor layer 742 is provided on the electrode 746 via the insulating layer 726. The electrode 746 can function as a gate electrode. The insulating layer 726 can function as a gate insulating layer.

Further, the insulating layer 741 is provided on the channel forming region of the semiconductor layer 742. Further, the electrode 744a and the electrode 744b are provided on the insulating layer 726 in contact with a part of the semiconductor layer 742. The electrode 744a can function as either a source electrode or a drain electrode. The electrode 744b can function as the other of the source electrode and the drain electrode. A part of the electrode 744a and a part of the electrode 744b are formed on the insulating layer 741.

The insulating layer 741 can function as a channel protection layer. By providing the insulating layer 741 on the channel forming region, it is possible to prevent the semiconductor layer 742 from being exposed when the electrodes 744a and 744b are formed. Therefore, it is possible to prevent the channel formation region of the semiconductor layer 742 from being etched when the electrodes 744a and 744b are formed. According to one aspect of the present invention, a transistor having good electrical characteristics can be realized.

Further, the transistor 810 has an insulating layer 728 on the electrodes 744a, 744b and the insulating layer 741, and has an insulating layer 729 on the insulating layer 728.

When an oxide semiconductor is used for the semiconductor layer 742, a material capable of depriving a part of the semiconductor layer 742 of oxygen and causing oxygen deficiency is used at least in the portion of the electrode 744a and the electrode 744b in contact with the semiconductor layer 742. Is preferable. The carrier concentration increases in the region where oxygen deficiency occurs in the semiconductor layer 742, and the region becomes n-type and becomes an n-type region (n ⁺ layer). Therefore, the region can function as a source region or a drain region. When an oxide semiconductor is used for the semiconductor layer 742, tungsten, titanium and the like can be mentioned as an example of a material capable of depriving the semiconductor layer 742 of oxygen and causing oxygen deficiency.

By forming the source region and the drain region in the semiconductor layer 742, the contact resistance between the electrodes 744a and 744b and the semiconductor layer 742 can be reduced. Therefore, the electrical characteristics of the transistor such as the field effect mobility and the threshold voltage can be improved.

When a semiconductor such as silicon is used for the semiconductor layer 742, it is preferable to provide a layer that functions as an n-type semiconductor or a p-type semiconductor between the semiconductor layer 742 and the electrode 744a and between the semiconductor layer 742 and the electrode 744b. The layer that functions as an n-type semiconductor or a p-type semiconductor can function as a source region or a drain region of a transistor.

The insulating layer 729 is preferably formed by using a material having a function of preventing or reducing the diffusion of impurities from the outside into the transistor. The insulating layer 729 may be omitted if necessary.

The transistor 811 shown in FIG. 19 (A2) is different from the transistor 810 in that it has an electrode 723 that can function as a back gate electrode on the insulating layer 729. The electrode 723 can be formed by the same material and method as the electrode 746.

Generally, the back gate electrode is formed of a conductive layer, and is arranged so as to sandwich the channel formation region of the semiconductor layer between the gate electrode and the back gate electrode. Therefore, the back gate electrode can function in the same manner as the gate electrode. The potential of the back gate electrode may be the same as the potential of the gate electrode, the ground potential (GND potential), or any potential. Further, the threshold voltage of the transistor can be changed by changing the potential of the back gate electrode independently without interlocking with the gate electrode.

Further, both the electrode 746 and the electrode 723 can function as gate electrodes. Therefore, the insulating layer 726, the insulating layer 728, and the insulating layer 729 can each function as a gate insulating layer. The electrode 723 may be provided between the insulating layer 728 and the insulating layer 729.

When one of the electrode 746 or the electrode 723 is referred to as a "gate electrode", the other is referred to as a "back gate electrode". For example, in the transistor 811, when the electrode 723 is referred to as a “gate electrode”, the electrode 746 is referred to as a “back gate electrode”. Further, when the electrode 723 is used as the "gate electrode", the transistor 811 can be considered as a kind of top gate type transistor. Further, either one of the electrode 746 and the electrode 723 may be referred to as a "first gate electrode", and the other may be referred to as a "second gate electrode".

By providing the electrodes 746 and 723 with the semiconductor layer 742 sandwiched between them, and further by setting the electrodes 746 and 723 to the same potential, the region in which the carriers flow in the semiconductor layer 742 becomes larger in the film thickness direction. The amount of carrier movement increases. As a result, the on-current of the transistor 811 becomes large, and the field effect mobility becomes high.

Therefore, the transistor 811 is a transistor having a large on-current with respect to the occupied area. That is, the occupied area of the transistor 811 can be reduced with respect to the required on-current. According to one aspect of the present invention, the occupied area of the transistor can be reduced. Therefore, according to one aspect of the present invention, a semiconductor device having a high degree of integration can be realized.

Further, since the gate electrode and the back gate electrode are formed of a conductive layer, they have a function of preventing an electric field generated outside the transistor from acting on the semiconductor layer in which a channel is formed (particularly, an electric field shielding function against static electricity or the like). .. The electric field shielding function can be enhanced by forming the back gate electrode larger than the semiconductor layer and covering the semiconductor layer with the back gate electrode.

Further, by forming the back gate electrode with a conductive film having a light-shielding property, it is possible to prevent light from entering the semiconductor layer from the back gate electrode side. Therefore, it is possible to prevent photodegradation of the semiconductor layer and prevent deterioration of electrical characteristics such as a shift of the threshold voltage of the transistor.

According to one aspect of the present invention, a transistor having good reliability can be realized. In addition, a semiconductor device with good reliability can be realized.

FIG. 19 (B1) is a cross-sectional view in the channel length direction of the channel protection type transistor 820 having a configuration different from that of FIG. 19 (A1). The transistor 820 has substantially the same structure as the transistor 810, except that the insulating layer 741 covers the end portion of the semiconductor layer 742. Further, the semiconductor layer 742 and the electrode 744a are electrically connected to each other in the opening formed by selectively removing a part of the insulating layer 741 having a region overlapping the semiconductor layer 742. Further, the semiconductor layer 742 and the electrode 744b are electrically connected to each other in another opening formed by selectively removing a part of the insulating layer 741 having a region overlapping the semiconductor layer 742. The region of the insulating layer 741 that overlaps the channel forming region can function as a channel protection layer.

The transistor 821 shown in FIG. 19 (B2) is different from the transistor 820 in that it has an electrode 723 on the insulating layer 729 that can function as a back gate electrode.

By providing the insulating layer 741, it is possible to prevent the semiconductor layer 742 from being exposed when the electrodes 744a and 744b are formed. Therefore, it is possible to prevent the semiconductor layer 742 from being thinned when the electrodes 744a and 744b are formed.

Further, the transistor 820 and the transistor 821 have a longer distance between the electrode 744a and the electrode 746 and a distance between the electrode 744b and the electrode 746 than the transistor 810 and the transistor 811. Therefore, the parasitic capacitance generated between the electrode 744a and the electrode 746 can be reduced. In addition, the parasitic capacitance generated between the electrode 744b and the electrode 746 can be reduced. According to one aspect of the present invention, a transistor having good electrical characteristics can be realized.

FIG. 19 (C1) is a cross-sectional view of a channel etching type transistor 825, which is one of the bottom gate type transistors, in the channel length direction. The transistor 825 forms the electrode 744a and the electrode 744b without providing the insulating layer 741. Therefore, a part of the semiconductor layer 742 exposed at the time of forming the electrode 744a and the electrode 744b may be etched. On the other hand, since the insulating layer 741 is not provided, the productivity of the transistor can be improved.

The transistor 826 shown in FIG. 19 (C2) differs from the transistor 825 in that it has an electrode 723 that can function as a back gate electrode on the insulating layer 729.

20 (A1) to 20 (C2) show cross-sectional views of the transistor 810, the transistor 811, the transistor 820, the transistor 821, and the transistor 825 and the transistor 826 in the channel width direction, respectively.

In the structures shown in FIGS. 20 (B2) and 20 (C2), the gate electrode and the back gate electrode are connected, and the potentials of the gate electrode and the back gate electrode are the same. Further, the semiconductor layer 742 is sandwiched between the gate electrode and the back gate electrode.

The length of each of the gate electrode and the back gate electrode in the channel width direction is longer than the length in the channel width direction of the semiconductor layer 742, and the entire channel width direction of the semiconductor layer 742 is the insulating layer 726, the insulating layer 741, and the insulating layer. The structure is such that the 728 and the insulating layer 729 are sandwiched between the gate electrode and the back gate electrode.

With this configuration, the semiconductor layer 742 included in the transistor can be electrically surrounded by the electric fields of the gate electrode and the back gate electrode.

Surrounded channel (S-channel) is a device structure of a transistor that electrically surrounds a semiconductor layer 742 in which a channel forming region is formed by an electric field of a gate electrode and a back gate electrode, such as transistor 811 and transistor 821, and transistor 826. It can be called a structure.

By adopting the S-channel structure, an electric field for inducing a channel by one or both of the gate electrode and the back gate electrode can be effectively applied to the semiconductor layer 742, so that the current driving ability of the transistor is improved. , It is possible to obtain high on-current characteristics. Further, since the on-current can be increased, the transistor can be miniaturized. Further, the mechanical strength of the transistor can be increased by adopting the S-channel structure.

[Top gate type transistor]
The transistor 842 illustrated in FIG. 21 (A1) is one of the top gate type transistors. The transistor 842 forms the electrode 744a and the electrode 744b after forming the insulating layer 729. The electrodes 744a and 744b are electrically connected to the semiconductor layer 742 at the openings formed in the insulating layer 728 and the insulating layer 729.

Further, by removing a part of the insulating layer 726 that does not overlap with the electrode 746 and using the electrode 746 and the remaining insulating layer 726 as a mask to introduce impurities into the semiconductor layer 742, the impurities are introduced into the semiconductor layer 742. Impurity regions can be formed in a self-aligned manner. The transistor 842 has a region in which the insulating layer 726 extends beyond the end of the electrode 746. The impurity concentration in the region where impurities are introduced through the insulating layer 726 of the semiconductor layer 742 is smaller than that in the region where impurities are introduced without passing through the insulating layer 726. In the semiconductor layer 742, an LDD (Lightly Doped Drain) region is formed in a region that does not overlap with the electrode 746.

The transistor 843 shown in FIG. 21 (A2) is different from the transistor 842 in that it has an electrode 723. Transistor 843 has an electrode 723 formed on the substrate 771. The electrode 723 has a region that overlaps with the semiconductor layer 742 via the insulating layer 772. The electrode 723 can function as a backgate electrode.

Further, as in the transistor 844 shown in FIG. 21 (B1) and the transistor 845 shown in FIG. 21 (B2), the insulating layer 726 in the region not overlapping with the electrode 746 may be completely removed. Further, the insulating layer 726 may be left as shown in the transistor 846 shown in FIG. 21 (C1) and the transistor 847 shown in FIG. 21 (C2).

In the transistors 842 to 847, after forming the electrode 746, impurities are introduced into the semiconductor layer 742 using the electrode 746 as a mask, so that an impurity region can be formed in the semiconductor layer 742 in a self-aligned manner. According to one aspect of the present invention, a transistor having good electrical characteristics can be realized. Further, according to one aspect of the present invention, a semiconductor device having a high degree of integration can be realized.

22 (A1) to 22 (C2) show cross-sectional views of transistors 842 to 847 in the channel width direction, respectively.

The transistor 843, the transistor 845, and the transistor 847 each have an S-channel structure described above. However, the present invention is not limited to this, and the transistor 843, the transistor 845, and the transistor 847 do not have to have an S-channel structure.

This embodiment can be implemented in combination with the configurations described in other embodiments and the like as appropriate.

(Embodiment 4)
In this embodiment, a detailed configuration example of the OS transistor will be described.

The semiconductor layer of the OS transistor is an In-M-Zn-based oxide containing, for example, indium, zinc and M (metals such as aluminum, titanium, gallium, germanium, yttrium, zirconium, lanthanum, cerium, tin, neodymium or hafnium). It can be a film represented by.

When the oxide semiconductor constituting the semiconductor layer is an In-M-Zn-based oxide, the atomic number ratio of the metal element of the sputtering target used for forming the In-M-Zn oxide is In ≥ M, Zn. It is preferable that ≧ M is satisfied. The atomic number ratio of the metal element of such a sputtering target is In: M: Zn = 1: 1: 1, In: M: Zn = 1: 1: 1.2, In: M: Zn = 3: 1: 1. 2, In: M: Zn = 4: 2: 3, In: M: Zn = 4: 2: 4.1, In: M: Zn = 5: 1: 6, In: M: Zn = 5: 1: 7. In: M: Zn = 5: 1: 8 and the like are preferable. The atomic number ratio of the semiconductor layer to be formed includes a variation of plus or minus 40% of the atomic number ratio of the metal element contained in the sputtering target.

As the semiconductor layer, an oxide semiconductor having a low carrier density is used. For example, the semiconductor layer has a carrier density of 1 × 10 ¹⁷ / cm ³ or less, preferably 1 × 10 ¹⁵ / cm ³ or less, more preferably 1 × 10 ¹³ / cm ³ or less, and more preferably 1 × 10 ¹¹ / cm. ³ or less, more preferably less than 1 × ^{10 10} / cm ^3, it is possible to use an oxide semiconductor of 1 × ¹⁰ -9 / cm ³ or more carrier density. Such oxide semiconductors are referred to as high-purity intrinsic or substantially high-purity intrinsic oxide semiconductors. It can be said that the oxide semiconductor is an oxide semiconductor having a low defect level density and stable characteristics.

Not limited to these, a transistor having an appropriate composition may be used according to the required semiconductor characteristics and electrical characteristics (field effect mobility, threshold voltage, etc.) of the transistor. Further, in order to obtain the required semiconductor characteristics of the transistor, it is preferable that the carrier density, impurity concentration, defect density, atomic number ratio of metal element and oxygen, interatomic distance, density, etc. of the semiconductor layer are appropriate. ..

When silicon or carbon, which is one of the Group 14 elements, is contained in the oxide semiconductor constituting the semiconductor layer, oxygen deficiency increases and the oxide semiconductor becomes n-type. Therefore, the concentration of silicon or carbon in the semiconductor layer (concentration obtained by secondary ion mass spectrometry) is set to 2 × 10 ¹⁸ atoms / cm ³ or less, preferably 2 × 10 ¹⁷ atoms / cm ³ or less.

Further, alkali metals and alkaline earth metals may generate carriers when combined with oxide semiconductors, which may increase the off-current of the transistor. Therefore, the concentration of alkali metal or alkaline earth metal in the semiconductor layer (concentration obtained by secondary ion mass spectrometry) is 1 × 10 ¹⁸ atoms / cm ³ or less, preferably 2 × 10 ¹⁶ atoms / cm ³ or less. To.

Further, when nitrogen is contained in the oxide semiconductor constituting the semiconductor layer, electrons as carriers are generated, the carrier density is increased, and the n-type is easily formed. As a result, a transistor using an oxide semiconductor containing nitrogen tends to have a normally-on characteristic. Therefore, the nitrogen concentration in the semiconductor layer (concentration obtained by secondary ion mass spectrometry) is preferably 5 × 10 ¹⁸ atoms / cm ³ or less.

Further, the semiconductor layer may have a non-single crystal structure, for example. Non-single crystal structures include, for example, CAAC-OS (C-Axis Aligned Crystalline Oxide Semiconductor), polycrystalline structure, microcrystalline structure, or amorphous structure having crystals oriented on the c-axis. In the non-single crystal structure, the amorphous structure has the highest defect level density, and CAAC-OS has the lowest defect level density.

An oxide semiconductor film having an amorphous structure has, for example, a disordered atomic arrangement and no crystal component. Alternatively, the oxide film having an amorphous structure has, for example, a completely amorphous structure and has no crystal portion.

Even if the semiconductor layer is a mixed film having two or more of an amorphous structure region, a microcrystal structure region, a polycrystalline structure region, a CAAC-OS region, and a single crystal structure region. Good. The mixed film may have, for example, a single-layer structure or a laminated structure including any two or more of the above-mentioned regions.

In the following, the configuration of CAC (Cloud-Aligned Composite) -OS, which is one aspect of a non-single crystal semiconductor layer, will be described.

The CAC-OS is, for example, a composition of a material in which the elements constituting the oxide semiconductor are unevenly distributed in a size of 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 2 nm or less, or a size close thereto. In the following, in the oxide semiconductor, one or more metal elements are unevenly distributed, and the region having the metal elements is 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 2 nm or less, or a size in the vicinity thereof. The state of being mixed with is also referred to as a mosaic shape or a patch shape.

The oxide semiconductor preferably contains at least indium. In particular, it preferably contains indium and zinc. In addition to them, aluminum, gallium, yttrium, copper, vanadium, beryllium, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lantern, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, etc. One or more selected from the above may be included.

For example, CAC-OS in In-Ga-Zn oxide (In-Ga-Zn oxide may be particularly referred to as CAC-IGZO in CAC-OS) is indium oxide (hereinafter, InO). _X1 (X1 is a real number larger than 0), or indium zinc oxide (hereinafter, In _X2 Zn _Y2 O _Z2 (X2, Y2, and Z2 are real numbers larger than 0)) and gallium. With oxide (hereinafter, GaO _X3 (X3 is a real number larger than 0)) or gallium zinc oxide (hereinafter, Ga _X4 Zn _Y4 O _Z4 (X4, Y4, and Z4 are real numbers larger than 0)) The material is separated into a mosaic-like structure, and the mosaic-like InO _X1 or In _X2 Zn _Y2 O _Z2 is uniformly distributed in the film (hereinafter, also referred to as cloud-like). is there.

That is, CAC-OS is a composite oxide semiconductor having a structure in which a region containing GaO _X3 as a main component and a region containing In _X2 Zn _Y2 O _Z2 or InO _X1 as a main component are mixed. In the present specification, for example, the atomic number ratio of In to the element M in the first region is larger than the atomic number ratio of In to the element M in the second region. It is assumed that the concentration of In is higher than that of region 2.

In addition, IGZO is a common name, and may refer to one compound consisting of In, Ga, Zn, and O. As a typical example, it is represented by InGaO ₃ (ZnO) _m1 (m1 is a natural number) or In _{(1 + x0)} Ga _(1-x0) O ₃ (ZnO) _m0 (-1 ≦ x0 ≦ 1, m0 is an arbitrary number). Crystalline compounds can be mentioned.

The crystalline compound has a single crystal structure, a polycrystalline structure, or a CAAC structure. The CAAC structure is a crystal structure in which a plurality of IGZO nanocrystals have a c-axis orientation and are connected without being oriented on the ab plane.

On the other hand, CAC-OS relates to the material composition of oxide semiconductors. CAC-OS is a region that is partially observed as nanoparticles containing Ga as a main component and nanoparticles containing In as a main component in a material composition containing In, Ga, Zn, and O. The regions observed in the shape are randomly dispersed in a mosaic pattern. Therefore, in CAC-OS, the crystal structure is a secondary element.

It should be noted that CAC-OS does not include a laminated structure of two or more types of films having different compositions. For example, a structure consisting of two layers, a film containing In as a main component and a film containing Ga as a main component, is not included.

In some cases, a clear boundary cannot be observed between the region containing GaO _X3 as the main component and the region containing In _X2 Zn _Y2 O _Z2 or InO _X1 as the main component.

Instead of gallium, select from aluminum, yttrium, copper, vanadium, beryllium, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lantern, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, etc. When one or more of these are contained, CAC-OS has a region observed in the form of nanoparticles containing the metal element as a main component and a nano having In as a main component. The regions observed in the form of particles refer to a configuration in which the regions are randomly dispersed in a mosaic pattern.

The CAC-OS can be formed by a sputtering method, for example, under the condition that the substrate is not intentionally heated. When CAC-OS is formed by a sputtering method, one or more selected from an inert gas (typically argon), an oxygen gas, and a nitrogen gas may be used as the film forming gas. Good. Further, the lower the flow rate ratio of the oxygen gas to the total flow rate of the film-forming gas at the time of film formation is preferable. For example, the flow rate ratio of the oxygen gas is preferably 0% or more and less than 30%, preferably 0% or more and 10% or less. ..

CAC-OS is characterized by the fact that no clear peak is observed when measured using the θ / 2θ scan by the Out-of-plane method, which is one of the X-ray diffraction (XRD) measurement methods. Have. That is, from the analysis result by X-ray diffraction, it can be seen that the orientation of the measurement region in the ab plane direction and the c axis direction is not observed.

In addition, CAC-OS has a ring-shaped high-brightness region and a plurality of ring regions in an electron diffraction pattern obtained by irradiating an electron beam having a probe diameter of 1 nm (also referred to as a nanobeam electron beam). Bright spots are observed. Therefore, from the electron diffraction pattern, it can be seen that the crystal structure of CAC-OS has an nc (nano-crystal) structure having no orientation in the planar direction and the cross-sectional direction.

Further, for example, in CAC-OS in In-Ga-Zn oxide, GaO _X3 is the main component by EDX mapping obtained by using energy dispersive X-ray spectroscopy (EDX). It can be confirmed that the region and the region containing In _X2 Zn _Y2 O _Z2 or InO _X1 as the main component have a structure in which they are unevenly distributed and mixed.

CAC-OS has a structure different from that of the IGZO compound in which metal elements are uniformly distributed, and has properties different from those of the IGZO compound. That is, the CAC-OS is phase-separated into a region containing GaO _X3 or the like as a main component and a region containing In _X2 Zn _Y2 O _Z2 or InO _X1 as a main component, and a region containing each element as a main component. Has a mosaic-like structure.

Here, the region in which In _X2 Zn _Y2 O _Z2 or InO _X1 is the main component is a region having higher conductivity than the region in which GaO _X3 or the like is the main component. That is, the conductivity as an oxide semiconductor is exhibited by the carrier flowing through the region where In _X2 Zn _Y2 O _Z2 or InO _X1 is the main component. Therefore, a high field effect mobility (μ) can be realized by distributing the region containing In _X2 Zn _Y2 O _Z2 or InO _X1 as the main component in the oxide semiconductor in a cloud shape.

On the other hand, the region in which GaO _X3 or the like is the main component is a region having higher insulating properties than the region in which In _X2 Zn _Y2 O _Z2 or InO _X1 is the main component. That is, since the region containing GaO _X3 or the like as the main component is distributed in the oxide semiconductor, leakage current can be suppressed and good switching operation can be realized.

Therefore, when CAC-OS is used for a semiconductor element, the insulation property caused by GaO _X3 or the like and the conductivity caused by In _X2 Zn _Y2 O _Z2 or InO _X1 act complementarily to be high. On-current (I _on ) and high field-effect mobility (μ) can be achieved.

Further, the semiconductor element using CAC-OS has high reliability. Therefore, CAC-OS is suitable as a constituent material for various semiconductor devices.

This embodiment can be implemented in combination with the configurations described in other embodiments and the like as appropriate.

(Embodiment 5)
In the present embodiment, the electronic device of one aspect of the present invention will be described with reference to FIG.

The electronic device of the present embodiment has a display device of one aspect of the present invention. As a result, the display quality of the image displayed on the display unit of the electronic device can be improved.

An image having a resolution of, for example, Full HD, 2K, 4K, 8K, 16K, or higher can be displayed on the display unit of the electronic device of the present embodiment. The screen size of the display unit can be 20 inches or more diagonally, 30 inches or more diagonally, 50 inches or more diagonally, 60 inches or more diagonally, or 70 inches or more diagonally.

As electronic devices, for example, a relatively large screen such as a television device, a desktop or notebook personal computer, a monitor for a computer, a digital signage (electronic signage), a large game machine such as a pachinko machine, etc. In addition to the electronic devices provided, digital cameras, digital video cameras, digital photo frames, mobile phones, portable game machines, personal digital assistants, sound reproduction devices, and the like can be mentioned.

The electronic device of one aspect of the present invention may have an antenna. By receiving the signal with the antenna, the display unit can display images, information, and the like. Further, when the electronic device has an antenna and a secondary battery, the antenna may be used for non-contact power transmission.

The electronic device of one aspect of the present invention includes sensors (force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substance, voice, time, hardness, electric field, current, It may have a function of measuring voltage, power, radiation, current flow, humidity, gradient, vibration, odor or infrared rays).

The electronic device of one aspect of the present invention can have various functions. For example, a function to display various information (still images, moving images, text images, etc.) on the display unit, a touch panel function, a function to display a calendar, date, or time, a function to execute various software (programs), wireless It can have a communication function, a function of reading a program or data recorded on a recording medium, and the like.

FIG. 23A shows an example of a television device. In the television device 7100, the display unit 7000 is incorporated in the housing 7101. Here, a configuration in which the housing 7101 is supported by the stand 7103 is shown.

The display device of one aspect of the present invention can be applied to the display unit 7000.

The operation of the television device 7100 shown in FIG. 23 (A) can be performed by the operation switch provided in the housing 7101 or the separate remote control operation machine 7111. Alternatively, the display unit 7000 may be provided with a touch sensor, and may be operated by touching the display unit 7000 with a finger or the like. The remote controller 7111 may have a display unit that displays information output from the remote controller 7111. The channel and volume can be operated by the operation keys or the touch panel included in the remote controller 7111, and the image displayed on the display unit 7000 can be operated.

The television device 7100 is configured to include a receiver, a modem, and the like. The receiver can receive general television broadcasts. In addition, by connecting to a wired or wireless communication network via a modem, information communication is performed in one direction (from sender to receiver) or in both directions (between sender and receiver, or between recipients, etc.). It is also possible.

FIG. 23B shows an example of a notebook personal computer. The notebook personal computer 7200 has a housing 7211, a keyboard 7212, a pointing device 7213, an external connection port 7214, and the like. A display unit 7000 is incorporated in the housing 7211.

The display device of one aspect of the present invention can be applied to the display unit 7000.

23 (C) and 23 (D) show an example of digital signage.

The digital signage 7300 shown in FIG. 23C includes a housing 7301, a display unit 7000, a speaker 7303, and the like. Further, it may have an LED lamp, an operation key (including a power switch or an operation switch), a connection terminal, various sensors, a microphone, and the like.

FIG. 23 (D) is a digital signage 7400 attached to a columnar pillar 7401. The digital signage 7400 has a display unit 7000 provided along the curved surface of the pillar 7401.

In FIGS. 23 (C) and 23 (D), the display device of one aspect of the present invention can be applied to the display unit 7000.

The wider the display unit 7000, the more information can be provided at one time. Further, the wider the display unit 7000 is, the easier it is for people to see, and for example, the advertising effect of the advertisement can be enhanced.

By applying the touch panel to the display unit 7000, not only a still image or a moving image can be displayed on the display unit 7000, but also the user can intuitively operate the display unit 7000, which is preferable. In addition, when used for the purpose of providing information such as route information or traffic information, usability can be improved by intuitive operation.

Further, as shown in FIGS. 23C and 23D, the digital signage 7300 or the digital signage 7400 can be linked with the information terminal 7311 such as a smartphone or the information terminal 7411 owned by the user by wireless communication. Is preferable. For example, the information of the advertisement displayed on the display unit 7000 can be displayed on the screen of the information terminal 7311 or the information terminal 7411. Further, the display of the display unit 7000 can be switched by operating the information terminal 7311 or the information terminal 7411.

Further, the digital signage 7300 or the digital signage 7400 can be made to execute a game using the screen of the information terminal 7311 or the information terminal 7411 as an operation means (controller). As a result, an unspecified number of users can participate in and enjoy the game at the same time.

The display device of one aspect of the present invention can be incorporated along the inner or outer wall of a house or building, or along the curved surface of the interior or exterior of a vehicle.

This embodiment can be implemented in combination with the configurations described in other embodiments and the like as appropriate.

In this embodiment, the result of image correction when the display device has a configuration having four display panels will be described.

FIG. 24 is a diagram illustrating a display device that displays an image in this embodiment. As shown in FIG. 24, the display panels (display panel DP [1,1], display panel DP [2,1], display panel DP [1,2], and display panel DP [2,2] are arranged in 2 rows and 2 columns. ]) Was displayed on the display device. Each display panel is provided with pixels of 720 rows and 1280 columns.

Here, in the display panel DP [1,1], the area where 320 columns of pixels are provided from the boundary between the display panel DP [1,1] and the display panel DP [1,1] is defined as the boundary portion. Let it be 229A. Further, in the display panel DP [2,1], the area where 320 columns of pixels are provided from the boundary between the display panel DP [2,1] and the display panel DP [2,2] is defined as the boundary portion 229B. And. Further, in the display panel DP [1, 2], the area where 320 columns of pixels are provided from the boundary between the display panel DP [1, 1] and the display panel DP [1, 2] is defined as the boundary portion 229C. And. Further, in the display panel DP [2,2], the area where 320 columns of pixels are provided from the boundary between the display panel DP [2,1] and the display panel DP [2,2] is defined as the boundary portion 229D. And.

In this embodiment, first, a correction filter was created for each display panel by the method shown in FIG. Here, the pixels provided on the display panel can express gradation values 0 to 255, and the images displayed in steps S23 and S26 are images in which the gradation values of all the pixels are 127.

Then, the average value _{D AB} of filter values corresponding to the pixels provided in the boundary portion 229A and the boundary portion 229B, and the average value _{D CD} of filter values corresponding to the pixels provided in the boundary portion 229C and the boundary 229D , Was calculated. After that, the correction filter is modified so as to multiply the filter values corresponding to the pixels provided on the display panel DP [1, 2] and the display panel DP [2, 2] by D _AB / D _CD. I created a correction filter.

FIG. 25A shows a display result when the image is displayed without modifying the filter created by the method shown in FIG. FIG. 25B shows a display result when the filter created by the method shown in FIG. 15 is modified by the above method, a new correction filter is created, and an image is displayed.

In the image shown in FIG. 25 (A), the joints of the display panels were clearly visible. On the other hand, in the image shown in FIG. 25 (B), the joints of the display panels are less likely to be visually recognized than in the image shown in FIG. 25 (A), and the color difference between the display panels is smaller.

In this embodiment, when the display device has a configuration having one display panel, the measurement result of the brightness distribution of the light emitted from the pixels of the display panel will be described.

In this embodiment, the image corrected by the correction filter created by the method shown in FIG. 15 is displayed on one display panel. Here, the pixels provided on the display panel can express gradation values 0 to 255, and the image displayed in step S23 and the corrected image have the gradation values of all the pixels set to 127. The image was made. Further, in step S23 and step S26, the brightness of the light emitted from the pixel was measured using a two-dimensional luminance meter.

FIG. 26A shows the luminance data of the display panel on which the image before correction acquired by the two-dimensional luminance meter in step S23 is displayed. FIG. 26B shows the luminance data of the display panel on which the corrected image is displayed, which is acquired by the two-dimensional luminance meter after the correction filter is created.

When the display panel displays the image before correction, as shown in FIG. 26 (A), the brightness of the central portion of the display panel is higher than the brightness of the peripheral portion of the display panel. On the other hand, when the display panel displays the corrected image, as shown in FIG. 26B, the brightness is made uniform in the entire display panel as compared with that before the correction.

10A: Display device, 10B: Display device, 20A: Display unit, 20B: Display unit, 20C: Display unit, 21: Pixel unit, 21A: Pixel unit, 21B: Pixel unit, 22: Scan line drive circuit, 22A: Scan Line drive circuit, 22B: scanning line drive circuit, 23: signal line drive circuit, 23A: signal line drive circuit, 23B: signal line drive circuit, 24A: timing controller, 24B: timing controller, 25: pixel, 26: pixel, 27: Area, 28A: Boundary, 28B: Boundary, 28C: Boundary, 28D: Boundary, 29: Display area, 29A: Boundary, 29B: Boundary, 29C: Boundary, 29D: Boundary, 29E : Boundary part, 29F: Boundary part, 29G: Boundary part, 29H: Boundary part, 30A: Signal generation part, 30B: Signal generation part, 31: Front end part, 32: Decoder, 33: Processing part, 34: Receiver part , 35: Interface, 36: Control unit, 40A: Processing unit, 40B: Processing unit, 45A: Division unit, 45B: Division unit, 50: Arithmetic processing device, 72: Area, 73: Area, 74: FPC, 101: Transistor, 102: Transistor, 103: Capacitive element, 104: Light emitting element, 111: Transistor, 112: Transistor, 113: Capacitive element, 121: Transistor, 122: Transistor, 123: Transistor, 124: Capacitive element, 125: Capacitive element , 126: liquid crystal element, 128: potential supply line, 129: common wiring, 132: common wiring, 133: common wiring, 170: light emitting element, 180: liquid crystal element, 215: display unit, 221: scanning line drive circuit, 229A : Boundary part, 229B: Boundary part, 229C: Boundary part, 229D: Boundary part, 251: Transistor, 433: Capacitive element, 444: Transistor, 445: Transistor, 446: Transistor, 447: Node, 723: Electrode, 726: Insulation layer, 728: Insulation layer, 729: Insulation layer, 741: Insulation layer, 742: Semiconductor layer, 744a: Electrode, 744b: Electrode, 746: Electrode, 771: Substrate, 772: Insulation layer, 810: Transistor, 811: Transistor, 820: Transistor, 821: Transistor, 825: Transistor, 826: Transistor, 842: Transistor, 843: Transistor, 844: Transistor, 845: Transistor, 846: Transistor, 847: Transistor, 4001: Substrate, 4005: Sealing material , 4006: Substrate, 4008: Liquid crystal layer, 4010: Transistor, 4011: Transistor, 4013: Liquid crystal element, 4014: Wiring, 4015: Electrode, 4017: Electrode, 4018: FPC, 4019: Insulatory conductive layer, 4020: Capacitive element, 4021: Electrode, 4030: Electrode layer, 4031: Electrode layer, 4032: Insulating layer, 4033: Insulating layer, 4035: Spacer, 4102: Insulating layer, 4103: Insulating layer, 4104: Insulating layer, 4110: Insulating layer, 4111: Insulating layer, 4112: Insulating layer, 4131: Colored layer, 4132: Shading Layer, 4133: Insulating layer, 4510: Partition, 4511: Light emitting layer, 4513: Light emitting element, 4514: Filling material, 7000: Display unit, 7100: Television device, 7101: Housing, 7103: Stand, 7111: Remote control operation Machine, 7200: Notebook personal computer, 7211: Housing, 7212: Keyboard, 7213: Pointing device, 7214: External connection port, 7300: Digital signage, 7301: Housing, 7303: Speaker, 7311: Information terminal, 7400 : Digital signage, 7401: Pillar, 7411: Information terminal

Claims (8)

A method of operating a display device having a first pixel portion in which the first pixels are arranged in a matrix and a second pixel portion in which the second pixels are arranged in a matrix.
A first correction filter having a function of correcting an image displayed in the first pixel portion and a second correction filter having a function of correcting an image displayed in the second pixel portion are created. And
The filter value of the first correction filter is compared with the filter value of the second correction filter.
A method of operating a display device that corrects the filter value of the first correction filter based on the comparison result. The first pixel portion in which the first pixels in m rows and n columns (m and n are integers of 2 or more) are arranged in a matrix, and the second pixels in m rows and n columns are arranged in a matrix. The first pixel on the m-th row and the second pixel on the first row are operating methods of adjacent display devices, which have two pixel portions.
A first correction filter having a function of correcting an image displayed in the first pixel portion and a second correction filter having a function of correcting an image displayed in the second pixel portion are created. And
The first correction filter has a filter value corresponding to the first pixel and has a filter value corresponding to the first pixel.
The second correction filter has a filter value corresponding to the second pixel and has a filter value corresponding to the second pixel.
Corresponds to the average value of the filter values corresponding to the first pixel provided at the boundary portion with the second pixel portion and the second pixel provided at the boundary portion with the first pixel portion. Compare with the average value of the filter values to be used
A method of operating a display device that corrects the filter value of the first correction filter based on the comparison result. In claim 1 or 2,
The first correction filter is
By measuring the brightness of the light emitted from the first pixel with respect to a plurality of gradation values of the first pixel, the display device determines the brightness of the light emitted from the first pixel. The data of the correspondence relationship with the gradation value of the first pixel is acquired, and
After the display device displays an image having a specific gradation value on the first pixel portion and measures the brightness of the light emitted from the first pixel, the brightness data is acquired.
A method of operating a display device created by using the correspondence data and the luminance data. In claim 3,
The operation method of the display device, in which the image having the specific gradation value is an image in which the gradation values of all the first pixels are equal. A display device having a pixel unit and a processing unit.
Pixels are arranged in a matrix in the pixel portion.
The pixel has a display element and a memory circuit.
The processing unit has a function of creating a correction filter using the luminance data acquired based on the image displayed by the display element.
The memory circuit is a display device having a function of holding the correction filter. In claim 5,
The pixel includes the display element, a first transistor, a second transistor, a third transistor, a fourth transistor, a first capacitive element, and a second capacitive element. ,
One of the source or drain of the first transistor is electrically connected to one electrode of the first capacitive element.
The other electrode of the first capacitive element is electrically connected to one of the source or drain of the second transistor.
One of the source or drain of the second transistor is electrically connected to the gate of the third transistor.
The gate of the third transistor is electrically connected to one electrode of the second capacitive element.
The other electrode of the second capacitive element is electrically connected to one of the source or drain of the third transistor.
One of the source or drain of the third transistor is electrically connected to one of the source or drain of the fourth transistor.
A display device in which the source or drain of the fourth transistor is electrically connected to one electrode of the display element. In claim 6,
The display element is a display device that is an organic EL element. In claim 6 or 7,
The second transistor has a metal oxide in the channel forming region and has a metal oxide.
A display device in which the metal oxide has In, Zn, and M (M is Al, Ti, Ga, Sn, Y, Zr, La, Ce, Nd, or Hf).

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