TW201928380A - Voltage pin of circuit board conduction detection system and method thereof - Google Patents

Abstract

A voltage pin of circuit board conduction detection system and a method thereof are provided. A JTAG chip is set to boundary scan mode to obtain a detection voltage with custom communication protocol from an analog to digital converter. The detection voltage is obtained by a detection device with the JTAG chip through a JTAG connector to detect conduction voltage pin of detected circuit board. Therefore, the efficiency of all voltage of voltage pin of circuit board conduction detection may be achieved.

Description

Circuit board voltage pin conduction detection system and method thereof

A circuit board voltage pin conduction detection system and method thereof, in particular, a power supply pin conduction detection system and method thereof for performing a circuit board to be tested by a JTAG chip, a single chip and an analog digital converter.

In the detection of the power pin in the circuit board, the common way is to electrically connect the power pin in the circuit board to the pull-down power group, and use the Border Test Action Group (JTAG) chip to perform Boundary Scan technology. The voltage value of the power pin in the circuit board is read, so that the voltage value read from the power pin in the self-test circuit board is high to judge whether the power pin in the detecting circuit board is turned on or not.

For the above detection method, if the voltage value of the power supply pin in the detection circuit board is less than 600 mV, the power supply pin of the detection circuit board is turned on, and the JTAG chip is read from the power supply pin of the detection circuit board. The voltage values are all low, which makes it impossible to detect whether the power pin in the detection board is turned on.

In summary, it can be seen that in the prior art, there has been a long-standing problem that the existing power pin conduction detection causes a detection obstacle at a low voltage value, and therefore it is necessary to propose an improved technical means to solve this problem.

In view of the prior art, there is a problem that the existing power pin conduction detection causes a detection obstacle at a low voltage value, and the present invention discloses a circuit board voltage pin conduction detection system and method thereof, wherein:

The voltage foot conduction detection system of the circuit board disclosed in the present invention comprises: a circuit board to be tested, a detection circuit board and a detecting device having a circuit board connector to be tested, wherein the detecting circuit board further comprises: a detecting circuit board connector Analog to digital converter (ADC), single-chip microcomputer, Joint Test Action Group (JTAG) chip, and JTAG connector.

The detection circuit board connector of the detection circuit board is electrically connected to the circuit board connector to be tested; the voltage reading pin of the analog digital converter of the detection circuit board is electrically connected with the power supply pin of the detection circuit board connector and the pull-down The electrical connection of the resistor, the voltage reading pin of the analog digital converter is used to read the voltage value of the power pin of the detecting circuit board connector as the detection voltage value; the voltage input pin of the single chip of the detecting circuit board and the analog digital position The voltage output pin of the converter is electrically connected, and the voltage output pin of the analog-to-digital converter reads the detection voltage value; the JTAG chip of the detection circuit board is set to the Boundary Scan mode, and the JTAG chip passes through The custom communication protocol is electrically connected to the single chip and receives the detection voltage value from the single chip; the JTAG connector of the detection circuit board is electrically connected to the JTAG chip.

The detecting device forms an electrical connection through the JTAG connector to control the JTAG chip to be set to the boundary scan mode of operation, and reads the detected voltage value from the JTAG chip through the JTAG connector to perform power pin conduction detection of the circuit board to be tested.

The method for detecting a voltage foot conduction of a circuit board disclosed in the present invention comprises the following steps:

First, a sensor board connector, an analog to digital converter (ADC), a single-chip microcomputer, a Joint Test Action Group (JTAG) chip, and a JTAG connector are provided. Detecting the circuit board; then, the detecting circuit board is electrically connected to the circuit board connector to be tested through the detecting circuit board connector; then, the voltage reading pin of the analog digital converter and the power pin of the detecting circuit board connector are electrically connected The connection and the pull-down resistor are electrically connected, and the voltage reading pin of the analog digital converter is used to read the voltage value of the power pin of the detection board connector as the detection voltage value; then, the voltage input pin of the single chip is analogous The voltage output pin of the digital converter is electrically connected, and the voltage output pin of the analog-to-digital converter reads the detected voltage value; then, the JTAG chip is set to the Boundary Scan mode, and the JTAG chip passes through The defined communication protocol is electrically connected to the single chip and receives the detected voltage value from the single chip; then, the JTAG connector The JTAG chip is electrically connected; finally, a detecting device is provided, and the detecting device is electrically connected through the JTAG connector to control the JTAG chip to be set to the boundary scan mode, and the detecting voltage value is read from the JTAG chip through the JTAG connector to perform the circuit to be tested. The power pin of the board is turned on.

The system and method disclosed in the present invention are as above, and the difference from the prior art is that after the JTAG chip is set to the boundary scan mode, the analog digital converter is obtained from the single chip by the JTAG chip through the custom communication protocol. The detection voltage value read by the board, the detecting device reads the detection voltage value from the JTAG chip through the JTAG connector to perform the power pin conduction detection of the circuit board to be tested.

Through the above technical means, the present invention can achieve the technical effect of performing power source pin conduction detection at all voltage values.

The embodiments of the present invention will be described in detail below with reference to the drawings and embodiments, so that the application of the technical means to solve the technical problems and achieve the technical effects can be fully understood and implemented.

Hereinafter, an operation system and method according to an embodiment of the present invention will be described with reference to an embodiment, and reference is made to "1", "2", and "3", and "1" is shown. The system block diagram of the voltage pin conduction detection system of the circuit board of the present invention; "Fig. 2" shows a flow chart of the method for detecting the voltage pin conduction test of the circuit board of the present invention; "Fig. 3" shows the present A system architecture diagram of a voltage pin conduction detection system for inventing a circuit board.

The voltage-foot-conduction detection system of the circuit board of the present invention comprises: a circuit board 10 to be tested having a circuit board connector 11 to be tested, a detection circuit board 20, and a detecting device 30, wherein the detecting circuit board 20 further comprises: A detection board connector 21, an analog to digital converter (ADC) 22, a single-chip microcomputer 23, a Joint Test Action Group (JTAG) chip 24, and a JTAG connector 25 (Step 101).

The detecting circuit board connector 21 of the detecting circuit board 20 is for electrically connecting to the circuit board connector 11 to be tested of the circuit board 10 to be tested (step 102), and detecting the voltage reading of the analog digital converter 22 of the circuit board 20. The pin 221 is electrically connected to the power pin 211 of the detecting circuit board connector 21 of the detecting circuit board 20 and the pull-down resistor 42 is electrically connected, and the voltage reading pin 221 of the analog digital converter 22 of the detecting circuit board 20 can be The voltage value of the power supply pin 211 of the detection circuit board connector 21 of the read detection circuit board 20 is the detection voltage value 41 (step 103).

When the power pin of the test circuit board connector 11 of the circuit board 10 to be tested is normally turned on, the voltage reading pin 221 of the analog digital converter 22 of the detecting circuit board 20 can read the normal voltage value; When the power pin of the circuit board connector 11 to be tested of the circuit board 10 to be tested is not turned on, the voltage reading pin 221 of the analog digital converter 22 of the detecting circuit board 20 reads the voltage value by the pull-down resistor 42. That is 0.

The voltage input pin 231 of the single chip 23 of the detecting circuit board 20 is electrically connected to the voltage output pin 222 of the analog digital converter 22 of the detecting circuit board 20, and the single chip 23 of the detecting circuit board 20 can pass through the voltage input pin. 231 reads the detected voltage value 41 from the voltage output pin 222 of the analog-to-digital converter 22 (step 104).

The JTAG chip 24 of the test circuit board 20 is set to a Boundary Scan mode, and the JTAG chip 24 of the test circuit board 20 is electrically connected to the single chip 23 of the test circuit board 20 through a custom communication protocol and self-tests. The single wafer 23 of the circuit board 20 receives the detected voltage value 41 (step 105).

Please refer to FIG. 4, and FIG. 4 is a schematic diagram showing a custom communication protocol between a JTAG chip and a single chip for voltage pin conduction detection of the circuit board of the present invention.

The custom communication protocol used between the JTAG wafer 24 of the test circuit board 20 and the single chip 24 of the test circuit board 20 is the load_cmd pin of the JTAG chip 24 of the test board 20 or the load_data pin (load_data pin). When the backup pin is set to a low level, the 8-bit request command generated by the JTAG chip 24 of the detection board 20 is an effective command, and the JTAG chip 24 of the circuit board 20 is detected. When the update pin is set to high, the single chip 23 of the detection board 20 reads the 8-bit request command from the JTAG wafer, and the single chip 23 of the detection board 20 reads the 8-bit request. After the command, the busy_N pin state of the single chip 23 of the detecting circuit board 20 is set to be valid (ie, the busy_N pin is set to 0, indicating that the single chip 23 of the detecting circuit board 20 accepts the command successfully), and the JTAG chip 24 of the detecting circuit board 20 is detected. Further detecting that the busy_N pin state of the single chip 23 of the detecting circuit board 20 is valid, the JTAG chip 24 of the detecting circuit board 20 sets the load_cmd pin or the load_data pin to a high potential and sets the update pin. At a low potential, the single chip 23 of the detection circuit board 20 performs a single chip of the circuit board 20 after reading the detection voltage value 41 by the voltage output pin 222 of the analog digital converter 22 of the self-detecting circuit board 20 according to the 8-bit request command. 23 sets 8 bit response data including the detection voltage value 41 and sets the busy_N pin state of the single chip 23 of the detection circuit board 20 to be invalid (ie, the busy_N pin is set to 1, indicating the detection circuit board) The single chip 23 of 20 has executed the completion command, and the single chip 23 of the detecting circuit board 20 is in an idle state. The JTAG wafer 24 of the detecting circuit board 20 can be read from the single chip 23 of the detecting circuit board 20 and contains the detected voltage value 41. 8-bit response data.

The JTAG chip 24 of the above detection circuit board 20 includes a complex programmable logic device (CPLD) and a field programmable gate array (FPGA).

The JTAG chip 24 of the detection circuit board 20 controls the generation of the 8-bit request command through the boundary scan technology, controls the potential setting of the load_cmd pin or the load_data pin, controls the potential setting of the update pin, and reads the 8-bit response. The voltage value 41 is detected in the data.

It should be noted that the eight input and output pins of the JTAG chip 24 of the detecting circuit board 20 and the eight input and output pins of the single chip 23 of the detecting circuit board 20 are electrically connected to each other, thereby transmitting an 8-bit request. Command and 8-bit response data.

The JTAG connector 25 of the detection circuit board 20 is electrically connected to the JTAG wafer 24 of the detection circuit board 20 (step 106), and the detecting device 30 is electrically connected to the JTAG connector 25 of the detection circuit board 20 to control the detection circuit board. The JTAG chip 24 of 20 is set to the boundary scan mode of operation, and the detection voltage value 41 is read from the JTAG chip 24 of the detection circuit board 20 through the JTAG connector 25 of the detection circuit board 20 to conduct the power pin of the circuit board 10 to be tested. Detecting (step 107), that is, when the detecting device 30 reads the detected voltage value 41 from the JTAG chip 24 of the detecting circuit board 20 to a normal voltage value, it indicates that the power pin of the circuit board 10 to be tested is in a normal conducting state, when detecting When the device 30 reads the detection voltage value 41 from the JTAG chip 24 of the detection circuit board 20 to 0, it indicates that the power pin of the circuit board 10 to be tested is in a non-conduction state.

In summary, it can be seen that the difference between the present invention and the prior art is that after the JTAG chip is set to the boundary scan mode, the analog digital converter is obtained from the single chip by the JTAG chip through the custom communication protocol. The detected detection voltage value is read by the detecting device from the JTAG wafer through the JTAG connector to perform power supply pin conduction detection of the circuit board to be tested.

The technical problem that the prior art power pin conduction detection causes a detection obstacle at a low voltage value can be solved by the technical means, thereby achieving the technical effect that the power pin conduction detection can be performed at all voltage values.

While the embodiments of the present invention have been described above, the above description is not intended to limit the scope of the invention. Any changes in the form and details of the embodiments may be made without departing from the spirit and scope of the invention. The scope of the invention is to be determined by the scope of the appended claims.

10‧‧‧Test board to be tested

11‧‧‧Test board connectors to be tested

20‧‧‧Detection board

21‧‧‧Detection board connector

211‧‧‧Power pin

22‧‧‧ Analog Digital Converter

221‧‧‧Voltage reading pin

222‧‧‧Voltage output pin

23‧‧‧ single chip

231‧‧‧Voltage input pin

24‧‧‧JTAG chip

25‧‧‧JTAG connector

30‧‧‧Detection device

41‧‧‧Detection voltage value

42‧‧‧ Pull-down resistor

Step 101‧‧‧Providing a test board with a test board connector, an analog digital converter, a single chip, a JTAG chip, and a JTAG connector

Step 102‧‧‧ The detection circuit board is electrically connected to the circuit board connector to be tested through the detection circuit board connector

Step 103‧‧‧ The voltage reading pin of the analog-to-digital converter is electrically connected to the power pin of the detecting circuit board connector and the pull-down resistor is electrically connected, and the voltage reading pin of the analog digital converter is used for reading and detecting The voltage value of the power pin of the board connector is the detection voltage value.

Step 104‧‧‧ The voltage input pin of the single chip is electrically connected with the voltage output pin of the analog digital converter, and the voltage output pin of the analog-to-digital converter of the single chip reads the detection voltage value

Step 105‧‧‧ The JTAG chip is set to the boundary scan mode, and the JTAG chip is electrically connected to the single chip through a custom communication protocol and receives the detection voltage value from the single chip.

Step 106‧‧‧JTAG connector is electrically connected to JTAG chip

Step 107‧‧‧ provides a detecting device, the detecting device controls the JTAG chip to be set to the boundary scan working mode through the JTAG connector, and reads the detected voltage value from the JTAG chip through the JTAG connector to perform power pin conduction detection of the circuit board to be tested

FIG. 1 is a system block diagram of a voltage pin conduction detection system for a circuit board of the present invention. FIG. 2 is a flow chart showing a method for detecting a voltage pin conduction test of a circuit board according to the present invention. FIG. 3 is a system architecture diagram of a voltage pin conduction detection system of the circuit board of the present invention. FIG. 4 is a schematic diagram showing a custom communication protocol of a JTAG chip and a single chip for voltage pin conduction detection of the circuit board of the present invention.

Claims (10)

A voltage foot conduction detection system for a circuit board, comprising: a circuit board to be tested, the circuit board to be tested has a circuit board connector to be tested; and a detection circuit board, the detection circuit board further comprises: Detecting a circuit board connector, the detection circuit board connector is electrically connected to the circuit board connector to be tested; an analog to digital converter (ADC), the voltage reading of the analog digital converter The pin is electrically connected to the power pin of the detecting circuit board connector and the pull-down resistor, and the voltage reading pin of the analog digital converter is used for reading the power of the detecting circuit board connector The voltage value of the pin is a detection voltage value; a single-chip microcomputer, a voltage input pin of the single chip is electrically connected to a voltage output pin of the analog-to-digital converter, Reading a voltage value from the voltage output pin of the analog-to-digital converter; a Joint Test Action Group (JTAG) chip The JTAG chip is set to a Boundary Scan mode, and the JTAG chip is electrically connected to the single chip through a custom communication protocol and receives the detection voltage value from the single chip; a connector, the JTAG connector is electrically connected to the JTAG chip; a detecting device, the detecting device is electrically connected through the JTAG connector to control the JTAG chip to be set to a boundary scan mode of operation, and The JTAG connector reads the detected voltage value from the JTAG chip to perform power pin conduction detection of the circuit board to be tested. The voltage pin conduction detection system of the circuit board of claim 1, wherein the custom communication protocol used by the JTAG chip and the single chip is a load_cmd pin or a load_data of the JTAG chip. When the pin is set to low (low), the 8-bit request command generated by the JTAG chip is a valid command, and the update pin of the JTAG chip is set to a high potential (high) When the single chip reads an 8-bit request command from the JTAG wafer, the single-chip sets the busy_N pin state of the single-chip to be valid after reading the 8-bit request command, When the JTAG chip detects that the busy_N pin state of the single chip is valid, the JTAG chip sets the load_cmd pin or the load_data pin to a high potential and sets the update pin to a low potential, and the single chip is based on 8 After the bit request command is executed to read the detected voltage value from the voltage output pin of the analog to digital converter, the single chip sets an 8-bit response data including the detected voltage value (8 bit respon Se data) and setting the busy_N pin state of the single chip to be invalid, the JTAG wafer can read 8-bit response data including the detected voltage value from the single chip. The voltage pin conduction detection system of the circuit board of claim 2, wherein the JTAG chip controls the generation of an 8-bit request command through the boundary scan technology, and controls the potential of the load_cmd pin or the load_data pin. Set and control the potential setting of the update pin and read the detected voltage value in the 8-bit response data. The voltage pin conduction detection system of the circuit board of claim 2, wherein the eight input and output pins of the JTAG chip and the eight input and output pins of the single chip are electrically connected to each other. Connect to transfer 8-bit request commands and 8-bit response data. The voltage pin conduction detection system of the circuit board of claim 1, wherein the JTAG chip comprises a complex programmable logic device (CPLD) and a field programmable gate array (field programmable gate) Array, FPGA). A voltage pin conduction detecting method for a circuit board, comprising: providing a circuit board to be tested having a circuit board connector to be tested; providing an analog circuit board connector and an analog to digital converter (Analog to digital converter, ADC), a single-chip microcomputer, a Joint Test Action Group (JTAG) chip, and a detection circuit board of a JTAG connector; the detection circuit board is connected through the detection circuit board The device is electrically connected to the circuit board connector to be tested; the voltage reading pin of the analog digital converter is electrically connected to the power pin of the detecting circuit board connector and the pull-down resistor is electrically connected. The voltage reading pin of the analog-to-digital converter is configured to read a voltage value of the power pin of the detecting circuit board connector as a detected voltage value; a voltage input pin of the single chip and the analog digital bit conversion a voltage output pin of the device is electrically connected, and the single chip reads the detected voltage value from the voltage output pin of the analog digital converter The JTAG chip is set to a Boundary Scan mode of operation, the JTAG chip is electrically connected to the single chip through a custom communication protocol and receives the detected voltage value from the single chip; The JTAG connector is electrically connected to the JTAG chip; and a detecting device is configured to form an electrical connection through the JTAG connector to control the JTAG chip to be set to a boundary scan mode of operation, and connect through the JTAG The device reads the detected voltage value from the JTAG wafer to perform power pin conduction detection of the circuit board to be tested. The method for detecting a voltage pin of a circuit board according to claim 6, wherein the custom communication protocol used by the JTAG chip and the single chip is a load_cmd pin or a load_data of the JTAG chip. When the pin is set to low (low), the 8-bit request command generated by the JTAG chip is a valid command, and the update pin of the JTAG chip is set to a high potential (high) When the single chip reads an 8-bit request command from the JTAG wafer, the single-chip sets the busy_N pin state of the single-chip to be valid after reading the 8-bit request command, When the JTAG chip detects that the busy_N pin state of the single chip is valid, the JTAG chip sets the load_cmd pin or the load_data pin to a high potential and sets the update pin to a low potential, and the single chip is based on 8 After the bit request command is executed to read the detected voltage value from the voltage output pin of the analog to digital converter, the single chip sets an 8-bit response data including the detected voltage value (8 bit respon Se data) and setting the busy_N pin state of the single chip to be invalid, the JTAG wafer can read 8-bit response data including the detected voltage value from the single chip. The method for detecting a voltage pin of a circuit board according to claim 7, wherein the JTAG chip controls the generation of an 8-bit request command through a boundary scan technique, and controls the potential of the load_cmd pin or the load_data pin. Set and control the potential setting of the update pin and read the detected voltage value in the 8-bit response data. The method for detecting a voltage pin of a circuit board according to claim 7, wherein the eight input and output pins of the JTAG chip and the eight input and output pins of the single chip are electrically connected to each other. Connect to transfer 8-bit request commands and 8-bit response data. The method for detecting a voltage pin of a circuit board according to claim 6, wherein the JTAG chip comprises a complex programmable logic device (CPLD) and a field programmable gate array (field programmable gate) Array, FPGA).