TW201924006A - Wiring substrate - Google Patents

Abstract

The present invention provide a wiring substrate comprising a first insulating layer; a second insulating layer which comprises the same kind of insulating material as the first insulating layer; a plurality of insulating particles which is respectively included in the first insulating layer and the second insulating layer at a ratio of 40 to 80% by weight; a first wiring conductor which is disposed from a surface of the first insulating layer to a surface of a first base metal layer; a second wiring conductor which is disposed from a surface of the second insulating layer to a surface of a second base metal layer; a second height difference of the unevenness of a region where the second wiring conductor located in the surface of the second insulating layer is smaller than a first height difference of the unevenness of a region where the first wiring conductor located in the surface of the first insulating layer; and the second height difference is 2/5 or less of the average particle diameter of the insulating particles.

Description

 Wiring substrate  

The present invention relates to a wiring substrate.

At present, a wiring board having a high density of wiring conductors in an insulating layer has been developed. Such a wiring base is used for a high-performance electronic device typified by a server or a supercomputer. Further, the insulating layer used in such a wiring board contains an insulating resin and insulating particles dispersed in the insulating resin.

In particular, in order to efficiently transmit a high-frequency signal, the wiring conductor of the wiring board desirably has a flat surface energy of the wiring conductor. On the other hand, in order to firmly adhere the wiring conductor and the insulating layer, the wiring conductor of the wiring board is expected to be roughened by the insulating resin. In order to make the wiring conductor of the wiring board and the insulating layer firmly adhered, Japanese Laid-Open Patent Publication No. 2013-012726 proposes a composition for forming an insulating layer, which contains 10 to 60 with respect to 100 parts by weight of the epoxy resin. Two inorganic fillers in the weight section.

The insulating layer used in the wiring board described above may have insulating particles dispersed at a high density in order to suppress the thermal expansion coefficient of the wiring substrate and prevent disconnection of the wiring conductor. In this case, if the surface of the insulating resin is reduced in order to suppress the influence of the unevenness caused by the insulating particles, the adhesion strength of the wiring conductor is lowered. On the other hand, if the surface of the wiring conductor is increased in thickness in order to increase the adhesion strength, the unevenness of the surface of the wiring conductor is increased, and the transmission characteristics of the high-frequency signal are lowered. As described above, there is a possibility that it is difficult to achieve both the transmission characteristics and the adhesion.

The wiring substrate of the present disclosure has a first insulating layer, a second insulating layer laminated on the first insulating layer, and comprising the same kind of insulating material as the first insulating layer; and a plurality of insulating particles, 40 to 80 wt. The ratio of % is included in the first insulating layer and the second insulating layer, respectively, and includes partially exposed particles, the portion exposing a portion of the surface of the particle system being exposed from the surface of the first insulating layer and the surface of the second insulating layer; the first substrate The metal layer is located on the surface of the first insulating layer and extends into the surface layer; the second base metal layer is located in the surface of the second insulating layer to the surface layer; the first wiring conductor is located on the surface of the first base metal layer; And a second wiring conductor located on a surface of the second base metal layer. a second height difference of the unevenness of the region where the second wiring conductor is located in the surface of the second insulating layer is smaller than a first height difference of the unevenness of the region where the first wiring conductor is located in the surface of the first insulating layer, and the second The height difference is 2/5 or less of the average particle diameter of the insulating particles.

The wiring board of the present invention has excellent transmission characteristics of a high-frequency signal and adhesion of a wiring conductor to an insulating layer.

1‧‧ ‧ core insulation

2‧‧‧Insulation layer for laminate

2a‧‧‧first insulation

2b‧‧‧Second insulation

3‧‧‧Insulating particles

3a‧‧‧Partially exposed particles

4‧‧‧Base metal layer

4a‧‧‧First base metal layer

4b‧‧‧Second base metal layer

5‧‧‧Wiring conductor

5a‧‧‧First wiring conductor

5b‧‧‧Second wiring conductor

6‧‧‧solder layer

6a‧‧‧ openings

6b‧‧‧ openings

7‧‧‧through hole

8‧‧‧through holes

8a‧‧‧first through hole

8b‧‧‧second through hole

9‧‧‧Intermediate

20‧‧‧Wiring substrate

L1‧‧‧ first high and low difference

L2‧‧‧second height difference

M‧‧‧ wide frequency domain memory

S‧‧‧High-performance integrated circuit

Fig. 1 is a schematic cross-sectional view showing a wiring board according to an embodiment of the present disclosure.

Fig. 2 is an enlarged cross-sectional view showing a first insulating layer of a wiring board according to an embodiment of the present disclosure.

Fig. 3 is an enlarged cross-sectional view showing a second insulating layer of a wiring board according to an embodiment of the present disclosure.

Fig. 4 is an enlarged cross-sectional view showing a wiring conductor of a wiring board according to an embodiment of the present disclosure and its periphery.

Fig. 5 is a schematic cross-sectional view showing another embodiment of the wiring board of the present disclosure.

A wiring board according to an embodiment of the present disclosure will be described with reference to FIGS. 1 to 4 . The wiring board 20 has a core insulating layer 1 , a build-up insulating layer 2 , insulating particles 3 , an underlying metal layer 4 , a wiring conductor 5 , and a solder resist layer 6 . In the wiring board 20, for example, a high performance integrated circuit S and a plurality of wide frequency domain memories M are mounted on the upper surface.

The core insulating layer 1 includes, for example, an insulating material obtained by impregnating an epoxy resin, a bismaleimide triazine resin, or the like with a glass cloth for reinforcement. The core insulating layer 1 has a function as a support for reinforcement in the wiring substrate 20. The core insulating layer 1 has a plurality of through holes 7 penetrating vertically. The thickness of the core insulating layer 1 is set to, for example, 200 to 1200 μm. The diameter of the through hole 7 is set to, for example, 50 to 200 μm. The wiring board 20 has a rectangular plate shape in plan view. The length of one side of the wiring board 20 is about 20 to 80 mm, and the thickness is about 0.3 to 1.6 mm.

In the core insulating layer 1 , a plurality of prepregs obtained by impregnating a thermosetting resin such as an epoxy resin or a bismaleimide triazine resin into a glass cloth for reinforcement are laminated, and subjected to press processing under heating. Thereby, it is formed into a flat shape. The through hole 7 is formed by performing a process such as drilling, laser processing, or sand blasting on the core insulating layer 1. The wiring conductors 5 on the upper and lower surfaces of the core insulating layer 1 are electrically connected to each other via the wiring conductor 5 in the through hole 7.

The insulating layer 2 for laminated layers includes the first insulating layer 2a and the second insulating layer 2b. The wiring conductor 5 mainly used to connect the high-performance integrated circuit S to the wiring conductor 5 located on the lower surface of the wiring substrate 20 is placed on the upper surface of the first insulating layer 2a on the upper side of the core insulating layer 1. The wiring conductor 5 for connecting the high performance integrated circuit S and the wide frequency domain memory M is located on the upper surface of the second insulating layer 2b on the upper side of the first insulating layer 2a. The first insulating layer 2a and the second insulating layer 2b each have a surface including irregularities.

The first insulating layer 2a and the second insulating layer 2b contain the same kind of insulating material such as an epoxy resin, a phenol resin, or a cyanate ester. Thereby, it is possible to suppress a difference in thermal expansion and contraction between the first insulating layer 2a and the second insulating layer 2b, and it is advantageous in suppressing warpage of the wiring substrate 20 and the like. The same kind of insulating material means that the first insulating layer 2a and the second insulating layer 2b are substantially the same resin composition. However, a combination of a network polymer containing the above resin as a main component may be formed. Any combination of such a network polymer may be used.

The laminated insulating layer 2 has a function of ensuring insulation between the adjacent wiring conductors 5 by covering the wiring conductors 5 to be described later on the upper and lower surfaces of the core insulating layer 1. The laminated insulating layer 2 has a plurality of via holes 8 having the wiring conductor 5 as a bottom. The through hole 8 has a first through hole 8a located in the first insulating layer 2a and a second through hole 8b in the second insulating layer 2b.

The thickness of the first insulating layer 2a is set to, for example, 30 to 40 μm. The first insulating layer 2a has a plurality of first through holes 8a having the wiring conductor 5 as a bottom. The diameter of the first constant hole 8a is set to, for example, 30 to 60 μm.

The thickness of the second insulating layer 2b is set to, for example, 5 to 15 μm. The second insulating layer 2b has a plurality of second through holes 8b having the wiring conductor 5 as a bottom. The diameter of the second through hole 8b is set to, for example, 10 to 20 μm.

The insulating layer 2 for the laminate is a film for an insulating layer in which the insulating particles 3 are dispersed in a thermosetting resin such as an epoxy resin, and adheres to the upper and lower surfaces of the core insulating layer 1 so as to cover the wiring conductor 5, for example. And it is formed by heat curing.

The insulating particles 3 are located on the first insulating layer 2a and the second insulating layer 2b. Examples of the insulating particles 3 include cerium oxide (SiO ₂ ), glass, alumina, and the like. The insulating particles 3 have a spherical shape, for example, and the average particle diameter is set to, for example, 0.1 to 0.5 μm. The content ratio of the insulating particles 3 in the first insulating layer 2a and the second insulating layer 2b is set to, for example, 40 to 80% by weight. The spherical shape is advantageous for containing the insulating particles 3 at a high density. In the first insulating layer 2a and the second insulating layer 2b, the insulating particles 3 have an effect of reducing the thermal expansion coefficient to suppress disconnection of the wiring conductor 5 and the like.

The insulating particles 3 include partially exposed particles 3a which expose a portion of the surface of the first insulating layer 2a and a surface of the second insulating layer 2b. The area ratio of the exposed portion of the exposed portion of the particles 3a in the portion of the surface of the first insulating layer 2a is set to, for example, 20 to 30% in plan view. As shown in Fig. 2, the first height difference L1 of the unevenness of the first insulating layer 2a due to the insulating particles 3 is set to, for example, 160 to 600 nm in a cross-sectional view. The area ratio refers to the ratio of the area (A) of the exposed portion of the partially exposed particles 3a in plan view to the surface of the first insulating layer 2a or the second insulating layer 2b (including the above A).

The area ratio of the exposed portion of the exposed portion of the particles 3a to the surface of the second insulating layer 2b is set to, for example, 5 to 12% in plan view. As shown in Fig. 3, the second height difference L2 of the unevenness of the second insulating layer 2b due to the insulating particles 3 is set to, for example, 10 to 100 nm in a cross-sectional view. The area ratio of the partially exposed particles 3a as described above can be calculated by, for example, X-ray photoelectron spectroscopy (XPS) analysis.

In order to expose the insulating particles 3 to the surface of the first insulating layer 2a and the surface of the second insulating layer 2b, for example, oxygen plasma, nitrogen plasma or argon plasma treatment may be performed. The plasma treatment takes a longer processing time than the treatment of the etching liquid. However, since fine polishing can be performed, it is advantageous to improve the precision of the exposure amount of the insulating particles 3.

As shown in FIG. 4, the base metal layer 4 includes a first base metal layer 4a and a second base metal layer 4b. The underlying metal layer 4 is located in the surface layer from the surface of the insulating layer 2 for the buildup, and the insulating layer 2 for the buildup is placed on the lower side of the wiring conductor 5 to be described later. Further, the underlying metal layer 4 is also located on the surface of the wiring conductor 5 exposed at the bottom of the through hole 8.

The first base metal layer 4a contains a good conductive metal such as copper. Such a first base metal layer 4a is formed by, for example, electroless plating. This plating method is advantageous because of the short processing time.

The second base metal layer 4b is located in the surface layer from the surface of the build-up insulating layer 2 corresponding to the lower side of the second wiring conductor 5b to be described later. Further, the second base metal layer 4b is also located on the surface of the wiring conductor 5 exposed at the bottom of the through hole 8.

The second base metal layer 4b includes: a metal layer containing a metal of Group 4 of the periodic table of elements such as titanium or a metal of Group 6 of the periodic table of elements such as chromium and molybdenum; and the metal layer The copper layer on it. The thickness of the metal layer is set to, for example, 20 to 25 nm. The thickness of the copper layer is set to, for example, 200 to 220 nm. Since the thickness of the metal layer is made thinner than the thickness of the copper layer, the second wiring conductor 5b located on the second underlying metal layer 4b can be formed of continuous and homogeneous crystal grains having no aggregation of crystal grains.

Further, the metal layer is advantageous for, for example, suppressing diffusion of copper used as a material constituting the wiring conductor 5. Thereby, it is possible to improve the adhesion strength between the wiring conductor 5 and the insulating layer, and to suppress migration due to diffusion of copper in the insulating layer.

The second underlying metal layer 4b is located in the surface layer of the thickness of the insulating layer 2 for the buildup layer to a depth of less than 200 nm in the thickness direction. The thickness of the second base metal layer 4b described above can be calculated by, for example, Auger analysis.

The metal layer containing the metal of Group 4 or Group 6 and the copper layer on the metal layer are formed by, for example, sputtering. In such a sputtering method, since the metal layer of the Group 4 or the group 6 and the copper layer are struck from the surface of the insulating layer 2 for the buildup layer into the surface layer, it is advantageous to increase the buildup compared to the electroless plating method. The adhesion strength between the insulating layer 2 and the second base metal layer 4b is used. Therefore, in particular, when the second wiring conductor 5b is a fine wiring, it is advantageous to increase the adhesion strength between the second wiring conductor 5b and the laminated insulating layer 2.

The underlying metal layer 4 other than the region where the wiring conductor 5 is located is removed by etching in order to prevent short-circuiting.

The wiring conductor 5 is located on the upper and lower surfaces of the core insulating layer 1, the inside of the through hole 7, the surface of the insulating layer 2 for lamination, and the through hole 8. The wiring conductor 5 includes a first wiring conductor 5a and a second wiring conductor 5b. The wiring conductor 5 is formed by a plating method such as a semi-additive method, and includes a good conductive metal such as copper.

The first wiring conductor 5a is located on the surface of the first insulating layer 2a and the first through hole 8a. As described above, it mainly has a function of connecting the high-performance integrated circuit S to the wiring conductor 5 located on the lower surface of the wiring substrate 20. The line width of the first wiring conductor 5a is set to, for example, 15 to 20 μm, and the thickness is set to, for example, 10 to 20 μm. As described above, since the first wiring conductor 5a has a large line width and a thickness, even if the first height difference L1 of the unevenness of the first insulating layer 2a is a large value of 160 to 600 nm, it is difficult to be affected by the unevenness. .

The second wiring conductor 5b is located on the surface of the second insulating layer 2b and the second through hole 8b. As described above, it mainly has a function of connecting the high performance integrated circuit S and the wide frequency domain memory M. The line width of the second wiring conductor 5b is set to, for example, 2 to 6 μm, and the thickness is set to, for example, 2 to 15 μm. As described above, the second wiring conductor 5b has a fine line width and a thickness. However, since the second height difference L2 of the unevenness of the second insulating layer 2b is a small value of 10 to 100 nm, the influence of the unevenness is small.

The solder resist layer 6 is located on the surface of the uppermost layer of the wiring substrate 20 and the second insulating layer 2b of the lowermost layer. The solder resist layer 6 has an opening 6a that exposes the uppermost second wiring conductor 5b and an opening 6b that exposes the lowermost second wiring conductor 5b. The solder resist layer 6 is, for example, a film having a photosensitive thermosetting resin such as an acrylic modified epoxy resin attached to the surface of the second insulating layer 2b, and the openings 6a and 6b are formed by exposure and development, and thermally cured. This is formed.

As described above, in the wiring substrate 20 of the present disclosure, the second height difference L2 of the unevenness on the surface of the second insulating layer 2b is smaller than the first height difference L1 of the unevenness on the surface of the first insulating layer 2a. Further, the second height difference L2 is suppressed to 2/5 or less of the average particle diameter of the insulating particles. Thereby, the second wiring conductor 5b having a finer wiring width and thickness than the first wiring conductor 5a and having a flat surface can be positioned on the surface of the second insulating layer 2b.

If the second height difference L2 is 2/5 or less of the average particle diameter of the insulating particles 3 (including L2 = 0), the average value of the insulating particles 3 (particularly partially exposed particles 3a) is in the second The portion in the insulating layer 2b is larger than the exposed portion, and it is advantageous to suppress the falling off of the insulating particles 3.

If the second height difference L2 does not reach 1/10 of the average particle diameter of the insulating particles 3, it is strongly affected by the fragile surface layer generated when the second insulating layer 2b is thermally cured, and may cause the second wiring conductor 5b. The adhesion to the second insulating layer 2b is insufficient. Further, when the second base metal layer 4b on the surface of the second insulating layer 2b is removed by etching, the etching liquid easily intrudes into the second base metal layer 4b directly under the second wiring conductor 5b, and the second wiring conductor 5b becomes The possibility of being easily peeled off.

When the second height difference L2 is 2/5 or less and 1/10 or more of the average particle diameter of the insulating particles 3, a resin surface state suitable for forming the second wiring conductor 5b on the surface of the second insulating layer 2b can be obtained. Therefore, it is advantageous to improve the adhesion strength between the second insulating layer 2b and the second wiring conductor 5b and to form a wiring having excellent transmission characteristics of a high-frequency signal.

When the second height difference L2 exceeds 2/5 of the average particle diameter of the insulating particles 3, the insulating particles 3 located in the second insulating layer 2b are liable to fall off. At this time, the unevenness of the surface layer of the second insulating layer 2b is increased, and the fine wiring processing becomes difficult. Further, it is strongly affected by the unevenness of the surface layer of the second insulating layer 2b, and the unevenness of the surface of the second wiring conductor 5b is increased, and the transmission characteristics of the high-frequency signal may be lowered.

The first height difference L1 can be arbitrarily set with respect to the particle diameter of the insulating particles 3. From the viewpoint of suppressing the fall of the insulating particles 3 located in the first insulating layer 2a, it is preferable that the insulating particles 3 have an average particle diameter of 4/5 or less.

In the wiring board 20 of the present disclosure, since the second base metal layer 4b is located in the surface layer of the surface of the insulating layer 2 for the buildup layer, the adhesion strength between the insulating layer 2 for the buildup layer and the second base metal layer 4b is strong. Thereby, the adhesion strength between the second wiring conductor 5b located on the second underlying metal layer 4b and the insulating layer for the buildup layer also becomes strong.

In an example of the above-described embodiment, the first base metal layer 4a is exemplified by electroless copper plating. However, the second base metal layer 4a may include a metal layer similar to the second base metal layer 4b, and the metal layer may include, for example, titanium. The metal of Group 4 of the periodic table or the metal of Group 6 of the periodic table of elements such as chromium and molybdenum.

In the case where the first base metal layer 4a includes a metal layer belonging to Group 4 or Group 6, the first base metal layer 4a is located in the surface layer of the first insulating layer 2a to a depth of less than 600 nm in the thickness direction. In this case, it is advantageous to increase the adhesion strength between the first insulating layer 2a and the first wiring conductor 5a.

As shown in Fig. 5, an intermediate layer 9 may be provided between the wall surface of the second through hole 8b and the second base metal layer 4b. The intermediate layer 9 includes, for example, a part of the second insulating layer 2b, insulating particles 3, and a metal layer containing copper. The copper-containing metal layer includes a portion of the metal layer constituting the second wiring conductor 5b located in the second through hole 8b. In the wall surface of the second through hole 8b, the second wiring conductor 5b and the intermediate layer 9 both containing copper are provided via the second base metal layer 4b. The metal layer in the intermediate layer 9 exists only in the same extent as the entire intermediate layer 9, and thus the illustration is omitted.

The thickness of the intermediate layer 9 is set to, for example, about 100 to 1000 nm. If it is less than 100 nm, the adhesion of the second wiring conductor 5b and the second through hole 8b may not be expected to be improved. If it is more than 1000 nm, the insulation reliability of the second through holes 8b may be lowered from each other.

Such an intermediate layer 9 can be formed as follows. First, a hole having the wiring conductor 5 as a bottom surface is formed in the second insulating layer 2b by laser processing. At this time, fine irregularities are formed on the wall surface of the hole due to heat during laser processing. The surface of the unevenness is composed of the second insulating layer 2b and the insulating particles 3. The degree of unevenness is set to a maximum height of about 300 to 500 nm. The laser processing conditions are, for example, setting the irradiation energy to 0.05 to 0.7 W. Further, if it is further limited, the present technique can be more prominently exhibited in the range of 0.1 to 0.3 W.

Next, the inner surface of the cleaning hole is cleaned by the desmear process to form the second through hole 8b. The desmear treatment conditions are, for example, a treatment containing a perchloric acid salt having a concentration of 0.2 to 0.5 mol/l and an alkali metal hydroxide to a temperature of 30 to 80 ° C, and a treatment time of 0.5 to 10 minutes.

Next, a second base metal layer 4b is formed on the wall surface of the second through hole 8b and the surface of the wiring conductor 5. The thickness of the second base metal layer 4b is such that the thickness of the metal layer belonging to Group 4 or Group 6 of the periodic table is set to, for example, about 5 to 20 nm, so as not to completely cover the unevenness of the wall surface of the hole. The thickness is set to be about 50 to 150 nm.

Finally, a second wiring conductor 5b containing copper is formed in the second through hole 8b by a semi-additive method. At this time, a part of the metal layer constituting the second wiring conductor 5b also enters the unevenness on the wall surface of the hole via the second base metal layer 4b, and adheres to the second insulating layer 2b and the insulating particles 3 constituting the uneven surface. The uneven portion of the second insulating layer 2b, the insulating particles 3, and the incoming metal layer are layered. Thereby, the intermediate layer 9 including a part of the second insulating layer 2b, the insulating particles 3, and the metal layer containing copper is formed.

As described above, a part of the metal layer constituting the second wiring conductor 5b is placed in the intermediate layer 9 in a state of being adhered to the second insulating layer 2b and the insulating particles 3 via the second underlying metal layer 4b. The metal layer located in the intermediate layer 9 and the metal layer constituting the second wiring conductor 5b are composed of continuous crystals. Therefore, even if the small through hole 8 having a small contact area with the second through hole 8b, the second wiring conductor 5b can be positioned with a large adhesion.

The intermediate layer 9 may be located at the periphery of the bottom surface in addition to the wall surface of the second through hole 8b. The intermediate layer 9 around the bottom surface is present, for example, in a range of up to 6 μm from the bottom surface. In this case, it is advantageous to increase the adhesion of the second wiring conductor 5b and the second through hole 8b.

The intermediate layer 9 may also be located between the wall surface of the first through hole 8a and the first base metal layer 4a. In this case, it is advantageous to increase the adhesion of the first wiring conductor 5a and the first through hole 8a.

The present disclosure is not limited to the above-described embodiment, and various modifications and improvements can be made within the scope of the claims.

Claims (11)

 A wiring board having a first insulating layer having a surface including irregularities, and a second insulating layer having a surface including irregularities laminated on the first insulating layer and containing the same kind of insulation as the first insulating layer a plurality of insulating particles are respectively included in the first insulating layer and the second insulating layer at a ratio of 40 to 80% by weight, and include partially exposed particles, the portion exposing a part of the surface of the particle system from the first insulating layer The surface of the layer and the surface of the second insulating layer are exposed; the first base metal layer is located in the surface of the first insulating layer to the surface layer; and the second base metal layer is located on the surface of the second insulating layer a first wiring conductor located on a surface of the first base metal layer; and a second wiring conductor on a surface of the second base metal layer, the second wiring conductor in a surface of the second insulating layer The second height difference of the unevenness of the region where the region is located is smaller than the first level of the unevenness of the region where the first wiring conductor is located in the surface of the first insulating layer And the second height difference of the average particle diameter of 2/5 or less of the insulating particles.    The wiring board according to claim 1, wherein the second underlying metal layer comprises a metal belonging to Group 4 or Group 6 of the periodic table.    The wiring board according to claim 1 or 2, wherein the second underlying metal layer is located in the surface layer of the second insulating layer and has a depth of less than 200 nm in the thickness direction.    The wiring board according to claim 1 or 2, wherein the second wiring conductor contains copper, and the second insulating layer has a through hole including the second base metal layer. An intermediate layer is formed between the second base metal layer and the wall surface of the through hole, and the intermediate layer includes a part of the second insulating layer, the insulating particles, and a metal layer containing copper.    The wiring substrate according to claim 1 or 2, wherein the second underlying metal layer comprises: a metal belonging to Group 4 or Group 6 of the periodic table; and copper on the metal The metal of the aforementioned Group 4 or Group 6 is thinner than the thickness of copper.    The wiring board according to the first or second aspect of the invention, wherein the second height difference is 1/10 or more and 2/5 or less of an average particle diameter of the insulating particles.    The wiring board according to the first or second aspect of the invention, wherein the first height difference is 4/5 or less of an average particle diameter of the insulating particles.    The wiring board according to claim 1 or 2, wherein the first underlying metal layer comprises a metal belonging to Group 4 or Group 6 of the periodic table.    The wiring board according to the first or second aspect of the invention, wherein the first base metal layer is located in the surface layer of the surface of the first insulating layer and has a depth of less than 600 nm in the thickness direction.    The wiring board according to claim 1 or 2, wherein the first wiring conductor contains copper, and the first insulating layer has a through hole including the first base metal layer. In the wall surface, an intermediate layer is formed between the first base metal layer and the wall surface of the through hole, and the intermediate layer includes a part of the first insulating layer, the insulating particles, and a metal layer containing copper.    The wiring board according to claim 8, wherein the first wiring conductor contains copper, and the first insulating layer has a through hole including a wall surface on which the first base metal layer is located, An intermediate layer is provided between the base metal layer and the wall surface of the through hole, and the intermediate layer includes a part of the first insulating layer, the insulating particles, and a metal layer containing copper.