JP5892157B2 - Printed circuit board, method for manufacturing printed circuit board, and semiconductor device - Google Patents

Description

  The present invention relates to a printed wiring board, a method for manufacturing a printed wiring board, and a semiconductor device.

  In recent years, with the demand for higher functionality, lighter weight, smaller size, and thinner electronic devices, high-density integration and high-density mounting of electronic components are progressing. Circuit wiring of printed wiring boards used in these electronic devices tends to have a higher density, and a built-up multilayer wiring structure is employed.

  As a method for forming a circuit wiring pattern, there is generally a technique (subtractive method) for etching a copper foil. The circuit thickness formed by the subtractive method is characterized by the thickness of the copper foil to be used, and the accuracy of the circuit width depends on the reaction characteristics of the etching solution and the ability of the etching apparatus to be used. For this reason, the subtractive method is generally not suitable for increasing the density, except for some applications using ultrathin metal foils.

  On the other hand, there is a semi-additive method as a method generally applied to the manufacture of build-up substrates and multilayer wiring boards. In this method, the resin surface is desmeared to roughen the surface, an electroless copper plating layer using a palladium catalyst is formed on the surface, a photosensitive resist is formed on the copper plating layer, and exposure / development, etc. After patterning through this process, a circuit pattern is formed by electrolytic copper plating, finally the resist is peeled off, and the electroless copper plating layer is removed by flash etching to form fine wiring. (For example, patent document 1). When fine wiring is formed by this method, there are problems such as resist exposure / development accuracy and abnormal plating deposition due to palladium catalyst residues between the wirings, and it is difficult to form fine wiring.

  In the subtractive method and the semi-additive method, convex wiring is formed on the surface of the resin layer. In a build-up board or a multilayer wiring board, a process of laminating a resin layer is included in the subsequent process, but depending on the resin composition, a problem of resin embedding occurs.

  Also, grooves are formed in the resin layer by scribe, plasma, laser, etc., the surface of the resin is desmeared to roughen the surface, and an electroless copper plating layer using a palladium catalyst is formed on the surface. There is a method of forming a conductor circuit and finally removing the conductor plating other than the groove portion by etching to form a conductor circuit (for example, Patent Documents 2 and 3).

  However, when conductor plating other than the conductor circuit portion is removed by etching, depending on the shape of the conductor circuit portion, there is a problem that when the conductor plating other than the conductor circuit portion is uniformly removed, the conductor circuit portion is depressed. Because of this depression, there may be a problem in connection reliability with parts.

JP-A-8-64930 Japanese Patent Laid-Open No. 10-4253 JP 2006-41029 A

  The present invention has been made in view of the above circumstances, and provides a printed wiring board having a conductive circuit having a smooth surface on the resin layer surface of the printed wiring board, a method for manufacturing the printed wiring board, and a semiconductor device. It is.

A printed wiring board according to the present invention is a printed wiring board comprising a resin layer and a conductor layer,
The resin layer is provided with a recess, and has the conductor layer embedded in the recess,
The shape of the recess in the cross-sectional view is a shape in which the central portion of the recess is raised. Further, at least two steps are formed from the deepest part of the concave part toward the raised central part of the concave part.

  In this printed wiring board, the shape of the recess in the sectional view is a shape in which the central portion of the recess is raised. As a result, after the conductor circuit is embedded in the concave portion by the conductor plating, when the conductor plating other than the conductor circuit portion is removed by etching, the printed wiring board having a flat shape on the surface of the conductor layer without being depressed near the center portion is obtained. Can be provided.

  The conductor layer may be a conductor pattern extending in one direction in a plan view. Moreover, the said recessed part with which the said conductor pattern was embed | buried may have the cross-sectional shape where the center part rose in the cross section in a transversal direction. Further, the width of the concave portion in the short direction may be 20 μm or more. Thereby, an effect is exhibited more notably.

  The conductor layer may be a conductor pad having a rectangular shape in plan view. In this case, the concave portion in which the conductor pad is embedded may have a rectangular shape in plan view. Moreover, the said recessed part with which the said conductor pad was embed | buried may have the cross-sectional shape where the center part rose in any cross section which passes along the center of the diagonal of the bottom face of the said recessed part. Further, the length of one side of the concave portion may be 20 μm or more.

  The conductor layer may be a conductor pad having a circular shape in plan view. In this case, the concave portion in which the conductor pad is embedded may have a circular shape in plan view. Moreover, the said recessed part with which the said conductor pad was embed | buried may have the cross-sectional shape where the center part rose in any cross section which passes along the center of the bottom face of the said recessed part. Further, the length of the diameter of the concave portion may be 20 μm or more.

Also, the depth from the surface of the resin layer to the deepest of the recess and (D1), the ratio between the depth (D2) from the resin layer surface to the upper end of the central portion of the recess (D2 / D1) is 0.2-0.8 may be sufficient.

A method for producing a printed wiring board according to the present invention is a method for producing a printed wiring board comprising a resin layer and a conductor layer,
(A) preparing an insulating substrate including a resin layer;
(B) processing the resin layer to form a recess with a raised central portion;
(C) forming a conductor layer embedded in the recess by plating;
It is characterized by including. The step (b) of forming the recess includes
(B1) a first stage step of irradiating the entire region where the recess is formed with the laser beam;
(B2) a second stage step of irradiating a laser beam having an irradiation area smaller than the irradiation area of the laser beam irradiated in the first stage step (b1) along the peripheral edge of the region where the recess is formed. Including. Further, after the second step (b2), the laser beam having an irradiation area smaller than the irradiation area of the laser beam irradiated in the second step (b2) A third stage step (b3) is performed.

  The step (c) of forming the conductor layer includes a step of forming the conductor layer on the resin layer surface and in the recess, and removing the conductor layer formed outside the recess, And the step of leaving the conductor layer.

Further, the step (b) of forming the recess is performed by irradiating the laser beam a plurality of times .

  Further, after the step (c), a step (d) of forming another resin layer on the resin layer and the conductor layer may be included. The laser beam may be an excimer laser or a YAG laser.

  In addition, a semiconductor device in which a semiconductor element is mounted on the above-described printed wiring board can be provided.

  ADVANTAGE OF THE INVENTION According to this invention, the printed wiring board which has a conductor circuit with the smooth surface on the resin layer surface of a printed wiring board, the manufacturing method of a printed wiring board, and a semiconductor device can be provided.

  The above-described object and other objects, features, and advantages will become more apparent from the preferred embodiments described below and the accompanying drawings.

It is the typical sectional view and top view shown about an example of the printed wiring board containing the resin layer and conductor layer concerning the present invention. It is sectional drawing which shows typically the recessed part provided in the resin layer. It is typical sectional drawing shown about one Embodiment of the manufacturing method of the printed wiring board containing the resin layer and conductor layer which concern on this invention. It is typical sectional drawing shown about one Embodiment of the manufacturing method of the printed wiring board containing the resin layer and conductor layer which concern on this invention. It is typical sectional drawing shown about one Embodiment of the manufacturing method of the printed wiring board containing the resin layer and conductor layer which concern on this invention. It is typical sectional drawing shown about one Embodiment of the manufacturing method of the printed wiring board containing the resin layer and conductor layer which concern on this invention. It is typical sectional drawing shown about one Embodiment of the manufacturing method of the printed wiring board containing the resin layer and conductor layer which concern on this invention. It is typical sectional drawing shown about one Embodiment of the manufacturing method of the printed wiring board containing the resin layer and conductor layer which concern on this invention. It is typical sectional drawing shown about one Embodiment of the manufacturing method of the printed wiring board containing the resin layer and conductor layer which concern on this invention. It is typical sectional drawing shown about one Embodiment of the manufacturing method of the printed wiring board containing the resin layer and conductor layer which concern on this invention. It is typical sectional drawing shown about one Embodiment of the manufacturing method of the printed wiring board containing the resin layer and conductor layer which concern on this invention. It is typical sectional drawing shown about one Embodiment of the manufacturing method of the printed wiring board containing the resin layer and conductor layer which concern on this invention. It is typical sectional drawing shown about one Embodiment of the manufacturing method of the printed wiring board containing the resin layer and conductor layer which concern on this invention. It is typical sectional drawing shown about one Embodiment of the manufacturing method of the printed wiring board containing the resin layer and conductor layer which concern on this invention. It is a schematic diagram which shows a semiconductor device. It is typical sectional drawing shown about the modification of the manufacturing method of the printed wiring board containing the resin layer and conductor layer which concern on this invention. It is typical sectional drawing shown about the modification of the manufacturing method of the printed wiring board containing the resin layer and conductor layer which concern on this invention. It is typical sectional drawing shown about the modification of the manufacturing method of the printed wiring board containing the resin layer and conductor layer which concern on this invention. It is typical sectional drawing shown about the modification of the manufacturing method of the printed wiring board containing the resin layer and conductor layer which concern on this invention.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  First, the outline of the printed wiring board 1 of the present embodiment will be described with reference to FIG. FIG. 1A schematically shows a cross-sectional view of the printed wiring board 1. FIG. 1B schematically shows a plan view of the printed wiring board 1.

  As a printed wiring board, for example, a printed wiring board composed of a resin layer and a conductor layer formed on the substrate, a build-up multilayer printed wiring composed of a resin layer (for example, a buildup layer) formed on the printed wiring board and a conductor layer Examples thereof include a board, a metal core wiring board formed of a resin layer and a conductor layer formed on a metal substrate, and rewiring of a semiconductor element formed of a resin layer and a conductor layer formed on a wafer surface. In addition, as a substrate used for a printed wiring board, a metal substrate used for a metal core wiring board, and a wafer used for rewiring a semiconductor element, a commonly used one can be appropriately selected and used.

  The printed wiring board 1 of the present embodiment is a printed wiring board 1 including a resin layer 10 and a conductor layer 12. The resin layer 10 is provided with a recess 14 and has a conductor layer 12 embedded in the recess 14. The shape of the recess 14 in a sectional view is a shape in which the central portion 16 of the recess 14 is raised. In other words, the cross section of the concave portion 14 has a shape in which the central portion 16 rises more than other portions at the bottom.

  The shape of the conductor layer 12 in plan view is not particularly limited, and examples thereof include a conductor pattern (wiring pattern) extending in one direction, a rectangular conductor pad such as a square and a rectangle, and a circular conductor pad. In FIG. 1B, a circular conductor pad is shown. Further, the four corners of the rectangle may form an arc. From the viewpoint of workability, a circular shape is preferable. The maximum width of the conductor layer 12 embedded in the recess 14 on the surface of the resin layer 10 is usually the same as the maximum width of the recess 14.

As shown in FIG. 1A, when the conductor layer 12 is a conductor pad having a circular shape in plan view, the recess 14 in which the conductor pad is embedded has a circular shape in plan view. In this case, the recess 14 in which the conductor pad is embedded has a cross-sectional shape in which the central portion 16 is raised in any cross section passing through the center of the bottom surface of the recess 14. In addition, when the recessed part 14 is circular in planar view, it is provided so that the bottom face of the recessed part 14 may also be circular.
Further, when the conductor layer 12 is a conductor pad having a rectangular shape in plan view, the concave portion 14 in which the conductor pad is embedded also has a rectangular shape in plan view. In this case, the recess 14 in which the conductor pad is embedded has a cross-sectional shape in which the central portion 16 is raised in any cross section passing through the center of the diagonal line on the bottom surface of the recess 14. In addition, when the recessed part 14 is a rectangle in planar view, it is provided so that the bottom face of the recessed part 14 may also be a rectangle.

  Further, when the conductor layer 12 is a conductor pattern extending in one direction in plan view, the recess 14 in which the conductor pattern is embedded is also provided to extend in one direction. In this case, the concave portion 14 in which the conductor pattern is embedded has a cross-sectional shape in which the central portion 16 is raised in the cross section in the lateral direction. That is, the concave portion 14 is provided so that the bottom of the cross section in the short direction is raised more than the other portions in the central portion 16. In this case, the recess 14 in which the conductor pattern is embedded does not have a cross-sectional shape in which the central portion is raised in the cross section in the longitudinal direction. That is, the recess 14 is provided so that the bottom of the cross section in the longitudinal direction has a certain depth.

  A wiring groove 15 is provided on the resin layer 10, and a wiring pattern 13 is embedded in the wiring groove 15. Since the shape of the recess 14 in a sectional view is a shape in which the central portion 16 of the recess 14 is raised, a conductor circuit is embedded in the recess 14 by conductor plating, and then conductor plating other than the conductor circuit portion is etched. As a result, the surface of the conductor layer can be made flat without being depressed in the vicinity of the central portion 16.

At least one step may be formed from the raised central portion 16 of the concave portion 14 toward the deepest portion 17. FIG. 1A showing the present embodiment shows a case where the level difference is constituted by two levels. By providing a step from the central portion 16 toward the deepest portion 17, a smooth plating surface can be obtained when the concave portion 14 is embedded by plating.
Moreover, as shown to Fig.1 (a), the recessed part 14 is formed so that a width | variety may become large from a lower end toward an upper end in the cross section which has the shape where the center part 16 of the base side rose, for example. The recess 14 may be formed so that the width is constant from the lower end to the upper end.

The depth D1 from the surface of the resin layer 10 to the deepest portion 17 of the recess 14 (depth of the deepest portion) is preferably 1 μm or more and 40 μm or less, and more preferably 5 μm or more and 20 μm or less.
As shown in FIG. 2, the depth (D1) from the surface of the resin layer 10 to the deepest portion 17 of the recess 14 and the depth (D2) from the surface of the resin layer 10 to the upper end of the central portion 16 of the recess 14 The ratio (D2 / D1) is preferably 0.2 to 0.8, more preferably 0.3 to 0.6. By being in this range, when conductor plating other than the conductor circuit portion is removed by etching, the vicinity of the central portion 16 is not depressed, and the surface of the conductor layer can be made flat. When the size of the concave portion is wide, it is easily affected. That is, as the size of the concave portion 14 is wide, a depression is likely to be generated near the central portion 16. For this reason, it is preferable that the width | variety of the recessed part 14 is 20 micrometers or more by planar view. Thereby, the effect acquired by making the center part 16 of the recessed part 14 into the raised shape is exhibited more notably. When the conductor layer 12 is a conductor pattern extending in one direction, the width of the recess 14 in the short direction is preferably 20 μm or more in plan view. When the conductor pad is rectangular in plan view, the length of one side of the recess 14 in plan view is preferably 20 μm or more. Furthermore, when the conductor pad is circular in a plan view, the diameter of the recess 14 is preferably 20 μm or more in the plan view.
Further, it is preferable that the wiring pattern width of the wiring groove 15 is 20 μm or more. Thereby, an effect is exhibited more notably.

Further, similarly to the conductor layer 12, a wiring pattern 13 may be formed. In the aspect of the printed wiring board 1 of the present invention, the width of the wiring pattern 13 on the surface of the resin layer 10 is 1 μm or more and 10 μm or less. As a result, the printed wiring board can be made denser, higher mounted, and finer. Although not particularly limited, the width of the wiring pattern 13 on the surface of the resin layer 10 is more preferably 8 μm or less, further preferably 6 μm or less, and particularly preferably 4 μm or less. As a result, the effects of higher density and higher mounting can be effectively expressed.
Further, the depth of the wiring groove 15 on the surface of the resin layer 10 is preferably 1 μm or more and 20 μm or less. The cross-sectional shape of the conductor layer 12 is preferably substantially trapezoidal, bowl-shaped or triangular. As a result, it is possible to form fine wiring with excellent signal response. The conductor layer 12 embedded in the recess 14 is not particularly limited as long as it is a conductor, and is preferably formed by plating. For example, the conductor layer 12 preferably contains a metal such as copper or nickel.
The wiring pattern 13 is formed by the same process as that of the conductor layer 12, for example. The wiring pattern 13 is made of, for example, the same metal material as that of the conductor layer 12.

Next, each element constituting the printed wiring board 1 will be described.
The insulating substrate used for the printed wiring board 1 is not particularly limited. For example, the insulating substrate can be obtained by processing a substrate impregnated or coated with an insulating resin by heating, pressing, or the like. Examples of the substrate include glass fiber substrates such as glass woven fabric and glass nonwoven fabric, polyamide resin fibers, aromatic polyamide resin fibers, polyamide resin fibers such as wholly aromatic polyamide resin fibers, polyester resin fibers, and aromatic polyester resins. Synthetic fiber base material, kraft paper, cotton linter paper, linter, etc. composed of woven fabric or non-woven fabric mainly composed of fibers, polyester resin fibers such as wholly aromatic polyester resin fibers, polyimide resin fibers, fluororesin fibers, etc. Examples thereof include organic fiber base materials such as paper base materials mainly containing kraft pulp mixed paper. As the insulating resin, for example, cyanate resin, epoxy resin, benzocyclobutene resin, phenol resin, polyphenylene ether resin, maleimide resin, liquid crystal polymer, polyimide resin, polyamide resin, polyamideimide resin, and the like are used alone or in combination. Things. For example, when a polyimide resin, a liquid crystal polymer, an epoxy resin, or the like used for the flexible substrate is used as the insulating resin, it can be used without including a base material.

  The metal substrate used for the metal core wiring board is not particularly limited. For example, copper and copper alloys, aluminum and aluminum alloys, silver and silver alloys, gold and gold alloys, zinc and zinc alloys, nickel and Examples thereof include nickel-based alloys, tin and tin-based alloys, iron and iron-based alloys. A metal having a low coefficient of linear expansion such as 42 alloy may be used.

  The wafer used for the rewiring of the semiconductor element is not particularly limited. For example, silicon, germanium, silicon-germanium, silicon carbide, gallium phosphide, aluminum phosphide, gallium nitride, gallium arsenide, aluminum arsenide, Semiconductor materials such as indium phosphide, indium nitride, indium phosphide, gallium indium phosphide, indium arsenide phosphide, zinc sulfide, and zinc oxide can be given.

  The thickness of the resin layer 10 is not particularly limited, but is preferably 1 μm or more and 60 μm or less, and particularly preferably 5 μm or more and 40 μm or less. The thickness of the resin layer 10 is preferably equal to or higher than the lower limit for improving the insulation reliability, and is preferably equal to or lower than the upper limit for achieving a reduction in the thickness of the multilayer printed wiring board. Thereby, when manufacturing a printed wiring board, while being able to shape | mold the insulating layer with which the unevenness | corrugation of the conductor layer of the inner layer circuit board was filled, the thickness of a suitable insulating layer can be ensured.

  Next, the resin composition used for the resin layer 10 will be described. The resin composition for forming a resin layer preferably contains a thermosetting resin. That is, in the printed wiring board 1 of this invention, it is preferable that the resin layer 10 which has the said recessed part 14 is comprised with the hardened | cured material of the resin composition containing a thermosetting resin. By including the hardened | cured material of a thermosetting resin, the heat resistance of the resin layer 10 can be improved.

  Examples of thermosetting resins include novolak type phenolic resins such as phenol novolak resin, cresol novolak resin, bisphenol A novolak resin, unmodified resol phenol resin, oil-modified resol phenol resin modified with tung oil, linseed oil, walnut oil, and the like. Phenolic resin such as biphenyl aralkyl type phenol resin, bisphenol A epoxy resin, bisphenol F epoxy resin, bisphenol E type epoxy resin, bisphenol S type epoxy resin, bisphenol Z type epoxy resin, bisphenol P type epoxy resin Novolak type epoxy such as bisphenol type epoxy resin such as bisphenol M type epoxy resin, phenol novolak type epoxy resin, cresol novolak type epoxy resin, etc. Si resin, biphenyl type epoxy resin, biphenyl aralkyl type epoxy resin, arylalkylene type epoxy resin, naphthalene type epoxy resin, anthracene type epoxy resin, phenoxy type epoxy resin, dicyclopentadiene type epoxy resin, norbornene type epoxy resin, adamantane type epoxy resin Resin, epoxy resin such as fluorene type epoxy resin, resin having triazine ring such as urea (urea) resin, melamine resin, unsaturated polyester resin, bismaleimide resin, polyimide resin, polyamideimide resin, polyurethane resin, diallyl phthalate resin, Examples thereof include silicone resins, resins having a benzoxazine ring, triazine resins, benzocyclobutene resins, and cyanate resins. Among these, it is preferable to include one or more resins selected from epoxy resins, phenol resins, cyanate resins, and benzocyclobutene resins. The viewpoint of emphasizing that the thermal expansion coefficient of the resin layer 10 can be reduced, the electrical characteristics (low dielectric constant, low dielectric loss tangent) of the resin layer 10, mechanical strength, laser workability, particularly excimer laser and YAG laser workability. For example, it is preferable to contain cyanate resin.

  Examples of the epoxy resin include bisphenol A epoxy resin, bisphenol F epoxy resin, bisphenol E type epoxy resin, bisphenol S type epoxy resin, bisphenol Z type epoxy resin, bisphenol P type epoxy resin, and bisphenol M type epoxy resin. Epoxy resins, phenol novolac type epoxy resins, cresol novolac epoxy resins and other novolak type epoxy resins, biphenyl type epoxy resins, xylylene type epoxy resins, biphenyl aralkyl type epoxy resins and other aryl alkylene type epoxy resins, naphthalene type epoxy resins, naphthol aralkyl Type epoxy resin, anthracene type epoxy resin, phenoxy type epoxy resin, dicyclopentadiene type epoxy resin, norvol Emission type epoxy resins, adamantane type epoxy resins and fluorene type epoxy resins and the like. As the epoxy resin, one of these can be used alone, or two or more having different weight average molecular weights are used in combination, or one or two or more thereof and a prepolymer thereof are used in combination. You can also.

  Although content of an epoxy resin is not specifically limited, 1 to 55 weight% of the whole resin composition is preferable, and 5 to 40 weight% is especially preferable. If the content is less than the lower limit, the reactivity of the cyanate resin may decrease, or the moisture resistance of the resulting product may decrease. If the content exceeds the upper limit, the low thermal expansion and heat resistance will decrease. There is a case.

  Although the weight average molecular weight of an epoxy resin is not specifically limited, The weight average molecular weight 500-20000 is preferable and 800-15000 is especially preferable. If the weight average molecular weight is less than the lower limit, tackiness may occur on the surface of the resin layer 10, and if it exceeds the upper limit, solder heat resistance may be reduced. By setting the weight average molecular weight within the above range, it is possible to achieve an excellent balance of these characteristics. The weight average molecular weight of an epoxy resin can be measured by GPC, for example.

  The said thermosetting resin can be used 1 type or in combination of 2 or more types. Usually, it is used as a thermosetting resin in combination with a curing agent.

  The content of the thermosetting resin is not particularly limited, but is preferably 20 to 90% by weight, more preferably 30 to 80% by weight, and particularly preferably 40 to 70% by weight in the resin composition for forming a resin layer. If the content is less than the lower limit, it may be difficult to form the resin layer 10, and if the content exceeds the upper limit, the strength of the resin layer 10 may be reduced.

  The resin layer 10 (or resin composition for forming a resin layer) of the printed wiring board 1 of the present invention can contain an inorganic filler. When the resin layer 10 contains an inorganic filler, it has low thermal expansion, high elasticity, and low water absorption, which is preferable from the viewpoint of improving mounting reliability and warpage.

  When the inorganic filler is used as an insulating layer of the printed wiring board 1 with coarse grains exceeding 2 μm being 500 ppm or less, the circuit width / inter-circuit width (L / S) by laser processing is 10 μm / It is preferable from the viewpoints of excellent groove processability for forming fine wiring of 10 μm or less, fine via processing, and excellent adhesion between the formed insulating layer and the formed conductor circuit. The inorganic filler preferably further has a coarse particle exceeding 2 μm in an amount of 300 ppm or less, and particularly a coarse particle exceeding 2 μm in an amount of 5 ppm or less. In addition, the method of obtaining the inorganic filler whose coarse particle over 2 micrometers is 500 ppm or less is not specifically limited. For example, as a method of removing coarse particles exceeding 2 μm, in a slurry state in an organic solvent and / or water, coarse particles are removed several times with a pore size filter having an average particle size of 10 times or more, and then a pore size of 2 μm. It can be obtained by repeatedly removing coarse particles exceeding 2 μm with a filter.

  The coarse particle size and content of the inorganic filler can be measured with a particle image analyzer (FPIA-3000S manufactured by Sysmex Corporation). The inorganic filler can be dispersed by ultrasonic waves in water or an organic solvent, and the number of inorganic fillers exceeding 2 μm can be calculated and measured from the obtained image. Specifically, the content is defined by the number of particles exceeding 2 μm in the equivalent circle diameter of the inorganic filler and the total number of analyzed particles.

  Among these, the maximum particle size of the inorganic filler is preferably 2.0 μm or less. Thereby, the surface roughness of the resin layer 10 can be suppressed, and it is possible to form fine wiring with high insulation reliability and excellent signal response. Although not particularly limited, the maximum particle size of the inorganic filler is more preferably 1.8 μm or less, and particularly preferably 1.5 μm or less. Thereby, the effect | action which improves insulation reliability, signal responsiveness, the plating property in a via | veer and a groove | channel, and interlayer connection reliability can be expressed effectively.

  The average particle size of the inorganic filler is preferably 0.05 μm or more and 1.0 μm or less. Thereby, it becomes easy to realize fine wiring formation with high insulation reliability and excellent signal response. Further, when the average particle size of the inorganic filler is in the above range, the groove workability for forming fine wiring with a circuit width / inter-circuit width (L / S) of 10 μm / 10 μm or less by laser processing, As a result, excellent processability of the via can be achieved, and the surface roughness of the resin layer 10 can also be suppressed. The average particle size of the inorganic filler is preferably 0.05 μm or more and 0.60 μm or less, more preferably 0.05 μm or more and 0.50 μm or less, and particularly preferably 0.05 μm or more and 0.40 μm or less. Thereby, the effect | action which improves insulation reliability, signal responsiveness, the plating property in a via | veer and a groove | channel, and interlayer connection reliability can be expressed effectively.

  The average particle diameter of the inorganic filler can be measured by, for example, a laser diffraction scattering method. The inorganic filler is dispersed in water by ultrasonic waves, and the particle size distribution of the inorganic filler is created on a volume basis by a laser diffraction particle size distribution analyzer (HORIBA, LA-500). The median diameter is the average particle diameter. It can be measured by. Specifically, the average particle diameter of the inorganic filler is defined by D50.

  When the amount of coarse particles exceeding 2 μm of the inorganic filler exceeds the upper limit, the inorganic filler inhibits laser processing, and a portion where a groove cannot be formed in the resin layer 10 or the via shape becomes distorted, There is a possibility that the resin may crack, and there is a possibility that the insulation reliability and the plating property due to dropping off of the coarse filler may be lowered. Furthermore, since the time for forming vias and grooves with laser light becomes longer, there is a possibility that workability may be reduced. Moreover, the surface unevenness | corrugation of the conductor layer 10 after plating becomes large with the inorganic filler which remained on the groove | channel side wall surface after laser processing. As a result, the accuracy of the wiring and via shape deteriorates, and the insulation reliability may be impaired in a high-density printed wiring board. Furthermore, in a high frequency region exceeding 1 GHz, signal responsiveness may be impaired due to the skin effect. Even if the average particle size of the inorganic filler exceeds the upper limit, there is a similar possibility.

  Moreover, when the average particle diameter of the inorganic filler is less than the lower limit, the physical properties of the thermal expansion coefficient and elastic modulus of the resin layer 10 may be lowered, and the mounting reliability when mounting a semiconductor element may be impaired. Moreover, the dispersibility of the inorganic filler in the resin composition for resin layer formation, the occurrence of agglomeration may occur, and it may be difficult to form a resin film due to a decrease in flexibility in the B-stage state of the resin composition. is there.

  The inorganic filler is not particularly limited. For example, talc, fired clay, unfired clay, mica, glass and other silicates, titanium oxide, alumina, silica, fused silica and other oxides, carbonic acid Carbonates such as calcium, magnesium carbonate and hydrotalcite, hydroxides such as aluminum hydroxide, magnesium hydroxide, boehmite and calcium hydroxide, sulfates or sulfites such as barium sulfate, calcium sulfate and calcium sulfite, boric acid Borate salts such as zinc, barium metaborate, aluminum borate, calcium borate and sodium borate, nitrides such as aluminum nitride, boron nitride, silicon nitride and carbon nitride, titanic acid such as strontium titanate and barium titanate A salt etc. can be mentioned. As the inorganic filler, one of these can be used alone, or two or more can be used in combination. Among these, silica is preferable and fused silica is more preferable in terms of excellent low thermal expansion, flame retardancy, and elastic modulus. Among these, the shape is preferably spherical silica.

  When the inorganic filler is included in the resin layer 10 to the resin composition for forming a resin layer, the content of the inorganic filler is 10 to 80% by weight in the resin composition for forming the resin layer 10 to the resin layer, and further 20 to 20%. 70% by weight, particularly 30 to 60% by weight, is preferable from the viewpoint that it is possible to form a fine wiring with high insulation reliability and excellent signal response.

  In addition, the resin layer 10 to the resin composition for forming a resin layer include, if necessary, a film-forming resin such as a thermoplastic resin, a curing accelerator, a coupling agent, a pigment, a dye, an antifoaming agent, a leveling agent, You may add additives other than the said components, such as a ultraviolet absorber, a foaming agent, antioxidant, a flame retardant, and an ion-trapping agent.

Next, a method for forming the resin layer 10 will be described.
The method for forming the resin layer 10 is not particularly limited. For example, a resin varnish is prepared by dissolving and dispersing a resin composition for forming a resin layer in a solvent and the like, and using the various coater apparatuses, the resin varnish is used as a carrier film. The method of drying this after applying to a carrier etc., and the method of obtaining the resin sheet with a carrier film, such as the method of spraying the resin varnish on the carrier film using a spray device, and then drying this, are mentioned. . Among these, it is preferable to apply a resin varnish to a carrier film or the like using various coaters such as a comma coater or a die coater and then dry the resin varnish. Thereby, the resin sheet with a carrier which does not have a void and has the thickness of the uniform resin layer can be manufactured efficiently.

  The resin layer 10 can be formed by thermocompression-bonding the obtained resin sheet with a carrier film to a substrate using, for example, a laminator or a vacuum press machine. The resin layer 10 can also be formed by directly coating the substrate with a resin varnish. In addition to the printed wiring board, for example, when the resin layer 10 is formed on the wafer, the resin layer is formed by a method of producing a resin sheet with a carrier film and thermocompression bonding as described above, or a method of coating a resin varnish. 10 can be formed.

  The solvent used in the resin varnish desirably exhibits good solubility in the resin component in the resin composition, but a poor solvent may be used within a range that does not adversely affect the resin varnish. Examples of the solvent exhibiting good solubility include acetone, methyl ethyl ketone, methyl isobutyl ketone, cyclohexanone, tetrahydrofuran, dimethylformamide, dimethylacetamide, dimethyl sulfoxide, ethylene glycol, cellosolve and carbitol. Although it does not specifically limit as solid content in the said resin varnish, 30 to 80 weight% is preferable and especially 40 to 70 weight% is preferable.

Next, a preferred method for manufacturing the printed wiring board 1 will be described.
The manufacturing method of the printed wiring board 1 is as follows:
(A) a step of preparing an insulating substrate made of the resin layer 10 (FIG. 3);
(B) a step of processing the resin layer 10 to form a recess 14 in which the central portion 16 is raised (FIGS. 4 to 6);
(C) The process of forming the conductor layer 12 embedded in the recessed part 14 by plating (FIGS. 7-9) is included.

  In the step (b), it is preferable to use the laser beam 5 for the formation of the recess 14, and the laser beam 5 is preferably an excimer laser or a YAG laser. By using these lasers, the concave portions 14 can be formed with high accuracy and shape, and fine wirings can be formed and the density can be increased. Although not particularly limited, the laser wavelength of the excimer laser is more preferably 193 nm, 248 nm, and 308 nm, and particularly preferably 193 nm and 248 nm. Thereby, the effect | action which can form a recessed part with sufficient precision and a shape can be expressed effectively. The wavelength of the YAG laser is preferably 355 nm. At other wavelengths, the resin composition constituting the resin layer 10 may not absorb the laser beam 5 and may not be able to form a recess. The laser beam 5 is applied to the resin layer 10 through the mask 6.

  In the step (b) of forming the recess 14, the depth of the recess may be changed by irradiating the laser beam a plurality of times by using a laser beam. The method of irradiating the laser beam a plurality of times is, for example, larger than the diameter of the laser beam 5 used in the steps (b1), (FIG. 4), and (b1) of irradiating the entire region where the recess 14 is formed with the laser beam 5. Steps (b2) and (FIG. 5) of rotating the laser beam 5 having a small diameter along the peripheral edge of the region where the recess 14 is formed are included. Further, after the step (b2), a step (b3) in which the laser beam 5 having a diameter smaller than the diameter of the laser beam 5 used in the step (b2) is circulated along the peripheral portion of the region where the recess 14 is formed. May be further included (FIG. 6).

As described above, the step (b) of forming the recess 14 includes (b1) the first step of irradiating the entire region where the recess 14 is formed with the laser beam 5 and (b2) the first step (b1). A second stage step of irradiating the laser beam 5 having an irradiation area smaller than the irradiation area of the irradiated laser beam 5 along the peripheral edge of the region where the recess 14 is formed may be performed. Further, the step (b) of forming the concave portion 14 includes a laser beam having an irradiation area smaller than the irradiation area of the laser beam 5 irradiated in the second step (b2) after the second step (b2). You may carry out so that the 3rd step process (b3) irradiated along the peripheral part of the area | region which forms the recessed part 14 may be further included. Specifically, it is performed as follows.
As shown in FIG. 4, in the first step (b 1), the first step recess (A) is processed by the laser beam 5 using the mask 6 that matches the shape of the desired conductor layer (conductor pad) 12. Next, in the second step (b2), as shown in FIG. 5, the second step recess (B) is formed using a mask 7 having a diameter smaller than the diameter of the mask 6 used in the first step (b1). Form. In the first step (b1), the first step recess (A) is formed by irradiating the same place with the laser beam 5 for a certain period of time. In the second step (b2), the mask 7 or the insulating substrate is moved to the first step. A second step recess (B) is formed by rotating along the outer periphery of the recess (A). Thereby, the laser beam 5 is not irradiated in the vicinity of the central portion, and a concave portion having a step is formed. Next, in the third step (b3), a third step recess (C) is formed. As the mask 8 for forming the third step recess (C), the mask 8 having a smaller diameter than the mask 7 used in the second step (b2) is used. In the third step (b3), the third step recess (C) is formed by rotating the mask 8 or the insulating substrate along the outer periphery of the second step recess (B). Thereby, the recessed part 14 which the center part raised in the step shape can be formed. The laser light irradiation conditions may be the same or different. In the above description, since the shape of the conductor pad is circular, the shape of the masks 6, 7 and 8 of the laser beam 5 is circular. However, the shape is not limited to this, and for example, as shown in FIG. In the case of a rectangular conductor pad, a square or rectangular mask may be used as the masks 6, 7 and 8 for the laser beam 5 (FIGS. 12 to 14).

In the method for manufacturing a printed wiring board of the present invention, it is preferable that a step of desmearing with plasma or a chemical solution is included between step (b) and step (c). This makes it possible to form fine wiring and vias with high electrical reliability, except for carbides remaining on the side wall surfaces of the recesses 14 when the recesses 14 are formed by the laser light 5.
Although it does not specifically limit as plasma, Nitrogen plasma, oxygen plasma, argon plasma, tetrafluoromethane plasma, or plasma of these mixed gas can be used for plasma. Moreover, it is preferable that the plasma processing conditions are such that carbides remaining on the inner surfaces of the recesses 14 and the wiring grooves 15 can be sufficiently removed. This makes it possible to form vias with high insulation reliability and excellent signal response. In a high frequency region exceeding 1 GHz, transmission loss due to the skin effect can be reduced, and further, plating defects and interlayer connection defects in vias can be reduced.

  Although it does not specifically limit as desmear by a chemical | medical solution, Permanganate, a dichromic acid, etc. can be used. Moreover, it is preferable that the desmear treatment conditions are conditions that can sufficiently remove the carbides remaining on the inner surfaces of the recesses 14 and the wiring grooves 15. This makes it possible to form vias with high insulation reliability, signal responsiveness, and excellent reduction in plating defects and interlayer connection defects in the vias. In a high frequency region exceeding 1 GHz, transmission loss due to the skin effect can be reduced. If the desmear process with plasma or chemicals is insufficient and carbides remain on the inner surfaces of the recesses 14 and the wiring grooves 15, the insulation reliability of the printed wiring board 1 may be reduced.

In the step (c) of the present invention, for example, the conductor layer 12 is formed on the surface of the resin layer 10 and in the recess 14, the conductor layer 12 formed outside the recess 14 is removed, and the conductor layer 12 is formed in the recess 14. Leaving the step. Specifically, it is performed as follows.
First, after the step of desmearing the resin layer 10 with plasma or a chemical solution, plating is formed in the recess 14. As a plating formation method, for example, the electroless plating layer 50 is formed on the surface of the resin layer 10 (FIG. 7). At this time, the electroless plating layer 50 is formed on the surface of the resin layer 10, the recesses 14, and the inner walls of the wiring grooves 15. The type of metal of the electroless plating layer 50 is not particularly limited, but copper, nickel and the like are preferable. With these metals, the adhesion between the resin layer 10 and the electroless plating layer 50 is good. The thickness of the electroless plating layer 50 is not particularly limited, but is preferably about 0.1 μm or more and 5 μm or less. Furthermore, after the electroless plating, the adhesion between the resin layer 10 and the electroless plating layer 50 can be improved by performing a heat treatment at 150 ° C. to 200 ° C. for 10 minutes to 120 minutes with a hot air drying apparatus.
Next, an electrolytic plating layer 60 is further formed by electrolytic plating. In this step, the insides of the recesses 14 and the wiring grooves 15 formed by the laser beam 5 can be filled with the electrolytic plating layer 60. For the electrolytic plating, copper sulfate electrolytic plating can be used. Moreover, although not specifically limited, it is preferable that additives, such as a leveler agent, a polymer, and a brightener agent, are contained in a plating solution. As a result, plating is preferentially deposited inside the recesses 14 and the wiring grooves 15 formed in the resin layer 10 and filled with the electrolytic plating layer 60, and the resin layer 10 surface layer after the electrolytic plating and the recesses 14 and the wiring The plating deposition level on the groove 15 is equivalent. The thickness of the electrolytic plating layer 60 is not particularly limited, but is preferably about 5 μm or more and 25 μm or less from the surface of the resin layer 10.
As a result, as shown in FIG. 8, the conductor layer 12 including the electroless plating layer 50 and the electrolytic plating layer 60 is formed on the surface of the resin layer 10 and in the recess 14.

Next, by removing a part of the conductor layer 12 formed by electroless plating or electrolytic plating, the conductor layer 12 and the wiring pattern 13 are formed only inside the recess 14 and the wiring groove 15 of the resin layer 10. . Although not particularly limited, a method of removing a part of the conductor layer 12 formed by electrolytic plating is preferably a chemical etching process, a polishing process, a buff polishing process, or the like. Thereby, it is possible to effectively remove only the conductor layer 12 on the surface layer of the resin layer 10 and leave the conductor layer 12 and the wiring pattern 13 only inside the recesses 14 and the wiring grooves 15. In this way, it is possible to produce a printed wiring board excellent in electrical reliability, signal responsiveness, plating inside the recesses, and interlayer connectivity.
In this manner, the conductor layer 12 formed outside the recess 14 can be removed and the conductor layer 12 can be left in the recess 14 as shown in FIG.

Step (c) of the present invention can also be performed, for example, as follows.
First, as shown in FIG. 16, an electroless plating layer 51 is formed on the surface of the resin layer 10. At this time, the electroless plating layer 51 is also formed on the inner walls of the recess 14 and the wiring groove 15. The metal type of the electroless plating layer 51 is not particularly limited, but copper, nickel, and the like are preferable. By using these metals, the adhesion between the resin layer 10 and the electroless plating layer 51 can be improved. The thickness of the electroless plating layer 51 is not particularly limited, but is preferably 0.1 μm or more and 5 μm or less, for example.
Next, as shown in FIG. 17, a resist film 80 is formed on the electroless plating layer 51. Next, the resist film 80 is exposed and developed. As a result, a resist film 80 having openings on the recesses 14 and the wiring grooves 15 is formed on the electroless plating layer 51.
Next, as shown in FIG. 18, the conductor layer 12 and the wiring pattern 13 are embedded in the recess 14 and the wiring groove 15. The conductor layer 12 and the wiring pattern 13 are formed, for example, by embedding the electrolytic plating layer 61 in the recess 14 and the wiring groove 15 by electrolytic plating using the electroless plating layer 51 as a seed layer. The electrolytic plating is, for example, copper sulfate electrolytic plating. Moreover, it is preferable that additives, such as a leveler agent, a polymer, an unreliable toner agent, are contained in a plating solution.
Next, as shown in FIG. 19, the resist film 80 is removed. The resist film can be removed by, for example, an ashing process.
Next, the electroless plating layer 51 provided on the surface of the resin layer 10 and outside the recess 14 and the wiring groove 15 is removed. The electroless plating layer 51 is removed by, for example, flash etching.
In this way, the conductor layer 12 that fills the recess 14 is formed.

  The manufacturing method of this invention can include the process (d) of forming another resin layer 40 on the resin layer 10, the conductor layer 12, and the wiring pattern 13 after a process (c) (FIG. 10). In the process of the present invention, by forming another resin layer 40 on the resin layer 10, the conductor layer 12, and the wiring pattern 13, each conductor layer serving as the wiring of the multilayer printed wiring board is covered with the resin layer. Insulation between vias is ensured. Although not particularly limited, as a method of forming the resin layer 40 on the resin layer 10, the conductor layer 12, and the wiring pattern 13, the resin sheet with a carrier film is vacuumed, for example, as in the case of preparing the resin layer 10. The method of forming on the resin layer 10 using a pressurization type laminator apparatus, a flat plate press apparatus, etc. is mentioned. Similarly to the resin layer 10, the resin layer 40 is provided with a conductor layer, a wiring pattern, a via layer for electrically connecting the conductor layer formed on the resin layer 40 and the conductor layer 12 formed on the resin layer 10. be able to. Thus, by repeating the above steps (a), (b), (c), and (d), the build is excellent in electrical reliability, signal responsiveness, plating in the recesses 14 and wiring grooves 15 and interlayer connectivity. It is possible to produce a multilayer printed wiring board 1 (build-up multilayer printed wiring board) that has been uploaded.

Next, the semiconductor device 70 will be described.
A semiconductor device 70 according to the present invention is characterized in that a semiconductor element 71 is mounted on the printed wiring board 1 according to the present invention. A semiconductor element 71 having a solder bump 73 is mounted on the printed wiring board 1, and the printed wiring board 1 and the semiconductor element 71 are connected via the solder bump 73. Then, a liquid sealing resin is filled as an adhesive layer 75 between the printed wiring board 1 and the semiconductor element 71 to manufacture the semiconductor device 70 (FIG. 15).

  The solder bump 73 is preferably made of an alloy made of tin, lead, silver, copper, bismuth, or the like. The semiconductor element 71 and the printed wiring board 1 are connected by aligning the connecting electrode portion on the printed wiring board 1 with the solder bump 73 of the semiconductor element 71 using a flip chip bonder or the like, and then performing an IR reflow process. The solder bumps 73 are heated to the melting point or higher by using a device, a hot plate, or other heating device, and the printed wiring board 1 and the solder bumps 73 are connected by fusion bonding. In order to improve connection reliability, a metal layer having a relatively low melting point such as solder paste may be formed in advance on the connection electrode portion on the printed wiring board 1. Prior to this bonding step, the connection reliability can be improved by applying a flux to the solder bump 73 or the surface layer of the connection electrode portion on the printed wiring board 1.

  In the embodiment, the shape in which the central portion is raised has been described. However, the raised portion is not one place, and for example, a plurality of raised portions may be included. In addition, the step may not have a step or may have a gentle shape.

  Hereinafter, although an example and a comparative example explain the present invention, the present invention is not limited to this.

  20 parts by weight of novolak-type cyanate resin (Lonza Japan Co., Ltd., Primaset PT-30, weight average molecular weight of about 700), 35 weights of methoxynaphthalenedi-methylene-type epoxy resin (Dainippon Ink Chemical Co., Ltd., EXA-7320) Parts, 5 parts by weight of a phenoxy resin (manufactured by Japan Epoxy Resin Co., Ltd., jER4275), 0.2 parts by weight of an imidazole compound (manufactured by Shikoku Chemicals Co., Ltd., Curazole 1B2PZ (1-benzyl-2-phenylimidazole)) are dissolved in methyl ethyl ketone, Dispersed. Inorganic filler / spherical fused silica (SFP-20M, manufactured by Denki Kagaku Kogyo Co., Ltd.) is filtered and removed using a multilayer cartridge filter (Sumitomo 3M Co., Ltd.) to remove particles that exceed the maximum particle size of 2.0 μm. Then, 40 parts by weight of an inorganic filler / spherical fused silica having an average particle size of 0.4 μm was added. A resin having a solid content of 50% by weight by adding 0.2 parts by weight of a coupling agent / epoxysilane coupling agent (GE-Toshiba Silicone Co., Ltd., A-187) and stirring for 10 minutes using a high-speed stirring device. A varnish was prepared.

  The resin varnish obtained above was applied to one side of a PET (polyethylene terephthalate) film having a thickness of 25 μm using a comma coater device so that the thickness of the resin film after drying was 40 μm. It dried for 10 minutes with the drying apparatus of ° C, and produced the resin layer with a carrier layer.

This resin layer with a carrier layer is superposed on the front and back of a core substrate with a conductor layer, and this is subjected to vacuum heating and pressure molding at a temperature of 100 ° C. and a pressure of 1 MPa using a vacuum pressurizing laminator device, and then a hot air drying device. And cured at 180 ° C. for 45 minutes to obtain a substrate with a resin layer.
In addition, the following were used as a core substrate with a double-sided conductor layer.
・ Resin layer: Halogen-free, core substrate, thickness 0.4mm
Conductor layer: copper foil thickness 18 μm, circuit width / inter-circuit width (L / S) = 120/180 μm, clearance holes 1 mmφ, 3 mmφ, slit 2 mm

The recess has a shape having three steps as shown in FIG. Further, by changing the mask diameter to the resin layer of the substrate with the resin layer using an excimer laser having a wavelength of 193 nm, the conductor layer has D1 = 20 μm, D2 = 10 μm, d1 = 50 μm, d2 = 20 μm, d3 = 10 μm. Formed.
The processing conditions were set as follows.
Frequency: 100Hz
Energy: 500 mJ / cm ²
Scan speed: 65 μm / sec

  The substrate with the resin layer having the groove formed is immersed in a swelling solution at 60 ° C. (Swelling Dip Securigant P500, manufactured by Atotech Japan Co., Ltd.) for 10 minutes with the carrier layer, and further an aqueous potassium permanganate solution at 80 ° C. After being immersed in (Concentrate Compact CP, manufactured by Atotech Japan Co., Ltd.) for 20 minutes, it was neutralized and desmeared.

  Next, the carrier film was peeled off, followed by degreasing, catalyst application, and activation steps, and then an electroless copper plating layer of about 0.2 μm was formed.

Next, electroless copper plating (Okuno Pharmaceutical Co., Ltd., Top Lucina α) was performed at 3 A / dm ² for 30 minutes using the electroless copper plating layer as an electrode to form a conductor layer having a resin surface thickness of about 5 μm.

  The conductor layer existing on the resin surface layer was removed by performing a quick etching process (manufactured by Ebara Densan Co., Ltd., SAC process) to ensure insulation between the wirings. Next, the insulating resin layer was completely cured at a temperature of 200 ° C. for 60 minutes.

  Finally, a solder resist (manufactured by Taiyo Ink Manufacturing Co., Ltd., PSR4000 / AUS308) was formed on the circuit surface to prepare a four-layer printed wiring board.

  The obtained four-layer printed wiring board was a desired printed wiring board having a conductor layer having a smooth surface on the resin layer surface.

<Manufacture of semiconductor devices>
A semiconductor device was manufactured using each multilayer printed wiring board obtained in the above examples and comparative examples.
As a semiconductor element (TEG chip, size 15 mm × 15 mm, thickness 0.725 mm), solder bumps are formed of eutectic with a diameter of 100 μm, a pitch of 150 μm, and Sn / Pb composition, and a circuit protective film is a positive photosensitive resin (Sumitomo) What was formed by Bakelite CRC-8300) was used. In assembling the semiconductor device, first, a flux material is uniformly applied to the solder bumps by a transfer method, and then a flip chip bonder device is used to form a semiconductor element on each multilayer printed wiring board obtained in the above-described examples and comparative examples. Was mounted by thermocompression bonding. Next, after melt-bonding the solder bumps in an IR reflow furnace, a liquid sealing resin (CRP-4152S, manufactured by Sumitomo Bakelite Co., Ltd.) is filled between each multilayer printed wiring board and the semiconductor element, and the liquid sealing resin is filled. A semiconductor device was obtained by curing. The liquid sealing resin was cured at a temperature of 150 ° C. for 120 minutes.

<Evaluation of semiconductor devices>
A chip was mounted on the smooth surface, and a semiconductor device as designed was obtained.

  This application claims the priority on the basis of Japanese application Japanese Patent Application No. 2011-066706 for which it applied on March 25, 2011, and takes in those the indications of all here.

Claims (16)

A printed wiring board comprising a resin layer and a conductor layer,
The resin layer is provided with a recess, and has the conductor layer embedded in the recess,
Shape in cross section of the recess, Ri shape der the central portion of the recess is raised,
A printed wiring board in which at least two steps are formed from the deepest part of the concave part toward the raised central part of the concave part .   The printed wiring board according to claim 1, wherein the conductor layer is a conductor pattern extending in one direction in a plan view.   The printed wiring board according to claim 2, wherein the concave portion in which the conductive pattern is embedded has a cross-sectional shape in which a central portion is raised in a cross section in a short direction.   The printed wiring board according to claim 2 or 3, wherein a width of the concave portion in a short direction is 20 µm or more. The conductor layer is a conductor pad having a rectangular shape in plan view,
The printed wiring board according to claim 1, wherein the concave portion in which the conductive pad is embedded has a rectangular shape in plan view.   The printed wiring board according to claim 5, wherein the concave portion in which the conductor pad is embedded has a cross-sectional shape in which a central portion is raised in any cross section passing through the center of a diagonal line on the bottom surface of the concave portion.   The printed wiring board according to claim 5 or 6, wherein a length of one side of the concave portion is 20 µm or more. The conductor layer is a conductor pad having a circular shape in plan view,
The printed wiring board according to claim 1, wherein the recess in which the conductor pad is embedded has a circular shape in a plan view.   The printed wiring board according to claim 8, wherein the concave portion in which the conductor pad is embedded has a cross-sectional shape in which a central portion is raised in any cross section passing through the center of the bottom surface of the concave portion.   The printed wiring board according to claim 8 or 9, wherein a length of the diameter of the concave portion is 20 µm or more. The ratio (D2 / D1) of the depth (D1) from the resin layer surface to the deepest part of the recess and the depth (D2) from the resin layer surface to the upper end of the central part of the recess is 0. a claims 1 to 2 to 0.8 to a printed wiring board according to 1, wherein one of 10. A method for producing a printed wiring board comprising a resin layer and a conductor layer,
(A) preparing an insulating substrate including a resin layer;
(B) processing the resin layer to form a recess with a raised central portion;
(C) forming a conductor layer embedded in the recess by plating;
Only including,
The step (b) of forming the recess includes
(B1) a first stage step of irradiating the entire region where the recess is formed with laser light;
(B2) a second stage step of irradiating a laser beam having an irradiation area smaller than the irradiation area of the laser beam irradiated in the first stage step (b1) along the peripheral edge of the region where the concave portion is formed;
After the second step (b2), the laser beam having an irradiation area smaller than the irradiation area of the laser beam irradiated in the second step (b2) is applied to the peripheral portion of the region where the recess is formed. And a third step (b3) of irradiating along the printed wiring board. The step (c) of forming the conductor layer includes:
Forming the conductor layer on the resin layer surface and in the recess;
Removing the conductor layer formed outside the recess and leaving the conductor layer in the recess;
The manufacturing method of the printed wiring board of Claim 12 containing this. The method for manufacturing a printed wiring board according to claim 12 , wherein the laser beam is an excimer laser or a YAG laser. After the step (c) of forming the conductor layer,
(D) forming another resin layer on the resin layer and the conductor layer;
The manufacturing method of the printed wiring board of any one of Claims 12 thru | or 14 containing these. Wherein a formed by mounting a semiconductor element on a printed wiring board according to any one of claims 1 to 11.

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