CN110958762A - Printed wiring board - Google Patents
Printed wiring board Download PDFInfo
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- CN110958762A CN110958762A CN201910907814.6A CN201910907814A CN110958762A CN 110958762 A CN110958762 A CN 110958762A CN 201910907814 A CN201910907814 A CN 201910907814A CN 110958762 A CN110958762 A CN 110958762A
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- printed wiring
- wiring
- insulating layer
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Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
- H05K1/0298—Multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
- H05K1/116—Lands, clearance holes or other lay-out details concerning the surrounding of a via
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/0929—Conductive planes
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09563—Metal filled via
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
A printed wiring board (1) of the present disclosure includes: a plurality of insulating layers (5) stacked in the thickness direction; a plurality of wiring conductors (3) respectively located between the insulating layers (5); a through hole (6) that penetrates the plurality of insulating layers (5) and the plurality of wiring conductors (3) in the thickness direction; and a via conductor (3a) located on the wall surface of the via (6). The 1 st surface 3s of the wiring conductor facing the through hole 6 is located further outside than the 2 nd surface 5s of the insulating layer facing the through hole 6 with reference to the central axis passing through the through hole 6 in the thickness direction.
Description
Technical Field
The present disclosure relates to a printed wiring substrate.
Background
At present, printed wiring boards on which high-performance package substrates and electronic components are mounted have been developed. The printed wiring board includes a plurality of stacked insulating layers and wiring conductors. The wiring conductors are located on the upper and lower surfaces of the laminated insulating layers or between the insulating layers. The wiring conductors located in different layers are electrically connected to each other through via conductors in via holes penetrating the insulating layer in the thickness direction. Such a printed wiring board is mounted with a package substrate, an electronic component, and the like, and is mounted on an electronic device such as a server, for example.
In recent years, as electronic devices have been developed to have higher functions, package substrates and electronic components have been developed to have higher functions, and the number of signal systems and the amount of power supplied tend to increase. Therefore, the printed wiring board requires an increased number of wiring conductors. In order to meet such a demand, the printed wiring board may secure a formation region of a wiring conductor by increasing the number of insulating layers. For example, japanese patent application laid-open No. 2000-244129 describes a wiring board including a layered capacitor including a composite dielectric layer and a metal layer at a position close to an electronic component such as an IC chip.
Disclosure of Invention
The printed wiring board according to the present embodiment includes: a plurality of insulating layers stacked in a thickness direction; a plurality of wiring conductors respectively located correspondingly between the plurality of insulating layers; a through hole penetrating the plurality of insulating layers and the plurality of wiring conductors in the thickness direction; and a via conductor located on a wall surface of the via. The 1 st surface of the wiring conductor facing the through hole is located further outside than the 2 nd surface of the insulating layer facing the through hole with reference to a central axis passing through the through hole in the thickness direction.
Drawings
Fig. 1 is a schematic cross-sectional view showing an embodiment of the printed wiring board of the present disclosure.
Fig. 2 is an enlarged cross-sectional view showing a main part of an embodiment of the printed wiring board of the present disclosure.
Fig. 3 is a schematic cross-sectional view showing a main part of another embodiment of the printed wiring board of the present disclosure.
Fig. 4 is a schematic cross-sectional view showing another embodiment of the printed wiring board of the present disclosure.
Fig. 5A is a partial electron micrograph shown in a schematic sectional view in fig. 3, and fig. 5B is an enlarged photograph of the region X shown in fig. 5A.
Fig. 6 is an electron micrograph showing a boundary surface between a wiring conductor and a via conductor in a conventional printed wiring board.
Detailed Description
Next, the printed wiring board of the present disclosure will be described with reference to fig. 1 and 2. The printed wiring board 1 includes an insulating base 2, a wiring conductor 3, and a solder resist 4. The printed wiring board 1 has a wiring board such as a package board, an electronic component, and the like mounted on an upper surface thereof. The thickness of the printed wiring board 1 is about 0.04 to 10.0 mm.
The insulating base 2 has 5 insulating layers 5 stacked in the thickness direction. The insulating layer 5 is made of an insulating material in which a reinforcing glass cloth is impregnated with an epoxy resin, a bismaleimide triazine resin, or the like. The insulating base 2 has a function of securing an arrangement region of the wiring conductors 3 in the printed wiring board 1, a function as a support for maintaining flatness, and the like. The thickness of each insulating layer 5 is set to 20 to 400 μm, for example.
The insulating base 2 is formed as follows, for example. First, two double-sided copper-clad laminate sheets are prepared. The double-sided copper-clad laminate is, for example, a laminate in which copper foils are attached to the upper and lower surfaces of an insulating plate in which insulating resin is impregnated into glass cloth. Next, the copper foil of each double-sided copper-clad laminate is etched to form the wiring conductor 3 having a predetermined pattern. Next, three prepregs and two copper foils were prepared. The prepreg is, for example, a semi-cured insulating material obtained by impregnating a glass cloth with an insulating resin. Next, a double-sided copper-clad laminate, a prepreg, and a copper foil were laminated in this order on the upper and lower surfaces of one prepreg. Next, the insulating base 2 as described above is formed by press working under heating.
As described above, the wiring conductor 3 formed of the copper foil based on the double-sided copper-clad laminate may have, for example, a strip-shaped crystal grain in the thickness direction. In other words, the crystal interfaces between the crystal grains are mostly oriented in the thickness direction, and the crystal interfaces oriented in the horizontal direction orthogonal to the thickness direction are few. Therefore, it is advantageous in that the crack resistance of the wiring conductor 3 can be improved when the printed wiring board 1 thermally expands and applies a stress in the thickness direction.
The insulating base 2 has a plurality of through holes 6 penetrating in its thickness direction. The through holes 6 are through holes in which the 2 nd surfaces 5s of the plurality of insulating layers and the 1 st surfaces 3s of the plurality of wiring conductors are exposed. The wiring conductors 3 on the upper and lower surfaces of the insulating base 2, or the wiring conductors 3 between the upper and lower surfaces of the insulating base 2 and the insulating layer 5 are electrically connected to each other through the through-holes 6. The diameter of the through-hole 6 is set to 50 to 2000 μm, for example.
As shown in fig. 2, in the through hole 6, the 1 st surface 3s of each wiring conductor is located outside the 2 nd surface 5s of the insulating layer with respect to the central axis passing through the through hole 6 in the thickness direction. The height difference between the 1 st surface 3s of the wiring conductor and the 2 nd surface 5s of the insulating layer is set to be, for example, in the range of 1 to 10 μm.
If the difference in height between the two is less than 1 μm, a part of the via hole conductor 3a described later is located further outside than the 2 nd surface 5s of the insulating layer. Therefore, the effect of locking the via hole conductor 3a to the insulating layer 5 is reduced. If the thickness is more than 10 μm, the plating treatment solution may not flow back well to the 1 st surface 3s of the wiring conductor when forming the through-hole conductor 3a described later, and the plated copper metal may be deposited poorly. Therefore, there is a possibility that the connection of the via conductor 3a and the 1 st surface 3s of the wiring conductor becomes incomplete. In view of these points, it is advantageous in terms of quality and productivity to set the height difference between the 1 st surface 3s of the wiring conductor and the 2 nd surface 5s of the insulating layer to 3 to 7 μm.
Such a through-hole 6 is formed, for example, as follows. First, a through hole penetrating the insulating base 2 in the thickness direction is formed by drilling. Next, resin dust remaining in the through hole is removed by desmear treatment. Finally, the wiring conductor 3 exposed in the through hole 6 is etched and dissolved to have the above-described level difference. Thereby, the through-hole 6 as described above is formed.
This etching treatment also has an effect of removing metal chips that have not been completely removed by the desmear treatment and resin chips that have adhered to the 1 st surface 3s of the wiring conductor exposed in the through hole.
The wiring conductors 3 are located between the insulating layers 5, the upper and lower surfaces of the insulating base 2, and the inside of the through-holes 6. The wiring conductor 3 constitutes a conductive path of the printed wiring board 1, and has functions such as signal propagation and power supply. The wiring conductor 3 is made of a metal having good conductivity such as copper, for example.
Among the wiring conductors 3, those located in the through-holes 6 function as through-hole conductors 3 a. Each through-hole conductor 3a has a function for a signal for propagation of a signal, a power supply for supply of electric power, or a grounding. The via hole conductors 3a electrically connect the wiring conductors 3 on the upper and lower surfaces of the insulating base 2 to each other, or the wiring conductors 3 between the wiring conductors 3 on the upper and lower surfaces of the insulating base 2 and the insulating layer 5 to each other.
The via conductor 3a is in a cylindrical shape having a hollow in the center in the radial direction of the via hole 6, and is in a state of being in close contact with the entire 1 st surface 3s of the wiring conductor facing the via hole 6 and the entire 2 nd surface 5s of the insulating layer. As described above, the 1 st surface 3s of the wiring conductor is located outside the 2 nd surface 5s of the insulating layer with respect to the central axis of the through hole 6 in the thickness direction. Therefore, a part of the via conductor 3a exists in a state of entering between the insulating layers 5.
In other words, in the through hole 6, the exposed portion of the 1 st surface 3s of the wiring conductor is recessed with respect to the 2 nd surface 5s of the insulating layer. The via hole conductor 3a is in close contact with the 1 st surface 3s of the wiring conductor located in the recess, and also in close contact with the 2 nd surface 5s of the insulating layer.
The contact area between the via hole conductor 3a and the 2 nd surface 5s of the insulating layer is increased, which is advantageous for improving the adhesion strength of the via hole conductor 3 a. In particular, the through-hole conductor 3a in the recess functions as a stopper with respect to the insulating layer 5 in the thickness direction, and thus the shear stress between the through-hole conductor 3a and the insulating layer 5 can be suppressed. Further, the shear stress between the through hole conductor 3a and the 1 st surface 3s of the wiring conductor can be suppressed.
The 1 st surface 3s of the wiring conductor facing the via hole 6 has a linear shape in the cross-sectional view shown in fig. 2, but may have a curved shape. In such a case, the contact area with the via hole conductor 3a increases. Therefore, it is advantageous in that the adhesion strength between the 1 st surface 3s of the wiring conductor and the via hole conductor 3a can be improved.
The hole-filling resin 7 filled in the hollow of the via-hole conductor 3a is located in the via-hole 6. The hole-filling resin 7 is not essential in the present disclosure, but is used when the printed wiring board 1 has a structure in which, for example, the openings above and below the through-hole 6 are closed with a conductor layer, an insulating layer, or the like.
In the through hole 6, the inside of the through hole conductor 3a is filled with the hole filling resin 7, so that gas and liquid hardly remain in the through hole 6. This can prevent the wiring conductor 3 and the like from being damaged or corroded due to expansion of gas, corrosion of liquid, and the like.
The hole-filling resin 7 includes, for example, a thermosetting resin such as an epoxy resin and insulating particles such as silica.
The upper and lower surfaces of the insulating base 2 and the wiring conductor 3 located in the through hole 6 are formed, for example, as follows.
First, the insulating base 2 having the through-hole 6 formed therein through the above-described steps is prepared. Next, the upper and lower surfaces of the insulating base 2, the 1 st surface 3s of the wiring conductor facing the through-hole 6, and the 2 nd surface 5s of the insulating layer are sequentially subjected to electroless copper plating and electrolytic copper plating. The copper-plated metal deposited on the 1 st surface 3s of the wiring conductor and the 2 nd surface 5s of the insulating layer serves as a via conductor 3 a. Next, the hole filling resin 7 is filled in the through hole 6 at a position inside the copper-plated metal and cured. Next, the hole-filling resin 7 protruding from the through-hole 6 is polished so that the copper plating metal deposited on the upper and lower surfaces of the insulating base 2 has the same height as the exposed surface of the hole-filling resin 7. Finally, the exposed surfaces of the copper-plated metal and the hole-filling resin 7 deposited on the upper and lower surfaces of the insulating base 2 are plated, and a predetermined pattern is formed by etching, whereby the wiring conductors 3 are formed on the upper and lower surfaces of the insulating base 2.
The direction of the crystal interface of the via conductor 3a may also have random grains. In other words, the crystal interface of the via hole conductor 3a has no directivity. In this case, it is advantageous in that the thermal stress applied to the via hole conductor 3a can be dispersed in random directions.
The solder resist 4 is located on the upper surface of the uppermost insulating layer 5 and the lower surface of the lowermost insulating layer 5. The solder resist 4 has an opening 4a for exposing a part of the wiring conductor 3 located on the upper surface of the insulating substrate 2 and an opening 4b for exposing a part of the wiring conductor 3 located on the lower surface.
A part of the wiring conductor 3 exposed in the opening 4a functions as an electrode connected to an electrode of the package substrate or the electronic component, for example.
A part of the wiring conductor 3 exposed in the opening 4b functions as an electrode connected to an electronic component, for example.
The solder resist 4 is formed by, for example, adhering a film of a thermosetting resin having photosensitivity such as an acrylic-modified epoxy resin to the surface of the insulating layer 5, forming an opening 4a or an opening 4b by exposure and development, and thermally curing the same.
As described above, the printed wiring board 1 of the present disclosure includes the plurality of insulating layers 5 stacked in the thickness direction, the plurality of wiring conductors 3 respectively corresponding to the plurality of insulating layers 5, and the through holes 6 penetrating in the thickness direction and exposing the 2 nd surfaces 5s of the plurality of insulating layers and the 1 st surfaces 3s of the plurality of wiring conductors. The via hole conductor 3a which is in close contact with the 2 nd surface 5s of the insulating layer and the 1 st surface 3s of the wiring conductor is located in the via hole 6. In the through hole 6, the 1 st surface 3s of the plurality of wiring conductors is located outside the 2 nd surface 5s of the plurality of insulating layers with respect to the central axis passing through the through hole 6 in the thickness direction. In other words, in the through hole 6, the exposed portion of the 1 st surface 3s of the wiring conductor is recessed with respect to the 2 nd surface 5s of the insulating layer.
Therefore, the via hole conductor 3a is in close contact with the 1 st surface 3s of the wiring conductor and the 2 nd surface 5s of the insulating layer in a state where a part thereof enters the recess. This increases the contact area between the through-hole conductor 3a and the 1 st surface 3s of the wiring conductor and the 2 nd surface 5s of the insulating layer, and contributes to improvement in the adhesion strength of the through-hole conductor 3 a. In particular, the through-hole conductor 3a in the recess functions as a stopper for the insulating layer 5 in the thickness direction, and the shear stress between the through-hole conductor 3a and the insulating layer 5 can be suppressed. As a result, the breakage between the through hole conductor 3a and the 1 st surface 3s of the wiring conductor can be reduced.
Thus, according to the present disclosure, it is possible to reduce the breakage between the 1 st surface 3s of the wiring conductor and the via hole conductor 3a having a function for a signal, a power supply, or a ground. Therefore, a printed wiring board excellent in signal propagation and power supply characteristics can be provided.
The present disclosure is not limited to the above-described embodiments, and various modifications can be made without departing from the scope of the present disclosure.
For example, in the example of the above embodiment, as shown in fig. 2, the interface between the via hole conductor 3a and the hole-filling resin 7 is shown in a state without a recess.
Unlike this case, as shown in fig. 3, the through-hole conductor 3a may have an annular recessed portion 8 on the inner peripheral surface facing the 1 st surface 3s of the plurality of wiring conductors facing the through-hole 6. In other words, the inner circumferential surface of the tubular through-hole conductor 3a has an annular recess 8 at a position facing the recess.
In this case, for example, when the printed wiring board 1 thermally expands, the via hole conductor 3a is pressed in the direction of the 1 st surface 3s of the wiring conductor by the hole filling resin 7 entering the concave portion 8. This improves the adhesion strength between the through-hole conductor 3a and the 1 st surface 3s of the wiring conductor.
The depth of the recess 8 is set to 2 to 5 μm, for example. If the thickness is less than 2 μm, the above-described pressing effect is reduced, and there is a possibility that the effect cannot contribute to improvement in the adhesion strength between the through-hole conductor 3a and the 1 st surface 3s of the wiring conductor. If the thickness exceeds 5 μm, it may be difficult to fill the hole-filling resin 7 into the recess 8.
Such a concave portion 8 is formed by adjusting the electrolytic plating treatment time so that the portion of the 1 st surface 3s of the wiring conductor exposed is left at a thickness to be recessed with respect to the 2 nd surface 5s of the insulating layer. In addition, when the concave portion 8 is not required, the electrolytic plating treatment time may be further extended or the electrolytic plating treatment may be performed twice.
As shown in fig. 4, an insulating layer 9 for build-up and a wiring conductor 3 may be further laminated on the upper and lower surfaces of the insulating base 2. In this example, the two build-up insulating layers 9 and the wiring conductors 3 are located on the upper surface and the lower surface, respectively.
The build-up insulating layer 9 has a function of securing regions for arranging the wiring conductors 3 on the upper and lower surfaces of the insulating base 2. Therefore, the structure including the build-up insulating layer 9 corresponds to an increase in signal systems and power supply accompanying the enhancement of functions of electronic devices. Therefore, it is advantageous in that the wiring conductor 3 of the printed wiring board 1 can be increased.
The build-up insulating layer 9 covers the wiring conductors 3, and has a function of ensuring insulation between the wiring conductors 3 adjacent to each other.
The build-up insulation layer 9 includes, for example, glass fibers such as E glass or S glass, an insulation resin such as polyimide resin, epoxy resin, bismaleimide triazine resin, and silicon dioxide (SiO)2) Or aluminum oxide (Al)2O3) And insulating particles, etc. Glass fibers may not be included.
The insulating layer 9 for build-up is formed by, for example, coating a film for an insulating layer, thermocompression bonding, and curing so that the wiring conductor 3 covers the upper and lower surfaces of the insulating base 2 or the surface of the insulating layer 9 for build-up which has been formed in a vacuum.
The build-up insulation layer 9 has a plurality of vias 10 having the wiring conductor 3 as a bottom surface. The wiring conductors 3 located above and below via the build-up insulating layer 9 are electrically connected to each other via the wiring conductors 3 in the vias 10. The diameter of the via hole 10 is set to 30 to 100 μm, for example.
The via hole 10 is formed by, for example, performing laser processing on the build-up insulating layer 9. After the laser processing, the inside of the via hole 10 is cleaned to remove foreign matters such as carbide, whereby the adhesion strength between the wiring conductor 3 and the build-up insulating layer 9 and the wiring conductor 3 exposed in the via hole 10 can be improved.
The wiring conductor 3 is located on the upper surface or the lower surface of the build-up insulating layer 9 and in the via hole 10. The wiring conductor 3 is formed by plating treatment techniques such as a semi-additive method and a subtractive method, and contains a good conductive metal such as copper.
The solder resist 4 is located on the upper surface of the uppermost insulating layer 9 for build-up and on the lower surface of the lowermost insulating layer 9 for build-up. The solder resist 4 has an opening 4a for exposing a part of the wiring conductor 3 located on the upper surface of the build-up insulating layer 9 and an opening 4b for exposing a part of the wiring conductor 3 located on the lower surface.
A part of the wiring conductor 3 exposed in the opening 4a functions as an electrode connected to an electrode of the package substrate or the electronic component, for example. A part of the wiring conductor 3 exposed in the opening 4b functions as an electrode connected to an electronic component, for example.
Fig. 5A shows a partial electron micrograph shown in a schematic sectional view in fig. 3. An enlarged photograph of the region X shown in fig. 5A is shown in fig. 5B. The reference numerals shown in fig. 5A and 5B are the same as those shown in fig. 3, and the description thereof is omitted.
For example, fig. 2 and 3 clearly show the position of the 1 st surface 3s of the wiring conductor. This is merely for convenience of illustrating the position of the 1 st surface 3s of the wiring conductor when illustrated in the cross-sectional view, and as illustrated in fig. 5B, a state in which the 1 st surface 3s of the wiring conductor is unclear, that is, a state in which the boundary surfaces of the 1 st surface 3s of the wiring conductor and the via hole conductor 3a are not linearly staggered but are unified may be considered. In other words, when the wiring conductor 3 is subjected to the etching treatment, the 1 st surface 3s of the wiring conductor is brought into a state of being non-linearly staggered, in other words, into a concave-convex shape, and the copper-plated metal to be the via-hole conductor 3a is deposited, whereby the boundary surface between the 1 st surface 3s of the wiring conductor and the via-hole conductor 3a is brought into the above-described state.
As shown by the arrows in fig. 5B, as for the conductor forming the wiring conductor 3, the crystals extend in the depth direction of the via-hole 6, that is, along the central axis direction of the via-hole 6. In other words, the crystal has an elongated shape extending in the stacking direction of the insulating layer 5 of the upper layer and the insulating layer 5 of the lower layer in the cross-sectional view. In this way, if the crystal of the conductor forming the wiring conductor 3 extends in the depth direction of the through hole 6, the wiring conductor 3 can be brought into close contact with the insulating layer 5 more strongly. For example, when a load is applied to the printed wiring board, the through hole conductor 3a is likely to apply a load in a direction perpendicular to the depth direction of the through hole 6, that is, in a direction horizontal to the main surfaces of the wiring conductor 3 and the insulating layer 5. Even if such a load is applied to the wiring conductor 3, the wiring conductor 3 is more strongly adhered to the insulating layer 5, and therefore, displacement of the via hole conductor 3a due to the load can be reduced, and the via hole conductor can be more hardly broken. Here, "the crystal extends in a direction along the central axis of the through-hole 6" means that the crystal substantially extends in a direction along the central axis of the through-hole 6. In other words, the direction in which the crystals extend is substantially along the central axis of the through-hole 6. Therefore, the angle of the crystal with respect to the direction in which the central axis of the through-hole 6 extends may be 0 to 30 degrees, more specifically 0 to 10 degrees.
When the wiring conductor 3 exposed in the through hole 6 is etched, the etching liquid is flowed to the through hole 6. As shown in the region Y of fig. 5B, the wall surface of the through hole 6 on the upstream side of the flow of the etching solution and the corner of the through hole conductor 3a have a tapered shape, and the corner is removed. By thus removing the corner portion and providing the taper shape, the plating solution easily flows into the wiring conductor 3 when the via hole conductor 3a is formed.
As shown in fig. 6, the boundary surface between the wiring conductor 13 and the via hole conductor 13a in the conventional printed wiring board is relatively clearly shown in the vicinity of the wall surface of the via hole as shown by the region Z. If the boundary surface between the wiring conductor 13 and the through-hole conductor 13a exists in the vicinity of the wall surface of the through-hole, for example, when a load is applied to the printed wiring board, breakage tends to occur between the crystal of the conductor forming the wiring conductor 13 and the crystal of the conductor forming the through-hole conductor 13a, and a conduction failure tends to occur. In contrast, the printed wiring board of the present disclosure is excellent in signal propagation and power supply characteristics.
In the above-described embodiment, the case where the via hole conductor 3a is cylindrical is shown. Unlike this case, the via hole conductor 3a may fill the via hole 6 without the need for the hole-filling resin 7 or the recess 8. In this case, the resistance of the via hole conductor 3a decreases. Therefore, it is advantageous from the viewpoint of improving the propagation of the signal or the power supply characteristic.
Claims (8)
1. A printed wiring board is characterized by comprising:
a plurality of insulating layers stacked in a thickness direction;
a plurality of wiring conductors respectively located correspondingly between the plurality of insulating layers;
a through hole penetrating the plurality of insulating layers and the plurality of wiring conductors in the thickness direction; and
a via conductor located on a wall surface of the via,
wherein,
each of the plurality of wiring conductors has a 1 st face facing the through hole,
each of the plurality of insulating layers has a 2 nd surface facing the via hole, an
The 1 st surface is farther from a central axis passing through the through hole than the 2 nd surface in the thickness direction.
2. The printed wiring substrate according to claim 1,
the through hole conductor is cylindrical.
3. The printed wiring substrate according to claim 2,
the cylinder is filled with resin.
4. The printed wiring substrate according to claim 2,
the via conductor has a portion corresponding to the 1 st face, the portion having a recess.
5. The printed wiring substrate according to claim 4,
the recess is annular in shape.
6. The printed wiring substrate according to claim 1,
the 1 st surface of the wiring conductor and the boundary of the via conductor are non-linearly staggered.
7. The printed wiring substrate according to claim 1,
the wiring conductor has a crystal extending in a direction along the central axis of the through hole.
8. The printed wiring substrate according to claim 1,
the via conductor includes a 1 st portion facing the 1 st face, a 2 nd portion facing the 2 nd face, and a 3 rd portion between the 1 st portion and the 2 nd face,
the 3 rd portion has a tapered shape.
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2018180734 | 2018-09-26 | ||
| JP2018-180734 | 2018-09-26 | ||
| JP2019-118994 | 2019-06-26 | ||
| JP2019118994A JP7234049B2 (en) | 2018-09-26 | 2019-06-26 | printed wiring board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN110958762A true CN110958762A (en) | 2020-04-03 |
| CN110958762B CN110958762B (en) | 2023-05-23 |
Family
ID=69975511
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910907814.6A Active CN110958762B (en) | 2018-09-26 | 2019-09-24 | Printed wiring board |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN110958762B (en) |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4628598A (en) * | 1984-10-02 | 1986-12-16 | The United States Of America As Represented By The Secretary Of The Air Force | Mechanical locking between multi-layer printed wiring board conductors and through-hole plating |
| JPH1131884A (en) * | 1997-07-11 | 1999-02-02 | Hitachi Ltd | Multilayered printed circuit board and electronic device |
| JP2008066544A (en) * | 2006-09-08 | 2008-03-21 | Nec Corp | Multilayer printed circuit board and its manufacturing method |
| JP2009182082A (en) * | 2008-01-30 | 2009-08-13 | Kyocera Corp | Interconnection board and its manufacturing method, and mounting structure |
| US20160374199A1 (en) * | 2015-06-19 | 2016-12-22 | Hosiden Corporation | Multilayer printed wiring board, and connection structure of multilayer printed wiring board and connector |
-
2019
- 2019-09-24 CN CN201910907814.6A patent/CN110958762B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4628598A (en) * | 1984-10-02 | 1986-12-16 | The United States Of America As Represented By The Secretary Of The Air Force | Mechanical locking between multi-layer printed wiring board conductors and through-hole plating |
| JPH1131884A (en) * | 1997-07-11 | 1999-02-02 | Hitachi Ltd | Multilayered printed circuit board and electronic device |
| JP2008066544A (en) * | 2006-09-08 | 2008-03-21 | Nec Corp | Multilayer printed circuit board and its manufacturing method |
| JP2009182082A (en) * | 2008-01-30 | 2009-08-13 | Kyocera Corp | Interconnection board and its manufacturing method, and mounting structure |
| US20160374199A1 (en) * | 2015-06-19 | 2016-12-22 | Hosiden Corporation | Multilayer printed wiring board, and connection structure of multilayer printed wiring board and connector |
Also Published As
| Publication number | Publication date |
|---|---|
| CN110958762B (en) | 2023-05-23 |
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