TW201913916A - Method for processing wafer capable of performing a calibration process through carbon black coated on a surface of the wafer - Google Patents

Method for processing wafer capable of performing a calibration process through carbon black coated on a surface of the wafer Download PDF

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TW201913916A
TW201913916A TW107131417A TW107131417A TW201913916A TW 201913916 A TW201913916 A TW 201913916A TW 107131417 A TW107131417 A TW 107131417A TW 107131417 A TW107131417 A TW 107131417A TW 201913916 A TW201913916 A TW 201913916A
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wafer
sealing material
cutting groove
cutting
thickness
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TW107131417A
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Chinese (zh)
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TWI786176B (en
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鈴木克彦
伴祐人
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日商迪思科股份有限公司
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67092Apparatus for mechanical treatment
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23DPLANING; SLOTTING; SHEARING; BROACHING; SAWING; FILING; SCRAPING; LIKE OPERATIONS FOR WORKING METAL BY REMOVING MATERIAL, NOT OTHERWISE PROVIDED FOR
    • B23D59/00Accessories specially designed for sawing machines or sawing devices
    • B23D59/001Measuring or control devices, e.g. for automatic control of work feed pressure on band saw blade
    • B23D59/002Measuring or control devices, e.g. for automatic control of work feed pressure on band saw blade for the position of the saw blade
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B24GRINDING; POLISHING
    • B24BMACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B27/00Other grinding machines or devices
    • B24B27/06Grinders for cutting-off
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B24GRINDING; POLISHING
    • B24BMACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B49/00Measuring or gauging equipment for controlling the feed movement of the grinding tool or work; Arrangements of indicating or measuring equipment, e.g. for indicating the start of the grinding operation
    • B24B49/12Measuring or gauging equipment for controlling the feed movement of the grinding tool or work; Arrangements of indicating or measuring equipment, e.g. for indicating the start of the grinding operation involving optical means
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B24GRINDING; POLISHING
    • B24BMACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B7/00Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor
    • B24B7/20Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor characterised by a special design with respect to properties of the material of non-metallic articles to be ground
    • B24B7/22Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor characterised by a special design with respect to properties of the material of non-metallic articles to be ground for grinding inorganic material, e.g. stone, ceramics, porcelain
    • B24B7/228Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor characterised by a special design with respect to properties of the material of non-metallic articles to be ground for grinding inorganic material, e.g. stone, ceramics, porcelain for grinding thin, brittle parts, e.g. semiconductors, wafers
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B28WORKING CEMENT, CLAY, OR STONE
    • B28DWORKING STONE OR STONE-LIKE MATERIALS
    • B28D5/00Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor
    • B28D5/0058Accessories specially adapted for use with machines for fine working of gems, jewels, crystals, e.g. of semiconductor material
    • B28D5/0064Devices for the automatic drive or the program control of the machines
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B28WORKING CEMENT, CLAY, OR STONE
    • B28DWORKING STONE OR STONE-LIKE MATERIALS
    • B28D5/00Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor
    • B28D5/02Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor by rotary tools, e.g. drills
    • B28D5/022Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor by rotary tools, e.g. drills by cutting with discs or wheels
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    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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    • H01L21/681Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment using optical controlling means
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    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
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    • H01L21/76Making of isolation regions between components
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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
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  • Electromagnetism (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Inorganic Chemistry (AREA)
  • Dicing (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
  • Constituent Portions Of Griding Lathes, Driving, Sensing And Control (AREA)

Abstract

The present invention relates to a method for processing a wafer, and an object of the invention is to provide a method for processing a wafer which can be subjected to calibration process by a sealing material containing carbon black coated on a surface of the wafer. The solution is a method for processing a wafer having a plurality of bump electrodes formed in respective ranges on surfaces by a plurality of intersected projected dicing lines. The method includes: a first cutting groove forming process for forming a first cutting groove corresponding to a depth of a completed thickness of a device wafer from a surface side of the wafer along the projected dicing lines with a first cutting blade; a sealing process, capable of sealing a surface of the wafer containing the first cutting groove by the sealing material; a grinding and cutting process for grinding and cutting the wafer from a back side of the wafer to a completed thickness of the device wafer to expose the sealing material in the first cutting groove; a calibration process, in which a surface side of the wafer is photographed to identify an alignment mark from the surface side of the wafer through the sealing material by an infrared imaging means; a partition process, in which the sealing material in the first cutting groove is cut from the surface side of the wafer along the projected dicing lines with a second cutting blade having a thickness smaller than the thickness of the first cutting blade, then the respective device wafer is divided into a surface and 4 side surfaces to be surrounded by the sealing material.

Description

晶圓之加工方法Wafer processing method

本發明係有關加工晶圓而形成5S模製封裝的晶圓之加工方法。The present invention relates to a method of processing a wafer to form a 5S molded package.

作為實現LSI或NAND型快閃記憶體等之各種裝置的小型化及高密度安裝化之構造,例如將以晶片尺寸而封裝化裝置晶片之晶片尺寸封裝(CSP)提供於實用,廣泛使用於行動電話或智慧型手機等。更且,近年係在此CSP之中,開發有不僅晶片的表面而將全側面,以封閉材進行封閉之CSP,所謂5S模製封裝而加以實用化。As a structure for realizing miniaturization and high-density mounting of various devices such as LSI or NAND flash memory, for example, a chip size package (CSP) for packaging a device wafer in a wafer size is provided for practical use, and is widely used in action. Phone or smart phone, etc. In addition, in recent years, in this CSP, a CSP which is not only a surface of a wafer but a full side surface and closed with a sealing material, and a so-called 5S molded package has been developed and put into practical use.

以往的5S模製封裝係經由以下的工程而加以製作。   (1) 於半導體晶圓(以下,有略稱為晶圓之情況)之表面,形成稱為裝置(電路)及突起電極之外部連接端子。   (2) 自晶圓的表面側,沿著分割預定線而切削晶圓,形成相當於裝置晶片的完成厚度之深度的切削溝。   (3) 以摻入碳黑之封閉材而封閉晶圓的表面。   (4) 將晶圓的背面側,研削至裝置晶片的完成厚度而使切削溝中之封閉材露出。   (5) 晶圓的表面係因以摻入碳黑之封閉材而加以封閉之故,除去晶圓表面的外周部分之封閉材而使標靶圖案等之對準標記露出,依據此對準標記而實施查出欲切削之分割預定線的校準。   (6) 依據校準,自晶圓的表面側,沿著分割預定線而切削晶圓,分割成以封閉材而封閉表面及全側面之5S模製封裝。The conventional 5S molded package was produced through the following works. (1) On the surface of a semiconductor wafer (hereinafter, abbreviated as a wafer), an external connection terminal called a device (circuit) and a bump electrode is formed. (2) From the surface side of the wafer, the wafer is cut along the dividing line to form a cutting groove corresponding to the depth of the finished wafer. (3) The surface of the wafer is sealed with a carbon black-containing sealing material. (4) The back side of the wafer is ground to the finished thickness of the device wafer to expose the sealing material in the cutting groove. (5) The surface of the wafer is closed by a sealing material doped with carbon black, and the sealing material of the outer peripheral portion of the wafer surface is removed to expose the alignment mark of the target pattern or the like, according to which the alignment mark is exposed. The calibration for dividing the predetermined line to be cut is performed. (6) According to the calibration, the wafer is cut from the surface side of the wafer along the dividing line, and is divided into a 5S molded package that closes the surface and the full side with a sealing material.

如上述,晶圓的表面係以包含碳黑之封閉材而加以封閉之故,形成於晶圓表面的裝置等係完全無法以肉眼看見。為了解決此問題而可進行校準,而如在上述(5)所記載地,本申請人係開發除去晶圓表面的封閉材之外周部分而使標靶圖案等之對準標記露出,依據此對準標記而查出欲切削之分割預定線,執行校準的技術(參照日本特開2013-074021號公報及日本特開2016-015438號公報)。 [先前技術文獻] [專利文獻]As described above, the surface of the wafer is closed by a sealing material containing carbon black, and the device formed on the surface of the wafer is completely invisible to the naked eye. In order to solve this problem, calibration can be performed. As described in the above (5), the applicant develops an outer peripheral portion of the sealing material on the surface of the wafer to expose the alignment mark of the target pattern or the like, according to which A technique for performing calibration by detecting a predetermined dividing line to be cut by a standard mark (refer to Japanese Laid-Open Patent Publication No. 2013-074021 and JP-A-2016-015438). [Prior Technical Literature] [Patent Literature]

[專利文獻1]日本特開2013-074021號公報   [專利文獻2]日本特開2016-015438號公報[Patent Document 1] JP-A-2013-074021 [Patent Document 2] JP-A-2016-015438

[發明欲解決之課題][Questions to be solved by the invention]

但在記載於上述公開公報之校準方法中,取代於切割用之切削刀片,而將磨邊修整用之寬度廣的切削刀片安裝於心軸,除去晶圓的外周部分之封閉材之工程則必要,而經由切削刀片的交換及磨邊修整,除去外周部分之封閉材的工時則耗費,有著生產性差的問題。However, in the calibration method described in the above publication, it is necessary to attach a cutting insert having a wide width for edging to the mandrel instead of the cutting insert for cutting, and to remove the sealing material of the outer peripheral portion of the wafer. On the other hand, the exchange of the cutting insert and the trimming of the cutting insert eliminate the man-hours of the outer peripheral portion of the closing material, which is problematic in productivity.

本發明係有鑑於如此的點所作為的構成,而其目的係提供:通過包含被覆於晶圓表面的碳黑之封閉材而可實施校準工程之晶圓的加工方法者。 [為了解決課題之手段]The present invention has been made in view of such a point, and an object of the present invention is to provide a method for processing a wafer that can be subjected to calibration by a sealing material containing carbon black coated on a surface of a wafer. [means to solve the problem]

當根據本發明時,提供:於經由交叉所形成之複數的分割預定線所區劃之表面的各範圍,形成具有各複數的突起電極之裝置的晶圓之加工方法,其特徵為具備:自該晶圓的表面側,沿著該分割預定線,經由具有第1厚度之第1切削刀片而形成相當於裝置晶片之完成厚度之深度的第1切削溝的第1切削溝形成工程,和實施該第1切削溝形成工程之後,以封閉材而封閉包含該第1切削溝之該晶圓的表面之封閉工程,和實施該封閉工程之後,自該晶圓的背面側至該裝置晶片之完成厚度為止,研削該晶圓而使該第1切削溝中之該封閉材露出之研削工程,和實施該研削工程之後,自該晶圓的表面側,經由紅外線攝影手段而透過該封閉材,攝影晶圓的表面側查出對準標記,依據該對準標記而查出欲切削之該分割預定線的校準工程,和實施該校準工程之後,自該晶圓的表面側,沿著該分割預定線,經由具有較該第1切削刀片之該第1厚度為小之第2厚度的第2切削刀片,切削該第1切削溝中之該封閉材,分割為經由該封閉材加以圍繞表面及4側面之各個的裝置晶片之分割手段;在該封閉工程係經由具有該紅外線攝影手段所受光之紅外線則呈透過之透過性的封閉材,加以封閉該晶圓的表面的晶圓之加工方法。According to the present invention, there is provided a method of processing a wafer for forming a device having a plurality of bump electrodes by a plurality of ranges of surfaces of a plurality of divided planned lines formed by intersections, characterized by: a first cutting groove forming process of forming a first cutting groove corresponding to a depth of a completed thickness of the device wafer via a first cutting insert having a first thickness along a predetermined dividing line of the wafer, and performing the After the first cutting groove forming process, the sealing process of closing the surface of the wafer including the first cutting groove by the sealing material, and the completion thickness of the device wafer from the back side of the wafer after performing the sealing process The grinding process for grinding the wafer to expose the sealing material in the first cutting groove, and after performing the grinding process, the sealing material is transmitted through the infrared photographic means from the surface side of the wafer, and the crystal is photographed. An alignment mark is detected on the side of the circle surface, a calibration process for the division line to be cut is detected based on the alignment mark, and a surface from the wafer is performed after the calibration process is performed a second cutting insert having a second thickness smaller than the first thickness of the first cutting insert is cut along the predetermined dividing line, and the closing material in the first cutting groove is cut and divided The sealing material is divided by means of a device wafer surrounding each of the surface and the four side surfaces; and the sealing material is transparent to the surface of the wafer by a transparent sealing material having infrared light received by the infrared imaging means. Wafer processing method.

理想係在校準工程所使用之紅外線攝影手段係包含InGaAs攝影元件。 [發明效果]The infrared imaging means that is ideally used in calibration engineering includes InGaAs imaging elements. [Effect of the invention]

當根據本發明之晶圓的加工方法時,因作成呈以紅外線攝影手段所受光的紅外線則呈透過之封閉材而封閉晶圓的表面,再經由紅外線攝影手段而查出透過封閉材,查出而形成於晶圓之對準標記,依據對準標記而可實施校準之故,無須如以往,除去晶圓的表面之外周部分的封閉材之情況,而可簡單地實施校準工程。因而,自晶圓的表面側,經由切削刀片而切削分割預定線,而可將晶圓分割成各個之裝置晶片者。According to the method for processing a wafer according to the present invention, the surface of the wafer is closed by the infrared ray which is received by the infrared ray imaging means, and the surface of the wafer is closed by the infrared photographic means. Since the alignment mark formed on the wafer can be calibrated according to the alignment mark, it is not necessary to remove the sealing material on the outer peripheral portion of the surface of the wafer as in the related art, and the calibration process can be easily performed. Therefore, from the surface side of the wafer, the predetermined dividing line is cut by the cutting insert, and the wafer can be divided into individual device wafers.

以下,參照圖面而加以詳細說明本發明之實施形態。當參照圖1時,顯示適合於以本發明之加工方法而加工之半導體晶圓(以下,有單略稱為晶圓之情況)11之表面側斜視圖。Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Referring to Fig. 1, a surface side oblique view of a semiconductor wafer (hereinafter, simply referred to as a wafer) 11 which is suitable for processing by the processing method of the present invention is shown.

在半導體晶圓11之表面11a中,將複數之分割預定線(切割道)13形成為格子狀,而對於經由正交之分割預定線13所區劃之各範圍,係形成有IC、LSI等之裝置15。In the surface 11a of the semiconductor wafer 11, a plurality of predetermined dividing lines (cutting lines) 13 are formed in a lattice shape, and ICs, LSIs, and the like are formed in respective ranges divided by the orthogonal dividing line 13 Device 15.

對於各裝置15之表面係具有複數的電極凸塊(以下,有單略稱為突起電極之情況)17,而晶圓11係於其表面具備形成有備有各複數之突起電極17之複數的裝置15之裝置範圍19,和圍繞裝置範圍19之外周剩餘範圍21。The surface of each device 15 has a plurality of electrode bumps (hereinafter, abbreviated as a bump electrode) 17, and the wafer 11 has a plurality of surfaces on which a plurality of bump electrodes 17 are formed. The device range 19 of the device 15 and the peripheral remaining range 21 around the device range 19.

在本發明實施形態之晶圓的加工方法中,首先,作為第1工程,實施自晶圓11之表面側,沿著分割預定線13,經由具有第1厚度之第1切削刀片而形成相當於裝置晶片之完成厚度之深度的第1切削溝之第1切削溝形成工程。參照圖2而說明此第1切削溝形成工程。In the first method, the wafer processing method according to the embodiment of the present invention is formed on the surface side of the wafer 11 and is formed along the planned dividing line 13 via the first cutting insert having the first thickness. The first cutting groove forming process of the first cutting groove at the depth of the finished wafer of the device wafer. This first cutting groove forming process will be described with reference to Fig. 2 .

切削單元10係具備:可拆裝於心軸12之前端部地加以安裝之切削刀片14,和具有攝影手段(攝影單元)18之校準單元16。攝影單元18係除了具有以可視光攝影之顯微鏡及攝影機之外,具備攝影紅外線畫像之紅外線攝影元件。在本實施形態中,作為紅外線攝影元件而採用InGaAs攝影元件。The cutting unit 10 includes a cutting insert 14 that is detachably attached to the front end of the mandrel 12, and a aligning unit 16 having a photographing means (photographing unit) 18. The photographing unit 18 is an infrared photographing element having a photographing infrared image in addition to a microscope and a photographer that can be photographed by visible light. In the present embodiment, an InGaAs imaging element is used as the infrared imaging element.

在實施第1切削溝形成工程之前,首先由攝影單元18,以可視光而攝影晶圓11之表面,查出形成於各裝置15之標靶圖案等之對準標記,實施依據此對準標記而查出欲切削之分割預定線13的校準。Before the first cutting groove forming process is performed, first, the photographing unit 18 photographs the surface of the wafer 11 by visible light, and detects the alignment mark formed on the target pattern of each device 15 or the like, and performs the alignment mark according to the alignment mark. The calibration of the dividing line 13 to be cut is detected.

校準實施後,使高速旋轉於箭頭R1方向之切削刀片(第1切削刀片)14,自晶圓11的表面11a側,沿著分割預定線13而切入至相當於裝置晶片之完成厚度之深度,經由將吸引保持晶圓11之未圖示之夾盤加工傳送至箭頭X1方向之時,實施沿著分割預定線13而形成第1切削溝23之第1切削溝形成工程。After the calibration is performed, the cutting insert (first cutting insert) 14 that is rotated at a high speed in the direction of the arrow R1 is cut from the surface 11a side of the wafer 11 along the dividing line 13 to a depth corresponding to the finished thickness of the device wafer. When the chuck processing (not shown) that sucks and holds the wafer 11 is conveyed to the direction of the arrow X1, the first cutting groove forming process in which the first cutting groove 23 is formed along the dividing line 13 is performed.

將此第1切削溝形成工程,各分割預定線13之間距算出傳送切削單元10於與加工傳送方向X1正交之方向的同時,沿著伸長於第1方向之分割預定線13而依序實施。In the first cutting groove forming process, the dividing line 13 is calculated in the direction orthogonal to the machining conveyance direction X1, and is sequentially executed along the dividing line 13 extending in the first direction. .

接著,90°旋轉未圖示之夾盤之後,沿著伸長於正交於第1方向之第2方向的分割預定線13,依序實施同樣之第1切削溝形成工程。Then, after rotating the chuck (not shown) at 90°, the same first cutting groove forming process is sequentially performed along the dividing line 13 which is elongated in the second direction orthogonal to the first direction.

實施第1切削溝形成工程之後,如圖3所示,塗佈封閉材20於晶圓11之表面11a,實施以封閉材而封閉包含第1切削溝23之晶圓11的表面11a之封閉工程。封閉材20係有流動性之故,當實施封閉工程時,於第1切削溝23中,填充有封閉材20。After the first cutting groove forming process is performed, as shown in FIG. 3, the sealing material 20 is applied to the surface 11a of the wafer 11, and the sealing of the surface 11a of the wafer 11 including the first cutting groove 23 by the closing material is performed. . The closing material 20 has fluidity, and when the closing process is performed, the sealing material 20 is filled in the first cutting groove 23.

作為封閉材20係作成以質量%,包含環氧樹脂或環氧樹脂+苯酚樹脂10.3%、二氧化矽填充料85.3%、碳黑0.1~0.2%、其他成分4.2~4.3%之組成。作為其他的成分係例如,包含金屬氫氧化物,三氧化二銻,二氧化矽等。The sealing material 20 is made of a resin having a composition of 10.3% by mass of epoxy resin, epoxy resin + phenol resin, 85.3% of cerium oxide filler, 0.1 to 0.2% of carbon black, and 4.2 to 4.3% of other components. Other components include, for example, a metal hydroxide, antimony trioxide, cerium oxide, and the like.

由如此組成之封閉材20而被覆晶圓11的表面11a,封閉晶圓11的表面11a時,經由極少量含於封閉材20中之碳黑而封閉材20成為黑色之故,通過封閉材20而看到晶圓11的表面11a之情況係通常為困難。When the surface 11a of the wafer 11 is covered by the sealing material 20 thus constituted, when the surface 11a of the wafer 11 is closed, the sealing material 20 becomes black via a very small amount of carbon black contained in the sealing material 20, and passes through the sealing material 20 It is often difficult to see the surface 11a of the wafer 11.

在此,使碳黑混入於封閉材20中之情況係主要為了防止裝置15之靜電破壞,而目前未有市售未含有碳黑之封閉材。Here, the case where carbon black is mixed in the sealing member 20 is mainly for preventing electrostatic breakdown of the device 15, and there is currently no commercially available sealing material containing no carbon black.

封閉材20之塗佈方法係未特別加以限定,但塗佈封閉材20至突起電極17之高度為止者為佳,接著,經由蝕刻而蝕刻封閉材20,進行突起電極17之露出。The coating method of the sealing material 20 is not particularly limited, but it is preferable to apply the sealing material 20 to the height of the protruding electrode 17, and then the sealing material 20 is etched by etching to expose the protruding electrode 17.

實施封閉工程之後,自晶圓11的背面11b側至裝置晶片之完成厚度為止,研削晶圓11,實施使第1切削溝23中之封閉材20露出的研削工程。After the sealing process is performed, the wafer 11 is ground from the back surface 11b side of the wafer 11 to the finished thickness of the device wafer, and a grinding process for exposing the sealing material 20 in the first cutting groove 23 is performed.

參照圖4而說明此研削工程。貼著表面保護膠帶22於晶圓11的表面11a,由研削裝置之夾盤24,藉由表面保護膠帶22而吸引保持晶圓11。This grinding process will be described with reference to Fig. 4 . The surface protection tape 22 is attached to the surface 11a of the wafer 11, and the wafer 11 is sucked and held by the surface protection tape 22 by the chuck 24 of the grinding device.

研削單元26係包含:經由可旋轉於主軸套28中地加以收容而未圖示之馬達,進行旋轉驅動之心軸30,和固定於心軸30之前端的盤座32,和可拆裝於盤座32地加以裝設之研削砂輪34。研削砂輪34係由環狀之轉輪基台36,和固定安裝於轉輪基台36之下端外周之複數的研磨石38而加以構成。The grinding unit 26 includes a spindle 30 that is rotationally driven via a motor that is rotatably housed in the spindle housing 28, and a disk holder 32 that is fixed to the front end of the spindle 30, and is detachably mountable to the disk. The grinding wheel 34 is mounted on the base 32. The grinding wheel 34 is composed of an annular runner base 36 and a plurality of grinding stones 38 fixedly attached to the outer periphery of the lower end of the runner base 36.

在研削工程中,將夾盤24,於以箭頭a所示之方向,例如以300rpm進行旋轉同時,使研削砂輪34,於以箭頭b所示之方向,例如以6000rpm進行旋轉同時,驅動未圖示之研削單元傳送機構,使研削砂輪34之研磨石38接觸於晶圓11之背面11b。In the grinding process, the chuck 24 is rotated in the direction indicated by the arrow a, for example, at 300 rpm, and the grinding wheel 34 is rotated in the direction indicated by the arrow b, for example, at 6000 rpm while driving the unillustrated The grinding unit conveying mechanism is shown such that the grinding stone 38 of the grinding wheel 34 contacts the back surface 11b of the wafer 11.

並且,將研削砂輪34,以特定的研削傳送速度,於下方進行特定量研削傳送之同時,研削晶圓11之背面11b。以接觸式或非接觸式之厚度測定計而測定晶圓11的厚度同時,將晶圓11研削為特定的厚度,例如100μm,使埋設於第1切削溝23中的封閉材20露出。Then, the grinding wheel 34 is ground, and the back surface 11b of the wafer 11 is ground while performing a specific amount of grinding transmission at a specific grinding conveyance speed. The thickness of the wafer 11 is measured by a contact or non-contact thickness gauge, and the wafer 11 is ground to a specific thickness, for example, 100 μm, and the sealing material 20 embedded in the first cutting groove 23 is exposed.

實施研削工程之後,自晶圓11的表面11a側,經由紅外線攝影手段而通過封閉材20,攝影晶圓11的表面11a,查出形成於晶圓11之表面的至少2個之標靶圖案等之對準標記,實施依據此等之對準標記而查出欲切削之分割預定線13之校準工程。After performing the grinding process, at least two target patterns formed on the surface of the wafer 11 are detected by the sealing material 20 from the surface 11a side of the wafer 11 via the sealing member 20, and the surface 11a of the wafer 11 is photographed. The alignment mark performs a calibration process for detecting the planned dividing line 13 to be cut based on the alignment marks.

對於此校準工程,參照圖5而詳細說明。在實施校準工程之前,在晶圓11的背面11b側,貼著於裝設外周部於環狀框體F之切割膠帶T。This calibration procedure will be described in detail with reference to FIG. 5. Before the calibration process is performed, on the back surface 11b side of the wafer 11, a dicing tape T on which the outer peripheral portion is attached to the annular frame F is attached.

在校準工程中,如圖5所示,藉由切割膠帶T,以切削裝置之夾盤40而吸引保持晶圓11,使封閉晶圓11的表面11a之封閉材20露出於上方。並且,以夾鉗42而夾鉗固定環狀框體F。In the calibration process, as shown in FIG. 5, the holding wafer 11 is sucked by the chuck 40 of the cutting device by cutting the tape T, and the sealing material 20 of the surface 11a of the closed wafer 11 is exposed upward. Further, the annular frame body F is clamped and fixed by the clamp 42.

在校準工程中,以攝影單元18之紅外線攝影元件,攝影晶圓11的表面11a。封閉材20係自透過有攝影單元18的紅外線攝影元件所受光之紅外線的封閉材加以構成之故,可經由紅外線攝影元件而查出形成於晶圓11的表面11a之至少2個標靶圖案等之對準標記者。In the calibration process, the surface 11a of the wafer 11 is photographed by the infrared photographic element of the photographing unit 18. The sealing material 20 is formed of a sealing material that transmits infrared rays received by the infrared imaging element of the imaging unit 18, and at least two target patterns formed on the surface 11a of the wafer 11 can be detected via an infrared imaging element. Align the marker.

理想係作為紅外線攝影元件而採用感度高之InGaAs攝影元件。理想係攝影單元18係具備可調整曝光時間等之曝光部。Ideally, an InGaAs imaging element having high sensitivity is used as an infrared imaging element. The ideal imaging unit 18 is provided with an exposure unit that can adjust the exposure time and the like.

接著,連結此等之對準標記的直線則呈與加工傳送方向平行地,θ旋轉夾盤40,更且經由僅對準標記與分割預定線13之中心的距離,將圖2所示之切削單元10移動於與加工傳送方向X1正交之方向之時,查出欲切削之分割預定線13。Next, the straight line connecting the alignment marks is in parallel with the processing conveyance direction, θ rotates the chuck 40, and further cuts the distance shown in FIG. 2 via the distance between only the alignment mark and the center of the division planned line 13. When the unit 10 moves in a direction orthogonal to the machining conveyance direction X1, the planned dividing line 13 to be cut is detected.

實施校準工程之後,如圖6(A)所示,自晶圓11之表面11a側,沿著分割預定線13,經由具有較第1切削刀片14之寬度為小之寬度的第2切削刀片14A,將以封閉材20而封閉表面11a之晶圓11,切削至切割膠帶T為止,形成如圖6(B)所示之第2切削溝25,實施將晶圓11分割為經由封閉材20加以圍繞表面11a及4個側面之各個的裝置晶片27之分割工程。After the calibration process is performed, as shown in FIG. 6(A), from the surface 11a side of the wafer 11, along the division planned line 13, the second cutting insert 14A having a width smaller than that of the first cutting insert 14 is passed. The wafer 11 of the surface 11a is closed by the sealing material 20, and the dicing tape T is cut to form the second cutting groove 25 as shown in FIG. 6(B), and the wafer 11 is divided into the sealing material 20 by the sealing material 20. The division of the device wafer 27 around each of the surface 11a and the four sides.

將此分割工程,沿著伸長於第1方向的分割預定線13依序實施之後,經由90°旋轉夾盤40,沿著伸長於正交於第1方向之第2方向的分割預定線13而依序實施之時,如圖6(B)所示,可將晶圓11,分割為經由封閉材20加以封閉表面11a及4個側面之各個的裝置晶片27者。This division process is sequentially performed along the planned dividing line 13 extending in the first direction, and then rotated along the 90° rotating chuck 40 along the dividing line 13 which is elongated in the second direction orthogonal to the first direction. When it is sequentially performed, as shown in FIG. 6(B), the wafer 11 can be divided into the device wafer 27 which closes the surface 11a and the four side surfaces via the sealing material 20.

在分割工程所使用之切削刀片14A之寬度係因具有較在第1切削溝形成工程所使用之切削刀片14的寬度為窄之寬度之故,當形成如圖6(B)所示之第2切削溝25時,裝置晶片27之側面係成為由封閉材20所封閉者。The width of the cutting insert 14A used in the dividing process is narrower than the width of the cutting insert 14 used in the first cutting groove forming process, and the second portion as shown in Fig. 6(B) is formed. When the groove 25 is cut, the side surface of the device wafer 27 is closed by the closing member 20.

如此所製造之裝置晶片27係經由反轉裝置晶片27之表背而將突起電極17連接於母板的導電墊片之倒裝晶片接合,而可安裝於母板者。The device wafer 27 thus manufactured is attached to the mother board by flip chip bonding in which the bump electrodes 17 are connected to the conductive pads of the mother board via the front and back of the inverter wafer 27.

10‧‧‧切削單元10‧‧‧Cutting unit

11‧‧‧半導體晶圓11‧‧‧Semiconductor wafer

13‧‧‧分割預定線13‧‧‧Division line

14、14A‧‧‧切削刀片14, 14A‧‧‧ cutting inserts

15‧‧‧裝置15‧‧‧ device

16‧‧‧校準單元16‧‧‧ calibration unit

17‧‧‧電極凸塊17‧‧‧Electrode bumps

18‧‧‧攝影單元18‧‧‧Photographic unit

20‧‧‧封閉材20‧‧‧Closed material

23‧‧‧第1切削溝23‧‧‧1st cutting groove

25‧‧‧第2切削溝25‧‧‧2nd cutting groove

26‧‧‧研削單元26‧‧‧ grinding unit

27‧‧‧裝置晶片27‧‧‧ device wafer

34‧‧‧研削砂輪34‧‧‧ grinding wheel

38‧‧‧研磨石38‧‧‧ Grinding stone

圖1係半導體晶圓之斜視圖。   圖2係顯示第1切削溝形成工程之斜視圖。   圖3係顯示封閉工程之斜視圖。   圖4係顯示研削工程之一部分剖面側面圖。   圖5係顯示校準工程之剖面圖。   圖6(A)係顯示分割工程的剖面圖,圖6(B)係分割工程之擴大剖面圖。Figure 1 is a perspective view of a semiconductor wafer. Fig. 2 is a perspective view showing the first cutting groove forming process. Figure 3 is a perspective view showing the closed project. Figure 4 is a side elevational view showing a section of a grinding project. Figure 5 is a cross-sectional view showing the calibration process. Fig. 6(A) shows a cross-sectional view of the dividing project, and Fig. 6(B) shows an enlarged cross-sectional view of the dividing project.

Claims (2)

一種晶圓之加工方法,係於經由交叉所形成之複數的分割預定線所區劃之表面的各範圍,形成具有各複數的突起電極之裝置的晶圓之加工方法,其特徵為具備:   自該晶圓的表面側,沿著該分割預定線,經由具有第1厚度之第1切削刀片而形成相當於裝置晶片之完成厚度之深度的第1切削溝的第1切削溝形成工程,   和實施該第1切削溝形成工程之後,以封閉材而封閉包含該第1切削溝之該晶圓的表面之封閉工程,   和實施該封閉工程之後,自該晶圓的背面側,至該裝置晶片之完成厚度為止,研削該晶圓而使該第1切削溝中之該封閉材露出之研削工程,   和實施該研削工程之後,自該晶圓的表面側,經由紅外線攝影手段,透過該封閉材而攝影晶圓的表面側,查出對準標記,依據該對準標記而查出欲切削之該分割預定線的校準工程,   和實施該校準工程之後,自該晶圓的表面側,沿著該分割預定線,經由具有較該第1切削刀片之該第1厚度為小之第2厚度的第2切削刀片,切削該第1切削溝中之該封閉材,分割為經由該封閉材加以圍繞表面及4側面之各個的裝置晶片之分割工程;   在該封閉工程中,經由具有該紅外線攝影手段所受光的紅外線則呈透過之透過性的封閉材,加以封閉該晶圓的表面者。A method for processing a wafer, which is a method for processing a wafer having a plurality of protruding electrodes by forming a plurality of surfaces on which a plurality of predetermined dividing lines are formed by intersections, and is characterized in that: a first cutting groove forming process of forming a first cutting groove corresponding to a depth of a completed thickness of the device wafer via the first cutting insert having the first thickness along the surface to be divided along the predetermined dividing line, and performing the first cutting groove After the first cutting groove forming process, the sealing process of closing the surface of the wafer including the first cutting groove by the sealing material, and after performing the sealing process, from the back side of the wafer to the completion of the device wafer The grinding process for grinding the wafer to expose the sealing material in the first cutting groove, and performing the grinding process, and then photographing through the sealing material from the surface side of the wafer via infrared imaging means On the surface side of the wafer, an alignment mark is detected, a calibration process for the division line to be cut is detected based on the alignment mark, and the calibration is performed After the quasi-engineering, the first cutting groove is cut from the surface side of the wafer along the predetermined dividing line via a second cutting insert having a second thickness that is smaller than the first thickness of the first cutting insert. The sealing material is divided into a dividing piece of the device wafer surrounding the surface and the four side surfaces via the sealing material; in the closing process, the infrared light received by the infrared imaging means is transparent and transparent. A closure material that is used to enclose the surface of the wafer. 如申請專利範圍第1項記載之晶圓之加工方法,其中,在前述校準工程所使用之前述紅外線攝影手段係包含InGaAs攝影元件。The method of processing a wafer according to the first aspect of the invention, wherein the infrared imaging means used in the calibration process comprises an InGaAs imaging element.
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