TW201909360A - 指紋感測晶片封裝結構 - Google Patents
指紋感測晶片封裝結構 Download PDFInfo
- Publication number
- TW201909360A TW201909360A TW106124639A TW106124639A TW201909360A TW 201909360 A TW201909360 A TW 201909360A TW 106124639 A TW106124639 A TW 106124639A TW 106124639 A TW106124639 A TW 106124639A TW 201909360 A TW201909360 A TW 201909360A
- Authority
- TW
- Taiwan
- Prior art keywords
- fingerprint sensing
- sensing chip
- package structure
- item
- patent application
- Prior art date
Links
- 229910052751 metal Inorganic materials 0.000 claims abstract description 75
- 239000002184 metal Substances 0.000 claims abstract description 75
- 239000000758 substrate Substances 0.000 claims abstract description 37
- 230000003014 reinforcing effect Effects 0.000 claims description 21
- 239000003292 glue Substances 0.000 claims description 18
- 239000000084 colloidal system Substances 0.000 claims description 9
- 239000000463 material Substances 0.000 claims description 9
- 229910000679 solder Inorganic materials 0.000 claims description 9
- 238000004806 packaging method and process Methods 0.000 claims description 7
- 229910000831 Steel Inorganic materials 0.000 claims description 6
- 229910052782 aluminium Inorganic materials 0.000 claims description 6
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 6
- 229910001220 stainless steel Inorganic materials 0.000 claims description 6
- 239000010935 stainless steel Substances 0.000 claims description 6
- 239000010959 steel Substances 0.000 claims description 6
- 239000005028 tinplate Substances 0.000 claims description 6
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 6
- 229910052721 tungsten Inorganic materials 0.000 claims description 6
- 239000010937 tungsten Substances 0.000 claims description 6
- 239000011521 glass Substances 0.000 claims description 4
- 239000000919 ceramic Substances 0.000 claims description 3
- 230000002787 reinforcement Effects 0.000 abstract description 2
- 238000005516 engineering process Methods 0.000 description 7
- 239000000853 adhesive Substances 0.000 description 3
- 230000001070 adhesive effect Effects 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 229920001187 thermosetting polymer Polymers 0.000 description 3
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 3
- 239000004593 Epoxy Substances 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 238000007731 hot pressing Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 239000005022 packaging material Substances 0.000 description 1
- 238000012536 packaging technology Methods 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 238000004382 potting Methods 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
- G06V40/00—Recognition of biometric, human-related or animal-related patterns in image or video data
- G06V40/10—Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
- G06V40/12—Fingerprints or palmprints
- G06V40/1365—Matching; Classification
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
- G06V40/00—Recognition of biometric, human-related or animal-related patterns in image or video data
- G06V40/10—Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
- G06V40/12—Fingerprints or palmprints
- G06V40/13—Sensors therefor
- G06V40/1329—Protecting the fingerprint sensor against damage caused by the finger
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/06—Containers; Seals characterised by the material of the container or its electrical properties
- H01L23/08—Containers; Seals characterised by the material of the container or its electrical properties the material being an electrical insulator, e.g. glass
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3142—Sealing arrangements between parts, e.g. adhesion promotors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/4985—Flexible insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29194—Material with a principal constituent of the material being a liquid not provided for in groups H01L2224/291 - H01L2224/29191
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
- H01L2224/331—Disposition
- H01L2224/3318—Disposition being disposed on at least two different sides of the body, e.g. dual array
- H01L2224/33181—On opposite sides of the body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48105—Connecting bonding areas at different heights
- H01L2224/48106—Connecting bonding areas at different heights the connector being orthogonal to a side surface of the semiconductor or solid-state body, e.g. parallel layout
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/4824—Connecting between the body and an opposite side of the item with respect to the body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73215—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/85909—Post-treatment of the connector or wire bonding area
- H01L2224/8592—Applying permanent coating, e.g. protective coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/921—Connecting a surface with connectors of different types
- H01L2224/9212—Sequential connecting processes
- H01L2224/92142—Sequential connecting processes the first connecting process involving a layer connector
- H01L2224/92147—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
- H01L2224/9222—Sequential connecting processes
- H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
- H01L2224/92247—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
- H01L23/142—Metallic substrates having insulating layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
- H01L24/92—Specific sequence of method steps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
- H01L2924/3511—Warping
Landscapes
- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Human Computer Interaction (AREA)
- Multimedia (AREA)
- Theoretical Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Credit Cards Or The Like (AREA)
- Image Input (AREA)
Abstract
本發明提供一種指紋感測晶片封裝結構,包括:金屬基板,具有貫穿開口及自貫穿開口相對兩側延伸出的二個凹槽;指紋感測晶片,設置於貫穿開口之中,且具有上表面及下表面,下表面具有焊墊;蓋板,固設於金屬基板並覆蓋指紋感測晶片的上表面;軟性電路板,設置於指紋感測晶片的下表面,且具有第一表面及第二表面,第二表面具有第一金屬接點;以及金屬補強板,嵌入二個凹槽之中並覆蓋貫穿開口;其中,焊墊藉由導線與第一金屬接點電性連接。
Description
本發明係有關於一種晶片封裝的應用領域,尤指一種用於指紋感測晶片的封裝結構。
隨著科技的進步,具指紋辨識功能的指紋辨識模組也已被廣泛地設置於電子裝置中,而成為電子裝置的標準配備之一。而使用者可藉由指紋辨識模組進行身分的識別,以進一步解除電子裝置的鎖定或進行軟體介面的操作。
習知的技術中,如圖1所示,圖1係為習知指紋感測晶片封裝結構的剖面圖。於圖1中,指紋感測模組20係由平面網格陣列封裝(Land Grid Array,LGA)技術封裝製成,包括有:指紋感測晶片21、基板22、覆蓋於指紋感測晶片21及基板22之上的環氧模壓樹脂(Epoxy Molding Compound,EMC)層23、蓋板24、軟性電路板25及補強板26。其中,指紋感測晶片21的上表面具有焊墊211,基板25上具有金屬接點221,焊墊211則藉由導線W與金屬接點221電性連接。
而於習知的技術中,指紋感測模組20之蓋板24的厚度介於120μm~250μm之間。基板22的厚度介於130μm~310μm之間。指紋感測晶片21的厚度介於150μm~400μ m之間。而為保護導線W及維持其機械強度,環氧模壓樹脂層23的厚度通常為選用指紋感測晶片21之厚度再加上50μm。而軟性電路板25及補強板26的厚度均為120μm。此外,在封裝完成後,需再加上約20μm的灌封膠厚度及約60μm的錫焊厚度。在現今電子裝置不斷追求輕薄化的趨勢中,雖以習知的封裝技術封裝製成的指紋感測模組20其厚度最薄可達770μm,然而,由於封裝材料收縮的特性,可能會導致指紋感測模組20產生翹曲的現象,且讓指紋感測模組20失去應有的機械強度。
有鑑於此,如何提供一種指紋感測晶片封裝結構,使其於在薄型化的過程中,可同時維持其良好的機械強度,並避免翹曲情況的產生,為本發明欲解決的技術課題。
本發明之主要目的,在於提供一種薄型化且同時維持良好機械強度的指紋感測晶片封裝結構。
為達前述之目的,本發明提供一種指紋感測晶片封裝結構,包括:金屬基板,具有貫穿開口及自貫穿開口相對兩側延伸出的二個凹槽;指紋感測晶片,設置於貫穿開口之中,且具有上表面及下表面,下表面具有焊墊;蓋板,固設於金屬基板並覆蓋指紋感測晶片的上表面;軟性電路板,設置於指紋感測晶片的下表面,且具有第一表面及第二表面,第二表面具有第一金屬接點;以及金屬補強板,嵌入二個凹槽之中並覆蓋貫穿開口;其中,焊墊藉由導線與第一金屬接點電性連接。
於上述較佳實施方式中,其中膠體塗佈於焊墊、導線及第一金屬接點,膠體為底部填充膠。
於上述較佳實施方式中,其中膠片層形成於金屬基板與蓋板之間,用以黏合金屬基板及蓋板。
於上述較佳實施方式中,其中蓋板包括第一膠水層,形成於對應貫穿開口的位置,並用以黏合指紋感測晶片的上表面。
於上述較佳實施方式中,其中第二膠水層形成於指紋感測晶片的下表面與軟性電路板的第一表面之間,並用以黏合指紋感測晶片及軟性電路板。
於上述較佳實施方式中,其中軟性電路板於相對於第一金屬接點的另一端形成第二金屬接點。
於上述較佳實施方式中,其中金屬補強板具有線路開口。
於上述較佳實施方式中,其中軟性電路板穿設線路開口。
於上述較佳實施方式中,其中軟性電路板於線路開口位置形成彎折部。
於上述較佳實施方式中,其中膠體塗佈於線路開口及彎折部,膠體為底部填充膠。
於上述較佳實施方式中,其中金屬基板的材質為:不銹鋼、鎢鋼、鋁或馬口鐵。
於上述較佳實施方式中,其中蓋板的材質為:陶瓷或玻璃。
於上述較佳實施方式中,其中金屬補強板的材質為:不銹鋼、鎢鋼、鋁或馬口鐵。
於上述較佳實施方式中,其中金屬基板的厚度介於430μm~450μm之間。
於上述較佳實施方式中,其中金屬基板的厚度為440μm。
於上述較佳實施方式中,其中蓋板的厚度介於110 μm~130μm之間。
於上述較佳實施方式中,其中蓋板的厚度為120μm。
A、B‧‧‧區域
W‧‧‧導線
G‧‧‧膠體
10‧‧‧指紋感測晶片封裝結構
11、21‧‧‧指紋感測晶片
111‧‧‧上表面
112‧‧‧下表面
1121、211‧‧‧焊墊
12‧‧‧金屬基板
121‧‧‧貫穿開口
122‧‧‧凹槽
13、24‧‧‧蓋板
131‧‧‧膠片層
132‧‧‧第一膠水層
14、25‧‧‧軟性電路板
141‧‧‧第一表面
1411‧‧‧第二膠水層
142‧‧‧第二表面
1421‧‧‧第一金屬接點
1422‧‧‧第二金屬接點
143‧‧‧彎折部
15‧‧‧金屬補強板
151‧‧‧線路開口
20‧‧‧指紋感測模組
22‧‧‧基板
221‧‧‧金屬接點
23‧‧‧環氧模壓樹脂層
26‧‧‧補強板
圖1:係為習知指紋感測晶片封裝結構的剖面圖;圖2:係為本發明所提供之指紋感測晶片封裝結構的立體分解圖;圖3A:係為本發明所提供之指紋感測晶片封裝結構的剖面圖;圖3B:係為圖3A中區域A之放大圖;以及圖3C:係為圖3A中區域B之放大圖。
本發明的優點及特徵以及達到其方法將參照例示性實施例及附圖進行更詳細的描述而更容易理解。然而,本發明可以不同形式來實現且不應被理解僅限於此處所陳述的實施例。相反地,對所屬技術領域具有通常知識者而言,所提供的此些實施例將使本揭露更加透徹與全面且完整地傳達本發明的範疇。
首先,請參閱圖2所示,圖2係為本發明所提供之指紋感測晶片封裝結構的立體分解圖。於圖2中,所述的指紋感測晶片封裝結構10包括:指紋感測晶片11、金屬基板12、蓋板13、軟性電路板(Flexible Print Circuit,FPC)14以及金屬補強板15。
請繼續參閱圖2,所述的指紋感測晶片11具有上表面111及下表面112,此外,可透過矽導通孔(Through Silicon Via,TSV)製程技術及線路重佈技術(Redistribution Layer,RDL)製程技術將指紋感測晶片11之焊墊1121佈置於指紋感測晶片11的下表 面112。所述的金屬基板12則具有一個貫穿開口121及自貫穿開口121相對的兩側延伸出的二個凹槽122。其中,貫穿開口121用以容置指紋感測晶片11,而金屬基板12的材質可為:不銹鋼、鎢鋼、鋁或馬口鐵。
所述的蓋板13之一側包括有膠片層131及第一膠水層132,膠片層131用以將蓋板13與金屬基板12進行黏合;第一膠水層132則佈置於對應貫穿開口121的位置,並用以黏合指紋感測晶片11的上表面111。其中,膠片層131為一種熱壓型雙面膠;第一膠水層132則為一種熱固型水膠,蓋板13的材質則可為:陶瓷或玻璃,而於一較佳的實施方式中,蓋板13係由藍寶石玻璃所製成。此外,本發明雖僅提出將膠片層131及第一膠水層132佈置於蓋板13之一側的實施方式,但於實際應用時亦可將膠片層131佈置於金屬基板12之一側,或將第一膠水層132佈置於指紋感測晶片11的上表面111,而不以本發明所提出的實施方式為限。
所述的軟性電路板14具有第一表面141、第二表面142及彎折部143。其中,第一表面141上佈置有第二膠水層1411,並用以黏合指紋感測晶片11的下表面112;第二表面142的一端則具有第一金屬接點1421,而相對的另一端則具有第二金屬接點1422。第二膠水層1411亦為一種熱固型水膠。此外,本發明雖僅提出將第二膠水層1411佈置於軟性電路板14之第一表面141的實施方式,但於實際應用時亦可將第二膠水層1411佈置於指紋感測晶片11的下表面112,而不以本發明所提出的實施方式為限。
所述的金屬補強板15則具有線路開口151,金屬補強板15可嵌入並被收容於金屬基板12的二個凹槽122之中,而線路開口151則供軟性電路板14穿設於其中。此外,金屬補強板15材質可為:不銹鋼、鎢鋼、鋁或馬口鐵。
接著,請參閱圖3A,圖3A係為本發明所提供之指紋感測晶片封裝結構的剖面圖。於圖3A中,蓋板13藉由膠片層131的黏合使其可固設於金屬基板12之一側。另一方面,蓋板13 亦覆蓋指紋感測晶片11的上表面111,並利用第一膠水層132與指紋感測晶片11之上表面111相互黏合,以藉此將指紋感測晶片11固定,如此便可將指紋感測晶片11設置於金屬基板12的貫穿開口121之中。軟性電路板14則設置於指紋感測晶片11的下表面112,並藉由第二膠水層1411與指紋感測晶片11的下表面112相互黏合。此外,貫穿開口121的深度大於指紋感測晶片11及軟性電路板14兩者厚度的總和,使其可完整容置指紋感測晶片11及軟性電路板14。而佈置於指紋感測晶片11之下表面112的焊墊1121則藉由導線W與軟性電路板14之第二表面142的第一金屬接點1421電性連接。隨後,便可將金屬補強板15嵌入金屬基板12的二個凹槽122之中,並且完整地覆蓋金屬基板12的個貫穿開口121。另一方面,金屬補強板15可先以熱固型導電膠(未示於圖中)與軟性電路板14的第二表面142相互黏合,以藉此提升軟性電路板14的機械強度,隨後再以雷射焊接或膠體黏合的方式將金屬補強板15固定於金屬基板12的二個凹槽122之中。
請繼續參閱圖3A,其中軟性電路板14未與指紋感測晶片11之下表面112黏合的部分則穿設於金屬補強板15之線路開口151,且軟性電路板14的彎折部143係設置於對應線路開口151的位置。而軟性電路板14的第二金屬接點1422則設置於指紋感測晶片封裝結構10之外,並用以與電子裝置(未示於圖中)之主電路板的金屬接點電性連接,藉此將指紋感測晶片11所偵測到的指紋資訊輸出至電子裝置以進行後續指紋資訊的處理程序。
請繼續參閱圖3A,於圖3A中,蓋板13的厚度介於110μm~130μm之間;膠片層131的厚度約為20μm;金屬基板12的厚度介於430μm~450μm之間;金屬補強板15的厚度則介於110μm~130μm之間。由於金屬補強板15可嵌入並被收容於金屬基板12的二個凹槽122之中,並不影響指紋感測晶片封裝結構10整體的厚度,因此指紋感測晶片封裝結構10整體的厚度可介於560μm~600μm之間。於一較佳的實施方式中, 蓋板13的厚度為120μm;膠片層131的厚度約為20μm;金屬基板12的厚度為440μm;金屬補強板15的厚度為120μm。而指紋感測晶片封裝結構10整體的厚度為580μm。
請參閱圖3B,圖3B係為圖3A中區域A之放大圖。於圖3B中,可將膠體G塗佈於焊墊1121、導線W及第一金屬接點1421的位置,以保護導線W,並藉此提升導線W的機械強度及抗衝擊能力。其中,膠體W為一種底部填充膠(underfill)。
接著,請參閱圖3C,圖3C係為圖3A中區域B之放大圖。於圖3C中,可將膠體G塗佈於金屬補強板15之線路開口151及軟性電路板14的彎折部143的位置,以藉此密封指紋感測晶片封裝結構10,如此便可避免外界環境中的水氣或懸浮微粒由線路開口151進入指紋感測晶片封裝結構10之中而影響其運作。其中,膠體W亦為一種底部填充膠。
相較於習知技術,本發明提供一種薄型化的指紋感測晶片封裝結構,以減少電子裝置配置指紋感測晶片時所需的容置空間,如此便可有效提升了電子裝置內部電子線路配置的靈活性及自由度。另一方面,以金屬基板作為主體的指紋感測晶片封裝結構亦可在薄型化的同時維持的良好的機械強度,而不會產生外觀翹曲的現象;故,本發明實為一極具產業價值之創作。
本發明得由熟悉本技藝之人士任施匠思而為諸般修飾,然皆不脫如附申請專利範圍所欲保護。
Claims (17)
- 一種指紋感測晶片封裝結構,包括:一金屬基板,具有一貫穿開口及自該貫穿開口相對兩側延伸出的二個凹槽;一指紋感測晶片,設置於該貫穿開口之中,且具有一上表面及一下表面,該下表面具有至少一焊墊;一蓋板,固設於該金屬基板並覆蓋該指紋感測晶片的該上表面;一軟性電路板,設置於該指紋感測晶片的該下表面,且具有一第一表面及一第二表面,該第二表面具有一第一金屬接點;以及一金屬補強板,嵌入該二個凹槽之中並覆蓋該貫穿開口;其中,該至少一焊墊藉由一導線與該第一金屬接點電性連接。
- 如申請專利範圍第1項所述之指紋感測晶片封裝結構,其中一膠體塗佈於該至少一焊墊、該導線及該第一金屬接點,該膠體為一底部填充膠。
- 如申請專利範圍第1項所述之指紋感測晶片封裝結構,其中一膠片層形成於該金屬基板與該蓋板之間,用以黏合該金屬基板及該蓋板。
- 如申請專利範圍第1項所述之指紋感測晶片封裝結構,其中該蓋板包括一第一膠水層,形成於對應該貫穿開口的位置,並用以黏合該指紋感測晶片的該上表面。
- 如申請專利範圍第1項所述之指紋感測晶片封裝結構,其中一第二膠水層形成於該指紋感測晶片的該下表面與該軟性電路板的該第一表面之間,並用以黏合該指紋感測晶片及該軟性電路板。
- 如申請專利範圍第1項所述之指紋感測晶片封裝結構,其中該軟性電路板於相對於該第一金屬接點的另一端形成一第二金屬接點。
- 如申請專利範圍第1項所述之指紋感測晶片封裝結構,其中該金屬補強板具有一線路開口。
- 如申請專利範圍第7項所述之指紋感測晶片封裝結構,其中該軟性電路板穿設該線路開口。
- 如申請專利範圍第8項所述之指紋感測晶片封裝結構,其中該軟性電路板於該線路開口位置形成一彎折部。
- 如申請專利範圍第9項所述之指紋感測晶片封裝結構,其中一膠體塗佈於該線路開口及該彎折部,該膠體為一底部填充膠。
- 如申請專利範圍第1項所述之指紋感測晶片封裝結構,其中該金屬基板的材質為:不銹鋼、鎢鋼、鋁或馬口鐵。
- 如申請專利範圍第1項所述之指紋感測晶片封裝結構,其中該蓋板的材質為:陶瓷或玻璃。
- 如申請專利範圍第1項所述之指紋感測晶片封裝結構,其中該金屬補強板的材質為:不銹鋼、鎢鋼、鋁或馬口鐵。
- 如申請專利範圍第1項所述之指紋感測晶片封裝結構,其中該金屬基板的厚度介於430μm~450μm之間。
- 如申請專利範圍第14項所述之指紋感測晶片封裝結構,其中 該金屬基板的厚度為440μm。
- 如申請專利範圍第1項所述之指紋感測晶片封裝結構,其中該蓋板的厚度介於110μm~130μm之間。
- 如申請專利範圍第16項所述之指紋感測晶片封裝結構,其中該蓋板的厚度為120μm。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW106124639A TWI642158B (zh) | 2017-07-21 | 2017-07-21 | 指紋感測晶片封裝結構 |
US15/830,651 US10445553B2 (en) | 2017-07-21 | 2017-12-04 | Package structure of fingerprint identification chip |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW106124639A TWI642158B (zh) | 2017-07-21 | 2017-07-21 | 指紋感測晶片封裝結構 |
Publications (2)
Publication Number | Publication Date |
---|---|
TWI642158B TWI642158B (zh) | 2018-11-21 |
TW201909360A true TW201909360A (zh) | 2019-03-01 |
Family
ID=65018725
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW106124639A TWI642158B (zh) | 2017-07-21 | 2017-07-21 | 指紋感測晶片封裝結構 |
Country Status (2)
Country | Link |
---|---|
US (1) | US10445553B2 (zh) |
TW (1) | TWI642158B (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI787995B (zh) * | 2021-09-08 | 2022-12-21 | 致伸科技股份有限公司 | 觸控板模組以及具有觸控板模組的電子計算機 |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110692064B (zh) * | 2019-04-04 | 2023-05-16 | 深圳市汇顶科技股份有限公司 | 指纹模组、电子设备及封装方法 |
US10832991B1 (en) * | 2019-05-07 | 2020-11-10 | Texas Instruments Incorporated | Leadless packaged device with metal die attach |
CN110770746B (zh) * | 2019-05-29 | 2021-06-11 | 深圳市汇顶科技股份有限公司 | 指纹识别装置和电子设备 |
CN110321831A (zh) * | 2019-06-28 | 2019-10-11 | 维沃移动通信有限公司 | 指纹模组及移动终端 |
CN111144339B (zh) * | 2019-12-30 | 2023-03-24 | 业泓科技(成都)有限公司 | 指纹识别模组和电子装置 |
TWI777742B (zh) * | 2021-05-18 | 2022-09-11 | 友達光電股份有限公司 | 指紋辨識裝置 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1110846C (zh) * | 1996-07-12 | 2003-06-04 | 富士通株式会社 | 半导体装置的制造方法 |
US8304881B1 (en) * | 2011-04-21 | 2012-11-06 | Tessera, Inc. | Flip-chip, face-up and face-down wirebond combination package |
US9443126B2 (en) * | 2012-11-20 | 2016-09-13 | Crucialtec Co., Ltd. | Fingerprint sensor module, portable electronic device including same, and method for manufacturing same |
CN104201116B (zh) * | 2014-09-12 | 2018-04-20 | 苏州晶方半导体科技股份有限公司 | 指纹识别芯片封装方法和封装结构 |
TWI604388B (zh) * | 2016-02-19 | 2017-11-01 | 致伸科技股份有限公司 | 指紋辨識模組及其製造方法 |
TWI596716B (zh) * | 2016-06-27 | 2017-08-21 | 速博思股份有限公司 | 指紋辨識裝置 |
KR20180022626A (ko) * | 2016-07-15 | 2018-03-06 | 선전 구딕스 테크놀로지 컴퍼니, 리미티드 | 지문 인식 모듈 및 그 제조 방법 |
EP3285463B1 (en) * | 2016-08-16 | 2018-11-14 | Guangdong Oppo Mobile Telecommunications Corp., Ltd. | Input assembly and terminal |
CN106653616A (zh) * | 2016-11-22 | 2017-05-10 | 苏州晶方半导体科技股份有限公司 | 指纹传感芯片的封装方法以及封装结构 |
-
2017
- 2017-07-21 TW TW106124639A patent/TWI642158B/zh not_active IP Right Cessation
- 2017-12-04 US US15/830,651 patent/US10445553B2/en not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI787995B (zh) * | 2021-09-08 | 2022-12-21 | 致伸科技股份有限公司 | 觸控板模組以及具有觸控板模組的電子計算機 |
Also Published As
Publication number | Publication date |
---|---|
TWI642158B (zh) | 2018-11-21 |
US20190026533A1 (en) | 2019-01-24 |
US10445553B2 (en) | 2019-10-15 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TWI642158B (zh) | 指紋感測晶片封裝結構 | |
JP7289956B2 (ja) | 指紋感知モジュール及びその方法 | |
US10784205B2 (en) | Electronic package | |
US6995448B2 (en) | Semiconductor package including passive elements and method of manufacture | |
JP5161732B2 (ja) | 半導体装置の製造方法 | |
JP4058642B2 (ja) | 半導体装置 | |
JP2020503606A5 (zh) | ||
TWI660519B (zh) | 屏幕下方感測器總成 | |
TWI627720B (zh) | 指紋感測晶片封裝結構 | |
TWI631632B (zh) | 封裝結構及其製法 | |
KR20160143071A (ko) | 지문센서 패키지 | |
JP2017228779A (ja) | 光学的封止構造体 | |
TWI559464B (zh) | 封裝模組及其基板結構 | |
CN109427696B (zh) | 指纹感测芯片封装结构 | |
TWI750439B (zh) | 半導體裝置及其製造方法 | |
CN109300862B (zh) | 指纹感测芯片封装结构 | |
JP2003282609A (ja) | 指紋認識用半導体装置及びその製造方法 | |
TW201106458A (en) | Package structure with cavity and manufacturing method thereof | |
WO2018218670A1 (zh) | 指纹芯片封装模组、指纹识别模组和封装方法 | |
JP2021044435A (ja) | 半導体装置 | |
KR101809004B1 (ko) | 지문인식센서 패키지 및 그 패키지를 포함하는 pcb 스트립 패키지 구조체 | |
TW201711146A (zh) | 封裝結構及其製法 | |
US20060108681A1 (en) | Semiconductor component package | |
KR20170124491A (ko) | 지문센서 패키지 | |
KR101078733B1 (ko) | 반도체 패키지 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Annulment or lapse of patent due to non-payment of fees |