WO2018218670A1 - 指纹芯片封装模组、指纹识别模组和封装方法 - Google Patents

指纹芯片封装模组、指纹识别模组和封装方法 Download PDF

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Publication number
WO2018218670A1
WO2018218670A1 PCT/CN2017/087024 CN2017087024W WO2018218670A1 WO 2018218670 A1 WO2018218670 A1 WO 2018218670A1 CN 2017087024 W CN2017087024 W CN 2017087024W WO 2018218670 A1 WO2018218670 A1 WO 2018218670A1
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WIPO (PCT)
Prior art keywords
piezoresistive
resistive sensor
fingerprint identification
sensor
laminated resistive
Prior art date
Application number
PCT/CN2017/087024
Other languages
English (en)
French (fr)
Inventor
龙卫
Original Assignee
深圳市汇顶科技股份有限公司
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Filing date
Publication date
Application filed by 深圳市汇顶科技股份有限公司 filed Critical 深圳市汇顶科技股份有限公司
Priority to PCT/CN2017/087024 priority Critical patent/WO2018218670A1/zh
Priority to CN201780000471.4A priority patent/CN107438855B/zh
Publication of WO2018218670A1 publication Critical patent/WO2018218670A1/zh

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
    • G06V40/00—Recognition of biometric, human-related or animal-related patterns in image or video data
    • G06V40/10—Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
    • G06V40/12—Fingerprints or palmprints
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3114—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads

Definitions

  • the embodiments of the present application relate to the field of chip technologies, and more specifically, to a fingerprint chip package module, a fingerprint identification module, and a packaging method.
  • Fingerprint recognition is achieved through a fingerprint recognition module.
  • the fingerprint recognition module can be connected to the motherboard through a Flexible Printed Circuit (FPC) and send output signals to other components on the motherboard through the FPC.
  • FPC Flexible Printed Circuit
  • the current fingerprint recognition module can only implement the function of recognizing a fingerprint. If the fingerprint recognition module can provide more functions, it will greatly improve the user experience.
  • the embodiment of the present application provides a fingerprint chip package module, a fingerprint identification module, and a packaging method, which can utilize the pressure of the user to act on the fingerprint identification chip.
  • the embodiment of the present application provides a fingerprint identification chip package module
  • the fingerprint identification chip package module includes: a fingerprint identification chip and N piezoresistive sensors, wherein N is a positive integer greater than or equal to 1;
  • the first surface of the fingerprint identification chip has a pad, the first surface is an upper surface or a lower surface of the fingerprint identification chip; part or all of the N piezoresistive sensors are attached to the first surface of the fingerprint identification chip;
  • Each of the N piezoresistive sensors is coupled to the pad.
  • the N piezoresistive sensors are two layers attached to the first surface of the fingerprint identification chip, wherein the first of the two layers A laminated resistive sensor and a second laminated resistive sensor each comprise at least one piezoresistive sensor; the fingerprint identification chip package module further comprising the first laminated resistive sensor and the second laminated resistive sensor The insulation between the layers.
  • the first laminated resistive sensor and the second laminated resistive sensor comprise a bridge.
  • the first surface is an upper surface of the fingerprint identification chip
  • the first A surface has a fingerprint recognition area
  • some or all of the N piezoresistive sensors are attached to an area other than the fingerprint recognition area.
  • the embodiment of the present application provides a fingerprint identification module, which includes: a fingerprint identification chip, N piezoresistive sensors, a package substrate, and a molding material, wherein N is a positive integer greater than or equal to 1.
  • the fingerprint identification chip is attached to the upper surface of the package substrate; the molding material covers the package substrate and the fingerprint identification chip, and the lower surface of the package substrate is not covered by the molding material; the N piezoresistive sensors are located at the Above or below the fingerprint identification chip.
  • the N piezoresistive sensors are located inside the package substrate; the package substrate includes a pad, and each of the N piezoresistive sensors Piezoresistive sensors are connected to the pad.
  • the package substrate includes a support layer, and the N piezoresistive sensors are located below the support layer.
  • the N piezoresistive sensors are respectively disposed on two layers of the lower surface of the support layer, where The first laminate resistive sensor and the second laminated resistive sensor of the two layers each include at least one piezoresistive sensor; the fingerprint recognition module further includes the first laminated resistive sensor and the second layer An insulating layer between piezoresistive sensors.
  • each of the N piezoresistive sensors is connected to the package substrate; part of the N piezoresistive sensors Or all attached to the upper surface of the molding material.
  • the upper surface of the molding material has a fingerprint identification area, and some or all of the N piezoresistive sensors are attached. An area outside the fingerprint recognition area.
  • the N piezoresistive sensors are divided into two layers. Laminating on the upper surface of the molding material, wherein the first laminated resistive sensor and the second laminated resistive sensor of the two layers each comprise at least one piezoresistive sensor; the fingerprint recognition module further comprises An insulating layer between the first laminated resistive sensor and the second laminated resistive sensor.
  • the first laminated resistive sensor and the first A two-layer resistive sensor constitutes a bridge.
  • an embodiment of the present application provides a wafer level fingerprint identification chip packaging method, the method comprising: arranging N piezoresistive sensors on a first surface of a fingerprint identification chip, wherein the first surface is the fingerprint identification N is a positive integer greater than or equal to 1 on the upper or lower surface of the chip; the N piezoresistive sensors are connected to the pads of the fingerprint chip through a connection line.
  • the disposing the N piezoresistive sensors on the first surface of the fingerprint identification chip includes: arranging the first surface on the lower surface of the fingerprint chip a laminated resistive sensor; an insulating layer coated on a lower surface of the first laminated resistive sensor; a second laminated resistive sensor disposed on a lower surface of the insulating layer, wherein the first laminated resistive sensor and The second laminated resistive sensors each include at least one piezoresistive sensor.
  • the disposing the N piezoresistive sensors on the first surface of the fingerprint identification chip comprises: arranging the first surface on the upper surface of the fingerprint chip a laminated resistive sensor; an insulating layer coated on an upper surface of the first laminated resistive sensor; a second laminated resistive sensor disposed on an upper surface of the insulating layer, wherein the first laminated resistive sensor and The second laminated resistive sensors each include at least one piezoresistive sensor.
  • the first laminated resistive sensor and the first A two-layer resistive sensor constitutes a bridge.
  • the embodiment of the present application provides a method for packaging a fingerprint identification module, the method comprising: attaching a fingerprint identification chip to an upper surface of a package substrate through a glue layer; covering the fingerprint identification chip and the package with a molding material a substrate, wherein a lower surface of the package substrate is not covered by the molding material; N piezoresistive sensors are arranged above or below the fingerprint recognition chip, and N is a positive integer greater than or equal to 1.
  • the N piezoresistive sensors are disposed above or below the fingerprint identification chip, including: the N piezoresistive sensor rows
  • the N piezoresistive sensors are connected to the pads of the package substrate through a connection line.
  • the N piezoresistive sensors are disposed inside the package substrate, including: The piezoresistive sensor is arranged below the support layer of the package substrate.
  • the N piezoresistive sensors are disposed under the support layer of the package substrate, including: Disposing a first laminated resistive sensor on a lower surface of the supporting layer of the package substrate; coating an insulating layer on a lower surface of the first laminated resistive sensor; and arranging a second lamination on a lower surface of the insulating layer A resistive sensor, wherein the first laminated resistive sensor and the second laminated resistive sensor each comprise at least one piezoresistive sensor.
  • the N piezoresistive sensors are disposed above or below the fingerprint identification chip, including: the N piezoresistive sensor rows And disposed on the upper surface of the molding material, wherein the N piezoresistive sensors are connected to the package substrate through a connection channel.
  • the N piezoresistive sensors are disposed on the upper surface of the molding material, including: Disposing a first laminated resistive sensor on an upper surface of the material; coating an insulating layer on an upper surface of the first laminated resistive sensor; and arranging a second laminated resistive sensor on an upper surface of the insulating layer, wherein the Both the first laminate resistive sensor and the second laminated resistive sensor comprise at least one piezoresistive sensor.
  • the first laminated resistive sensor and the first A two-layer resistive sensor constitutes a bridge.
  • the above technical solution can utilize the piezoresistive sensor to obtain the pressure exerted by the user on the fingerprint recognition chip.
  • the terminal device can use the acquired pressure to perform corresponding operations.
  • the piezoresistive sensor receives a lower pressure due to temperature changes in the material attached to the piezoresistive sensor. In this way, the number of times and noise of calibrating the piezoresistive sensor can be reduced.
  • the sensitivity of the piezoresistive sensor used can be increased so that more levels of pressure can be identified.
  • FIG. 1 is a schematic block diagram showing the structure of a conventional fingerprint recognition module.
  • FIG. 2 is a schematic block diagram showing the structure of a fingerprint chip package module according to an embodiment of the present application.
  • FIG. 3 is a schematic block diagram of another fingerprint chip package module according to an embodiment of the present application.
  • FIG. 4 is a schematic structural diagram of another fingerprint identification chip package module according to an embodiment of the present application.
  • FIG. 5 is a schematic structural diagram of another fingerprint identification chip package module according to an embodiment of the present application. Figure.
  • FIG. 6 is a schematic structural diagram of a fingerprint identification module according to an embodiment of the present application.
  • FIG. 7 is a schematic structural diagram of another fingerprint identification module according to an embodiment of the present application.
  • FIG. 8 is a schematic structural diagram of a fingerprint identification module according to an embodiment of the present application.
  • FIG. 9 is a schematic structural diagram of another fingerprint identification module according to an embodiment of the present application.
  • FIG. 10 is a bottom plan view of a fingerprint identification chip package module.
  • FIG. 11 is a schematic flowchart of a wafer level fingerprint identification chip packaging method according to an embodiment of the present application.
  • FIG. 12 is a schematic flowchart of a method for packaging a fingerprint identification module according to an embodiment of the present application.
  • FIG. 13 is a schematic flowchart of a method for packaging a fingerprint identification module according to an embodiment of the present application.
  • the fingerprint identification chip referred to in the embodiment of the present application may be a capacitive fingerprint identification chip, or may be a photoelectric fingerprint recognition chip, or another type of fingerprint identification chip, which is not limited by the embodiment of the present application.
  • FIG. 1 is a schematic block diagram showing the structure of a conventional fingerprint recognition module. As shown in FIG. 1 , the lower surface of the fingerprint recognition chip 101 in the fingerprint recognition module 100 is adhered to the upper surface of the package substrate 104 through the adhesive layer 102 .
  • the molding material 103 covers the fingerprint identification chip 101, the adhesive layer 102, and the package substrate 104, and the lower surface of the package substrate 104 is not covered by the molding material 103.
  • the fingerprint recognition module 100 is usually located above a Flexible Printed Circuit (FPC). Placing the piezoresistive sensor under the FPC can obtain the pressure when the user presses the fingerprint recognition module. However, the production of FPC materials is greatly affected by temperature. Specifically, the FPC material produced may be deformed by temperature. Thus, even if the user's finger does not press the fingerprint recognition module, the FPC exerts pressure on the piezoresistive sensor, which may cause problems such as misoperation.
  • FPC Flexible Printed Circuit
  • FIG. 2 is a schematic block diagram showing the structure of a fingerprint chip package module according to an embodiment of the present application.
  • the fingerprint identification chip package module 200 includes a fingerprint identification chip 201 and two piezoresistive sensors 202.
  • two piezoresistive sensors 202 are attached to the lower surface of the fingerprint recognition chip 201.
  • the lower surface of the fingerprint recognition chip 201 may include pads (not shown). Two piezoresistive sensors 202 are connected to the pad.
  • the fingerprint identification chip package module shown in FIG. 2 may further include an insulating layer 203.
  • the insulating layer 203 is located on the lower surface of the fingerprint recognition chip and exposes the pads of the lower surface of the fingerprint recognition chip.
  • FIG. 3 is a schematic block diagram of another fingerprint chip package module according to an embodiment of the present application.
  • the fingerprint identification chip package module 300 includes a fingerprint identification chip 301 and two piezoresistive sensors 302.
  • two piezoresistive sensors 302 are attached to the upper surface of the fingerprint recognition chip 301.
  • the upper surface of the fingerprint recognition chip 301 may include a pad (not shown). Both piezoresistive sensors 302 are connected to the pads.
  • the fingerprint recognition chip 301 includes a fingerprint recognition area.
  • the piezoresistive sensor 302 included in the fingerprint identification chip package module shown in FIG. 3 can be attached to an area other than the fingerprint recognition area.
  • the fingerprint identification chip package module shown in FIG. 3 may further include an insulating layer 303.
  • the insulating layer 303 is attached to the lower surface of the fingerprint identification chip and exposes the pads of the lower surface of the fingerprint identification chip.
  • FIG. 4 is a schematic structural diagram of another fingerprint identification chip package module according to an embodiment of the present application.
  • the fingerprint identification chip package module 400 includes a fingerprint identification chip 401, a first insulation layer 402, a piezoresistive sensor 411, a piezoresistive sensor 412, a piezoresistive sensor 413, and a piezoresistive sensor 414.
  • the piezoresistive sensor 411 and the piezoresistive sensor 412 are attached to the lower surface of the fingerprint recognition chip 401.
  • the piezoresistive sensor 411 and the piezoresistive sensor 412 are attached to the upper surface of the first insulating layer 402.
  • the piezoresistive sensor 413 and the piezoresistive sensor 414 are attached to the lower surface of the first insulating layer 402.
  • the lower surface of the fingerprint recognition chip 401 may include a pad (not shown).
  • the piezoresistive sensor 411, the piezoresistive sensor 412, the piezoresistive sensor 413, and the piezoresistive sensor 414 are all connected to the pads.
  • the fingerprint identification chip package module shown in FIG. 4 may further include a second insulating layer 403.
  • the second insulating layer 403 is attached to the lower surface of the fingerprint identification chip and exposes the pad of the lower surface of the fingerprint identification chip.
  • the second insulating layer 403 may include a space in which an insulating layer between the piezoresistive sensor and the piezoresistive sensor is located.
  • FIG. 5 is a schematic structural diagram of another fingerprint identification chip package module according to an embodiment of the present application.
  • the fingerprint identification chip package module 500 includes a fingerprint identification chip 501, a first insulation layer 502, a piezoresistive sensor 511, a piezoresistive sensor 512, a piezoresistive sensor 513, and a piezoresistive sensor 514.
  • the piezoresistive sensor 511 and the piezoresistive sensor 512 are attached to the upper surface of the fingerprint recognition chip 501.
  • the piezoresistive sensor 511 and the piezoresistive sensor 512 are attached to the lower surface of the first insulating layer 502.
  • the piezoresistive sensor 513 and the piezoresistive sensor 514 are attached to the upper surface of the first insulating layer 502.
  • the upper surface of the fingerprint recognition chip 501 may include a pad.
  • the piezoresistive sensor 511, the piezoresistive sensor 512, the piezoresistive sensor 513, and the piezoresistive sensor 514 are all connected to the pads.
  • the fingerprint recognition chip 501 includes a fingerprint recognition area.
  • the piezoresistive sensor 511, the piezoresistive sensor 512, the piezoresistive sensor 513, and the piezoresistive sensor 514 are attached to an area other than the fingerprint recognition area.
  • the fingerprint identification chip package module shown in FIG. 5 may further include a second insulating layer 503.
  • the second insulating layer 503 is attached to the lower surface of the fingerprint identification chip and exposes the pad of the lower surface of the fingerprint identification chip.
  • the fingerprint identification chip package module shown in FIG. 2 to FIG. 5 directly attaches the piezoresistive sensor to the surface of the fingerprint chip.
  • the piezoresistive sensor can be used to obtain the pressure exerted by the user on the fingerprint recognition chip.
  • the terminal device can use the acquired pressure to perform corresponding operations.
  • the piezoresistive sensor is directly attached to the surface of the fingerprint chip, so there is no material between the piezoresistive sensor and the fingerprint recognition chip that may be susceptible to deformation due to temperature.
  • the piezoresistive sensor is not subjected to pressure from the material that is attached to the piezoresistive sensor due to temperature changes. In this way, the number of times and noise of calibrating the piezoresistive sensor can be reduced.
  • the sensitivity of the piezoresistive sensor used can be increased so that more levels of pressure can be identified.
  • the pad connected to the piezoresistive sensor is connected to the package substrate, so that the power supply and the processing module can be connected to the piezoresistive type.
  • the signal obtained by the sensor determines the pressure or pressure level. More specifically, If the piezoresistive sensor is attached over the fingerprint recognition chip, the pad connected to the piezoresistive sensor can be connected to the substrate through the connection channel.
  • the connection channel may be a connection channel formed by using a through silicon via (TSV), or may be an electrical connection line directly connected to the substrate. This embodiment of the present application is not limited thereto.
  • FIG. 6 is a schematic structural diagram of a fingerprint identification module according to an embodiment of the present application.
  • the fingerprint recognition module 600 includes a fingerprint identification chip 601, two piezoresistive sensors 602, and a package substrate 603.
  • the fingerprint recognition chip 601 is attached to the upper surface of the package substrate 603 through the adhesive layer 604.
  • Two piezoresistive sensors 602 are located inside the package substrate 603.
  • the package substrate 603 includes pads, and the piezoresistive sensor is connected to the pads.
  • the package substrate 603 includes a support layer 605.
  • the piezoresistive sensor can be located below the support layer.
  • FIG. 7 is a schematic structural diagram of another fingerprint identification module according to an embodiment of the present application.
  • the fingerprint recognition module includes a fingerprint identification chip 701, a package substrate 702, an insulating layer 703, a piezoresistive sensor 711, a piezoresistive sensor 712, a piezoresistive sensor 713, and a piezoresistive sensor 714.
  • the fingerprint recognition chip 701 is attached to the upper surface of the package substrate 702 through the adhesive layer 704.
  • the package substrate 702 includes a support layer 705.
  • the piezoresistive sensor 711 and the piezoresistive sensor 712 may be attached to the lower surface of the support layer 705, and the insulating layer 703 is attached to the piezoresistive sensor 711 and the piezoresistive sensor 712.
  • the piezoresistive sensor 713 and the piezoresistive sensor 714 are attached to the lower surface of the insulating layer 703.
  • the package substrate 702 includes pads, and the piezoresistive sensor is connected to the pads.
  • the piezoresistive sensor shown in Figures 6 and 7 is located inside the substrate. In this way, the piezoresistive sensor can be used to obtain the pressure exerted by the user on the fingerprint recognition chip.
  • the terminal device can use the acquired pressure to perform corresponding operations.
  • the piezoresistive sensor is located inside the substrate and the deformation of the substrate due to temperature is small, so the piezoresistive sensor receives less pressure from the material attached to the piezoresistive sensor due to temperature changes. In this way, the number of times and noise of calibrating the piezoresistive sensor can be reduced.
  • the sensitivity of the piezoresistive sensor used can be increased so that more levels of pressure can be identified.
  • FIG. 8 is a schematic structural diagram of a fingerprint identification module according to an embodiment of the present application.
  • the fingerprint recognition module 800 includes a fingerprint identification chip 801 , two piezoresistive sensors 802 , The substrate 803 and the molding material 804 are packaged.
  • the fingerprint recognition chip 801 is attached to the upper surface of the package substrate 803 through the adhesive layer 805.
  • the molding material 804 covers the package substrate 803 and the fingerprint recognition chip 801, and the lower surface of the package substrate 803 is not covered by the molding material 804.
  • Two piezoresistive sensors 802 are attached to the upper surface of the molding compound 804.
  • FIG. 9 is a schematic structural diagram of another fingerprint identification module according to an embodiment of the present application.
  • the fingerprint identification chip package module 900 includes: a fingerprint identification chip 901 , an insulating layer 902 , a package substrate 903 , a molding material 904 , a piezoresistive sensor 911 , a piezoresistive sensor 912 , a piezoresistive sensor 913 , and Piezoresistive sensor 914.
  • the fingerprint recognition chip 901 is attached to the upper surface of the package substrate 903 through the adhesive layer 905.
  • the molding material 904 covers the package substrate 903 and the fingerprint recognition chip 901, and the lower surface of the package substrate 903 is not covered by the molding material 904.
  • the piezoresistive sensor 911 and the piezoresistive sensor 912 are attached to the upper surface of the molding material 904.
  • the piezoresistive sensor 911 and the piezoresistive sensor 912 are attached to the lower surface of the insulating layer 902.
  • the piezoresistive sensor 913 and the piezoresistive sensor 914 are attached to the upper surface of the insulating layer 902.
  • the molding material includes a fingerprint recognition area.
  • the piezoresistive sensor shown in Figs. 8 and 9 can be attached to an area other than the fingerprint recognition area.
  • the piezoresistive sensor shown in Figures 8 and 9 is connected to the substrate. Specifically, the piezoresistive sensor is connected to the pad on the upper surface of the molding material, and the pad is connected to the substrate through the connection channel.
  • the connecting channel can be an electrical connection channel inside the molding material.
  • the connection channel can also be an electrical connection channel external to the encapsulation material.
  • the fingerprint identification chip package module shown in FIG. 8 and FIG. 9 directly attaches the piezoresistive sensor to the upper surface of the molding material.
  • the piezoresistive sensor can be used to obtain the pressure exerted by the user on the fingerprint recognition chip.
  • the terminal device can use the acquired pressure to perform corresponding operations.
  • the piezoresistive sensor is directly attached to the upper surface of the molding material, so that there is no material above the piezoresistive sensor that may be susceptible to deformation due to temperature.
  • the piezoresistive sensor is not subjected to pressure from the material that is attached to the piezoresistive sensor due to temperature changes. In this way, the number of times and noise of calibrating the piezoresistive sensor can be reduced.
  • the sensitivity of the piezoresistive sensor used can be increased so that more levels of pressure can be identified.
  • the piezoresistive sensor of the embodiment shown in Figures 2 through 9 can be connected to the pad via a Redistribution Layer (RDL).
  • RDL Redistribution Layer
  • piezoresistive sensors can also Connected to the pad by other means.
  • FIG. 10 is a bottom view of a fingerprint identification chip package module.
  • the fingerprint identification chip package module shown in FIG. 10 is a bottom view of the fingerprint identification package module shown in FIG. 4.
  • the piezoresistive sensor 411 is connected to the pad 421 of the fingerprint identification chip 401
  • the piezoresistive sensor 412 is connected to the pad 422 of the fingerprint identification chip 401
  • the piezoresistive sensor 413 and the fingerprint identification chip 401 are soldered.
  • the disk 423 is connected
  • the piezoresistive sensor 414 is connected to the pad 424 of the fingerprint recognition chip 401.
  • the lower surface of the fingerprint recognition chip 401 may further include other pads through which the fingerprint recognition chip 401 can be connected to the package substrate. Further, in order to facilitate the connection of the first laminated resistive sensor to the pad, FIG. 10 does not show the insulating layer between the two laminated resistive sensors.
  • connection relationship between the piezoresistive sensor and the pad shown in FIG. 2, FIG. 3, FIG. 5 to FIG. 9 is similar to the connection relationship shown in FIG. 10, and need not be described here.
  • the fingerprint identification chip package module shown in FIG. 2 to FIG. 9 is only for helping a person skilled in the art to better understand the embodiments enumerated in the present application.
  • the number of piezoresistive sensors in the fingerprint identification chip package module of FIGS. 2, 3, 6, and 8 may also be one or more than two.
  • the number of each of the laminated resistive sensors in the fingerprint identification chip package module shown in FIG. 4, FIG. 5, FIG. 7 and FIG. 9 may also be one or more than two.
  • the four piezoresistive sensors shown in Figures 4, 5, 7, and 9 can form a bridge. In this way, the amount of the pressing signal can be doubled, the range of the detectable pressure can be increased, and the signal-to-noise ratio (SNR) can be increased.
  • SNR signal-to-noise ratio
  • the four piezoresistive sensors shown in FIG. 4, FIG. 5, FIG. 7 and FIG. 9 form a three-layer structure with the insulating layer, that is, an insulating layer is disposed between the two laminated resistive sensors.
  • the insulating layer of the layer may be made of a material that is less affected by temperature influence, such as green oil or the like.
  • FIG. 11 is a schematic flowchart of a wafer level fingerprint identification chip packaging method according to an embodiment of the present application.
  • connection line Connect the N piezoresistive sensors to the pads of the fingerprint chip through a connection line.
  • the disposing the N piezoresistive sensors on the first surface of the fingerprint identification chip comprises: arranging a first laminated resistive sensor on a lower surface of the fingerprint chip; An underlying surface of a laminated resistive sensor is coated with an insulating layer; a second laminated resistive sensor is disposed on a lower surface of the insulating layer, wherein the first laminated resistive sensor and the second laminated resistive sensor are both Includes at least one piezoresistive sensor.
  • the disposing the N piezoresistive sensors on the first surface of the fingerprint identification chip comprises: arranging a first laminated resistive sensor on an upper surface of the fingerprint chip; An upper surface of the laminated resistive sensor is coated with an insulating layer; a second laminated resistive sensor is disposed on the upper surface of the insulating layer, wherein the first laminated resistive sensor and the second laminated resistive sensor are both Includes at least one piezoresistive sensor.
  • first laminated resistive sensor and the second laminated resistive sensor form a bridge.
  • the fingerprint recognition chip package module packaged by the method shown in FIG. 11 directly bonds the piezoresistive sensor to the surface of the fingerprint chip.
  • the embodiment and the beneficial effects of the specific structure of the fingerprint identification chip package module produced by the method shown in FIG. 11 can be referred to the fingerprint identification chip package module shown in FIG. 2 to FIG. 5, and need not be described herein.
  • FIG. 12 is a schematic flowchart of a method for packaging a fingerprint identification module according to an embodiment of the present application.
  • the fingerprint identification chip is attached to the upper surface of the package substrate through a glue layer.
  • N is a positive integer greater than or equal to 1.
  • connection line Connect the N piezoresistive sensors to the pads of the package substrate through a connection line.
  • disposing the N piezoresistive sensors inside the package substrate comprises: arranging the N piezoresistive sensors under the support layer of the package substrate.
  • the placing the N piezoresistive sensors under the support layer of the package substrate comprises: arranging a first laminate resistance on a lower surface of the support layer of the package substrate a sensor; an insulating layer is coated on a lower surface of the first laminated resistive sensor; a second laminated resistive sensor is disposed on a lower surface of the insulating layer, wherein the first laminated resistive sensor and the second layer
  • the piezoresistive sensors each include at least one piezoresistive sensor.
  • the piezoresistive sensor can be placed inside the package substrate by using a fingerprint recognition module packaged as shown in FIG.
  • a fingerprint recognition module packaged as shown in FIG.
  • the specific structure of the fingerprint recognition module made according to the method shown in FIG.
  • the fingerprint identification chip package module shown in FIG. 6 to FIG. 7 it is not necessary to repeat the description here.
  • FIG. 13 is a schematic flowchart of a method for packaging a fingerprint identification module according to an embodiment of the present application.
  • the fingerprint identification chip is attached to the upper surface of the package substrate through a glue layer.
  • N piezoresistive sensors are arranged on the upper surface of the molding material, wherein the N piezoresistive sensors are connected to the package substrate through a connection channel, and N is a positive integer greater than or equal to 1.
  • the N piezoresistive sensors are disposed on the upper surface of the molding material, including: disposing a first laminated resistive sensor on an upper surface of the molding material; An upper surface of the laminated resistive sensor is coated with an insulating layer; a second laminated resistive sensor is disposed on the upper surface of the insulating layer, wherein the first laminated resistive sensor and the second laminated resistive sensor are both Includes at least one piezoresistive sensor.
  • first laminated resistive sensor and the second laminated resistive sensor form a bridge.
  • an electrical connection channel may be formed in the molding material, and one end of the electrical connection channel is connected to the package substrate. The other end of the electrical connection channel is exposed on the upper surface of the molding material or near the upper surface of the molding material. If the electrical connection channel is not exposed on the upper surface of the molding material, the electrical connection channel may be exposed by grinding or laser engraving before the N piezoresistive sensors are arranged on the upper surface of the molding material. .

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  • Microelectronics & Electronic Packaging (AREA)
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Abstract

一种指纹芯片封装模组、指纹识别模组和封装方法，该指纹识别芯片封装模组包括：指纹识别芯片（201）和N个压阻式传感器（202），该指纹识别芯片（201）的第一表面具有焊盘（421，422，423，424），该第一表面为该指纹识别芯片（201）的上表面或下表面；该N个压阻式传感器（202）的部分或全部贴合在指纹识别芯片（201）的第一表面，该N个压阻式传感器（202）中的每个压阻式传感器（202）与该焊盘（421，422，423，424）相连。该结构可以利用压阻式传感器（202）获取用户作用在指纹识别芯片（201）上的压力，减少校准压阻式传感器（202）的次数和噪声，提高使用的压阻式传感器（202）灵敏度，以识别更多等级的压力。

Description

指纹芯片封装模组、指纹识别模组和封装方法 技术领域
本申请实施例涉及芯片技术领域，并且更具体地，涉及指纹芯片封装模组、指纹识别模组和封装方法。
背景技术
越来越多的电子设备利用指纹识别技术验证用户是否为合法用户。指纹识别是通过指纹识别模组实现的。指纹识别模组可以通过软性线路板(Flexible Printed Circuit，FPC)连接至主机板上，并通过FPC将输出信号发送至主机板上的其他元件。目前的指纹识别模组仅能够实现识别指纹的功能。如果指纹识别模组能够提供更多的功能，则会大大提高用户体验。
发明内容
本申请实施例提供指纹芯片封装模组、指纹识别模组和封装方法，可以利用获取用户作用在指纹识别芯片上的压力。
第一方面，本申请实施例提供一种指纹识别芯片封装模组，该指纹识别芯片封装模组包括：指纹识别芯片和N个压阻式传感器，其中N为大于或等于1的正整数；该指纹识别芯片的第一表面具有焊盘，该第一表面为该指纹识别芯片的上表面或下表面；该N个压阻式传感器的部分或全部贴合在该指纹识别芯片的第一表面；该N个压阻式传感器中的每个压阻式传感器与该焊盘相连。
结合第一方面，在第一方面的第一种可能的实现方式中，该N个压阻式传感器分为两层贴合在该指纹识别芯片的第一表面，其中，该两层中的第一层压阻式传感器和第二层压阻式传感器均包括至少一个压阻式传感器；该指纹识别芯片封装模组还包括位于该第一层压阻式传感器和该第二层压阻式传感器之间的绝缘层。
结合第一方面的第一种可能的实现方式，在第一方面的第二种可能的实现方式中，该第一层压阻式传感器和该第二层压阻式传感器组成电桥。
结合第一方面或第一方面的上述任一种可能的实现方式，在第一方面的第三种可能的实现方式中，若该第一表面为该指纹识别芯片的上表面，该第 一表面具有指纹识别区域，该N个压阻式传感器的部分或全部贴合在该指纹识别区域以外的区域。
第二方面，本申请实施例提供一种指纹识别模组，该指纹识别模组包括：指纹识别芯片、N个压阻式传感器、封装基板和塑封材料，其中N为大于或等于1的正整数，该指纹识别芯片贴合在该封装基板的上表面；该塑封材料覆盖该封装基板和该指纹识别芯片，该封装基板的下表面未被该塑封材料覆盖；该N个压阻式传感器位于该指纹识别芯片的上方或者下方。
结合第二方面，在第二方面的第一种可能的实现方式中，该N个压阻式传感器位于该封装基板的内部；该封装基板包括焊盘，该N个压阻式传感器中的每个压阻式传感器与该焊盘相连。
结合第二方面的第一种可能的实现方式，在第二方面的第二种可能的实现方式中，该封装基板包括支撑层，该N个压阻式传感器位于该支撑层下方。
结合第二方面的第二种可能的实现方式，在第二方面的第三种可能的实现方式中，该N个压阻式传感器分为两层贴合在该支撑层的下表面，其中，该两层中的第一层压阻式传感器和第二层压阻式传感器均包括至少一个压阻式传感器；该指纹识别模组还包括位于该第一层压阻式传感器和该第二层压阻式传感器之间的绝缘层。
结合第二方面，在第二方面的第四种可能的实现方式中，该N个压阻式传感器中的每个压阻式传感器与该封装基板相连；该N个压阻式传感器中的部分或全部贴合在该塑封材料的上表面。
结合第二方面的第四种可能的实现方式，在第二方面的第五种可能的实现方式中，该塑封材料的上表面具有指纹识别区域，该N个压阻式传感器的部分或全部贴合在该指纹识别区域以外的区域。
结合第二方面的第四种可能的实现方式或第二方面的第五种可能的实现方式，在第二方面的第六种可能的实现方式中，该N个压阻式传感器分为两层贴合在该塑封材料的上表面，其中，该两层中的第一层压阻式传感器和第二层压阻式传感器均包括至少一个压阻式传感器；该指纹识别模组还包括位于该第一层压阻式传感器和该第二层压阻式传感器之间的绝缘层。
结合第二方面的第三种可能的实现方式或第二方面的第六种可能的实现方式，在第二方面的第七种可能的实现方式中，该第一层压阻式传感器和该第二层压阻式传感器组成电桥。
第三方面，本申请实施例提供一种晶圆级指纹识别芯片封装方法，该方法包括：在指纹识别芯片的第一表面排布N个压阻式传感器，其中该第一表面为该指纹识别芯片的上表面或者下表面，N为大于或等于1的正整数；通过连接线路将该N个压阻式传感器与该指纹芯片的焊盘相连。
结合第三方面，在第三方面的第一种可能的实现方式中，该在指纹识别芯片的第一表面排布N个压阻式传感器，包括：在该指纹芯片的下表面排布第一层压阻式传感器；在该第一层压阻式传感器的下表面涂布绝缘层；在该绝缘层的下表面排布第二层压阻式传感器，其中该第一层压阻式传感器和该第二层压阻式传感器均包括至少一个压阻式传感器。
结合第三方面，在第三方面的第二种可能的实现方式中，该在指纹识别芯片的第一表面排布N个压阻式传感器，包括：在该指纹芯片的上表面排布第一层压阻式传感器；在该第一层压阻式传感器的上表面涂布绝缘层；在该绝缘层的上表面排布第二层压阻式传感器，其中该第一层压阻式传感器和该第二层压阻式传感器均包括至少一个压阻式传感器。
结合第三方面的第一种可能的实现方式或第三方面的第二种可能的实现方式，在第三方面的第三种可能的实现方式中，该第一层压阻式传感器和该第二层压阻式传感器组成电桥。
第四方面，本申请实施例提供一种封装指纹识别模组的方法，该方法包括：将指纹识别芯片通过胶层贴合在封装基板的上表面；利用塑封材料覆盖该指纹识别芯片和该封装基板，其中该封装基板的下表面未被该塑封材料覆盖；将N个压阻式传感器排布在该指纹识别芯片的上方或者下方，N为大于或等于1的正整数。
结合第四方面，在第四方面的第一种可能的实现方式中，该将N个压阻式传感器排布在该指纹识别芯片的上方或者下方，包括：将该N个压阻式传感器排布在在该封装基板的内部；通过连接线路将该N个压阻式传感器与该封装基板的焊盘相连。
结合第四方面的第一种可能的实现方式，在第四方面的第二种可能的实现方式中，该将N个压阻式传感器排布在该封装基板的内部，包括：将该N个压阻式传感器排布在该封装基板的支撑层下方。
结合第四方面的第二种可能的实现方式，在第四方面的第三种可能的实现方式中，该将该N个压阻式传感器排布在该封装基板的支撑层下方，包括： 在该封装基板的支撑层的下表面排布第一层压阻式传感器；在该第一层压阻式传感器的下表面涂布绝缘层；在该绝缘层的下表面排布第二层压阻式传感器，其中该第一层压阻式传感器和该第二层压阻式传感器均包括至少一个压阻式传感器。
结合第四方面，在第四方面的第四种可能的实现方式中，该将N个压阻式传感器排布在该指纹识别芯片的上方或者下方，包括：将该N个压阻式传感器排布在该塑封材料的上表面，其中该N个压阻式传感器通过连接通道与该封装基板相连。
结合第四方面的第四种可能的实现方式，在第四方面的第五种可能的实现方式中，该将N个压阻式传感器排布在该塑封材料的上表面，包括：在该塑封材料的上表面排布第一层压阻式传感器；在该第一层压阻式传感器的上表面涂布绝缘层；在该绝缘层的上表面排布第二层压阻式传感器，其中该第一层压阻式传感器和该第二层压阻式传感器均包括至少一个压阻式传感器。
结合第四方面的第三种可能的实现方式或第四方面的第五种可能的实现方式，在第四方面的第六种可能的实现方式中，该第一层压阻式传感器和该第二层压阻式传感器组成电桥。
上述技术方案可以利用压阻式传感器获取用户作用在指纹识别芯片上的压力。终端设备可以利用获取到的压力进行相应的操作。此外，压阻式传感器收到贴合在压阻式传感器上方材料因温度变化而产生的压力较低。这样，可以减少校准压阻式传感器的次数和噪声。此外，还可以提高所使用的压阻式传感器的灵敏度，这样可以识别更多等级的压力。
附图说明
图1是目前常见的指纹识别模组的结构示意框图。
图2是根据本申请实施例提供的指纹芯片封装模组的结构示意框图。
图3是根据本申请实施例提供的另一指纹芯片封装模组的结构示意框图。
图4是根据本申请实施例提供的另一指纹识别芯片封装模组的结构示意图。
图5是根据本申请实施例提供的另一指纹识别芯片封装模组的结构示意 图。
图6是根据本申请实施例提供的一个指纹识别模组的结构示意图。
图7是根据本申请实施例提供的另一指纹识别模组的结构示意图。
图8是根据本申请实施例提供的一个指纹识别模组的结构示意图。
图9是根据本申请实施例提供的另一指纹识别模组的结构示意图。
图10是一个指纹识别芯片封装模组的仰视示意图。
图11是根据本申请实施例提供的一种晶圆级指纹识别芯片封装方法的示意性流程图。
图12是根据本申请实施例提供的一种封装指纹识别模组的方法的示意性流程图。
图13是根据本申请实施例提供的一种封装指纹识别模组的方法的示意性流程图。
具体实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行描述。
在本申请实施例的描述中，术语“上”、“下”、“上表面”、“下表面”等指示方位或位置关系为基于附图所示方位或位置关系。
本申请实施例中所称的指纹识别芯片可以是电容式指纹识别芯片，也可以是光电式指纹识别芯片，或者其他类型的指纹识别芯片，本申请实施例对此并不限定。
图1是目前常见的指纹识别模组的结构示意框图。如图1所示，指纹识别模组100中的指纹识别芯片101的下表面通过胶层102粘连在封装基板104的上表面。塑封材料103覆盖指纹识别芯片101、胶层102和封装基板104，且封装基板104的下表面未被塑封材料103覆盖。
指纹识别模组100通常位于柔性电路板(Flexible Printed Circuit，FPC)上方。将压阻式传感器放置在FPC下方可以获取到用户按压指纹识别模组时的压力。但是制作FPC材料受温度影响比较大。具体地，制作FPC材料受温度影响可能会发生形变。这样，即使用户手指没有按压指纹识别模组，FPC也会在压阻式传感器上方施加压力，这就导致可能会发生误操作等问题。
图2是根据本申请实施例提供的指纹芯片封装模组的结构示意框图。如 图2所示，指纹识别芯片封装模组200包括：指纹识别芯片201和两个压阻式传感器202。
如图2所示，两个压阻式传感器202贴合指纹识别芯片201的下表面。
指纹识别芯片201的下表面可以包括焊盘(图中未示出)。两个压阻式传感器202均与该焊盘相连。
此外，图2所示的指纹识别芯片封装模组还可以包括一层绝缘层203。绝缘层203位于指纹识别芯片的下表面且暴露出指纹识别芯片下表面的焊盘。
图3是根据本申请实施例提供的另一指纹芯片封装模组的结构示意框图。如图3所示，指纹识别芯片封装模组300包括指纹识别芯片301和两个压阻式传感器302。
如图3所示，两个压阻式传感器302贴合在指纹识别芯片301的上表面。
指纹识别芯片301的上表面可以包括焊盘(图中未示出)。两个压阻式传感器302均与焊盘相连。
进一步，指纹识别芯片301包括指纹识别区域。如图3所示的指纹识别芯片封装模组包括的压阻式传感器302可以贴合在该指纹识别区域以外的区域。
此外，图3所示的指纹识别芯片封装模组还可以包括一层绝缘层303。绝缘层303贴合在指纹识别芯片的下表面且暴露出指纹识别芯片下表面的焊盘。
图4是根据本申请实施例提供的另一指纹识别芯片封装模组的结构示意图。如图4所示，指纹识别芯片封装模组400包括：指纹识别芯片401、第一绝缘层402、压阻式传感器411、压阻式传感器412、压阻式传感器413和压阻式传感器414。
如图4所示，压阻式传感器411和压阻式传感器412贴合在指纹识别芯片401的下表面。压阻式传感器411和压阻式传感器412贴合在第一绝缘层402上表面。压阻式传感器413和压阻式传感器414贴合在第一绝缘层402下表面。
指纹识别芯片401的下表面可以包括焊盘(图中未示出)。压阻式传感器411、压阻式传感器412、压阻式传感器413和压阻式传感器414均与焊盘相连。
此外，图4所示的指纹识别芯片封装模组还可以包括第二绝缘层403。第二绝缘层403贴合在指纹识别芯片的下表面且暴露出指纹识别芯片下表面的焊盘。第二绝缘层403可以包括一个空间，压阻式传感器以及压阻式传感器之间的绝缘层位于该空间内。
图5是根据本申请实施例提供的另一指纹识别芯片封装模组的结构示意图。如图5所示，指纹识别芯片封装模组500包括：指纹识别芯片501、第一绝缘层502、压阻式传感器511、压阻式传感器512、压阻式传感器513和压阻式传感器514。
如图5所示，压阻式传感器511和压阻式传感器512贴合在指纹识别芯片501的上表面。压阻式传感器511和压阻式传感器512贴合在第一绝缘层502下表面。压阻式传感器513和压阻式传感器514贴合在第一绝缘层502上表面。
指纹识别芯片501的上表面可以包括焊盘。压阻式传感器511、压阻式传感器512、压阻式传感器513和压阻式传感器514均与焊盘相连。
进一步，指纹识别芯片501包括指纹识别区域。压阻式传感器511、压阻式传感器512、压阻式传感器513和压阻式传感器514贴合在该指纹识别区域以外的区域。
此外，图5所示的指纹识别芯片封装模组还可以包括第二绝缘层503。第二绝缘层503贴合在指纹识别芯片的下表面且暴露出指纹识别芯片下表面的焊盘。
图2至图5所示的指纹识别芯片封装模组直接将压阻式传感器贴合在指纹芯片的表面。这样，可以利用压阻式传感器获取用户作用在指纹识别芯片上的压力。终端设备可以利用获取到的压力进行相应的操作。此外，压阻式传感器直接贴合在指纹芯片的表面，因此压阻式传感器与指纹识别芯片之间不存在可能容易受到温度影响而发生形变的材料。这样，压阻式传感器不会因为温度变化而受到来自贴合在压阻式传感器上方材料的压力。这样，可以减少校准压阻式传感器的次数和噪声。此外，还可以提高所使用的压阻式传感器的灵敏度，这样可以识别更多等级的压力。
将图3至图5所示的指纹识别芯片与封装基板封装为指纹识别模组时，与压阻式传感器相连的焊盘与封装基板相连，从而可以连接到电源和处理模块以根据压阻式传感器获取到的信号确定出压力或者压力等级。更具体地， 若压阻式传感器贴合在指纹识别芯片上方，则与该压阻式传感器相连的焊盘可以通过连接通道与基板相连。该连接通道可以是利用硅通孔技术(Through Silicon Via，TSV)形成的连接通道，也可以是直接用于与基板相连的电连接线，本申请实施例对此并不限定。
图6是根据本申请实施例提供的一个指纹识别模组的结构示意图。如图6所示，指纹识别模组600包括指纹识别芯片601、两个压阻式传感器602和封装基板603。
指纹识别芯片601通过胶层604贴合在封装基板603的上表面。两个压阻式传感器602位于封装基板603内部。
封装基板603包括焊盘，压阻式传感器与焊盘相连。
封装基板603包括支撑层605。可选地，在一些实施例中，压阻式传感器可以位于支撑层下方。
图7是根据本申请实施例提供的另一指纹识别模组的结构示意图。如图7所示，指纹识别模组包括指纹识别芯片701、封装基板702、绝缘层703、压阻式传感器711、压阻式传感器712、压阻式传感器713和压阻式传感器714。
指纹识别芯片701通过胶层704贴合在封装基板702的上表面。
封装基板702包括支撑层705。可选地，在一些实施例中，压阻式传感器711和压阻式传感器712可以贴合在支撑层705的下表面，绝缘层703贴合于压阻式传感器711和压阻式传感器712下方，压阻式传感器713和压阻式传感器714贴合于绝缘层703下表面。
封装基板702包括焊盘，压阻式传感器与焊盘相连。
图6和图7所示的压阻式传感器位于基板内部。这样，可以利用压阻式传感器获取用户作用在指纹识别芯片上的压力。终端设备可以利用获取到的压力进行相应的操作。此外，压阻式传感器位于基板内部且基板受温度影响发生的形变较小，因此压阻式传感器因为温度变化而受到来自贴合在压阻式传感器上方材料的压力较小。这样，可以减少校准压阻式传感器的次数和噪声。此外，还可以提高所使用的压阻式传感器的灵敏度，这样可以识别更多等级的压力。
图8是根据本申请实施例提供的一个指纹识别模组的结构示意图。如图8所示，指纹识别模组800包括指纹识别芯片801、两个压阻式传感器802、 封装基板803和塑封材料804。
指纹识别芯片801通过胶层805贴合在封装基板803的上表面。塑封材料804覆盖封装基板803和指纹识别芯片801，且封装基板803的下表面未被塑封材料804覆盖。
两个压阻式传感器802贴合在塑封材料804的上表面。
图9是根据本申请实施例提供的另一指纹识别模组的结构示意图。如图9所示，指纹识别芯片封装模组900包括：指纹识别芯片901、绝缘层902、封装基板903、塑封材料904、压阻式传感器911、压阻式传感器912、压阻式传感器913和压阻式传感器914。
指纹识别芯片901通过胶层905贴合在封装基板903的上表面。塑封材料904覆盖封装基板903和指纹识别芯片901，且封装基板903的下表面未被塑封材料904覆盖。
压阻式传感器911和压阻式传感器912贴合在塑封材料904的上表面。压阻式传感器911和压阻式传感器912贴合在绝缘层902下表面。压阻式传感器913和压阻式传感器914贴合在绝缘层902上表面。
进一步，塑封材料包括指纹识别区域。图8和图9所示的压阻式传感器可以贴合在该指纹识别区域以外的区域。
图8和图9所示的压阻式传感器与基板相连。具体地，压阻式传感器与塑封材料上表面的焊盘相连，焊盘通过连接通道与基板相连。该连接通道可以是塑封材料内部的电连接通道。该连接通道也可以是封装材料外部的电连接通道。
图8和图9所示的指纹识别芯片封装模组直接将压阻式传感器贴合在塑封材料的上表面。这样，可以利用压阻式传感器获取用户作用在指纹识别芯片上的压力。终端设备可以利用获取到的压力进行相应的操作。此外，压阻式传感器直接贴合在塑封材料的上表面，因此压阻式传感器上方不存在一些可能容易受到温度影响而发生形变的材料。这样，压阻式传感器不会因为温度变化而受到来自贴合在压阻式传感器上方材料的压力。这样，可以减少校准压阻式传感器的次数和噪声。此外，还可以提高所使用的压阻式传感器的灵敏度，这样可以识别更多等级的压力。
图2至图9所示实施例中的压阻式传感器可以通过重布线层(Redistribution Layer，RDL)与该焊盘相连。当然，压阻式传感器也可以 通过其他方式与该焊盘相连。
例如，图10是一个指纹识别芯片封装模组的仰视示意图。如图10所示的指纹识别芯片封装模组是如图4所示的指纹识别封装模组的仰视示意图。如图10所示，压阻式传感器411与指纹识别芯片401的焊盘421相连，压阻式传感器412与指纹识别芯片401的焊盘422相连，压阻式传感器413与指纹识别芯片401的焊盘423相连，压阻式传感器414与指纹识别芯片401的焊盘424相连。
可以理解的，除了如图10所示的四个焊盘以外，指纹识别芯片401的下表面还可以包括其他焊盘，指纹识别芯片401可以通过这些焊盘与封装基板相连。此外，为了便于示出第一层压阻式传感器与焊盘的连接关系，图10并未示出两层压阻式传感器之间的绝缘层。
图2、图3、图5至图9所示的压阻式传感器与焊盘的连接关系与图10所示的连接关系类似，在此就不必赘述。
可以理解的是，图10所示的焊盘形状，焊盘与压阻式传感器的连接形式、压阻式传感器的形状只是示意图。
可以理解的是，图2至图9所示的指纹识别芯片封装模组只是为了帮助本领域技术人员更好地理解本申请所列举的实施例。例如，图2、图3、图6和图8的指纹识别芯片封装模组中的压阻式传感器的数量可也可以是1个或者多于2个。图4、图5、图7和图9所示的指纹识别芯片封装模组中每层压阻式传感器的数量也可以是1个或者多于2个。
图4、图5、图7和图9所示的四个压阻式传感器可以组成电桥。这样，可以使按压信号量加倍，提高能够检测的压力的范围，增加信噪比(Signal-Noise Ratio，SNR)。
图4、图5、图7和图9所示的四个压阻式传感器与绝缘层形成三层结构，即两层压阻传感器之间包括一层绝缘层。该层绝缘层可以利用受温度影响影响形变小的材料，例如可以是绿油等。
图11是根据本申请实施例提供的一种晶圆级指纹识别芯片封装方法的示意性流程图。
1101，在指纹识别芯片的第一表面排布N个压阻式传感器，其中该第一表面为该指纹识别芯片的上表面或者下表面，其中N为大于或等于1的正整数。
1102，通过连接线路将该N个压阻式传感器与该指纹芯片的焊盘相连。
可选的，在一些实施例中，该在指纹识别芯片的第一表面排布N个压阻式传感器，包括：在该指纹芯片的下表面排布第一层压阻式传感器；在该第一层压阻式传感器的下表面涂布绝缘层；在该绝缘层的下表面排布第二层压阻式传感器，其中该第一层压阻式传感器和该第二层压阻式传感器均包括至少一个压阻式传感器。
可选的，在一些实施例中，该在指纹识别芯片的第一表面排布N个压阻式传感器，包括：在该指纹芯片的上表面排布第一层压阻式传感器；在该第一层压阻式传感器的上表面涂布绝缘层；在该绝缘层的上表面排布第二层压阻式传感器，其中该第一层压阻式传感器和该第二层压阻式传感器均包括至少一个压阻式传感器。
进一步，该第一层压阻式传感器和该第二层压阻式传感器组成电桥。
利用如图11所示的方法封装的指纹识别芯片封装模组直接将压阻式传感器贴合在指纹芯片的表面。根据图11所示方法所制作的指纹识别芯片封装模组的具体结构的实施例和有益效果可以参照图2至图5所示的指纹识别芯片封装模组，在此就不必赘述。
图12是根据本申请实施例提供的一种封装指纹识别模组的方法的示意性流程图。
1201，将指纹识别芯片通过胶层贴合在封装基板的上表面。
1202，将N个压阻式传感器排布在该封装基板的内部，其中N为大于或等于1的正整数。
1203，通过连接线路将该N个压阻式传感器与该封装基板的焊盘相连。
可选的，在一些实施例中，将N个压阻式传感器排布在该封装基板的内部，包括：将该N个压阻式传感器排布在该封装基板的支撑层下方。
可选的，在一些实施例中，该将该N个压阻式传感器排布在该封装基板的支撑层下方，包括：在该封装基板的支撑层的下表面排布第一层压阻式传感器；在该第一层压阻式传感器的下表面涂布绝缘层；在该绝缘层的下表面排布第二层压阻式传感器，其中该第一层压阻式传感器和该第二层压阻式传感器均包括至少一个压阻式传感器。
利用如图12所示的方法封装的指纹识别模组可以将压阻式传感器置于封装基板内部。根据图12所示方法所制作的指纹识别模组的具体结构的实 施例和有益效果可以参照图6至图7所示的指纹识别芯片封装模组，在此就不必赘述。
图13是根据本申请实施例提供的一种封装指纹识别模组的方法的示意性流程图。
1301，将指纹识别芯片通过胶层贴合在封装基板的上表面。
1302，利用塑封材料覆盖该指纹识别芯片和该封装基板，其中该封装基板的下表面未被该塑封材料覆盖。
1303，将N个压阻式传感器排布在该塑封材料的上表面，其中该N个压阻式传感器通过连接通道与该封装基板相连，N为大于或等于1的正整数。
可选的，在一些实施例中，该将N个压阻式传感器排布在该塑封材料的上表面，包括：在该塑封材料的上表面排布第一层压阻式传感器；在该第一层压阻式传感器的上表面涂布绝缘层；在该绝缘层的上表面排布第二层压阻式传感器，其中该第一层压阻式传感器和该第二层压阻式传感器均包括至少一个压阻式传感器。
进一步，该第一层压阻式传感器和该第二层压阻式传感器组成电桥。
进一步，在利用塑封材料覆盖该指纹识别芯片和该封装基板时，可以在该塑封材料内形成电连接通道，该电连接通道的一端连接至该封装基板。该电连接通道的另一端暴露在该塑封材料的上表面或者靠近该塑封材料的上表面。若该电连接通道未暴露在该塑封材料的上表面，则在将该N个压阻式传感器排布在该塑封材料的上表面之前，可以通过打磨或激光雕刻等方式暴露出该电连接通道。
以上所述，仅为本申请的具体实施方式，但本申请的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本申请揭露的技术范围内，可轻易想到的变化或替换，都应涵盖在本申请的保护范围之内，因此本申请的保护范围应以权利要求的保护范围为准。

Claims (23)

  1. 一种指纹识别芯片封装模组，其特征在于，所述指纹识别芯片封装模组包括：指纹识别芯片和N个压阻式传感器，其中N为大于或等于1的正整数；
    所述指纹识别芯片的第一表面具有焊盘，所述第一表面为所述指纹识别芯片的上表面或下表面；
    所述N个压阻式传感器的部分或全部贴合在所述指纹识别芯片的第一表面；
    所述N个压阻式传感器中的每个压阻式传感器与所述焊盘相连。
  2. 如权利要求1所述的指纹识别芯片封装模组，其特征在于，所述N个压阻式传感器分为两层贴合在所述指纹识别芯片的第一表面，其中，所述两层中的第一层压阻式传感器和第二层压阻式传感器均包括至少一个压阻式传感器；
    所述指纹识别芯片封装模组还包括位于所述第一层压阻式传感器和所述第二层压阻式传感器之间的绝缘层。
  3. 如权利要求2所述的指纹识别芯片封装模组，其特征在于，所述第一层压阻式传感器和所述第二层压阻式传感器组成电桥。
  4. 如权利要求1至3中任一项所述的指纹识别芯片封装模组，其特征在于，若所述第一表面为所述指纹识别芯片的上表面，所述第一表面具有指纹识别区域，所述N个压阻式传感器的部分或全部贴合在所述指纹识别区域以外的区域。
  5. 一种指纹识别模组，其特征在于，所述指纹识别模组包括：指纹识别芯片、N个压阻式传感器、封装基板和塑封材料，其中N为大于或等于1的正整数，
    所述指纹识别芯片贴合在所述封装基板的上表面；
    所述塑封材料覆盖所述封装基板和所述指纹识别芯片，所述封装基板的下表面未被所述塑封材料覆盖；
    所述N个压阻式传感器位于所述指纹识别芯片的上方或者下方。
  6. 如权利要求5所述的指纹识别模组，其特征在于，所述N个压阻式传感器位于所述封装基板的内部；
    所述封装基板包括焊盘，所述N个压阻式传感器中的每个压阻式传感器 与所述焊盘相连。
  7. 如权利要求6所述的指纹识别模组，其特征在于，所述封装基板包括支撑层，所述N个压阻式传感器位于所述支撑层下方。
  8. 如权利要求7所述的指纹识别模组，其特征在于，所述N个压阻式传感器分为两层贴合在所述支撑层的下表面，其中，所述两层中的第一层压阻式传感器和第二层压阻式传感器均包括至少一个压阻式传感器；
    所述指纹识别模组还包括位于所述第一层压阻式传感器和所述第二层压阻式传感器之间的绝缘层。
  9. 如权利要求5所述的指纹识别模组，其特征在于，
    所述N个压阻式传感器中的每个压阻式传感器与所述封装基板相连；
    所述N个压阻式传感器中的部分或全部贴合在所述塑封材料的上表面。
  10. 如权利要求9所述的指纹识别模组，其特征在于，所述塑封材料的上表面具有指纹识别区域，所述N个压阻式传感器的部分或全部贴合在所述指纹识别区域以外的区域。
  11. 如权利要求9或10所述的指纹识别模组，其特征在于，所述N个压阻式传感器分为两层贴合在所述塑封材料的上表面，其中，所述两层中的第一层压阻式传感器和第二层压阻式传感器均包括至少一个压阻式传感器；
    所述指纹识别模组还包括位于所述第一层压阻式传感器和所述第二层压阻式传感器之间的绝缘层。
  12. 如权利要求8或11所述的指纹识别模组，其特征在于，所述第一层压阻式传感器和所述第二层压阻式传感器组成电桥。
  13. 一种晶圆级指纹识别芯片封装方法，其特征在于，所述方法包括：
    在指纹识别芯片的第一表面排布N个压阻式传感器，其中所述第一表面为所述指纹识别芯片的上表面或者下表面，N为大于或等于1的正整数；
    通过连接线路将所述N个压阻式传感器与所述指纹芯片的焊盘相连。
  14. 如权利要求13所述的方法，其特征在于，所述在指纹识别芯片的第一表面排布N个压阻式传感器，包括：
    在所述指纹芯片的下表面排布第一层压阻式传感器；
    在所述第一层压阻式传感器的下表面涂布绝缘层；
    在所述绝缘层的下表面排布第二层压阻式传感器，其中所述第一层压阻式传感器和所述第二层压阻式传感器均包括至少一个压阻式传感器。
  15. 如权利要求13所述的方法，其特征在于，所述在指纹识别芯片的第一表面排布N个压阻式传感器，包括：
    在所述指纹芯片的上表面排布第一层压阻式传感器；
    在所述第一层压阻式传感器的上表面涂布绝缘层；
    在所述绝缘层的上表面排布第二层压阻式传感器，其中所述第一层压阻式传感器和所述第二层压阻式传感器均包括至少一个压阻式传感器。
  16. 如权利要求14或15所述的方法，其特征在于，所述第一层压阻式传感器和所述第二层压阻式传感器组成电桥。
  17. 一种封装指纹识别模组的方法，其特征在于，所述方法包括：
    将指纹识别芯片通过胶层贴合在封装基板的上表面；
    利用塑封材料覆盖所述指纹识别芯片和所述封装基板，其中所述封装基板的下表面未被所述塑封材料覆盖；
    将N个压阻式传感器排布在所述指纹识别芯片的上方或者下方，N为大于或等于1的正整数。
  18. 如权利要求17所述的方法，其特征在于，所述将N个压阻式传感器排布在所述指纹识别芯片的上方或者下方，包括：
    将所述N个压阻式传感器排布在在所述封装基板的内部；
    通过连接线路将所述N个压阻式传感器与所述封装基板的焊盘相连。
  19. 如权利要求18所述的方法，其特征在于，所述将N个压阻式传感器排布在所述封装基板的内部，包括：将所述N个压阻式传感器排布在所述封装基板的支撑层下方。
  20. 如权利要求19所述的方法，其特征在于，所述将所述N个压阻式传感器排布在所述封装基板的支撑层下方，包括：
    在所述封装基板的支撑层的下表面排布第一层压阻式传感器；
    在所述第一层压阻式传感器的下表面涂布绝缘层；
    在所述绝缘层的下表面排布第二层压阻式传感器，其中所述第一层压阻式传感器和所述第二层压阻式传感器均包括至少一个压阻式传感器。
  21. 如权利要求17所述的方法，其特征在于，所述将N个压阻式传感器排布在所述指纹识别芯片的上方或者下方，包括：
    将所述N个压阻式传感器排布在所述塑封材料的上表面，其中所述N个压阻式传感器通过连接通道与所述封装基板相连。
  22. 如权利要求21所述的方法，其特征在于，所述将N个压阻式传感器排布在所述塑封材料的上表面，包括：
    在所述塑封材料的上表面排布第一层压阻式传感器；
    在所述第一层压阻式传感器的上表面涂布绝缘层；
    在所述绝缘层的上表面排布第二层压阻式传感器，其中所述第一层压阻式传感器和所述第二层压阻式传感器均包括至少一个压阻式传感器。
  23. 如权利要求20或22所述的方法，其特征在于，所述第一层压阻式传感器和所述第二层压阻式传感器组成电桥。
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