TW201904001A - 半導體封裝結構 - Google Patents

半導體封裝結構 Download PDF

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Publication number
TW201904001A
TW201904001A TW106138091A TW106138091A TW201904001A TW 201904001 A TW201904001 A TW 201904001A TW 106138091 A TW106138091 A TW 106138091A TW 106138091 A TW106138091 A TW 106138091A TW 201904001 A TW201904001 A TW 201904001A
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TW
Taiwan
Prior art keywords
layer
conductive
conductive layer
copper
semiconductor package
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TW106138091A
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English (en)
Inventor
張容華
蔡柏豪
林俊成
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台灣積體電路製造股份有限公司
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Publication of TW201904001A publication Critical patent/TW201904001A/zh

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Abstract

提供半導體封裝結構，半導體封裝結構包含晶片結構，半導體封裝結構包含第一導電結構位於晶片結構上方，第一導電結構電性連接至晶片結構，第一導電結構包含第一過渡層位於晶片結構上方以及第一導電層位於第一過渡層上，第一導電層大致由雙晶銅製成。

Description

半導體封裝結構
本發明實施例係有關於半導體技術，且特別是有關於半導體封裝結構。
半導體積體電路(integrated circuit，IC)工業已經歷了快速成長。在積體電路材料和設計上的技術進步產生了數代積體電路，每一代都比前一代具有更小且更複雜的電路。然而，這些進步增加了加工與製造積體電路的複雜性。
在積體電路的發展史中，功能密度(即每一晶片區互連的裝置數目)增加，同時幾何尺寸(即製造過程中所產生的最小的組件(或線路))縮小。此元件尺寸微縮化的製程一般來說具有增加生產效率與降低相關費用的益處。
然而，由於部件(feature)尺寸持續縮減，製造製程持續變的更加難以實施。因此，形成越來越小的尺寸的可靠的半導體裝置是個挑戰。
在一些實施例中，提供半導體封裝結構，半導體封裝結構包含晶片結構；以及第一導電結構，位於晶片結構上方，其中第一導電結構電性連接至晶片結構並包含 第一過渡層，位於晶片結構上方；及第一導電層，位於第一過渡層上，第一導電層大致由雙晶銅製成。
在一些其他實施例中，提供半導體封裝結構，半導體封裝結構包含晶片結構；模封層，圍繞晶片結構；導通孔結構，穿透模封層；以及重佈線結構，位於導通孔結構和模封層上方，其中重佈線結構連接至導通孔結構並包含第一過渡層，及第一導電層，位於第一過渡層上方，第一導電層大致由雙晶銅製成。
在一些其他實施例中，提供半導體封裝結構的形成方法，此方法包含提供晶片結構和圍繞晶片結構的模封層，實施脈衝電鍍製程於晶片結構和模封層上方，以形成過渡層於晶片結構和模封層上方，其中過渡層包含雙晶銅，且在過渡層中的第一雙晶銅體積百分比朝遠離晶片結構和模封層的方向增加；以及實施直流電鍍製程於過渡層上，以形成第一導電層於過渡層上方，其中第一導電層大致由雙晶銅製成，且過渡層和第一導電層共同形成第一導線。
110‧‧‧承載基板
120、240、A1、A2‧‧‧黏著層
130‧‧‧緩衝層
132、262、264、282、312、332‧‧‧開口
140、276、278、296、298、1130、1140‧‧‧導電層
150、273‧‧‧遮罩層
152‧‧‧通孔
160‧‧‧導電柱
170、410、420‧‧‧晶片
172‧‧‧前表面
174‧‧‧背面
180、230、260、280、310、330、432‧‧‧介電層
210、340、436、438‧‧‧導電墊
220‧‧‧互連結構
250、450‧‧‧模封層
270、290、320‧‧‧線路層
272、292、1110‧‧‧晶種層
273a‧‧‧溝槽
274、294、1120‧‧‧過渡層
276a、278a、296a、298a、1130a、1140a‧‧‧頂表面
279、299、442、444‧‧‧導線
350、460‧‧‧導電凸塊
360‧‧‧框架
400‧‧‧晶片封裝體
430‧‧‧基底
432a、432b‧‧‧表面
434、P、P1‧‧‧導通孔結構
500、600、700、800、900、1100‧‧‧半導體封裝結構
510‧‧‧底部填充層
1010、1020、1030‧‧‧步驟
A、B‧‧‧區域
C‧‧‧晶片結構
C1‧‧‧角落部分
I‧‧‧界面
R‧‧‧重佈線結構
T1、T2、T3、T4、T5、T6、T7、T8、T9、T10、T11、T12、T13、T14‧‧‧厚度
V‧‧‧方向
根據以下的詳細說明並配合所附圖式可以更加理解本發明實施例。應注意的是，根據本產業的標準慣例，圖示中的各種部件並未必按照比例繪製。事實上，可能任意的放大或縮小各種部件的尺寸，以做清楚的說明。
第1A-1P圖為依據一些實施例之形成半導體封裝結構的製程的各種階段的剖面示意圖。
第1I-1圖為依據一些實施例之第1I圖中的兩條導線、晶片結構的角落部分、介電層的一部分以及模封層的上視圖。
第1I-2圖為依據一些實施例之第1I圖的區域A的放大圖。
第1J-1圖為依據一些實施例之第1J圖的區域B的放大圖。
第1J-2圖為依據一些實施例之第1J圖中的導線、介電層的一部分以及晶片結構的上視圖。
第2圖為依據一些實施例之半導體封裝結構的剖面示意圖。
第3圖為依據一些實施例之半導體封裝結構的剖面示意圖。
第4圖為依據一些實施例之半導體封裝結構的剖面示意圖。
第5圖為依據一些實施例之半導體封裝結構的剖面示意圖。
第6圖為依據一些實施例之形成半導體封裝結構的流程圖。
第7圖為依據一些實施例之半導體封裝結構的剖面示意圖。
要瞭解的是以下的揭露內容提供許多不同的實施例或範例，以實施提供之主體的不同部件。以下敘述各個構件及其排列方式的特定範例，以求簡化揭露內容的 說明。當然，這些僅為範例並非用以限定本發明。例如，以下的揭露內容敘述了將一第一部件形成於一第二部件之上或上方，即表示其包含了所形成的上述第一部件與上述第二部件是直接接觸的實施例，亦包含了尚可將附加的部件形成於上述第一部件與上述第二部件之間，而使上述第一部件與上述第二部件可能未直接接觸的實施例。此外，揭露內容中不同範例可能使用重複的參考符號及/或用字。這些重複符號或用字係為了簡化與清晰的目的，並非用以限定各個實施例及/或所述外觀結構之間的關係。
再者，為了方便描述圖式中一元件或部件與另一(複數)元件或(複數)部件的關係，可使用空間相關用語，例如“在...之下”、“下方”、“下部”、“上方”、“上部”及類似的用語。除了圖式所繪示的方位之外，空間相關用語也涵蓋裝置在使用或操作中的不同方位。所述裝置也可被另外定位(例如，旋轉90度或者位於其他方位)，並對應地解讀所使用的空間相關用語的描述。應當理解的是，可提供額外的操作於本發明實施例的方法之前、本發明實施例的方法中和本發明實施例的方法之後，且在本發明實施例的方法的其他實施例中，可取代或消除所述的一些操作。
也可包含其他部件和製程，舉例來說，可包含測試結構來幫助三維(3D)封裝或三維積體電路(3DIC)裝置的驗證測試。舉例來說，測試結構可包含形成於重佈線層中或基底上的測試墊，以允許三維封裝或三維積體電路的測試、探針及/或探針卡和類似物的使用。可實施驗證測試 於中間結構和最終結構。此外，此處揭露的結構和方法可與包含良好晶粒的中間驗證(intermediate verification)的測試方法結合使用，以增加產率並降低成本。
第1A-1P圖為依據一些實施例之形成半導體封裝結構的製程的各種階段的剖面示意圖。第6圖為依據一些實施例之形成半導體封裝結構的流程圖。依據一些實施例，如第1A圖所示，提供承載基板110。依據一些實施例，配置承載基板110以在後續製程步驟期間提供機械性和結構性支撐。依據一些實施例，承載基板110包含玻璃、氧化矽、氧化鋁、金屬、前述之組合及/或類似材料。依據一些實施例，承載基板110包含金屬框架。
依據一些實施例，如第1A圖所示，黏著層120形成於承載基板110上方。依據一些實施例，黏著層120包含任何合適的黏著材料，例如紫外(ultraviolet)膠或光熱轉換(Light-to-Heat Conversion，LTHC)膠，其當暴露於紫外光或雷射時會失去其黏著性質。黏著層120透過使用壓合製程、旋塗製程、印刷製程或其他合適的製程形成。
依據一些實施例，如第1A圖所示，緩衝層130形成於黏著層120上方。依據一些實施例，配置緩衝層130以在後續製程期間提供接合的結構支撐以及幫助減少晶粒偏移。依據一些實施例，緩衝層130包含聚合物材料，例如聚苯並噁唑(polybenzoxazole，PBO)、聚醯亞胺或環氧樹脂。依據一些實施例，緩衝層130透過使用旋塗製程、化學氣相沉積製程、壓合製程或印刷製程形成。
依據一些實施例，如第1A圖所示，導電層140形成於緩衝層130上方。在一些實施例中，不形成緩衝層130，且導電層140形成於黏著層120上。導電層140包含銅、鈦、前述之組合或其他合適的導電材料。依據一些實施例，導電層140透過使用物理氣相沉積製程或化學氣相沉積製程形成。
依據一些實施例，如第1B圖所示，遮罩層150形成於導電層140上方。依據一些實施例，遮罩層150具有通孔152暴露導電層140的一部分。遮罩層150包含光阻材料或其他合適的材料。
依據一些實施例，如第1C圖所示，導電柱160形成於通孔152中。依據一些實施例，導電柱160也被稱為導電結構。導電柱160包含銅或其他合適的導電材料。
依據一些實施例，導電柱160的形成包含實施電鍍製程。在一些其他實施例中，不形成導電層140，且導電柱160的形成包含實施沉積製程和平坦化製程。
依據一些實施例，如第1D圖所示，移除遮罩層150。依據一些實施例，透過將遮罩層150浸泡於化學溶液中來移除遮罩層150。舉例來說，化學溶液包含乳酸乙酯(ethyl lactate)、苯甲醚(anisole)、乙酸異戊酯(methyl butyl acetate)、乙酸正戊酯(amyl acetate)及/或重氮基光活性化合物(diazo photoactive compound)。
依據一些實施例，如第1D圖所示，移除不被導電柱160覆蓋的導電層140。依據一些實施例，在移除製程 之後，導電柱160以及其下餘留的導電層140也被稱為導通孔結構P。依據一些實施例，此移除製程包含濕蝕刻製程或乾蝕刻製程。
依據一些實施例，如第1E圖所示，晶片結構C設置於緩衝層130上方(圖式僅顯示一個晶片結構)。為了簡潔起見，第1E圖僅顯示一個晶片結構C。依據一些實施例，每一晶片結構C包含晶片170。依據一些實施例，每一晶片結構C更包含介電層180、導電墊210、互連結構220和介電層230。
依據一些實施例，如第1E圖所示，晶片170設置於緩衝層130上方。依據一些實施例，晶片170也被稱為半導體基底、系統單晶片(system-on-Chip，SoC)、邏輯晶粒或記憶體晶粒。在一些實施例中，晶片170由至少一半導體材料製成，例如矽或其他合適的半導體材料。
依據一些實施例，晶片170具有前表面172和相對於前表面172的背面174。在一些實施例中，主動元件(例如電晶體、二極體或類似物)及/或被動元件(例如電阻、電容、電感或類似物)形成於前表面172或晶片170中並鄰近前表面172。
依據一些實施例，如第1E圖所示，在每一晶片結構C中，介電層180形成於晶片170上方。依據一些實施例，導電墊210形成於介電層180中。依據一些實施例，導電墊210電性連接至形成於晶片170中或晶片170上方的裝置(未顯示)。
依據一些實施例，如第1E圖所示，互連結構220形成於對應的導電墊210上方。依據一些實施例，互連結構220包含導電柱或導電凸塊。依據一些實施例，互連結構220也被稱為導電部件。依據一些實施例，如第1E圖所示，介電層230形成於介電層180上方並圍繞互連結構220。
依據一些實施例，如第1E圖所示，黏著層240位於緩衝層130與晶片170之間，以將晶片170接合至緩衝層130。依據一些實施例，黏著層240由絕緣材料製成，例如聚合物材料。在一些實施例中，黏著層240為晶粒附接膜。在一些實施例中，不形成緩衝層130，且有著黏著層240在背面174上的晶片170直接設置於黏著層120上方。
依據一些實施例，如第1F圖所示，模封層250形成於緩衝層130上方，以覆蓋導通孔結構P、晶片結構C和黏著層240。在一些實施例中，模封層250也被稱為模塑化合物層。依據一些實施例，模封層250包含聚合物材料。依據一些實施例，模封層250透過使用成型製程、點膠製程或印刷製程形成。
依據一些實施例，如第1G圖所示，移除模封層250的頂部。依據一些實施例，此移除製程包含化學機械研磨製程。依據一些實施例，在移除製程之後，模封層250圍繞暴露出頂表面的晶片結構C和導通孔結構P(第6圖的步驟1010)。
依據一些實施例，如第1G圖所示，介電層260形成於模封層250和晶片結構C上方。依據一些實施例，介 電層260直接接觸模封層250和晶片結構C。
依據一些實施例，介電層260具有開口262和264。依據一些實施例，開口262對應地暴露出互連結構220。依據一些實施例，開口264對應地暴露出導通孔結構P。依據一些實施例，介電層260包含氧化物(例如氧化矽)或聚合物材料。
依據一些實施例，如第1H圖所示，晶種層272順應性地形成於介電層260、互連結構220和導通孔結構P上方。依據一些實施例，晶種層272直接接觸介電層260、互連結構220和導通孔結構P。
依據一些實施例，晶種層272的形成包含實施物理氣相沉積製程，以沉積鈦層(未顯示)於介電層260、互連結構220和導電柱160上方，以及實施物理氣相沉積製程，以沉積銅層(未顯示)於鈦層上方。
依據一些實施例，如第1H圖所示，遮罩層273形成於晶種層272上方。依據一些實施例，遮罩層273具有溝槽273a。依據一些實施例，溝槽273a暴露出在互連結構220和導電柱160上方的晶種層272。依據一些實施例，溝槽273a更暴露出互連結構220與導電柱160之間的晶種層272。
依據一些實施例，配置遮罩層273以定義介電層260上方的線路層。依據一些實施例，遮罩層273包含聚合物材料。依據一些實施例，遮罩層273透過使用光微影製程形成。
依據一些實施例，如第1H圖所示，過渡層274 形成於透過溝槽273a暴露出的晶種層272上方。在一些實施例中，過渡層274直接接觸晶種層272。在一些實施例中，過渡層274順應性地覆蓋透過溝槽273a暴露出的晶種層272。
依據一些實施例，過渡層274包含雙晶(twinned)銅和非雙晶(non-twinned)銅。依據一些實施例，過渡層274包含雙晶銅晶粒和非雙晶銅晶粒。雙晶銅也被稱為奈米攣晶銅或奈米雙晶銅。
依據一些實施例，材料中雙晶的術語代表有著鏡面對稱關係的兩個晶體。依據一些實施例，非雙晶銅也被稱為非攣晶銅。依據一些實施例，雙晶銅包含(111)取向的雙晶銅。
在一些實施例中，在過渡層274中的雙晶銅體積百分比沿遠離晶片結構C、模封層250和導電柱160的方向V增加。在一些實施例中，在過渡層274中的雙晶銅體積百分比沿方向V持續地增加。依據一些實施例，過渡層274的形成包含實施脈衝電鍍(pulse electroplating)製程於晶種層272上，以形成過渡層274(第6圖的步驟1020)。
依據一些實施例，過渡層274的形成使用電鍍溶液。電鍍溶液包含硫酸銅、甲基磺酸鹽及/或氯離子。依據一些實施例，電鍍溶液更包含有機酸(例如甲基磺酸)、明膠或前述之混合物。
依據一些實施例，如第1H圖所示，導電層276直接形成於過渡層274上。依據一些實施例，導電層276大 致由雙晶銅製成。依據一些實施例，導電層276包含雙晶銅晶粒。在一些實施例中，“大致由...製成”的術語意味著在整個導電層276中的平均雙晶銅體積百分比大於90%。
在一些實施例中，在整個導電層276中的平均雙晶銅體積百分比的範圍從約95%至約99.9%。在導電層276中的平均雙晶銅體積百分比可透過使用電子背向散射繞射(electron back-scatter diffraction，EBSD)分析系統或其他合適的分析系統得出。依據一些實施例，雙晶銅包含(111)取向的雙晶銅。
依據一些實施例，導電層276的形成包含實施直流電鍍製程於過渡層274上，以形成導電層276於過渡層274上(第6圖的步驟1030)。依據一些實施例，導電層276的形成使用電鍍溶液。
電鍍溶液包含硫酸銅、甲基磺酸鹽及/或氯離子。依據一些實施例，電鍍溶液更包含有機酸(例如甲基磺酸)、明膠或前述之混合物。
在一些實施例中，過渡層274和導電層276的形成使用相同的電鍍溶液。在一些實施例中，在相同的鍍槽中實施過渡層274和導電層276的形成。
依據一些實施例，如第1H圖所示，導電層278形成於導電層276上方。依據一些實施例，導電層276直接接觸導電層278和過渡層274。
在一些實施例中，導電層278的頂表面278a的平均粗糙度小於導電層276的頂表面276a的平均粗糙度。導 電層278包含銅或其他合適的導電材料。導電層278也可被稱為亮銅層。導電層278的平滑的頂表面278a具有好的光反射性，因此，導電層278改善了後續光微影製程的光微影對位準確度。
依據一些實施例，導電層278透過使用直流電鍍製程形成。依據一些實施例，形成導電層278使用的電鍍溶液不同於形成導電層276和過渡層274使用的電鍍溶液。
依據一些實施例，如第1I圖所示，移除遮罩層273。依據一些實施例，如第1I圖所示，移除原先在遮罩層273下方的晶種層272。依據一些實施例，晶種層272透過使用蝕刻製程移除。
依據一些實施例，在此階段，過渡層274和導電層276共同形成導線279。依據一些實施例，導線279也被稱為導電結構或重佈線結構。依據一些實施例，在過渡層274中的雙晶銅體積百分比朝導電層278的方向增加。依據一些實施例，導線279更包含晶種層272和導電層278。依據一些實施例，這些導線279共同形成線路層270。依據一些實施例，導線279也被稱為導電結構。
依據一些實施例，導線279電性連接至導通孔結構P和晶片結構C的互連結構220。依據一些實施例，晶片結構C與模封層250之間具有界面I(或邊界)。依據一些實施例，導線279延伸跨過界面I。
晶片結構C和模封層250具有不同的熱膨脹係數，其可在後續的退火製程期間在界面I上的導線279中引 起熱應力。由於雙晶銅具有大於非雙晶銅的楊氏係數(Young’s modulus)和抗拉伸強度，因此雙晶銅可承受較大的應力。因此，導電層276中的雙晶銅可防止導線279破裂。因此，改善了導線279的產率。
第1I-1圖為依據一些實施例之第1I圖中的兩條導線279、晶片結構C的角落部分、介電層260的一部分以及模封層250的上視圖。依據一些實施例，如第1I-1圖和第1I-2圖所示，晶片結構C具有角落部分C1。依據一些實施例，導線279延伸跨過角落部分C1與模封層250之間的界面I。
角落部分C1與模封層250之間的界面I相較於晶片結構C和模封層250的其他部分可引起更多的熱應力。由於雙晶銅可承受較大的應力，因此無須避免在角落部分C1與模封層250之間的界面I上方形成導線279。因此，可增加佈局彈性和佈局面積。
第1I-2圖為依據一些實施例之第1I圖的區域A的放大圖。依據一些實施例，如第1I圖和第1I-2圖所示，導電層276的厚度T1大於過渡層274的厚度T2。依據一些實施例，導電層276的厚度T1大於導電層278的厚度T3。依據一些實施例，導電層276的厚度T1大於晶種層272的厚度T4。
依據一些實施例，厚度T1在約0.5μm至約10μm的範圍內。依據一些實施例，厚度T2在約0.05μm至約0.5μm的範圍內。依據一些實施例，厚度T3在約0.3μm至約0.5μm的範圍內。
在一些實施例中，在導電層276中雙晶銅的平 均體積百分比大於在過渡層274中雙晶銅的平均體積百分比。在一些實施例中，在導電層276中雙晶銅的平均體積百分比大於在導電層278中雙晶銅的平均體積百分比。
依據一些實施例，如第1J圖所示，第1G-1I圖的製程再次地實施於介電層260和線路層270上方，以形成介電層280和線路層290。依據一些實施例，介電層280形成於介電層260和線路層270上方。依據一些實施例，介電層280具有開口282。依據一些實施例，開口282暴露出線路層270的一部分。
依據一些實施例，線路層290形成於介電層280上方。依據一些實施例，線路層290延伸進入開口282中，以電性連接至線路層270。依據一些實施例，線路層290包含導線299。依據一些實施例，導線299也被稱為導電結構或重佈線結構。
第1J-2圖為依據一些實施例之第1J圖中的導線279和299、介電層280的一部分以及晶片結構C的上視圖。如第1J圖和第1J-2圖所示，導線279的平均線寬小於導線299的平均線寬。依據一些實施例，導線279的平均線寬小於約10μm。依據一些實施例，導線299直接接觸導線279。
依據一些實施例，每一導線299包含晶種層292、過渡層294和導電層296和298。依據一些實施例，晶種層292、過渡層294和導電層296和298依序地堆疊在介電層280和暴露的線路層270上。
依據一些實施例，晶種層292、過渡層294和導 電層296和298的結構、材料以及形成方法分別相同或類似於晶種層272、過渡層274和導電層276和278。
依據一些實施例，晶種層292順應性地形成於介電層280和暴露的線路層270上方。依據一些實施例，晶種層292直接接觸介電層280和暴露的線路層270。
依據一些實施例，過渡層294順應性地形成於晶種層292上方。依據一些實施例，過渡層294包含雙晶銅。依據一些實施例，雙晶銅包含(111)取向的雙晶銅。
在一些實施例中，在過渡層294中的雙晶銅體積百分比朝導電層296的方向增加。在一些實施例中，在過渡層294中的雙晶銅體積百分比朝導電層296的方向持續地增加。依據一些實施例，過渡層294的形成包含實施脈衝電鍍製程於晶種層292上，以形成過渡層294。
依據一些實施例，導電層296直接形成於過渡層294上。依據一些實施例，導電層296大致由雙晶銅製成。在一些實施例中，“大致由...製成”的術語意味著在整個導電層296中的平均雙晶銅體積百分比大於90%。
在一些實施例中，在整個導電層296中的平均雙晶銅體積百分比的範圍從約95%至約99.9%。依據一些實施例，雙晶銅包含(111)取向的雙晶銅。
依據一些實施例，導電層296的形成包含實施直流電鍍製程於過渡層294上，以形成導電層296於過渡層294上。
在一些實施例中，過渡層294和導電層296的形 成使用相同的電鍍溶液。在一些實施例中，在相同的鍍槽中實施過渡層294和導電層296的形成。
依據一些實施例，導電層298形成於導電層296上方。依據一些實施例，導電層296直接接觸導電層298和過渡層294。
在一些實施例中，導電層298的頂表面298a的平均粗糙度小於導電層296的頂表面296a的平均粗糙度。導電層298包含銅或其他合適的導電材料。導電層298也可被稱為亮銅層。
第1J-1圖為依據一些實施例之第1J圖的區域B的放大圖。依據一些實施例，如第1J圖和第1J-1圖所示，導電層296的厚度T5大於過渡層294的厚度T6。依據一些實施例，導電層296的厚度T5大於導電層298的厚度T7。依據一些實施例，導電層296的厚度T5大於晶種層292的厚度T8。
依據一些實施例，厚度T5在約0.5μm至約10μm的範圍內。依據一些實施例，厚度T6在約0.05μm至約0.5μm的範圍內。依據一些實施例，厚度T3在約0.3μm至約0.5μm的範圍內。
在一些實施例中，在導電層296中雙晶銅的平均體積百分比大於在過渡層294中雙晶銅的平均體積百分比。在一些實施例中，在導電層296中雙晶銅的平均體積百分比大於在導電層298中雙晶銅的平均體積百分比。
依據一些實施例，如第1K圖所示，介電層310形成於介電層280和線路層290上方。依據一些實施例，介 電層310具有開口312暴露出線路層290的一部分。
依據一些實施例，如第1K圖所示，線路層320形成於介電層310上方。依據一些實施例，線路層320也被稱為導電結構或重佈線結構。依據一些實施例，線路層320延伸進入開口312中，以電性連接並直接接觸線路層290。
線路層320的形成方法包含形成晶種層(未顯示)於介電層310和暴露的線路層290上方，以及實施電鍍製程於晶種層上方，以形成導電層(未顯示)。依據一些實施例，線路層320包含導電材料，例如銅或銅合金(例如銅銀合金、銅金合金或銅錫合金)。在一些其他實施例中，線路層320的形成方法相同於線路層270或290的形成方法。
依據一些實施例，如第1K圖所示，介電層330形成於介電層310和線路層320上方。依據一些實施例，介電層330具有開口332暴露出線路層320的一部分。
依據一些實施例，如第1K圖所示，導電墊340形成於介電層330和暴露的線路層320上方。依據一些實施例，導電墊340也被稱為導電結構。導電墊340的形成方法包含形成晶種層(未顯示)於介電層330和暴露的線路層320上方，以及實施電鍍製程於晶種層上方，以形成導電層(未顯示)。
依據一些實施例，導電墊340包含金屬或合金。依據一些實施例，導電墊340包含銅或銅合金，例如銅銀合金、銅金合金或銅錫合金。
在一些其他實施例中，導電墊340的形成方法 相同於線路層270或290的形成方法。依據一些實施例，線路層270、290和320、介電層280、310和330以及導電墊340共同形成重佈線結構R。
依據一些實施例，如第1K圖所示，導電凸塊350形成於導電墊340上方。導電凸塊350包含錫(Sn)或其他合適的材料。依據一些實施例，導電凸塊350的形成包含形成有著助焊劑的焊球於導電墊340上方並將焊球回焊(reflow)。
依據一些實施例，如第1L圖所示，將晶片結構C翻轉並設置於框架360(或載板)上方。依據一些實施例，如第1L圖所示，移除承載基板110和黏著層120。
依據一些實施例，如第1M圖所示，移除緩衝層130的一部分，以形成開口132於緩衝層130中。依據一些實施例，開口132暴露出導通孔結構P。依據一些實施例，此移除製程可為光微影製程、雷射鑽孔製程或蝕刻製程。在一些其他實施例中，完全地移除緩衝層130，以暴露出導通孔結構P。在一些實施例中(未顯示)，不形成緩衝層130於承載基板110上方，且在移除承載基板110和黏著層120之後，直接暴露出導通孔結構P。
依據一些實施例，如第1N圖所示，晶片封裝體400設置於晶片結構C和模封層250上方，以與導通孔結構P接合。依據一些實施例，每一晶片封裝體400包含晶片410和420、基底430、導線442和444、模封層450以及導電凸塊460。
依據一些實施例，晶片410和420設置於基底430上方。依據一些實施例，晶片410透過位於晶片410與基底430之間的黏著層A1接合至基底430。依據一些實施例，晶片420透過位於晶片420與晶片410之間的黏著層A2接合至晶片410。
依據一些實施例，基底430包含介電層432、導通孔結構434以及導電墊436和438。介電層432可具有彼此堆疊的介電膜(未顯示)。依據一些實施例，介電層432具有相對的表面432a和432b。依據一些實施例，導通孔結構434穿過介電層432。
依據一些實施例，導電墊436位於表面432a上方。依據一些實施例，導電墊436位於對應的導通孔結構434上方，以電性連接至對應的導通孔結構434。
依據一些實施例，導電墊438位於表面432b上方。依據一些實施例，導電墊438位於對應的導通孔結構434下方，以電性連接至對應的導通孔結構434。
依據一些實施例，導線442物理及電性連接晶片410至導電墊436。依據一些實施例，導線444物理及電性連接晶片420至導電墊436。依據一些實施例，模封層450成型於晶片410和420、導線442和444以及基底430上方。
依據一些實施例，配置模封層450以保護晶片410和420以及導線442和444在後續製程期間免受損壞和汙染。依據一些實施例，模封層450包含聚合物材料。
第1N圖所示的晶片封裝體400為一範例。晶片 封裝體400不限於第1N圖所示的晶片封裝體400的類型。也就是說，晶片封裝體400可為任何合適類型的晶片封裝體。舉例來說，晶片封裝體400包含層疊封裝(package-on-package，PoP)類型半導體封裝體、多晶片堆疊封裝體、包含晶片堆疊於基底上的晶片封裝體、僅包含一晶片的晶片封裝體或其他合適類型的晶片封裝體。
依據一些實施例，導電凸塊460連接導電墊438至導通孔結構P。依據一些實施例，導電凸塊460穿透緩衝層130。依據一些實施例，導電凸塊460在基底430與模封層250之間。
依據一些實施例，如第1N圖所示，底部填充(underfill)層510填充於基底430與緩衝層130之間。依據一些實施例，底部填充層510直接接觸緩衝層130和基底430。依據一些實施例，底部填充層510圍繞導電凸塊460。依據一些實施例，底部填充層510包含聚合物材料。
依據一些實施例，如第1O圖所示，實施機械單切(singulation)製程於底部填充層510、緩衝層130、模封層250和介電層310上方。依據一些實施例，機械單切製程切割通過底部填充層510、緩衝層130、模封層250和介電層310，以形成獨立的半導體封裝結構500。依據一些實施例，如第1P圖所示，移除框架360(或載板)。
依據一些實施例，每一半導體封裝結構500包含晶片封裝體400、晶片結構C、模封層250、重佈線結構R、導電凸塊350和導通孔結構P。
第2圖為依據一些實施例之半導體封裝結構的剖面示意圖。依據一些實施例，如第2圖所示，半導體封裝結構600相似於第1P圖的半導體封裝結構500，除了半導體封裝結構600不具有介電層260。因此，依據一些實施例，線路層270直接接觸模封層250、晶片結構C和導通孔結構P。
第3圖為依據一些實施例之半導體封裝結構的剖面示意圖。依據一些實施例，如第3圖所示，半導體封裝結構700相似於第1P圖的半導體封裝結構500，除了半導體封裝結構700的線路層270、290和320分別完全地填滿整個開口262、264、282和312。
依據一些實施例，在開口262中以及開口262下方的導電層276較在開口262之外的導電層276厚。依據一些實施例，在開口282中以及開口282下方的導電層296較在開口282之外的導電層296厚。
也就是說，在開口262中以及開口262下方的導電層276的厚度T9大於在開口262之外的導電層276的厚度T10。在開口282中以及開口282下方的導電層296的厚度T11大於在開口282之外的導電層296的厚度T12。
第4圖為依據一些實施例之半導體封裝結構的剖面示意圖。依據一些實施例，如第4圖所示，半導體封裝結構800相似於第3圖的半導體封裝結構700，除了半導體封裝結構800不具有介電層260。因此，依據一些實施例，線路層270直接接觸模封層250、晶片結構C和導通孔結構P。
第5圖為依據一些實施例之半導體封裝結構的 剖面示意圖。依據一些實施例，如第5圖所示，半導體封裝結構900相似於第1P圖的半導體封裝結構500，除了半導體封裝結構900的線路層290的形成方法相同於第1K圖的線路層320的形成方法。線路層290由導電材料製成，例如銅或銅合金(例如銅銀合金、銅金合金或銅錫合金)。
在一些實施例中，雙晶銅不僅能夠用於導線中，也可用於其他導電結構(例如導通孔結構)中。第7圖為依據一些實施例之半導體封裝結構的剖面示意圖。依據一些實施例，如第7圖所示，半導體封裝結構1100相似於第1P圖的半導體封裝結構500，除了半導體封裝結構1100包含導通孔結構P1且不包含第1P圖的半導體封裝結構500的導通孔結構P。
依據一些實施例，每一導通孔結構P1包含晶種層1110、過渡層1120、導電層1130和導電層1140。依據一些實施例，依序地形成晶種層1110、過渡層1120、導電層1130和導電層1140。
依據一些實施例，晶種層1110、過渡層1120、導電層1130和導電層1140的形成方法和材料對應地相同或類似於第1P圖的半導體封裝結構500的晶種層272、過渡層274、導電層276和導電層278。
依據一些實施例，晶種層1110包含鈦層(未顯示)和銅層(未顯示)。在一些實施例中，晶種層1110直接接觸導電凸塊460。依據一些實施例，過渡層1120直接接觸晶種層1110和導電層1130。依據一些實施例，過渡層1120包含雙 晶銅和非雙晶銅。依據一些實施例，過渡層1120包含雙晶銅晶粒和非雙晶銅晶粒。
在一些實施例中，在過渡層1120中的雙晶銅體積百分比朝導電層1130的方向增加。在一些實施例中，在過渡層1120中的雙晶銅體積百分比朝導電層1130的方向持續地增加。依據一些實施例，過渡層1120的形成包含實施脈衝電鍍製程於晶種層1110上，以形成過渡層1120。
依據一些實施例，導電層1130直接形成於過渡層1120上。依據一些實施例，導電層1130大致由雙晶銅製成。依據一些實施例，導電層1130包含雙晶銅晶粒。
在一些實施例中，在整個導電層1130中的平均雙晶銅體積百分比的範圍從約95%至約99.9%。在導電層1130中的平均雙晶銅體積百分比可透過使用電子背向散射繞射(EBSD)分析系統或其他合適的分析系統得出。依據一些實施例，雙晶銅包含(111)取向的雙晶銅。在一些實施例中，導電層1130的厚度T13大於過渡層1120的厚度T14。
依據一些實施例，導電層1130的形成包含實施直流電鍍製程於過渡層1120上，以形成導電層1130於過渡層1120上。依據一些實施例，導電層1130的形成使用電鍍溶液。在這些實施例中，電鍍溶液包含硫酸銅、甲基磺酸鹽及/或氯離子。依據一些實施例，電鍍溶液可更包含有機酸(例如甲基磺酸)、明膠或前述之混合物。
在一些實施例中，過渡層1120和導電層1130的形成使用相同的電鍍溶液。在一些實施例中，在相同的鍍 槽中實施過渡層1120和導電層1130的形成。
依據一些實施例，如第7圖所示，導電層1140形成於導電層1130上方。依據一些實施例，導電層1130直接接觸導電層1140和過渡層1120。
在一些實施例中，導電層1140的頂表面1140a的平均粗糙度小於導電層1130的頂表面1130a的平均粗糙度。導電層1140包含銅或其他合適的導電材料。導電層1140也可被稱為亮銅層。導電層1140的平滑的頂表面1140a具有好的光反射性，因此，導電層1140改善了實施在導電層1140上之光微影製程的光微影對位準確度。
依據一些實施例，導電層1140透過使用直流電鍍製程形成。依據一些實施例，形成導電層1140使用的電鍍溶液不同於形成導電層1130和過渡層1120使用的電鍍溶液。
依據一些實施例，提供半導體封裝結構及其形成方法。這些(用於形成半導體封裝結構的)方法形成主要包含雙晶銅的導線。由於雙晶銅具有大於非雙晶銅的楊氏係數和抗拉伸強度，因此雙晶銅可承受較大的應力。因此，導線中的雙晶銅可防止導線破裂。因此，改善了導線的產率。
依據一些實施例，提供半導體封裝結構，半導體封裝結構包含晶片結構。半導體封裝結構包含第一導電結構位於晶片結構上方，第一導電結構電性連接至晶片結構。第一導電結構包含第一過渡層位於晶片結構上方以及 第一導電層位於第一過渡層上，第一導電層大致由雙晶銅製成。
在一些其他實施例中，其中在第一導電層中的雙晶銅包含(111)取向的雙晶銅。
在一些其他實施例中，上述半導體封裝結構更包含第一介電層位於晶片結構上方，其中第一導電結構位於第一介電層上方並延伸穿透第一介電層，以電性連接至晶片結構，且第一介電層直接接觸晶片結構和第一導電結構。
在一些其他實施例中，其中第一導電結構更包含第一晶種層位於晶片結構與第一過渡層之間，其中第一晶種層直接接觸晶片結構和第一過渡層。
在一些其他實施例中，上述半導體封裝結構更包含第二導電結構在第一導電結構上方並電性連接至第一導電結構，其中第二導電結構包含第二過渡層位於第一導電結構上方，以及第二導電層位於第二過渡層上，第二導電層大致由雙晶銅製成。
在一些其他實施例中，其中第一導電結構和第二導電結構被配置為導線，且第一導電結構的第一平均線寬小於第二導電結構的第二平均線寬，且第二導電結構直接接觸第一導電結構。
在一些其他實施例中，其中第一導電結構更包含第二導電層位於第一導電層上方，其中第二導電層的第一頂表面的第一平均粗糙度小於第一導電層的第二頂表面 的第二平均粗糙度，且第一導電層的厚度大於第二導電層的厚度。
在一些其他實施例中，其中第一導電層直接接觸第二導電層和第一過渡層。
在一些其他實施例中，其中第一過渡層包含雙晶銅，且在第一過渡層中的雙晶銅體積百分比朝第一導電層的方向增加。
在一些其他實施例中，其中第一導電層的厚度大於第一過渡層的厚度。
依據一些實施例，提供半導體封裝結構，半導體封裝結構包含晶片結構。半導體封裝結構包含模封層圍繞晶片結構。半導體封裝結構包含導通孔結構穿透模封層。半導體封裝結構包含重佈線結構位於導通孔結構和模封層上方，重佈線結構電性連接至導通孔結構，重佈線結構包含第一過渡層及第一導電層位於第一過渡層上方，第一導電層大致由雙晶銅製成。
在一些其他實施例中，其中導通孔結構包含第二過渡層以及第二導電層位於第二過渡層上方，第二導電層大致由雙晶銅製成。
在一些其他實施例中，其中重佈線結構更包含第二導電層位於第一導電層上方，其中在第一導電層中的第一平均雙晶銅體積百分比大於在第二導電層中的第二平均雙晶銅體積百分比。
在一些其他實施例中，其中第一導電層直接接 觸第二導電層和第一過渡層。
在一些其他實施例中，上述半導體封裝結構更包含介電層直接接觸晶片結構和模封層，其中重佈線結構位於介電層上方並延伸穿透介電層，以電性連接至導通孔結構。
依據一些實施例，提供半導體封裝結構的形成方法，此方法包含提供晶片結構和圍繞晶片結構的模封層。此方法包含實施脈衝電鍍製程於晶片結構和模封層上方，以形成過渡層於晶片結構和模封層上方，過渡層包含雙晶銅。在過渡層中的第一雙晶銅體積百分比朝遠離晶片結構和模封層的方向增加。此方法包含實施直流電鍍製程於過渡層上，以形成第一導電層於過渡層上方，第一導電層大致由雙晶銅製成，過渡層和第一導電層共同形成第一導線。
在一些其他實施例中，其中晶片結構包含導電部件，且此方法更包含在形成過渡層之前，形成介電層於晶片結構和模封層上方，其中介電層具有開口暴露出晶片結構的導電部件，形成晶種層於介電層和導電部件上方，形成遮罩層於晶種層上方，其中遮罩層具有溝槽暴露出在導電部件上方之晶種層的一部分，且過渡層形成於晶種層的此部分上方，以及在形成第一導電層之後，移除遮罩層和遮罩層下方的晶種層。
在一些其他實施例中，其中過渡層的形成和第一導電層的形成使用相同的電鍍溶液且在相同的鍍槽中實 施。
在一些其他實施例中，上述方法更包含在形成第一導電層之後，形成第二導電層於第一導電層上方，其中第二導電層的第一頂表面的第一平均粗糙度小於第一導電層的第二頂表面的第二平均粗糙度。
在一些其他實施例中，其中過渡層的形成和第一導電層的形成使用第一電鍍溶液，第二導電層的形成使用第二電鍍溶液，且第一電鍍溶液不同於第二電鍍溶液。
前述內文概述了許多實施例的特徵，使本技術領域中具有通常知識者可以從各個方面更佳地了解本發明實施例。本技術領域中具有通常知識者應可理解，且可輕易地以本發明實施例為基礎來設計或修飾其他製程及結構，並以此達到相同的目的及/或達到與在此介紹的實施例等相同之優點。本技術領域中具有通常知識者也應了解這些相等的結構並未背離本發明的發明精神與範圍。在不背離本發明的發明精神與範圍之前提下，可對本發明進行各種改變、置換或修改。

Claims (1)

  1. 一種半導體封裝結構，包括：一晶片結構；以及一第一導電結構，位於該晶片結構上方，其中該第一導電結構電性連接至該晶片結構並包括：一第一過渡層，位於該晶片結構上方；及一第一導電層，位於該第一過渡層上，該第一導電層大致由雙晶銅製成。
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