TW201903483A - Display device - Google Patents

Abstract

A display device includes a data driver, a multiplexer, a gate driver, a plurality of pixel units, and a common capacitor. The data driver is used to output multiple input display data signals. The multiplexer is configured to receive the input display data signals and output a plurality of display data signals according to the input display data signals. The gate driver is used to receive a DC voltage and output multiple gate driver signals. The pixel unit is used to receive the corresponding display data signal, the gate drive signal and a first common voltage. A first terminal of the common capacitor receives the first common voltage, and a second terminal of the common capacitance receives another voltage, which is a DC voltage or a second common voltage.

Description

Display device

The present invention relates to a display device, and more particularly to a display device having a stable common voltage.

A conventional display device, such as a liquid crystal display device, includes a display panel with multiple columns of pixels. When the liquid crystal display device wants to display, the pixels are charged column by column with the display data, so that the liquid crystal display device can Display according to the display data. However, in recent years, due to the improvement of the resolution of liquid crystal display devices, in the time of displaying one frame, the liquid crystal display device needs to drive more columns of pixels. In order to effectively reduce the number of signal lines and the area occupied, some display devices It will be used with the multiplexer to transmit the display data. When the multiplexer is in the off state, the pixels will appear in a floating state after receiving the display signal, which makes the stability of the common voltage worse and is more susceptible to interference from external signals.

In order to solve the above-mentioned shortcomings, the present invention provides an embodiment of a display device. The display device includes a data driver, a multiplexer, a gate driver, a plurality of pixel units, and a common capacitor. The data driver is used to output multiple input display data signals. The multiplexer is electrically coupled to the data driver. The multiplexer is used to receive the above input display data signals and output multiple display data signals according to the input display signals. The gate driver is used to receive DC and AC voltages and output multiple gate driving signals. Each pixel unit is electrically coupled to a gate driver and a multiplexer, and each pixel unit is configured to receive a corresponding display data signal, a gate driving signal, and a first common voltage. The common capacitor has a first terminal and a second terminal, a first terminal of the common capacitor receives a first common voltage, and a second terminal of the common capacitor receives a DC voltage.

The present invention further provides a common capacitor embodiment. The common capacitor includes a gate dielectric layer, an expansion electrode, a first dielectric layer, a common electrode, and a common voltage conductive layer. The gate dielectric layer has a first surface and a second surface opposite to the first surface. The expansion electrode is disposed on one side of the second surface of the gate dielectric layer, and the expansion electrode is used to receive the DC voltage. The first dielectric layer is disposed on one side of the gate dielectric layer. The first dielectric layer has a first surface and a second surface opposite to the first surface. The second surface of the first dielectric layer is more than the first dielectric layer. The first surface of the electrical layer is adjacent to the first surface of the gate dielectric layer. The common electrode is disposed on the second surface of the first dielectric layer to receive the first common voltage. The common voltage conductive layer is disposed on one side of the first surface of the first dielectric layer, and the common voltage conductive layer extends along a first direction. The vertical projections of the expansion electrode, the common electrode, and the common voltage conductive layer on a substrate overlap each other.

The present invention provides another embodiment of a display device. The display device includes a data driver, a multiplexer, a gate driver, a plurality of pixel units, and a common capacitor. The data driver is used to output multiple input display data signals. The multiplexer is electrically coupled to the data driver. The multiplexer is used to receive the multiple input display data signals and output multiple display data signals. The gate driver is used to output multiple gate-level driving signals. Each pixel unit is electrically coupled to a gate driver and a multiplexer, and each pixel unit is configured to receive a corresponding display data signal, a gate driving signal, and a first common voltage. The common capacitor has a first terminal and a second terminal. The first terminal of the common capacitor receives the first common voltage and the second terminal of the common capacitor receives the second common voltage. The first common voltage and the second common voltage have the same voltage. value.

In a preferred embodiment, the foregoing display device embodiment further includes a gate dielectric layer and a first dielectric layer. The gate dielectric layer has a first surface and a second surface opposite to the first surface. A dielectric layer is disposed on one side of the gate dielectric layer. The first dielectric layer has a first surface and a second surface opposite to the first surface. The second surface of the first dielectric layer is greater than the first dielectric layer. The first surface of the electrical layer is adjacent to the first surface of the gate dielectric layer. The present invention further provides a common capacitor embodiment. The common capacitor includes a first common voltage conductive layer, a second dielectric layer, and a second common voltage conductive layer. The first common voltage conductive layer is disposed on one side of the first surface of the first dielectric layer. The first common voltage conductive layer extends along the first direction. The first common voltage layer has the first common voltage described above. The second dielectric layer is disposed on one side of the first common voltage layer, the second dielectric layer has a first surface and a second surface opposite to the first surface, and the second surface of the second dielectric layer is greater than the second surface The first surface of the dielectric layer is adjacent to one side of the first common voltage layer. The second common voltage conductive layer is disposed on one side of the first surface of the second dielectric layer, the second common voltage conductive layer extends along the first direction, and the second common voltage conductive layer has a second common voltage. The vertical projections of the first common voltage conductive layer and the second common voltage conductive layer on a substrate overlap each other.

In a preferred embodiment, the display device embodiment further includes a power generation unit, a first operational amplifier, and a second operational amplifier. The power generating unit is configured to output a first voltage. The first operational amplifier is configured to receive the first voltage and output the first common voltage. The second operational amplifier is configured to receive the first voltage and output the second common voltage.

In summary, since the display device of the present invention has a common capacitance, the common voltage can be stabilized when the multiplexer is turned off, which effectively reduces the occurrence of display errors. In addition, the common capacitor of the present invention can be implemented with minimal changes under the existing circuit architecture, and it has more obvious commercial value.

In order to make the above and other objects, features, and advantages of the present invention more comprehensible, a detailed description is given below with reference to preferred embodiments and the accompanying drawings.

Please refer to FIG. 1. FIG. 1 is an embodiment of a display device 100 according to the present invention. The display device 100 includes a data driver 10, a multiplexer 20, a gate driver 30, and a plurality of pixel units 40. Arranged on the display panel 50. The display device 100 is, for example, a low-temperature polycrystalline silicon liquid crystal display device. In addition to the plurality of pixel units 40, the multiplexer 20, the gate driver 30, and the common capacitor C _COM may be disposed on the display panel 50, but not limited thereto. . 10 and the data driver 20 is electrically coupled to the multiplexer, the data output driver 10 is configured to display a plurality of input data signals S _I to the multiplexer 20. The multiplexer 20 is electrically coupled to each pixel unit 40 through a data line DL. The multiplexer 20 is configured to output a plurality of display data signals S _O according to the input display data signal S _{I. The} multiplexer 20 will display the display data. The signal S _{O is} transmitted to the corresponding data line DL. The gate driver 30 is electrically coupled to each pixel unit 40 through a gate line G _L. In this embodiment, the display device 100 includes a gate driver 30 a and a gate driver 30 b. The gate driver 30 includes a plurality of shift registers SR. For example, the gate driver 30a includes a plurality of shift registers SR ₁ , SR _3, ... SR _N , and the gate driver ₃₀ b includes a plurality of shift registers SR _2. , SR ₄ … SR _M , N and M are positive integers greater than zero, but not limited thereto. The shift register SR of the gate driver 30 is used to receive a DC voltage V _DC and a clock signal CLK to output a plurality of gate-level driving signals G, as shown in G ₁ , G ₂ , G ₃ , and G ₄ in FIG. ₁ . ... G _N , G _M , where the DC voltage V _{DC is,} for example, a logic low voltage or a logic high voltage, but is not limited thereto. _L receives a corresponding gate line G 40 by each pixel unit electrically coupled to the data line DL corresponding to the received display data signals S _O and electrically coupled by a gate drive signal G, in this embodiment Each pixel unit 40 receives a first common voltage V _COM1 . Therefore, each pixel unit 40 can display corresponding display data according to the first common voltage V _COM1 and the voltage value corresponding to the display data signal S _O. The display panel 50 may define a display area 60 and a peripheral area 70. The pixel unit 40 may be disposed in the display area 60. The multiplexer 20, the gate driver 30, and the common capacitor C _COM may be disposed in the peripheral area 70, but not This is the limit. The common capacitor C _{COM of} this embodiment will be further described below with the illustration.

Please refer to FIG. 2A, which is a schematic diagram of a cross-sectional embodiment of the cross-sectional line AA of FIG. 1. In this embodiment, the display device 100 includes the substrate 110, the gate dielectric layer 120, the first dielectric layer 130, and the common voltage conductive layer 140 as an example for description, but is not limited thereto. The gate dielectric layer 120 is disposed on one side of the substrate 110. The gate dielectric layer 120 has a first surface 121 and a second surface 122 opposite to the first surface 121. The substrate 110 is provided with an expansion electrode layer 123, the gate dielectric layer 120 is disposed on the expansion electrode 123, the expansion electrode 123 is disposed on one side of the second surface 122 of the gate dielectric layer 120, and the expansion electrode 123 is configured to receive the foregoing The DC voltage V _DC . The first dielectric layer 130 is disposed on one side of the gate dielectric layer 120. The first dielectric layer 130 has a first surface 131 and a second surface 132 opposite to the first surface 131. The two surfaces 132 are closer to the first surface 121 of the gate dielectric layer 120 than the first surface 131 of the first dielectric layer 130. The first dielectric layer 130 is disposed on the common electrode 133 and the aforementioned shift register SR. The common electrode 133 is disposed on the second surface 132 of the first dielectric layer 130. The common electrode 133 is connected to the common voltage conductive layer 140 and The above-mentioned first common voltage V _{COM1 is} received through the common voltage conductive layer 140. The shift register SR further includes a clock signal electrode 134, a DC voltage electrode 135, and a logic circuit block 136 disposed on the second surface 132 of the first dielectric layer 130. The clock signal electrode 134 is used to receive the above-mentioned time. The pulse signal is CLK. The DC voltage electrode 135 is used to receive the DC voltage V _DC . The DC voltage electrode 135 is connected to the expansion electrode 123 to transmit the DC voltage V _DC to the expansion electrode 123. The common voltage conductive layer 140 is disposed on one side of the first surface 131 of the first dielectric layer 130, and the common voltage conductive layer 140 extends along a first direction. The common capacitor C _{COM is} formed on the gate dielectric layer 120 between the common electrode 133 and the expansion electrode 123, and the expansion electrode 123, the common electrode 133, and the common voltage conductive layer 140 connected to the common electrode 133 are formed on the substrate 110. The vertical projection is overlapped, and the substrate 110, the gate dielectric layer 120, the first dielectric layer 130, and the common voltage conductive layer 140 are sequentially arranged in a second direction, and the first direction and the second direction are perpendicular to each other.

Please refer to FIG. 2B. FIG. 2B is a schematic diagram of a pixel unit 40 circuit embodiment according to FIG. 2A. In this embodiment, FIG. 2B can be used to illustrate the electrical coupling relationship between the pixel unit 40 and the common capacitor C _COM . . The pixel unit 40 includes a transistor T1, a liquid crystal capacitor C _LC, and a storage capacitor C _ST . The transistor T1 includes a first terminal, a control terminal, and a second terminal. The first terminal of the transistor T1 is connected to one of the data lines DL. Is electrically coupled and receives the above-mentioned display data signal S _O through the data line DL; the control terminal of the transistor T1 is electrically coupled with one of the gate lines G _L and receives the above-mentioned gate through the gate line G _L gate drive signals G, transistor T1 and a second terminal of the liquid crystal capacitor C _LC and a storage capacitor one end electrically coupled to C _ST, the liquid crystal capacitor C _LC and the other terminal of the storage capacitor C _ST is configured to receive a first common voltage of the above-described V _COM1 . Transistor T1 is used for the gate drive signal G determines whether to receive and display data signals S _O S _O display data signals transmitted to the liquid crystal capacitor C _LC and a storage capacitor C _ST The. One end of the common capacitor C _COM is electrically coupled to the other end of the liquid crystal capacitor C _LC and the storage capacitor C _ST and receives a first common voltage V _COM1 , and the other end of the common capacitor C _COM is used to receive the above-mentioned DC voltage V _DC .

In the embodiment shown in FIG. 1, FIG. 2A and FIG. 2B, the common capacitor C _{COM is} disposed in the peripheral area 70, and a common voltage V _DC and a first common voltage V _{COM1 of the} shift register circuit SR are used to generate a common capacitor C _COM. Capacitor C _COM , so the common capacitor C _COM can receive the required DC voltage V _DC with the least amount of wiring, reducing the load effect caused by the wiring, and between the DC voltage V _{DC of the} common capacitor C _COM and the first common voltage V _COM1 The voltage difference will not affect the display effect of the display area 60. In addition, the common capacitor C _COM can also regulate the DC voltage V _DC at the same time, which further increases the benefits of the present invention.

Please refer to FIG. 3A. FIG. 3A is a structural embodiment of the pixel unit 40 of the present invention. In this embodiment, each pixel unit 40 receives a second common voltage V _{COM2 in} addition to the first common voltage V _COM1 . In the embodiment, each pixel unit 40 includes a substrate 41, a first common electrode 42, a dielectric layer 43, a second common electrode 44, a pixel electrode 45, a liquid crystal molecular layer 46, a protective layer 47, and a color filter 48. And the substrate 49 is described as an example, but it is not limited thereto. The first common electrode 42 is disposed between the substrate 41 and the dielectric layer 43, the second common electrode 44 and the pixel electrode 45 are disposed between the liquid crystal molecular layer 46 and the dielectric layer 43, and the second common electrode 44 and the pixel electrode are disposed. 45 is disposed on one side of the dielectric layer 43 and is adjacent to the liquid crystal molecular layer 46, one side of the pixel electrode 45 is adjacent to the second common electrode 44, and the other side of the pixel electrode 45 is adjacent to the other pixel electrode 45. The protective layer 47 is disposed between the liquid crystal molecular layer 46 and the color filter 48, and the color filter 48 is disposed between the protective layer 47 and the substrate 49. The common capacitor C _{COM is} formed on the dielectric layer 43 between the first common electrode 42 and the second common electrode 44.

Next, please refer to FIG. 3B, which is a schematic diagram of a structural embodiment of the common capacitor C _COM described in FIG. 3A. In this embodiment, the display device 100 includes a substrate 110, a gate dielectric layer 120, a first dielectric layer 130, a first common voltage conductive layer 140, a second dielectric layer 150, and a second common voltage conductive layer 160. Exemplified by examples, but not limited to this. The gate dielectric layer 120 is disposed on one side of the substrate 110. The gate dielectric layer 120 has a first surface 121 and a second surface 122 opposite to the first surface 121. The second surface 122 is adjacent to the first surface 121. Substrate 110. The first dielectric layer 130 is disposed on one side of the gate dielectric layer 120. The first dielectric layer 130 has a first surface 131 and a second surface 132 opposite to the first surface 131. The two surfaces 132 are closer to the first surface 121 of the gate dielectric layer 120 than the first surface 131 of the first dielectric layer 130. The first dielectric layer 130 is disposed on the first common electrode 137 (which may correspond to the first common electrode 42 in FIG. 3A) and the second common electrode 138 (which may correspond to the first common electrode 43 in FIG. 3A). For example, the first dielectric layer 130 at least partially covers the first common electrode 137 and the second common electrode 138, and the first common electrode 137 and the second common electrode 138 are disposed on the second surface 132 of the first dielectric layer 130. The first common voltage conductive layer 140 is disposed on one side of the first surface 131 of the first dielectric layer 130. The first common voltage conductive layer 140 extends in a first direction. The first common voltage conductive layer 140 and the first common electrode. 137 is connected and transmits the first common voltage V _COM1 to the first common electrode 137. The second dielectric layer 150 has a first surface 151 and a second surface 152 opposite to the first surface 151. The second surface 152 of the second dielectric layer 150 is closer to the first common voltage conductive layer 140 than the first surface 151. The second common voltage conductive layer 160 is disposed on one side of the first surface 151 of the second dielectric layer 150. The second common voltage conductive layer 160 extends in the above-mentioned first direction. The second common voltage conductive layer 160 and the second The common electrode 138 is connected to transmit the second common voltage V _COM2 to the second common electrode 138. In this embodiment, the first common voltage V _COM1 and the second common voltage V _COM2 have the same voltage value. The common capacitor C _{COM is} formed by the first common voltage conductive layer 140, the second common voltage conductive layer 160, and the second dielectric layer 150 therebetween, and the common capacitor C _{COM in} this embodiment may be formed. In the display area 60 and the peripheral area 70, the vertical projection of the first common voltage conductive layer 140 and the first common electrode 137 on the substrate 110 overlaps, and the second common voltage conductive layer 160 and the second common electrode 138 are on the substrate 110. The vertical projection on the screen is overlapped, and the substrate 110, the gate dielectric layer 120, the first dielectric layer 130, the first common voltage conductive layer 140, the second dielectric layer 150, and the second common voltage conductive layer 160 The directions are sequentially arranged, and the first direction and the second direction are perpendicular to each other.

Referring to FIG. 3C, the display device 100 of the present invention may further include a power supply circuit 80. The power supply circuit 80 is used to provide the first common voltage V _COM1 and the second common voltage V _COM2 described in the embodiment of FIG. 3B, but not This is the limit. The power supply circuit 80 includes a power generation circuit 81 and operational amplifiers 82a and 82b. The power generation circuit 81 is electrically coupled to each operational amplifier 82. The power generation circuit 81 is configured to output a first voltage V _O to the electrical coupling. The operational amplifier 82 is connected, so that the operational amplifier 82 can output the first common voltage V _COM1 and the second common voltage V _COM2 , and the first common voltage V _COM1 and the second common voltage V _COM2 have the same voltage value.

Please refer to FIG. 3D, which is a schematic diagram of a circuit embodiment of the pixel unit 40 of FIG. 3A. In this embodiment, FIG. 3D can be used to illustrate the electrical coupling relationship between the pixel unit 40 and the common capacitor C _COM . The pixel unit 40 includes a transistor T1, a liquid crystal capacitor C _LC, and a storage capacitor C _ST . The transistor T1 includes a first terminal, a control terminal, and a second terminal. The first terminal of the transistor T1 is connected to one of the data lines DL. Is electrically coupled and receives the above-mentioned display data signal S _O through the data line DL; the control terminal of the transistor T1 is electrically coupled with one of the gate lines G _L and receives the above-mentioned gate through the gate line GL driving signal G, the second terminal of the liquid crystal capacitor C _LC and a storage capacitor C _ST is an end of transistor T1 is electrically coupled to the liquid crystal capacitor C _LC and the other terminal of the storage capacitor C _ST is the first for receiving the common voltage V _COM1 . Transistor T1 is used for the gate drive signal G determines whether to receive and display data signals S _O S _O display data signals transmitted to the liquid crystal capacitor C _LC and a storage capacitor C _ST The. One end of the common capacitor C _COM is electrically coupled to the other end of the liquid crystal capacitor C _LC and the storage capacitor C _ST and receives a first common voltage V _COM1 , and the other end of the common capacitor C _COM is used for a second common voltage V _COM2 .

In the embodiments of FIGS. 3A, 3B, 3C, and 3D, the present invention can change the structure of the original pixel unit 40 and the display panel 50, that is, the first common voltage conductive layer 160 and the second common voltage conductive layer can be changed. 160 to generate a common capacitor C _COM . In addition, in this embodiment, the first common voltage V _COM1 and the second common voltage V _COM2 have the same voltage value, so the common capacitor C _COM located in the display area 60 is not affected by the first common voltage V _COM1 and the second common voltage V _COM1. The voltage difference of the voltage V _COM2 affects the rotation angle of the liquid crystal molecules. In addition, the first common voltage V _COM1 and the second common voltage V _COM2 output by the operational amplifier 82 can not interfere with each other due to the characteristic of the input impedance of the operational amplifier 82 being extremely large.

In summary, with the common capacitor C _{COM of the} present invention, the common voltage can be prevented from being disturbed by external signals, and the occurrence of display errors can be effectively reduced. In addition, the common capacitor C _{COM of the} present invention can be implemented with minimal changes under the existing circuit architecture, and it has obvious commercial value.

100‧‧‧ display device

110, 41, 49‧‧‧ substrates

120‧‧‧Gate dielectric layer

121, 131, 151‧‧‧ first surface

122, 132, 152‧‧‧ second surface

123‧‧‧Expansion electrode

130‧‧‧ first dielectric layer

133‧‧‧Common electrode

134‧‧‧clock signal electrode

135‧‧‧DC voltage electrode

136‧‧‧Logic Circuit Block

140‧‧‧Common voltage conductive layer, first common voltage conductive layer

150‧‧‧second dielectric layer

160‧‧‧Second common voltage conductive layer

10‧‧‧Data Drive

20‧‧‧ Multiplexer

30, 30a, 30b‧‧‧Gate driver

40‧‧‧ Pixel Unit

42、137‧‧‧First common electrode

43‧‧‧ Dielectric layer

44、138‧‧‧Second common electrode

45‧‧‧pixel electrode

46‧‧‧ Liquid Crystal Molecular Layer

47‧‧‧ protective layer

48‧‧‧ color filters

50‧‧‧ display panel

60‧‧‧display area

70‧‧‧Peripheral area

80‧‧‧ Power Supply Circuit

81‧‧‧Power generation circuit

82, 82a, 82b‧‧‧ Operational Amplifier

S _I ‧‧‧ Input display data signal

S _O ‧‧‧Display data signal

DL‧‧‧Data Line

G _L ‧‧‧Gate line

G, G ₁ , G ₂ , G ₃ , G ₄ , G _N , G _M ‧‧‧ Gate drive signal

_{SR, SR 1, SR 2,} SR 3, SR 4, SR N, SR M ‧‧‧ shift register

V _DC ‧‧‧DC voltage

V _O ‧‧‧ the first voltage

CLK‧‧‧clock signal

T1‧‧‧Transistor

V _COM1 ‧‧‧ the first common voltage

V _COM2 ‧‧‧ second common voltage

C _LC ‧‧‧ LCD Capacitor

C _ST ‧‧‧Storage capacitor

C _COM ‧‧‧Common Capacitor

FIG. 1 is a schematic diagram of an embodiment of a display device according to the present invention. FIG. 2A is a schematic diagram of an embodiment of the section line AA in FIG. 1. FIG. 2B is a schematic diagram of an embodiment of a pixel unit of the present invention. FIG. 3A is a schematic diagram of an embodiment of a pixel unit structure of the present invention. FIG. 3B is a schematic structural embodiment of a common capacitor C _{COM according to} the present invention. FIG. 3C is a schematic diagram of an embodiment of a power supply circuit 80 according to the present invention. FIG. 3D is a schematic diagram of another embodiment of a pixel unit of the present invention.

Claims (9)

A display device includes: a data driver for outputting a plurality of display data signals; a gate driver for receiving a direct current and an AC voltage and outputting a plurality of gate driving signals; a plurality of pixel units, each A pixel unit is electrically coupled to the gate driver and the data driver, and each pixel unit is used to receive a corresponding display data signal, the gate driving signal and a first common voltage; and a common The capacitor has a first terminal and a second terminal, the first terminal of the common capacitor is used to receive the first common voltage, and the second terminal of the common capacitor is used to receive the DC voltage. The display device according to claim 1, wherein the display device has a display area and a peripheral area, the pixel units are disposed in the display area, and the common capacitor is disposed in the peripheral area. According to the display device of claim 2, the common capacitor includes: a gate dielectric layer having a first surface and a second surface opposite to the first surface; an expansion electrode disposed adjacent to One side of the second surface of the gate dielectric layer, the expansion electrode is used to receive the DC voltage; a first dielectric layer is disposed on one side of the first surface adjacent to the gate dielectric layer, The first dielectric layer has a first surface and a second surface opposite to the first surface. The second surface of the first dielectric layer is adjacent to the first surface of the first dielectric layer. The first surface of the gate dielectric layer; a common electrode (COM Bus) disposed on the second surface of the first dielectric layer to receive the first common voltage; and a common voltage conductive layer, the A common voltage conductive layer is disposed on one side of the first surface of the first dielectric layer and is connected to the common electrode, and the common voltage conductive layer extends along a first direction; wherein the expansion electrode, the common electrode, and Vertical projection of the common voltage conductive layer on a substrate Overlap each other. The display device according to item 1 of the claim further includes a multiplexer, which is electrically coupled to the data driver. A display device includes: a data driver for outputting a plurality of display data signals; a gate driver for outputting a plurality of gate driving signals; a plurality of pixel units, each of the pixel units and the gate A pole driver and the data driver are electrically coupled, and each of the pixel units is configured to receive a corresponding display data signal, the gate driving signal, and a first common voltage; and a common capacitor having a first terminal And a second terminal, the first terminal of the common capacitor receives the first common voltage, and the second terminal of the common capacitor receives a second common voltage, wherein the first common voltage and the second common voltage have substantial The same voltage value. The display device according to claim 5, comprising: a substrate; a gate dielectric layer disposed on one side of the substrate, which has a first surface and a second surface opposite to the first surface. A surface; and a first dielectric layer disposed on one side of the gate dielectric layer, the first dielectric layer having a first surface and a second surface opposite to the first surface, the first dielectric layer The second surface of the electrical layer is closer to the first surface of the gate dielectric layer than the first surface of the first dielectric layer; the common capacitor includes: a first common voltage conductive layer disposed on the first One side of the first surface of a dielectric layer, the first common voltage conductive layer extends along a first direction, and the first common voltage conductive layer has the first common voltage; a second dielectric layer, configured On the side of the first common voltage conductive layer, the second dielectric layer has a first surface and a second surface opposite to the first surface, and the second surface of the second dielectric layer is greater than the first surface. The first surface of the two dielectric layers is adjacent to one side of the first common voltage conductive layer; And a second common voltage conductive layer disposed on one side of the first surface of the second dielectric layer, the second common voltage conductive layer extending along the first direction, the second common voltage conductive layer having the A second common voltage; wherein the vertical projections of the first common voltage conductive layer and the second common voltage conductive layer on the substrate overlap each other. The display device according to claim 6, wherein the first dielectric layer further comprises: a first common electrode, which is disposed on the second surface of the first dielectric layer and is connected to the first common voltage The conductive layer is connected, the first common electrode receives the first common voltage, and a second common electrode is disposed on the second surface of the first dielectric layer and connected to the second common voltage conductive layer. Two common electrodes receive the second common voltage; wherein the first common voltage conductive layer and the vertical projection of the first common electrode on the substrate overlap, and the second common voltage conductive layer and the second common electrode are on the substrate. The vertical projection on the substrate is overlapping. According to the display device described in claim 7, the display device further comprises: a power generating unit for outputting a first voltage; a first operational amplifier for receiving the first voltage and outputting the first common voltage Voltage; and a second operational amplifier for receiving the first voltage and outputting the second common voltage. The display device described in claim 5 further includes a multiplexer, which is electrically coupled to the data driver.