TW201843776A - 形成用於接合晶圓之積體電路結構之方法及所產生的結構 - Google Patents
形成用於接合晶圓之積體電路結構之方法及所產生的結構 Download PDFInfo
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- TW201843776A TW201843776A TW106127462A TW106127462A TW201843776A TW 201843776 A TW201843776 A TW 201843776A TW 106127462 A TW106127462 A TW 106127462A TW 106127462 A TW106127462 A TW 106127462A TW 201843776 A TW201843776 A TW 201843776A
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Classifications
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Abstract
本揭露係針對用於結合諸晶圓之積體電路結構及其形成方法。該IC結構可包括:位在基板上方之金屬柱,該金屬柱包括上表面;位在該金屬柱之該上表面之周緣周遭之濕化抑制劑層;以及位在該金屬柱之該上表面上方之焊接材料,該焊接材料位在該濕化抑制劑層內並且受其限制。該金屬柱之側壁可無該焊接材料。該方法可包括:形成位在基板上方之金屬柱,該金屬柱具有上表面;形成位在該金屬柱之該上表面之周緣周遭之濕化抑制劑層;以及形成位在該濕化抑制劑層內並且受其限制之該金屬柱之該上表面上方之焊接材料。
Description
本揭露係關於積體電路結構,並且更尤指形成用於結合諸晶圓之積體電路結構的方法,該等積體電路結構包括上方有焊接材料之金屬柱,其中該金屬柱之側壁無該焊接材料,本揭露還與所產生的結構有關。
一種用於將個別晶片結合至封裝基板(substrate)之習知方法為可崩陷受控晶片連接(collapsible controlled chip connection;C4),亦稱為焊球(或焊塊)封裝。此互連封裝將焊球用於在諸晶圓之間形成實體及電氣兩連接。另一習知方法包括位在一片晶圓上用以結合另一晶圓之柱體互連結構。由於電遷移效能增強,已發現柱體互連結構優於焊球封裝。另外,相較於結合程序期間完全熔化之諸焊球之間的間距,柱體互連結構容許該等柱體互連結構之間的間距更緊密。在柱體互連技術中,柱體上方仍可使用少量焊料。然而,此技術的一項難處在於柱體互 連結構之側壁可能出現焊料濕化(solder wetting)。此側壁濕化會造成相鄰柱體互連結構之間出現焊料橋接或短路。再者,側壁濕化可能在晶圓製作及使用壽命期間造成額外的損耗。
本揭露之第一態樣係針對用於結合諸晶圓之積體電路結構。該積體電路結構可包括:位在基板上方之金屬柱,該金屬柱包括上表面;位在該金屬柱之該上表面之周緣周遭之濕化抑制劑層;以及位在該金屬柱之該上表面上方之焊接材料,該焊接材料位在該濕化抑制劑層內並且受其限制。
本揭露之第二態樣係針對用於結合諸晶圓之積體電路結構的方法。該方法可包括:形成位在基板上方之金屬柱,該金屬柱具有上表面;形成位在該金屬柱之該上表面之周緣周遭之濕化抑制劑層;以及形成位在該濕化抑制劑層內並且受其限制之該金屬柱之該上表面上方之焊接材料。
本揭露之前述及其它特徵將由以下本揭露之具體實施例之更特定說明而顯而易見。
100、190、200、290、300、390‧‧‧積體電路(IC)結構
102‧‧‧基板
104、108‧‧‧導電層
106‧‧‧絕緣體層
110‧‧‧絕緣體層或鈍化層
112‧‧‧凸塊底下金屬(UBM)層
114、130、202‧‧‧光阻
116‧‧‧開口
120‧‧‧金屬柱
124‧‧‧上表面
128‧‧‧濕化抑制劑層
132‧‧‧周緣
136、138‧‧‧中央部分
140‧‧‧焊接材料
142‧‧‧側壁
本揭露之具體實施例將搭配下列圖式詳述,其中相似的名稱表示相似的元件,並且其中:第1圖至第5圖根據本揭露之具體實施例,展示積體電路結構的截面圖。
第6圖至第7圖根據本揭露之具體實施例,展示積體電路結構的頂視圖。
第8圖至第11圖根據本揭露之具體實施例,展示積體電路結構的截面圖。
第12圖至第15圖根據本揭露之具體實施例,展示積體電路結構的截面圖。
注意到的是,本揭露之圖式並未按照比例。該等圖式用意僅在於繪示本揭露之典型態樣,因而不應該視為限制本揭露之範疇。在圖式中,相似的編號代表該等圖式之間相似的元件。
本揭露係關於積體電路結構,並且更尤指形成用於結合諸晶圓之積體電路結構的方法,該等積體電路結構包括上方有焊接材料之金屬柱,其中該金屬柱之側壁無該焊接材料,本揭露還與所產生的結構有關。具體而言,根據本揭露之積體電路結構包括位在金屬柱之上表面之周緣周遭之濕化抑制劑層,藉此界定位在金屬柱上方之框體或環體,使得金屬柱上方之焊接材料係位在濕化抑制劑層內並且受其限制。結果是,沿著金屬柱之側壁沒有焊料溢出。與習知積體電路結構相比之下,本揭露藉由修改金屬柱之頂端表面來抑制焊料側壁流失(runoff),而不是藉由建立疏水或非可濕化金屬柱側壁來抑制。
第1圖根據本揭露之具體實施例,展示初步積體電路(IC)結構100的截面圖。IC結構100可包括基板 102。基板102可包括但不限於矽、鍺、矽鍺、碳化矽、以及主要由一或多種III-V族化合物半導體所組成者,該等化合物半導體具有由化學式AlX1GaX2InX3AsY1PY2NY3SbY4所定義之組成,其中X1、X2、X3、Y1、Y2、Y3及Y4代表相對比例,各大於或等於零,而且X1+X2+X3+Y1+Y2+Y3+Y4=1(1為總相對莫耳量)。其它合適的基板包括具有以下組成之II-VI族化合物半導體:ZnA1CdA2SeB1TeB2,其中A1、A2、B1及B2為各大於或等於零之相對比例,並且A1+A2+B1+B2=1(1為總莫耳量)。再者,可使基板102之一部分或整體有應變。儘管所示基板102為包括單層半導體材料,所強調的是,本揭露之教示一樣適用於絕緣體上覆半導體(semiconductor-on-insulator;SOI)基板。如所屬技術領域已知,SOI基板可包括位在另一半導體層(圖未示)上之絕緣體層上之半導體層。SOI基板之半導體層可包括本文中所述半導體基板材料中任一者。SOI基板之絕緣體層可包括任何目前已知或以後才開發之SOI基板絕緣體,諸如但不侷限於氧化矽。
上覆(overlying)基板102可以是導電層104、絕緣體層106、另一導電層108、及另一絕緣體層110。更具體來說,導電層104可布置於基板102上方。導電層104可包括任何目前已知或以後才發現之導電材料,例如:銅。絕緣體層106可布置於導電層104上方。絕緣體層106可包括任何目前已知或以後才開發之絕緣體層,例如:氧化物或氮化物。導電層108可布置於絕緣體層106上方。導 電層108可包括例如鋁或銅之導電接墊(圖未示)。導電接墊可藉由布置於絕緣體層106內之貫孔(圖未示)來連接至導電層104。鈍化(passivation)層110可布置於導電層108上方。鈍化層110可包括數層(未個別圖示),舉例如上覆於氮化物層之任選聚合物平坦化層,該氮化物層上覆於氧化物層。層104、106、108、110各可藉由沉積來形成。
「沉積」於本文中使用時,可包括適用於待沉積材料之任何目前已知或以後才開發之技術,包括但不侷限於例如:化學氣相沉積(chemical vapor deposition;CVD)、低壓CVD(LPCVD)、電漿增強型CVD(PECVD)、半大氣壓CVD(SACVD)與高密度電漿CVD(HDPCVD)、快速熱CVD(RTCVD)、超高真空CVD(UHVCVD)、有限反應處理CVD(LRPCVD)、有機金屬CVD(MOCVD)、濺鍍沉積、離子束沉積、電子束沉積、雷射輔助沉積、熱氧化作用、熱氮化作用、旋塗方法、物理氣相沉積(physical vapor deposition;PVD)、原子層沉積(atomic layer deposition;ALD)、化學氧化作用、分子束磊晶(molecular beam epitaxy;MBE)、鍍覆及/或蒸鍍。
鈍化層110之一部分可例如藉由蝕刻來移除,以使其底下之導電層108之一部分曝露。「蝕刻」於本文中使用時,大體上係指藉由濕式或乾式化學手段將材料從基板、或該基板上所形成之結構移除。在一些實例中,可希望將材料從基板之某些區域選擇性移除。在此一實例中, 遮罩可用於防止將材料從基板之某些區域移除。蝕刻的類別大體上有兩種:(i)濕蝕刻及(ii)乾蝕刻。濕蝕刻可用以選擇性溶解給定材料,並且留下另一材料相對原封不動。濕蝕刻典型為利用諸如酸之溶劑來進行。乾蝕刻可使用可產生含能自由基之電漿、或中性帶電物種來進行,其在晶圓之表面處起反應或撞擊。中性粒子可從所有角度侵襲晶圓,此程序因此為等向性。離子碾壓、或濺鍍蝕刻從單一方向以稀有氣體之含能離子轟擊晶圓,因此,此程序屬於高度異向性。反應性離子蝕刻(reactive-ion etch;RIE)在介於濺鍍蝕刻與電漿蝕刻中間之條件下運作,並且可用於產生深、窄特徵,諸如溝槽。再者,可在鈍化層110及受曝露的導電層108上方形成(例如保形沉積)凸塊底下金屬(under bump metallization;UBM)層112。所示UBM層112儘管為單一層,仍要理解的是,UBM層112可包括兩層,包括例如鈦或鈦鎢之阻障層及例如銅之晶種層。在一些具體實施例中,可在UBM層112上方形成另一導電層(圖未示),例如包括鎳。如所屬技術領域已知,UBM層112有助於電鍍金屬柱,如將於本文中所述者。
可在UBM層112上方例如藉由沉積來形成光阻114。再者,光阻114可經受習知的微影及蝕刻程序以在光阻114內形成開口116,使UBM層112之受曝露部分曝露,如第1圖所示。可在開口116內形成金屬柱120。金屬柱120可包括例如銅、鎳或其組合。「金屬柱」於本文中使用時,可指稱為包括單一金屬、多種金屬、或其合 金之柱體。金屬柱120可使用習知的沉積及/或電鍍技術來形成,使得金屬柱120在光阻114裡之開口116內受到限制。儘管所示金屬柱120為單一層,仍要理解的是,金屬柱120可包含超過一層,例如一層銅,上覆於一層鎳,上覆於另一層銅。金屬柱120的形狀可以是實質圓柱形,使得金屬柱120之上表面為實質圓形或卵形(ovular)。在其它具體實施例中,金屬柱120可具有多角形狀之上表面。如第1圖所示,金屬柱120可經由UBM層112電連接至導電層108。金屬柱120可具有比光阻114之高度更小之高度。金屬柱120可包括所具直徑大約為25微米(μm)之微型柱體,然而,本文中所述之具體實施例並不受限於此,而且一樣適用於所具直徑比25μm更大或更小之金屬柱120。在此一情況中,本文中所述之例如高度、寬度及厚度等尺寸可從而基於所用金屬柱之大小來修改。「大約」於本文中使用時,意味著包括例如所述值10%內之值。
仍請參閱第1圖,金屬柱120之上表面124上方可形成(例如沉積)濕化抑制劑層128。如圖所示,亦可在光阻114之上表面(第1圖中未個別圖示)上方形成濕化抑制劑層128。濕化抑制劑層128可包括任何目前已知或以後才開發之介電材料,舉例如含有下列至少一者之材料:矽、氧、碳、氮、或氫、以及其組合。在一項實施例中,濕化抑制劑層128可包括例如氧化矽之氧化物、例如氮化矽之氮化物、或其組合。然而,要理解的是,可使用無下列至少一者之介電質:矽、氧、碳、氮或氫。在 其它具體實施例中,濕化抑制劑層128可包括氟碳化合物。濕化抑制劑層128之命名原因在於,其沿著金屬柱120之側壁抑制焊接材料濕化,如將於本文中所述者。濕化抑制劑層128可包括大約0.1μm至大約6.0μm之厚度,即高度,或更具體而言,其為大約0.1μm至大約0.5μm。濕化抑制劑層128可包括大約2.0μm至大約6.0μm之寬度,即水平寬度。然而,濕化抑制劑層128並不受限於此一厚度,而且可客製化濕化抑制劑層128之厚度而不脫離本揭露之態樣。
請參閱第2圖,可在濕化抑制劑層128上方形成並且圖案化另一光阻130,使得將金屬柱120之上表面124之周緣132加襯(lining)之濕化抑制劑層128遭由光阻130包覆,並且使濕化抑制劑層128之中央部分136受曝露。如第3圖所示,濕化抑制劑層128之受曝露的中央部分136(第2圖)可例如藉由蝕刻來移除,以使其底下之金屬柱120之上表面124之中央部分138曝露。然而,將金屬柱120之上表面124之周緣132加襯之濕化抑制劑層128保持不變。亦即,在蝕刻期間,加襯周緣132之濕化抑制劑層128因遭由光阻130包覆而保持不變,濕化抑制劑層128之中央部分136因未受光阻包覆而遭受移除。再者,可將光阻130移除以使將金屬柱120之上表面124之周緣132加襯之濕化抑制劑層128曝露。
如第4圖所示,可在金屬柱120之上表面124上方形成焊接材料140。更具體來說,可從金屬柱120之 上表面124之受曝露的中央部分138(第3圖)起電鍍焊接材料140。如圖所示,焊接材料受金屬柱120之上表面124之周緣132周遭之濕化抑制劑層128所限制。焊接材料140可包括任何目前已知或以後才開發之焊接材料,舉例如錫、鉛、銀、或其組合。請參閱第5圖,可將焊接材料140回焊,使得焊接材料140在金屬柱120之上表面124上方之形狀實質為球形(或半球形),並且受周緣132周遭之濕化抑制劑層128所限制。按照這種方式,焊接材料140沿著金屬柱120之側壁142受抑制而免於濕化。亦即,側壁142無焊接材料140。「實質」於本文中使用時,係指對於大部分,大多完全地受指定或任何些微偏差,其提供本發明之相同技術效益。亦如第5圖所示,光阻114及光阻114上方之濕化抑制劑層128可例如藉由蝕刻來移除,以使其底下之UBM層112有部分曝露。再者,UBM層112之受曝露部分可例如藉由蝕刻來移除,以使其底下之鈍化層110曝露。UBM層112之至少一部分可留在金屬柱120下方。另外,IC結構100可經受一或多個表面清潔程序以清潔鈍化層110之頂端表面。光阻114、UBM層112之移除程序可在焊料回焊之前或之後進行。
如第5圖所示焊料回焊之後所產生的IC結構190可包括位在基板102上方之金屬柱120。金屬柱120可包括上表面124。濕化抑制劑層128可布置於金屬柱120之上表面124之周緣132周遭。焊接材料140可布置於金屬柱120之上表面124之中央部分138(第3圖)上方。 焊接材料140可布置於周緣132周遭之濕化抑制劑層128內並且受其限制。第6圖至第7圖展示IC結構190的頂視圖。如第6圖所示,濕化抑制劑層128可界定金屬柱120上方之環形環(第5圖)。如第7圖所示,濕化抑制劑層可界定金屬柱120上方之多角框體(第5圖)。濕化抑制劑層128可界定用於限制焊接材料140並使焊接材料140免於在金屬柱120之側壁142周遭濕化的任何形狀。濕化抑制劑層128所界定之框體或環體的形狀可藉由習知的光微影技術來設計。
第8圖至第11圖展示本揭露之另一具體實施例。從第8圖開始,展示初步IC結構200。IC結構200類似於IC結構100(第1圖)之處在於IC結構200包括基板102、導電層104、108、絕緣體層106、鈍化層110、UBM層112、光阻114及金屬柱120。為求扼要,已省略這些結構及其形成過程之冗餘闡釋。IC結構200有別於IC結構100之處在於未如第1圖所示在金屬柱120之上表面124及光阻114上方形成濕化抑制劑層128,而是在金屬柱120及光阻114上方形成光阻202。可將光阻202圖案化,使得金屬柱120之上表面124之中央部分138遭由光阻202包覆,並且使金屬柱120之上表面124之周緣132受曝露。
請參閱第9圖,可在光阻114、202及金屬柱120之受曝露的周緣132上方形成(例如沉積)濕化抑制劑層128。濕化抑制劑層128可包括所述用於濕化抑制劑層128之任何材料。形成濕化抑制劑層128之後,可將 光阻202從金屬柱120之上表面124之中央部分138移除,以使金屬柱120之上表面124之中央部分138曝露。再者,可從金屬柱120之受曝露的中央部分138起電鍍焊接材料140,使得焊接材料140受濕化抑制劑層128限制,如第10圖所示。請參閱第11圖,可將焊接材料140回焊,使得焊接材料140在金屬柱120之上表面124上方之形狀實質為球形(或半球形),並且受周緣132周遭之濕化抑制劑層128所限制。按照這種方式,焊接材料140沿著金屬柱120之側壁142受抑制而免於濕化。亦即,側壁142無焊接材料140。亦如第11圖所示,可移除光阻114及光阻114上方之濕化抑制劑層128,以使其底下之UBM層112有部分曝露。再者,UBM層112之受曝露部分可例如藉由蝕刻來移除,以使其底下之鈍化層110曝露。UBM層112之至少一部分可留在金屬柱120下方。另外,IC結構200可經受一或多個表面清潔程序以清潔鈍化層110之頂端表面。光阻114、UBM層112之移除程序可在焊料回焊之前或之後進行。
如第11圖所示焊料回焊之後所產生的IC結構290可包括位在基板102上方之金屬柱120。金屬柱120可包括上表面124。濕化抑制劑層128可布置於金屬柱120之上表面124之周緣132周遭。焊接材料140可布置於金屬柱120之上表面124之中央部分138(第10圖)上方。焊接材料140可布置於周緣132周遭之濕化抑制劑層128內並且受其限制。如本文中所述,濕化抑制劑層128可界 定金屬柱120上方之環形環或多角框體,端視金屬柱120之形狀而定。濕化抑制劑層128可界定用於限制焊接材料140並使焊接材料140免於在金屬柱120之側壁142周遭濕化的任何形狀。濕化抑制劑層128所界定之框體或環體的形狀可藉由習知的光微影技術來設計。
第12圖至第15圖展示本揭露之另一具體實施例。本具體實施例與第1圖至第4圖之具體實施例差別在於並非形成光阻130(第2圖)以界定金屬柱120之周緣周遭的濕化抑制劑層128,而是可使用異向性蝕刻以界定金屬柱120之周緣周遭的濕化抑制劑層128。從第12圖開始,展示初步IC結構300。IC結構300類似於IC結構100(第1圖)之處在於IC結構300包括基板102、導電層104、108、絕緣體層106、110、光阻114、金屬柱120及濕化抑制劑層128。為求扼要,已省略這些結構及其形成過程之冗餘闡釋。IC結構300與IC結構100可實質相同,或者,IC結構300與IC結構100之差異可在於可在金屬柱120與光阻114之上表面124上方形成比第1圖之具體實施例所形成者更厚的濕化抑制劑層128。請參閱第13圖,可在濕化抑制劑層128上進行異向性電漿蝕刻,使得金屬柱120之上表面124之中央部分138受曝露,並且金屬柱120之周緣132維持受濕化抑制劑層128包覆。
如第14圖所示,在異向性電漿蝕刻之後,可自金屬柱120之上表面124之受曝露的中央部分138起藉由電鍍焊接材料140來形成焊接材料140,使得焊接材 料140受濕化抑制劑層128限制。再者,如第15圖所示,此程序可接續將焊接材料140回焊,使得焊接材料140在形狀方面呈實質球形(或半球形),並且受金屬柱120之上表面124之周緣132周遭之濕化抑制劑層128所限制。按照這種方式,焊接材料140沿著金屬柱120之側壁142受抑制而免於濕化。亦即,側壁142無焊接材料140。亦如第15圖所示,可移除光阻114及光阻114上方之濕化抑制劑層128,以使其底下之UBM層112有部分曝露。再者,UBM層112之受曝露部分可例如藉由蝕刻來移除,以使其底下之鈍化層110曝露。UBM層112之至少一部分可留在金屬柱120下方。另外,IC結構300可經受一或多個表面清潔程序以清潔鈍化層110之頂端表面。光阻114、UBM層112之移除程序可在焊料回焊之前或之後進行。
如第15圖所示焊料回焊之後所產生的IC結構390可包括位在基板102上方之金屬柱120。金屬柱120可包括上表面124。濕化抑制劑層128可布置於金屬柱120之上表面124之周緣132周遭。焊接材料140可布置於金屬柱120之上表面124之中央部分138(第14圖)上方。焊接材料140可布置於金屬柱120之上表面124之周緣132周遭之濕化抑制劑層128內並且受其限制。如本文中所述,濕化抑制劑層128可界定金屬柱120上方之環形環或多角框體,端視金屬柱120之形狀而定。濕化抑制劑層128可界定用於限制焊接材料140並使焊接材料140免於在金屬柱210之側壁142周遭濕化的任何形狀。濕化抑制劑層128 所界定之框體或環體的形狀可藉由習知的光微影技術來設計。
本方法如以上所述,係用於製造積體電路晶片。產生之積體電路晶片可由製造商以空白晶圓形式(也就是說,作為具有多個未封裝晶片的單一晶圓)、當作裸晶粒、或以封裝形式來配送。在已封裝的例子中,晶片係嵌裝於單一晶片封裝(諸如塑膠載體,具有黏貼至主機板或其它更高階載體之引線)中,或多晶片封裝(諸如具有表面互連或埋置型互連任一者或兩者之陶瓷載體)中。在任一例子中,該晶片接著與其它晶片、離散電路元件、及/或其它信號處理裝置整合成下列之部分或任一者:(a)諸如主機板之中間產品,或(b)最終產品。最終產品可以是包括積體電路晶片之任何產品,範圍涵蓋玩具及其它低階應用至具有顯示器、鍵盤或其它輸入裝置、及中央處理器的進階電腦產品。
本文所用術語的目的僅在於說明特殊具體實施例並且意圖不在於限制本揭露。如本文中所用,單數形式「一」、「一種」、「一個」、以及「該」的用意在於同時包括複數形式,上下文另有所指除外。將進一步了解的是,「包含」及/或「包括」等詞於本說明書中使用時,指明所述特徵、整體、步驟、操作、元件及/或組件之存在,但並未排除一或多個其它特徵、整體、步驟、操作、元件、組件及/或其群組之存在或新增。「任選」或「供選擇地」意為後續所述事件或環境可或可不出現,並且該描述包括 出現事件的實例及未出現事件的實例。
本說明書及申請專利範圍各處近似文句於本文中使用時,可套用來修飾任何定量表徵,其許可改變此定量表徵,但不會改變與其有關的基本功能。因此,一或多個諸如「約」、「大約」及「實質」的用語所修飾的值並不受限於指定的精確值。在至少一些實例中,該近似語言可對應於儀器測量該值時的精確度。本說明書及申請專利範圍這裡及各處可組合及/或互換範圍限制,此類範圍乃經識別並且包括其中所含有的子範圍,除非內容或文句另有所指。「大約」如應用到範圍之特定值時,適用於兩值,而且除非另外取決於測量該值之儀器的精確度,否則可表示所述值的+/-10%。「實質」係指對於大部分,大多完全地受指定或任何些微偏差,其提供本發明之相同技術效益。
隨附之申請專利範圍中所有手段或步驟加上功能元件之對應結構、材料、動作及均等者用意在於包括結合如具體主張之其它主張專利權之元件進行任何結構、材料或動作。已為了描述及說明而呈現本揭露的說明,但無意於具有徹底性或侷限於所揭示形式的揭露。許多修改及變化對於所屬技術領域中具有通常知識者將顯而易知而不脫離本揭露的範疇及精神。選擇並說明具體實施例是為了更佳闡釋本揭露之原理及實際應用,並且如適用於經思考之特定用途,讓所屬技術領域中具有通常知識者能夠理解本揭露經各種修改之各項具體實施例。
Claims (20)
- 一種用於結合諸晶圓之積體電路結構,該積體電路結構包含:位在基板上方之金屬柱,該金屬柱包括上表面;位在該金屬柱之該上表面之周緣周遭之濕化抑制劑層;以及位在該金屬柱之該上表面上方之焊接材料,該焊接材料位在該濕化抑制劑層內並且受其限制。
- 如申請專利範圍第1項所述之積體電路結構,其中,該濕化抑制劑層包括介電質或氟碳化合物。
- 如申請專利範圍第1項所述之積體電路結構,其中,該濕化抑制劑層界定位在該金屬柱上方之環形環或多角框體。
- 如申請專利範圍第1項所述之積體電路結構,其中,該金屬柱包括至少下列之一者:銅、鎳、或其組合。
- 如申請專利範圍第1項所述之積體電路結構,其中,該焊接材料包括至少下列之一者:錫、銀或銅。
- 如申請專利範圍第1項所述之積體電路結構,其中,該濕化抑制劑層包括大約2.0微米(μm)至大約6.0微米之寬度。
- 如申請專利範圍第1項所述之積體電路結構,其中,該金屬柱之側壁無該焊接材料。
- 一種形成用於將諸晶圓結合之積體電路結構的方法,該方法包含: 形成位在基板上方之金屬柱,該金屬柱具有上表面;形成位在該金屬柱之該上表面之周緣周遭之濕化抑制劑層;以及形成位在該濕化抑制劑層內並且受其限制之該金屬柱之該上表面上方之焊接材料。
- 如申請專利範圍第8項所述之方法,其中,所述形成位在該金屬柱之該上表面之該周緣周遭之該濕化抑制劑層包括:形成位在該金屬柱之該上表面上方之該濕化抑制劑層;圖案化位在該濕化抑制劑層上方之光阻,使得位在該金屬柱之該上表面之該周緣周遭之該非濕化層之第一部分受包覆,並且位在該金屬柱之中央部分上方之該濕化抑制劑層之第二部分受曝露;將該濕化抑制劑層之該受曝露的第二部分移除以使其底下之該金屬柱之該中央部分曝露;以及將該光阻移除以使位在該金屬柱之該上表面之該周緣周遭之該濕化抑制劑層之該第一部分曝露。
- 如申請專利範圍第9項所述之方法,其中,所述形成該焊接材料包括:從該金屬柱之該受曝露的中央部分起電鍍該焊接材料,使得該焊接材料受該濕化抑制劑層限制;以及回焊該焊接材料,使得該焊接材料之形狀為實質 球形。
- 如申請專利範圍第8項所述之方法,其中,所述形成位在該金屬柱之該上表面之該周緣周遭之該濕化抑制劑層包括:圖案化位在該金屬柱上方之光阻,使得該金屬柱之中央部分受包覆,並且該金屬柱之該上表面之該周緣受曝露;形成位在該金屬柱之該上表面之該受曝露的周緣上方之該濕化抑制劑層;以及將該光阻從該金屬柱之該中央部分上方移除以使該金屬柱之該中央部分曝露。
- 如申請專利範圍第11項所述之方法,其中,所述形成該焊接材料包括:從該金屬柱之該受曝露的中央部分起電鍍該焊接材料,使得該焊接材料受該濕化抑制劑層限制;以及回焊該焊接材料,使得該焊接材料之形狀為實質球形。
- 如申請專利範圍第8項所述之方法,其中,所述形成位在該金屬柱之該上表面之該周緣周遭之該非濕化層包括:形成位在該金屬柱之該上表面上方之該濕化抑制劑層;以及進行該非濕化層之異向性電漿蝕刻,使得該金屬柱之中央部分受曝露,並且該金屬柱之該上表面之該周 緣受包覆。
- 如申請專利範圍第13項所述之方法,其中,所述形成該焊接材料包括:從該金屬柱之該受曝露的中央部分起電鍍該焊接材料,使得該焊接材料受該濕化抑制劑層限制;以及回焊該焊接材料,使得該焊接材料之形狀為實質球形。
- 如申請專利範圍第8項所述之方法,其中,該濕化抑制劑層包括介電質或氟碳化合物。
- 如申請專利範圍第8項所述之積體電路結構,其中,該濕化抑制劑層界定位在該金屬柱上方之環形環或多角框體其中至少一者。
- 如申請專利範圍第8項所述之積體電路結構,其中,該金屬柱包括至少下列之一者:銅、鎳、或其組合。
- 如申請專利範圍第8項所述之積體電路結構,其中,該焊接材料包括至少下列之一者:錫、銀、或鉛。
- 如申請專利範圍第8項所述之積體電路結構,其中,該濕化抑制劑層包括大約2.0奈米(nm)至大約6.0奈米之寬度。
- 如申請專利範圍第8項所述之積體電路結構,其中,所述形成位在該金屬柱之該上表面之該周緣周遭之該濕化抑制劑層包括:形成該濕化抑制劑層,使得該金屬柱之側壁無該焊接材料。
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