TW201803080A - Sheet for producing three-dimensional integrated laminated circuit and method for producing three-dimensional integrated laminated circuit - Google Patents

Abstract

This sheet 1 for producing a three-dimensional integrated laminated circuit, which is interposed between a plurality of semiconductor chips having through-electrodes and is used to adhere the semiconductor chips to each other and obtain a three-dimensional integrated laminated circuit, is provided with at least a curable adhesive layer 13, wherein the material that constitutes the adhesive layer 13 has a pre-curing melt viscosity at 90 DEG C of 1.0*100-5.0*105 Pa·s, and the cured product has an average linear expansion coefficient at 0-130 DEG C of 45 ppm or less. This sheet 1 for producing a three-dimensional integrated laminated circuit can be used to produce a three-dimensional integrated laminated circuit in which connection resistance between the semiconductor chips does not easily change and which is highly reliable.

Description

Plate for manufacturing three-dimensional product volume layer circuit and method for manufacturing three-dimensional product volume layer circuit

The present invention relates to a plate suitable for manufacturing a three-dimensional bulk-layer circuit and a method for manufacturing a three-dimensional bulk-layer circuit using the same.

In recent years, from the viewpoint of increasing the capacity and function of electronic circuits, the development of a three-dimensional multi-layer volume layer circuit (hereinafter referred to as a "multi-layer circuit") in which a plurality of semiconductor wafers are three-dimensionally laminated is developed. Department in progress. In this kind of multilayer circuit, in order to miniaturize. It is highly functional and uses a semiconductor wafer having a through electrode (TSV) penetrating from the circuit formation surface to the opposite surface. At this time, the stacked semiconductor wafers are electrically connected by contact between the through-electrodes (or bumps provided at the ends of the through-electrodes) provided in each of them.

When manufacturing such a laminated circuit. In order to ensure the above-mentioned electrical connection and mechanical strength, a resin composition is used, and the semiconductor wafers are bonded to each other while the through electrodes are electrically connected to each other. For example, Patent Document 1 proposes a method in which a film-shaped adhesive, commonly referred to as a non-conductive film (NCF), is interposed between semiconductor wafers, and the semiconductor wafers are adhered to each other. .

This kind of adhesive is also required to conduct semiconductivity in the temperature cycle test. The reliability of the connection resistance between the body wafers does not change.

[Prior technical literature] [Patent Literature]

[Patent Document 1] Japanese Patent Laid-Open No. 2010-010368

However, the conventional adhesive was subjected to a temperature cycle test, and there was a problem that a good result might not be ensured.

The present invention has been made in view of such a practical situation, and an object thereof is to provide a plate for manufacturing a three-dimensional multi-layer volume circuit, in which the connection resistance between semiconductor wafers is not easily changed, and can be manufactured with high reliability. Three-dimensional product volume layer circuit. Another object of the present invention is to provide a method for manufacturing such a three-dimensional integrated volume layer circuit.

In order to achieve the above object, the first system of the present invention provides a three-dimensional bulk-layer circuit manufacturing plate, which is interposed between a plurality of semiconductor wafers having a through electrode, and the three semiconductor wafers are bonded to each other to form a three-dimensional circuit. The three-dimensional bulk-layer circuit manufacturing plate used in the three-dimensional bulk-layer circuit is characterized in that the above-mentioned three-dimensional bulk-layer circuit manufacturing plate has at least a hardenable adhesive layer and constitutes an adhesive layer. The melt viscosity of the material at 90 ° C before curing is 1.0 × 10 ⁰ ~ 5.0 × 10 ⁵ Pa. s, the average linear expansion coefficient of the cured product at 0 to 130 ° C is 45 ppm or less (Invention 1).

In the above-mentioned invention (Invention 1), the plate for manufacturing a three-dimensional bulk-layer circuit is because the melt viscosity of the adhesive layer before curing at 90 ° C is in the above range, so When the adhesive layer is interposed between the semiconductor wafers, the adhesive layer follows the unevenness caused by the through electrodes or bumps on the surface of the semiconductor wafer well. In addition, since the average linear expansion coefficient of the cured product of the adhesive layer is 45 ppm or less, the difference between the linear expansion coefficient of the semiconductor wafer and the semiconductor wafer is small, and the stress that may occur between the adhesive layer and the semiconductor wafer can be reduced. Therefore, the three-dimensional multi-layer bulk-layer circuit manufacturing sheet of the above-mentioned invention (Invention 1) is capable of making the connection reliability of the semiconductor wafers higher.

In the above invention (Invention 1), the hardened material of the material constituting the adhesive layer preferably has a glass transition temperature of 150 ° C or higher and 350 ° C or lower (Invention 2).

In the above inventions (Inventions 1, 2), the hardened material of the material constituting the adhesive layer described above has a mass reduction temperature of 5% obtained by thermogravimetric measurement, which is preferably 350 ° C or higher (Invention 3).

In the above inventions (Inventions 1 to 3), the standard deviation of the thickness (T2) of the adhesive layer is preferably 2.0 μm or less (Invention 4).

In the above inventions (Inventions 1 to 4), the storage elastic modulus at 23 ° C. of the adhesive layer after curing is preferably 1.0 × 10 ² MPa or more and 1.0 × 10 ⁵ MPa or less (Invention 5).

In the above inventions (Inventions 1 to 5), it is preferred that the adhesive layer has a heating starting temperature (TS) of 70 ° C to 150 ° C measured by differential scanning calorimetry at a heating rate of 10 ° C / minute. Within the range, the heating peak temperature (TP) is TS + 5 ~ 60 ° C (invention 6).

In the above inventions (Inventions 1 to 6), the material constituting the adhesive layer is composed of a thermosetting component, a high molecular weight component, a curing agent, and a curing contact. Medium is better (Invention 7).

In the above inventions (Inventions 1 to 7), the material constituting the adhesive layer is preferably a flux-containing component (Invention 8).

In the above invention (Inventions 1 to 8), it is preferable that the material constituting the adhesive layer contains an inorganic filler (Invention 9).

In the above invention (Inventions 1 to 9), the plate for manufacturing the three-dimensional multi-layered multilayer circuit preferably further includes: an adhesive layer, which is laminated on one side of the adhesive layer; and a substrate, which The layer is laminated on the opposite side of the adhesive layer from the adhesive layer (Invention 10).

In the above invention (Invention 10), the ratio (T2 / T1) of the thickness (T2) of the adhesive layer to the thickness (T1) of the substrate is preferably 0.01 or more and 1.5 or less (Invention 11).

In the above inventions (Inventions 10 and 11), the storage elastic modulus of the adhesive at 23 ° C is preferably 1 × 10 ³ Pa or more and 1 × 10 ⁹ Pa or less (Invention 12).

In the above invention (Inventions 10 to 12), the tensile elastic modulus of the substrate at 23 ° C is preferably 100 MPa or more and 5000 MPa or less (Invention 13).

In the above inventions (Inventions 10 to 13), the laminated body composed of the adhesive layer and the substrate is preferably a cutting plate (Invention 14).

The second aspect of the present invention provides a method for manufacturing a three-dimensional bulk-layer circuit, which includes the following steps: one side of the aforementioned adhesive layer of the aforementioned three-dimensional bulk-layer circuit manufacturing plate (Inventions 1 to 9) or The step of laminating the adhesive layer of the three-dimensional multilayer volume circuit manufacturing plate (inventions 10 to 14) on the opposite side to the adhesive layer and bonding at least one side of the semiconductor wafer having a through electrode; Aforementioned semiconductor The wafer is cut simultaneously with the aforementioned adhesive layer of the aforementioned three-dimensional bulk-layer circuit manufacturing plate, so that the semiconductor wafer with the adhesive layer becomes a step of singulation; a plurality of the aforementioned adhesives are singulated. A step of obtaining a semiconductor wafer laminate by stacking a plurality of semiconductor wafers in such a manner that the through electrodes are electrically connected to each other and the adhesive layer and the semiconductor wafer are alternately arranged to obtain a semiconductor wafer laminate; and A step in which the aforementioned adhesive layer of the body is hardened, and the aforementioned semiconductor wafers constituting the aforementioned semiconductor wafer laminate are adhered to each other (Invention 15).

When the plate for manufacturing a three-dimensional multi-layered circuit of the present invention is used, the connection resistance between semiconductor wafers is not easily changed, and a three-dimensional multi-layered circuit with high reliability can be manufactured. When the manufacturing method of the present invention is used, it is possible to manufacture such a three-dimensional product volume layer circuit.

1、2‧‧‧Three-dimensional multi-layer circuit board manufacturing

11‧‧‧ Substrate

12‧‧‧ Adhesive layer

13‧‧‧ Adhesive layer

14‧‧‧ peeling sheet

FIG. 1 is a cross-sectional view of a plate for manufacturing a three-dimensional multi-layer bulk-layer circuit according to the first embodiment of the present invention.

Fig. 2 is a cross-sectional view of a plate for manufacturing a three-dimensional multi-layer bulk circuit in a second embodiment of the present invention.

[Forms for Implementing Invention]

Hereinafter, embodiments of the present invention will be described.

[Three-dimensional product volume layer circuit manufacturing plate]

FIG. 1 is a diagram showing the manufacturing of a three-dimensional multi-layer volume layer circuit of the first embodiment. Sectional view of plate 1. As shown in FIG. 1, the three-dimensional bulk-layer circuit manufacturing plate 1 (hereinafter referred to as “manufacturing plate 1”) of the present embodiment is provided with an adhesive layer 13 and a layer laminated thereon. The release sheet 14 is adhered to at least one side of the adhesive layer 13. The release sheet 14 may be omitted.

Fig. 2 is a cross-sectional view showing a plate 2 for manufacturing a three-dimensional multi-layered bulk circuit of the second embodiment. As shown in FIG. 2, the plate 2 for manufacturing a three-dimensional multilayer volume circuit for the present embodiment (hereinafter, referred to as a “manufacturing plate 2”) is provided with a base material 11 and laminated on the base material. An adhesive layer 12 on at least one side of 11 and an adhesive layer 13 laminated on the adhesive layer 12 on the side opposite to the substrate 11. In addition, the release sheet 14 may be laminated on the surface of the adhesive layer 13 opposite to the adhesive layer 12.

In the plate 2 for manufacturing a three-dimensional bulk-layer circuit of the second embodiment, the laminated body composed of the base material 11 and the adhesive layer 12 may be a dicing sheet. In this case, a manufacturing plate The sheet 2 is a cutting plate integrated type bonding sheet. The laminated body may be a back grinding sheet. In this case, the manufacturing sheet 2 is a back grinding sheet-integrated type bonding sheet.

The plates 1 and 2 for manufacturing the three-dimensional multi-layered circuit of this embodiment are interposed between a plurality of semiconductor wafers having a through electrode. In order to connect the plurality of semiconductor wafers to each other and form a three-dimensional multi-layered circuit, use. One or both ends of the through electrode may also protrude from the surface of the semiconductor wafer. The semiconductor wafer may further include a bump, and in this case, the bump may be provided at one end or both ends of the through electrode.

Adhesive layer

(1) Physical properties

In the three-dimensional multi-layer circuit board 1 and 2 of this embodiment, the adhesive layer 13 is hardenable. Here, the term “having a hardening property” means that the adhesive layer 13 can be hardened by heating or the like. That is, the adhesive layer 13 is unhardened in the state which comprises the manufacturing plates 1 and 2. The adhesive layer 13 may be thermosetting or energy ray-curable. However, the adhesive layer 13 is preferably thermosetting because it can harden well when the manufacturing plates 1 and 2 are used in a laminated circuit manufacturing method. Specifically, when the manufacturing plates 1 and 2 are used in a manufacturing method of a laminated circuit, as will be described later, the adhesive layer 13 is singulated in a state of being attached to a semiconductor wafer. Thereby, a laminated body of the semiconductor wafer and the individualized adhesive layer 13 can be obtained. In this multilayer system, the surface on the side of the adhesive layer 13 is a laminated body attached to a semiconductor wafer, and the adhesive layer 13 is hardened in this state. In general, semiconductor wafers do not have transmittance to energy rays, or in most cases, the transmittance is very low. Even in this case, if the adhesive layer 13 has thermosetting properties, the adhesive layer 13 can be quickly made. To harden.

(1-1) Melt viscosity

In the three-dimensional bulk-layer circuit manufacturing plates 1 and 2 of this embodiment, the melt viscosity of the material constituting the adhesive layer 13 before curing at 90 ° C (hereinafter referred to as "90 ° C melt viscosity") , Its upper limit is 5.0 × 10 ⁵ Pa. s or less, preferably 1.0 × 10 ⁵ Pa. Below s, particularly preferred is 5.0 × 10 ⁴ Pa. s or less. When the melt viscosity at 90 ° C is equal to or less than the above upper limit value, when the adhesive layer 13 is interposed between the electrodes, the unevenness on the surface of the semiconductor wafer due to the penetration electrode or the bump can be well followed, and the semiconductor wafer can be prevented. A void is generated at the interface with the adhesive layer 13. The lower limit of the melt viscosity at 90 ° C is 1.0 × 10 ⁰ Pa. s or more, preferably 1.0 × 10 ¹ Pa. Above s, particularly preferred is 1.0 × 10 ² Pa. s or more. When the melt viscosity at 90 ° C. is equal to or more than the above-mentioned lower limit value, the material constituting the adhesive layer 13 does not flow excessively, and contamination of the device can be prevented when the adhesive layer 13 is attached or the semiconductor wafer is laminated. Therefore, the three-dimensional multi-layer bulk layer circuit manufacturing plates 1 and 2 of this embodiment are those having a higher reliability because the constituent material has a 90 ° C melt viscosity within the above range.

Here, the 90 ° C. melt viscosity of the material constituting the adhesive layer 13 is a value measured using a flow tester, and a detailed test method is as shown in Examples described later.

(1-2) Average linear expansion coefficient

In this embodiment, the material constituting the adhesive layer 13 has an average linear expansion coefficient (hereinafter referred to as the "average linear expansion coefficient" for short) of the hardened material at 0 to 130 ° C, and its upper limit value is 45 ppm or less. It is preferably 35 ppm or less, and particularly preferably 25 ppm or less. When the average linear expansion coefficient is equal to or less than the above-mentioned upper limit value, the difference between the linear expansion coefficient of the adhesive layer 13 and the semiconductor wafer composed of the hardened material becomes small. Based on this difference, the gap between the adhesive layer 13 and the semiconductor wafer can be reduced. Possible stress. As a result, the three-dimensional bulk-layer circuit manufacturing plates 1 and 2 of this embodiment can make the connection reliability of semiconductor wafers higher, especially the temperature cycle test shown in the example, which shows that High connection reliability.

On the other hand, the lower limit value of the average linear expansion coefficient is not particularly limited, and from the viewpoint of film formability, it is preferably 5 ppm or more, and more preferably 10 ppm or more.

Here, the average linear expansion coefficient of the material constituting the adhesive layer 13 is a value measured using a thermomechanical analysis device, and a detailed test method is as shown in Examples described later.

(1-3) Glass transition temperature

In this embodiment, the lower limit of the glass transition temperature (Tg) of the material constituting the adhesive layer 13 is preferably 150 ° C or higher, more preferably 200 ° C or higher, and 240 ° C or higher. good. When the glass transition temperature of the cured product is equal to or higher than the above-mentioned lower limit value, it is preferable because the cured product does not deform and does not easily generate stress during the temperature cycle test. On the other hand, the upper limit of the glass transition temperature of the hardened material is not particularly limited. From the viewpoint of suppressing embrittlement of the hardened material, it is preferably 350 ° C or lower, and more preferably 300 ° C or lower.

Here, the glass transition temperature of the hardened material of the material constituting the adhesive layer 13 is a dynamic viscoelasticity measuring device (manufactured by TA Instruments, DMA Q800) at a frequency of 11 Hz, an amplitude of 10 μm, and a heating rate of 3 ° C./minute. The temperature at which the temperature was raised from 0 ° C to 300 ° C and the maximum point of tan δ (loss modulus / storage modulus) at the time of viscoelasticity in the tensile mode was measured. The detailed test method of glass transition temperature is as shown in the Example mentioned later.

(1-4) 5% mass reduction temperature

In the three-dimensional bulk layer circuit manufacturing plates 1 and 2 of this embodiment, the hardened material of the material constituting the adhesive layer 13 is 5% by mass weight reduction temperature measured by thermogravimetry, which is preferably 350 ° C or higher. In particular, 360 ° C or higher is preferred. When the 5% mass reduction temperature is 350 ° C. or higher, the hardened material of the adhesive layer 13 is excellent in resistance to high temperatures. Therefore, even when the cured product is exposed to a high temperature during the manufacture of a multilayer circuit, the content of the cured product can be suppressed. The components are decomposed to generate volatile components and the like, and the performance of the multilayer circuit can be favorably maintained. The upper limit of the 5% mass reduction temperature is not particularly limited, but the 5% mass reduction temperature is usually preferably 500 ° C or lower. The measurement method of the 5% mass reduction temperature is as shown in the test examples described later.

(1-5) Storage modulus

In the three-dimensional bulk-layer circuit manufacturing plate 1 and 2 of this embodiment, the storage elastic modulus at 23 ° C. after the adhesive layer 13 is hardened is preferably 1.0 × 10 ² MPa or more, particularly 1.0 × 10 ³ MPa or more is preferred. The storage elastic modulus is preferably 1.0 × 10 ⁵ MPa or less, and particularly preferably 1.0 × 10 ⁴ MPa or less. With the storage elastic modulus in the above range, a laminated body obtained by alternately laminating a semiconductor wafer and an individualized adhesive layer 13 when manufacturing a laminated circuit has a good strength. As a result, even when the semiconductor wafer is further laminated or the laminated body is operated, the state of the laminated body can be maintained well, and a laminated circuit having excellent quality can be manufactured. The method for measuring the storage elastic modulus is as shown in the test examples described later.

(1-6) Fever onset temperature and Fever peak temperature by differential scanning calorimetry

In the three-dimensional bulk-layer circuit manufacturing plates 1 and 2 of this embodiment, the adhesive layer 13 before curing is measured by a differential scanning calorimetry (DSC) method at a heating rate of 10 ° C / min. The exothermic onset temperature (TS) is preferably in the range of 70 ° C to 150 ° C, particularly in the range of 100 ° C to 150 ° C, and further preferably in the range of 120 ° C to 150 ° C. When the heat generation starting temperature (TS) is in the above range, for example, it is possible to suppress generation of the adhesive layer 13 at an unintended stage when receiving heat generated when the semiconductor wafer is cut using a dicing blade. It is hardened, and the storage stability of the manufacturing plates 1 and 2 is also excellent. In particular, in order to manufacture a laminated circuit, after a plurality of semiconductor wafers are laminated, a plurality of layers of the adhesive layer 13 existing between the semiconductor wafers are collectively hardened, and it is possible to suppress unintended before the completion of the semiconductor wafer lamination. This stage causes the adhesive layer 13 to harden.

In the three-dimensional bulk layer circuit manufacturing plates 1 and 2 of this embodiment, the adhesive layer 13 before curing is measured by a differential scanning calorimetry (DSC) method at a heating rate of 10 ° C / min. The fever peak temperature (TP) is preferably the fever start temperature (TS) + 5 ~ 60 ° C, especially TS + 5 ~ 50 ° C, and more preferably TS + 10 ~ 40 ° C. When the heat generation peak temperature (TP) is in the above range, when the adhesive layer 13 is hardened, the time from the start to completion of the hardening becomes shorter. Generally, when a laminated circuit is manufactured using an NCF adhesive, it takes time to harden the adhesive. Therefore, the tact time in the manufacture of the multilayer circuit is mostly determined in accordance with the curing time of the adhesive. Therefore, as described above, since the time until the adhesive layer 13 is hardened is short, the production work time can be effectively shortened. In particular, when manufacturing a multilayer circuit, in order to improve the efficiency of the process, after laminating (temporarily placing) a plurality of semiconductor wafers, a plurality of layers of the adhesive layer 13 existing between the semiconductor wafers are finally hardened. Even in this case, by setting the heating peak temperature (TP) to the above-mentioned range, it is possible to prevent an adhesive layer existing between the semiconductor wafers laminated at the beginning of the process from occurring in an unintended stage before the semiconductor wafers are laminated. 13 produces hardening.

The measurement methods of the onset temperature and the peak temperature of heat generation by differential scanning calorimetry are shown in the test examples described later.

(1-7) thickness of adhesive layer, etc.

In the three-dimensional bulk-layer circuit manufacturing plates 1 and 2 of this embodiment, the thickness (T2) of the adhesive layer 13 is preferably 2 μm or more, particularly preferably 5 μm or more, and further preferably 10 μm or more. The thickness (T2) is preferably 500 μm or less, particularly 300 μm or less, and further preferably 100 μm or less. When the thickness (T2) of the adhesive layer 13 is 2 μm or more, the through-electrodes or bumps existing in the semiconductor wafer can be favorably buried in the adhesive layer 13. In addition, when the thickness (T2) of the adhesive layer 13 is 500 μm or less, when a semiconductor wafer having a through electrode is passed through the adhesive layer 13 and then bonded, the adhesive layer 13 does not excessively ooze on the side surface, and can be manufactured reliably High-performance semiconductor device. The thickness (T2) of the adhesive layer 13 is set to an average value when 100 points are measured at a total interval of 50 mm at the manufacturing sheet 1.

The standard deviation of the thickness (T2) of the three-dimensional bulk-layer circuit manufacturing plates 1 and 2 of the present embodiment is preferably 2.0 μm or less, and particularly preferably 1.8 μm or less, further It is preferably 1.6 μm or less. With this standard deviation of 2.0 μm or less, when the through-electrodes or bumps of the semiconductor wafer are embedded in the adhesive layer 13 using the manufacturing plates 1 and 2, it is possible to more reliably prevent the generation of voids and effectively Manufacture of good quality multilayer circuits with uniform thickness. In particular, since a laminated circuit is obtained by laminating a plurality of semiconductor wafers, it is difficult to uniformize the thickness of the laminated circuit. However, by using the standard deviation of the thickness of the adhesive layer 13 in the above-mentioned range, the manufacturing plate 1 is used. 2 and 2. When the through electrodes or bumps of the semiconductor wafer are buried in the adhesive layer 13, it is possible to more reliably prevent the generation of voids, and it is easy to obtain a multilayer circuit system having a uniform thickness. The standard deviation of the thickness (T2) of the adhesive layer 13 The method for measuring the difference is as shown in the test examples described later.

The ratio (T2 / T1) of the thickness (T2) of the adhesive layer 13 to the thickness (T1) of the substrate 11 in the three-dimensional bulk-layer circuit manufacturing sheet 2 having the second embodiment of the substrate 11 is It is preferably 0.01 or more, particularly preferably 0.1 or more, and further preferably 0.4 or more. The ratio (T2 / T1) is preferably 1.5 or less, particularly preferably 1.0 or less, and more preferably 0.9 or less. When the ratio (T2 / T1) is within the above range, the thickness balance between the substrate 11 and the adhesive layer 13 becomes good, and the workability when the manufacturing sheet 2 is attached to a semiconductor wafer is excellent, and at the same time, It is easy to adjust the applicability at the time of this application. As a result, the lamination can be performed well and a laminated circuit having excellent quality can be manufactured. In particular, when the ratio (T2 / T1) is 0.01 or more, the relative thickness of the substrate 11 in the manufacturing sheet 1 becomes smaller, and the relative rigidity of the manufacturing sheet 1 can be suppressed low. As a result, when attaching the manufacturing sheet 1 to a semiconductor wafer, it becomes easy to embed the penetration electrode or bump existing in the semiconductor wafer in the adhesive layer 13 system. On the other hand, when the ratio (T2 / T1) is 1.5 or less, the relative thickness of the substrate 11 in the manufacturing sheet 1 becomes larger, and the relative rigidity of the manufacturing sheet 1 can be maintained high. . As a result, the workability of the manufacturing sheet 1 is excellent, and the manufacturing sheet 1 can be easily attached to a semiconductor wafer. The thickness (T1) of the base material 11 is an average value when a total of 100 points are measured at a 50 mm interval between the manufacturing sheet 1.

(2) Materials

In this embodiment, the plates 1 and 2 for manufacturing the three-dimensional bulk volume circuit, and the adhesive layer 13 are made of a material that satisfies the aforementioned 90 ° C melt viscosity and average linear expansion coefficient.

(2-1) Thermosetting component

嗪樹脂、苯氧基樹脂等，該等能夠單獨使用1種或組合2種以上而使用。該等之中，從接著性等的觀點而言，係以環氧樹脂及酚樹脂為佳，以環氧樹脂為特佳。 The material constituting the adhesive layer 13 is preferably one containing a thermosetting component. The thermosetting component is not particularly limited as long as it is an adhesive component generally used for connection of semiconductor wafers. Specific examples include epoxy resin, phenol resin, melamine resin, urea resin, polyester resin, urethane resin, acrylic resin, polyimide resin, and benzo

A azine resin, a phenoxy resin, etc. can be used individually by 1 type or in combination of 2 or more types. Among these, epoxy resins and phenol resins are preferable, and epoxy resins are particularly preferable from the viewpoint of adhesiveness and the like.

烷等之分子內的碳-碳雙鍵藉由例如氧化而導入環氧基而成之所謂脂環型環氧化物。此外，亦能夠使用具有聯苯骨架、二環己二烯骨架、萘骨架等之環氧樹脂。該等環氧樹脂可單獨1種、或組合2種以上而使用。 Epoxy resins have the property of undergoing three-dimensional network formation upon heating to form a solid hardened product. As such an epoxy resin, various conventionally known epoxy resins can be used, and specific examples include phenols such as bisphenol A, bisphenol F, resorcinol, phenol novolac, and cresol novolac. Glycidyl ether; Glycidyl ethers of alcohols such as butanediol, polyethylene glycol, and polypropylene glycol; Rings of carboxylic acids such as phthalic acid, isophthalic acid, and tetrahydrophthalic acid Oxypropyl ether; epoxy-type or alkyl-epoxy-type epoxy resin in which active hydrogen bonded to a nitrogen atom such as aniline isocyanurate is substituted with glycidyl group; For example, vinyl cyclohexane diepoxide, 3,4-epoxycyclohexylmethyl-3,4-dicyclohexanecarboxylate, 2- (3,4-epoxy) cyclohexyl-5, 5-spiro (3,4-epoxy) cyclohexane-m-di

A carbon-carbon double bond in a molecule such as an alkane is a so-called alicyclic epoxide in which an epoxy group is introduced by oxidation, for example. In addition, an epoxy resin having a biphenyl skeleton, a dicyclohexadiene skeleton, a naphthalene skeleton, or the like can also be used. These epoxy resins can be used individually by 1 type or in combination of 2 or more types.

Among the above thermosetting components of the material constituting the adhesive layer 13 The content is based on the total amount of materials constituting the adhesive layer 13, and the lower limit value thereof is preferably 5% by mass or more, and more preferably 10% by mass or more. The upper limit of the content of the thermosetting component is preferably 75% by mass or less, and more preferably 55% by mass or less. When the content of the thermosetting component is in the above range, it becomes easy to adjust the aforementioned exothermic onset temperature and exothermic peak temperature to the aforementioned range.

(2-2) Hardener. Hardening catalyst

When the material constituting the adhesive layer 13 contains the aforementioned thermosetting component, it is preferable that the material further contains a curing agent and a curing catalyst.

The curing agent is not particularly limited, and examples thereof include phenols, amines, and thiols, and can be appropriately selected according to the type of the thermosetting component. For example, when an epoxy resin is used as the curable component, phenols are preferred from the viewpoint of reactivity with the epoxy resin and the like.

Examples of the phenols include bisphenol A, tetramethyl bisphenol A, diallyl bisphenol A, biphenol, bisphenol F, diallyl bisphenol F, triphenylmethane-type phenol, tetrakis Phenol, novolac-type phenol, cresol novolac resin, etc. can be used alone or in combination of two or more.

The curing catalyst is not particularly limited, and examples thereof include imidazole-based, phosphorus-based, amine-based, and the like, and they can be appropriately selected according to the types of the aforementioned thermosetting components and the like. As the hardening catalyst, it is preferable to use a latent hardening catalyst, which does not activate under predetermined conditions, but activates when it is heated to a temperature higher than the sticking temperature at which the solder melts. The latent curing catalyst is also preferably used as a microencapsulated latent curing catalyst.

For example, when epoxy resin is used as the hardening component, From the viewpoints of the reactivity, storage stability, physical properties, and curing speed of the oxyresin, it is preferable to use an imidazole-based curing catalyst as the curing catalyst. As an imidazole-based hardening catalyst, conventional materials can be used, but from the viewpoint of excellent hardenability, storage stability, and connection reliability, an imidazole catalyst having a triazine skeleton is preferred. These can be used individually or in combination of 2 or more types. Moreover, these can also be used as a microencapsulated latent hardening catalyst. The melting point of the imidazole-based hardening catalyst is preferably 200 ° C or higher, particularly 250 ° C or higher, from the viewpoints of excellent hardenability, storage stability, and connection reliability.

In this embodiment, the content of the hardening catalyst of the material constituting the adhesive layer 13 is based on the total amount of the material constituting the adhesive layer 13, and the lower limit value is preferably 0.1% by mass or more, and 0.2 A mass% or more is more preferred, and a mass of 0.4 mass% or more is particularly preferred. The upper limit of the content of the hardening catalyst is preferably 10% by mass or less, more preferably 5% by mass or less, and particularly preferably 3% by mass or less. When the material constituting the adhesive layer 13 has a content of the curing catalyst of at least the above-mentioned lower limit value, the thermosetting component can be sufficiently cured. On the other hand, when the content of the curing catalyst is equal to or less than the above-mentioned upper limit value, the storage stability of the adhesive layer 13 becomes good.

(2-3) High molecular weight ingredients

The material constituting the adhesive layer 13 is preferably a high molecular weight component other than the thermosetting component. By including the high molecular weight component, the 90 ° C. melt viscosity and the average linear expansion coefficient of the material easily meet the aforementioned numerical range.

Examples of the high molecular weight component include (meth) acrylic resins, phenoxy resins, polyester resins, polyurethane resins, polyimide resins, Polyamine imine resin, silicone modified polyimide resin, polybutadiene resin, polypropylene resin, styrene-butadiene-styrene copolymer, styrene-ethylene-butene-benzene Ethylene copolymer, polyacetal resin, polyvinyl acetal resin led by polyvinyl butyral resin, butyl rubber, chloroprene rubber, polyamide resin, acrylonitrile-butadiene copolymer, acrylonitrile -Butadiene-acrylic acid copolymer, acrylonitrile-butadiene-styrene copolymer, polyvinyl acetate, nylon, etc., and they can be used alone or in combination of two or more.

In addition, "(meth) acrylic acid" in this specification means both acrylic acid and methacrylic acid. The same applies to other similar terms such as "(meth) acrylic resin".

Among the high molecular weight components, it is preferable to use one or more members selected from the group consisting of a polyvinyl acetal resin, a polyester resin, and a phenoxy resin. The materials constituting the above-mentioned manufacturing sheet are made to contain these high molecular weight components, and both the 90 ° C. melt viscosity and the average linear expansion coefficient become lower values. As a result, the values become within the aforementioned numerical ranges. easily.

Here, the polyvinyl acetal resin is obtained by acetalizing polyvinyl alcohol using an aldehyde, and the polyvinyl alcohol is obtained by saponifying polyvinyl acetate. Examples of the aldehyde used in the acetalization include n-butyraldehyde, n-hexanal, and n-valeraldehyde. As the polyvinyl acetal resin, a polyvinyl butyral resin obtained by acetalization using n-butyraldehyde is also preferred.

Examples of the polyester resin include a polymer obtained by polycondensing a dicarboxylic acid component and a diol component such as polyethylene terephthalate resin, polybutylene terephthalate resin, and polyethylene oxalate resin. Ester resins; modification of urethane-modified polyester resins obtained by reacting polyisocyanate compounds with these Polyester resin; a polyester resin obtained by grafting an acrylic resin and / or a vinyl resin, etc., and can be used alone or in combination of two or more.

When the material constituting the adhesive layer 13 contains a polyvinyl acetal resin or a polyester resin as the high-molecular weight component, it is particularly preferable that the material further contains a phenoxy resin. When the phenoxy resin is further contained, the material constituting the adhesive layer 13 has a 90 ° C melt viscosity and an average linear expansion coefficient that more easily satisfy the aforementioned numerical range.

The phenoxy resin is not particularly limited, and examples thereof include bisphenol A type, bisphenol F type, bisphenol A / bisphenol F copolymerization type, biphenol type, and biphenyl type.

The lower limit of the softening point of the high molecular weight component is preferably 50 ° C or higher, more preferably 100 ° C or higher, and particularly preferably 120 ° C or higher. The upper limit of the softening point of the high molecular weight component is preferably 200 ° C or lower, more preferably 180 ° C or lower, and particularly preferably 150 ° C or lower. By including a high molecular weight component having a softening point of the above lower limit value or more, the average linear expansion coefficient of the material constituting the adhesive layer 13 can be reduced, and the aforementioned numerical range can be easily satisfied. When the softening point is equal to or less than the above-mentioned upper limit value, embrittlement of the adhesive layer 13 can be suppressed. The softening point is a value measured in accordance with ASTM D1525.

The lower limit of the glass transition temperature of the high molecular weight component is preferably 50 ° C or higher, more preferably 60 ° C or higher, and particularly preferably 80 ° C or higher. The upper limit of the glass transition temperature of the high molecular weight component is preferably 250 ° C or lower, more preferably 200 ° C or lower, and particularly preferably 180 ° C or lower. By containing a high molecular weight component having a glass transition temperature of the above lower limit value or more, the average linear expansion coefficient of the material constituting the adhesive layer 13 can be reduced, and it is easy to satisfy the former. The range of values stated. When the glass transition temperature is equal to or lower than the above upper limit, the compatibility with other materials becomes excellent. The glass transition temperature of the high molecular weight component is a value measured using a differential scanning calorimeter, and a specific measurement method is shown in Examples described later.

The weight average molecular weight of the high molecular weight component is preferably 10,000 or more, more preferably 30,000 or more, and particularly preferably 50,000 or more. The upper limit value is preferably 1 million or less, more preferably 700,000 or less, and particularly preferably 500,000 or less. When the weight-average molecular weight is equal to or more than the above-mentioned lower limit value, it is preferable because the melt viscosity can be reduced while maintaining the film forming property. When the weight-average molecular weight is equal to or less than the above-mentioned upper limit, it is preferable because the compatibility with low-molecular-weight components such as thermosetting components is improved. In addition, the weight average molecular weight in this specification is a standard polystyrene conversion value measured by the gel permeation chromatography (GPC) method.

The content of the high molecular weight component in the material constituting the adhesive layer 13 is based on the total amount of the material constituting the adhesive layer 13, and the lower limit value is preferably 3% by mass or more, and 5% by mass or more. More preferably, it is especially preferable that it is 7 mass% or more. The upper limit of the content of the high molecular weight component is preferably 95% by mass or less, more preferably 90% by mass or less, and particularly preferably 80% by mass or less. When the content of the high-molecular-weight component is greater than or equal to the above-mentioned lower limit value, the 90 ° C. melt viscosity of the material constituting the adhesive layer 13 can be made lower, and the aforementioned numerical range can be easily satisfied. On the other hand, when the content of the high-molecular-weight component is equal to or less than the above-mentioned upper limit value, the average linear expansion coefficient of the material constituting the adhesive layer 13 can be further reduced, and the aforementioned numerical range can be easily satisfied.

(2-4) Inorganic filler

The material constituting the adhesive layer 13 preferably contains an inorganic filler. The material constituting the adhesive layer 13 has a relatively low average linear expansion coefficient by containing an inorganic filler. Therefore, when the plates 1 and 2 for manufacturing a three-dimensional bulk volume circuit of this embodiment are used, the semiconductor wafer can be made. Mutual connection reliability becomes higher.

The inorganic filler that can be used in this embodiment is not particularly limited, and examples thereof include silicon oxide, aluminum oxide, glass, titanium oxide, mica, aluminum hydroxide, magnesium hydroxide, calcium carbonate, magnesium carbonate, calcium silicate, and silicic acid. Composite of magnesium, calcium oxide, magnesium oxide, aluminum oxide, aluminum nitride, aluminum borate whisker, boron nitride, crystalline silicon oxide, amorphous silicon oxide, mullite, cordierite, etc. These types of oxides, montmorillonite, smectite, etc. can be used alone or in combination of two or more. Among these, a silica filler is preferred. As for the shape of the silicon oxide filler, a spherical shape is preferable.

The inorganic filler is preferably one obtained by surface modification using a silane coupling agent or the like. When the inorganic filler is surface-modified, a bond can be formed between the filler and other components. As a result, the material constituting the adhesive layer 13 can be inhibited from thickening, the melt viscosity can be lowered, and the material can be further reduced. Coefficient of average linear expansion. The silane coupling agent is a silane having a hydrophobic functional group such as an alkyl group, a vinyl group, an acrylic fluorenyl group, a methacryl fluorenyl group, a phenyl group, or an amine phenyl group from the viewpoint of easily reducing the melt viscosity. Coupling agents are preferred.

The lower limit of the average particle diameter of the inorganic filler is preferably 10 nm or more, more preferably 20 nm or more, and particularly preferably 30 nm or more. The upper limit of the average particle diameter of the inorganic filler is preferably 200 nm or less. 150 nm or less is more preferred, and 100 nm or less is particularly preferred. When the average particle diameter of the inorganic filler is at least the above-mentioned lower limit value, it is possible to have both the transparency of the sheet and low melt viscosity. Moreover, when the average particle diameter of an inorganic filler is below the said upper limit, the 90 degreeC melt viscosity of the material which comprises the adhesive layer 13 can be maintained at a low value.

The maximum particle size of the inorganic filler is preferably 1000 nm or less, and more preferably 500 nm or less. When the maximum particle diameter of the inorganic filler is 1000 nm or less, it is easy to fill the inorganic filler into the adhesive layer 13. As a result, the average linear expansion coefficient of the material constituting the adhesive layer 13 easily satisfies the aforementioned numerical range, and can have both Plate transparency and low melt viscosity. In addition, since the maximum particle diameter of the inorganic filler is 1000 nm or less, it is easy to electrically connect the penetrating electrodes (or bumps provided at the ends of the penetrating electrode) of the laminated circuit with each other, and it is possible to efficiently produce the electrodes with high reliability. Layered circuit of sex.

The content of the inorganic filler in the material constituting the adhesive layer 13 is based on the total amount of the material constituting the adhesive layer 13. The lower limit value is preferably 35% by mass or more and 40% by mass or more. More preferably, it is more preferably 50% by mass or more. The upper limit of the content of the inorganic filler is preferably 64% by mass or less, more preferably 60% by mass or less, and particularly preferably 56% by mass. When the content of the inorganic filler of the material constituting the adhesive layer 13 is equal to or more than the above-mentioned lower limit value, the average linear expansion coefficient of the material can be further reduced, and the aforementioned numerical range can be easily satisfied. On the other hand, when the content of the inorganic filler is equal to or less than the above-mentioned upper limit value, the 90 ° C. melt viscosity of the material can be maintained at a low value, and the aforementioned numerical range is easily satisfied.

(2-5) Ingredients with flux function

In this embodiment, the through electrodes or bumps of the semiconductor wafer are soldered. When joining, the material constituting the adhesive layer 13 is preferably a component having a flux function (hereinafter sometimes referred to as a “flux component”). The flux component is a substance having a function of removing a metal oxide film formed on an electrode surface, can make the electrical connection between the electrodes by the solder more reliable, and can improve the connection reliability at the soldered portion.

The flux component is not particularly limited, and a component having a phenolic hydroxyl group and / or a carboxyl group is preferred, and a component having a carboxyl group is particularly preferred. The component having a carboxyl group has a flux function, and when a later-described epoxy resin is used as a thermosetting component, it also functions as a hardener. Therefore, the component having a carboxyl group is consumed as a hardener after the soldering is completed, so it is possible to suppress a defect caused by an excessive flux component.

Specific examples of the flux component include glutaric acid, 2-methylglutaric acid, o-antanilic acid, diphenolic acid, adipic acid, ossalic acid, benzoic acid, diphenylglycolic acid, Azelaic acid, benzylbenzoic acid, malonic acid, 2,2-bis (hydroxymethyl) propionic acid, salicylic acid, o-methoxybenzoic acid, m-hydroxybenzoic acid, succinic acid, 2,6- Dimethoxymethyl p-cresol, hydrazine benzoate, carbohydrazide, dihydrazine malonate, dihydrazine succinate, dihydrazine glutarate, hydrazine salicylate, imine diacetic acid Dihydrazine, dihydrazine iconate, trihydrazine citrate, thiocarbohydrazide, bezophenone hydrazone, 4,4'-oxodisulfenazine, adipic acid A hydrazine, a rosin derivative, etc. can be used individually by 1 type or in combination of 2 or more types.

Examples of the rosin derivative include gum rosin, tall rosin, wood rosin, polymerized rosin, hydrogenated rosin, methylated rosin, rosin ester, rosin-modified maleic acid resin, Rosin modified phenol resin, rosin modified Alkyd resin and so on.

Among these, it is particularly preferable to use at least one selected from the group consisting of 2-methylglutaric acid, adipic acid, and rosin derivatives. 2-methylglutaric acid and adipic acid are materials constituting the adhesive layer 13 and although they have a small molecular weight, they have two carboxyl groups in the molecule, so they have excellent flux function even when added in small amounts. This embodiment is particularly suitable for this embodiment. The rosin derivative has a high softening point, and can maintain a low linear expansion coefficient while imparting flux properties, and is therefore particularly suitable for this embodiment.

At least one of the melting point and the softening point of the flux component is preferably 80 ° C or higher, more preferably 110 ° C or higher, and more preferably 130 ° C or higher. When at least one of the melting point and the softening point of the flux component is within the above-mentioned range, it is preferable to obtain more excellent flux function and reduce exhaust gas. The upper limit of the melting point and softening point of the flux component is not particularly limited, and may be, for example, less than the melting point of the solder.

In this embodiment, the content of the flux component of the material constituting the adhesive layer 13 is based on the total amount of the material constituting the adhesive layer 13, and the lower limit thereof is preferably 1% by mass or more, and 3 A mass% or more is more preferable, and a mass% or more is particularly preferable. The upper limit of the content of the flux component is preferably 20% by mass or less, more preferably 15% by mass or less, and particularly preferably 10% by mass or less. When the material constituting the adhesive layer 13 and the content of the flux component is equal to or more than the above-mentioned lower limit value, the electrical connection between the electrodes by the solder can be made more reliable, and the connection reliability at the soldered portion can be further improved Sex. On the other hand, when the content of the flux component is equal to or less than the above-mentioned upper limit value, defects such as ion migration caused by the excessive flux component can be prevented.

(2-6) other ingredients

The adhesive layer 13 may further include a plasticizer, a stabilizer, an adhesion-imparting agent, a colorant, a coupling agent, an antistatic agent, an antioxidant, conductive particles, and the like as a material constituting the adhesive layer 13.

For example, when the material constituting the adhesive layer 13 contains conductive particles and can provide anisotropic conductivity to the three-dimensional bulk-layer circuit manufacturing plates 1 and 2, it may be in a state of supporting welding or in Unlike soldering, semiconductor wafers can be electrically connected to each other.

2. Adhesive layer

(1) Materials

In the plate 2 for manufacturing a three-dimensional bulk volume circuit of the second embodiment including the adhesive layer 12, the adhesive layer 12 may be made of a non-hardening adhesive or may be made of a hardening adhesive. As will be described later, when the three-dimensional multilayer bulk circuit circuit manufacturing sheet 2 of this embodiment is used in a multilayer circuit manufacturing method, the adhesive layer 13 is peeled from the laminated body of the substrate 11 and the adhesive layer 12. Therefore, from the viewpoint of facilitating the peeling, the adhesive layer 12 is preferably made of a hardening adhesive and the adhesive force is reduced by curing.

When the adhesive layer 12 is composed of a hardenable adhesive, the adhesive may be an energy ray hardenable adhesive or a thermosetting adhesive. Here, in order to harden the adhesive layer 12 and the adhesive layer 13 at different stages, when the adhesive layer 13 is thermosetting, the adhesive layer 12 is preferably composed of an energy ray-curable adhesive. When the agent layer 13 is energy ray-curable, the adhesive layer 12 is preferably composed of a thermosetting adhesive. However, since the adhesive layer 13 preferably has thermosetting properties for the reasons described above, The adhesive layer 12 is preferably composed of an energy ray-curable adhesive.

The non-hardening adhesive is preferably one having a required adhesive force and re-peelability. For example, an acrylic adhesive, a rubber adhesive, a silicone adhesive, or a urethane adhesive can be used. Agents, polyester-based adhesives, polyvinyl ether-based adhesives, and the like. Among these, from the viewpoint of effectively suppressing peeling at the interface between the adhesive layer 12 and the adhesive layer 13 at an unintended stage of the cutting step, an acrylic adhesive is preferred.

The energy ray-curable adhesive may include a polymer having energy ray curability as a main component, or a non-energy ray curable polymer (a polymer having no energy ray curability) and at least 1 A mixture of more than one type of monomer and / or oligomer having an energy ray-curable group is used as a main component. Also, it may be a mixture of an energy ray-curable polymer and a non-energy ray-curable polymer, or may be an energy ray-curable polymer and at least one or more monomers having an energy ray-curable group. A mixture of oligomers and / or oligomers may also be a mixture of these three types.

The polymer having energy ray curability is preferably a (meth) acrylate (co) polymer having a functional group (energy ray curable group) having energy ray curability introduced into a side chain. The polymer is preferably obtained by reacting an acrylic copolymer having a functional unit-containing monomer unit and an unsaturated group-containing compound having a functional group bonded to the functional group.

As the at least one or more of the monomers and / or oligomers having an energy ray-curable group, for example, an ester of a polyhydric alcohol and (meth) acrylic acid can be used.

As a non-energy-ray-curable polymer component, for example, An acrylic copolymer having the aforementioned functional group-containing polymer unit is used.

(2) Physical properties, etc.

In the plate 2 for manufacturing a three-dimensional bulk-layer circuit of the present embodiment, the storage elastic modulus of the adhesive layer 12 at 23 ° C. is preferably 1 × 10 ³ Pa or more, and 1 × 10 ⁴ Pa or more is special good. The storage elastic modulus is preferably 1 × 10 ⁹ Pa or less, and particularly preferably 1 × 10 ⁸ Pa or less. When the adhesive layer 12 is composed of a curable adhesive, the storage elastic modulus is set to the storage elastic modulus before curing. When the storage elastic modulus of the adhesive layer 12 at 23 ° C. is in the above range, when the manufacturing plate 2 is attached to the semiconductor wafer, the penetration electrodes or bumps existing in the semiconductor wafer can be well embedded. To the adhesive layer 13. In addition, when the non-bumped surface of the semiconductor wafer is polished on the back surface using the manufacturing plates 1 and 2, it is possible to suppress the semiconductor wafer from being warped or dimpled. The method for measuring the storage elastic modulus of the adhesive layer 12 at 23 ° C is as shown in the test example described later.

The thickness of the adhesive layer 12 is not particularly limited. For example, it is preferably 1 μm or more, and particularly preferably 10 μm or more. The thickness is, for example, preferably 100 μm or less, and particularly preferably 50 μm or less. When the thickness of the adhesive layer 12 is 1 μm or more, the adhesive layer 12 can exhibit good adhesion. In addition, when the thickness is 100 μm or less, the adhesive layer 12 can be prevented from becoming an unnecessary thickness, and the cost can be reduced.

3. Substrate

(1) Materials

As the material constituting the base material 11 in the three-dimensional multi-layer bulk-layer circuit manufacturing sheet 2 provided with the second embodiment of the base material 11, there is no particular limitation. but, When the manufacturing plate 2 is a cutting plate-integrated type bonding plate, the material constituting the base material 11 is preferably a material generally used for the base material constituting the cutting plate. Examples of the material of the substrate 11 include polyethylene, polypropylene, polybutene, polybutadiene, polymethylpentene, polyvinyl chloride, vinyl chloride copolymer, and polyethylene terephthalate. Ester, polybutylene terephthalate, polyurethane, ethylene vinyl acetate copolymer, ionic polymer, ethylene. (Meth) acrylic copolymer, ethylene. (Meth) acrylate copolymer, polystyrene, vinyl polyisoprene, polycarbonate, polyolefin, etc. Among these, one type or a mixture of two or more types can be used.

When the manufacturing plate 2 is a back-grinding plate integrated type bonding plate, the material constituting the base material 11 is preferably a material usually used for the base material constituting the back-grinding plate. Examples of the material of such a substrate 11 include polyethylene terephthalate, polyethylene, polypropylene, and ethylene. Among resins such as a vinyl acetate copolymer, one or a mixture of two or more of them can be used.

The surface on the side of the adhesive layer 12 of the base material 11 may also be subjected to surface treatments such as a primer treatment, a corona treatment, and a plasma treatment to improve the adhesion with the adhesive layer 12.

(2) Physical properties, etc.

In the plate 2 for manufacturing a three-dimensional bulk-layer circuit of this embodiment, the tensile elastic modulus of the substrate 11 at 23 ° C is preferably 100 MPa or more, particularly 200 MPa or more, and further 300 MPa or more. good. The tensile elastic modulus is preferably 5,000 MPa or less, particularly preferably 1000 MPa or less, and further preferably 400 MPa or less. By stretching the substrate 11 at 23 ° C The elastic modulus is within the above range, and when the manufacturing sheet 2 is attached to the semiconductor wafer, the penetration electrode or bump existing in the semiconductor wafer can be favorably buried in the adhesive layer 13. In addition, when the manufacturing sheet 2 is a cut-to-piece integrated type bonding sheet, the substrate 11 is stretched at 23 ° C. and the modulus of elasticity is within the above range, and the manufacturing sheet 2 is expanded to expand the semiconductor. When the wafers are spaced from each other, it is preferable because the substrate 11 is not easily broken. The method for measuring the tensile elastic modulus of the base material 11 at 23 ° C is as shown in the test example described later.

The thickness (T1) of the base material 11 is not particularly limited, and for example, it is preferably 10 μm or more, and particularly preferably 15 μm or more. The thickness (T1) is, for example, preferably 500 μm or less, and particularly preferably 100 μm or less. When the thickness (T1) of the substrate 11 is in the above range, the value of the ratio (T2 / T1) of the thickness (T2) of the adhesive layer 12 to the thickness (T1) of the substrate 11 can be easily set to the foregoing value. Range, and has excellent operability when attaching manufacturing plates 1 and 2 to a semiconductor wafer. As a result, it is possible to efficiently manufacture a multilayer circuit having excellent quality.

4. Peel off the sheet

The configuration of the release sheet 14 is arbitrary, and examples thereof include polyester films such as polyethylene terephthalate, polybutylene terephthalate, and polyethylene naphthalate, polypropylene, polyethylene, and the like. Plastic film such as polyolefin film. Such a release surface (a surface in contact with the adhesive layer 13) is preferably subjected to a release treatment. Examples of the release agent used in the release treatment include a release agent such as a silicone-based, fluorine-based, or long-chain alkyl-based release agent.

The thickness of the release sheet is not particularly limited, but is usually 20 μm or more and 250 μm or less.

5. Manufacturing method of plate for manufacturing three-dimensional product volume layer circuit

The three-dimensional bulk-layer circuit manufacturing sheet 1 of the first embodiment can be manufactured in the same manner as the conventional three-dimensional bulk-layer circuit manufacturing sheet. For example, when manufacturing the three-dimensional bulk-layer circuit manufacturing sheet 1 provided with the peeling sheet 14, a coating solution containing a material constituting the adhesive layer 13 and a solvent or a dispersion medium as required can be prepared, This coating liquid is applied to the release surface of the release sheet 14 using a die coater, a curtain coater, a spray coater, a slit coater, a blade coater, or the like to form a coating film so that This coating film is dried, and the manufacturing sheet 2 is manufactured. The properties of the coating liquid system are not particularly limited as long as the coating liquid can be applied, and the components for forming the adhesive layer 13 may be contained as a solute or may be contained as a dispersant. The release sheet 14 may be peeled as a process material, and the adhesive layer 13 may be protected until it is attached to the semiconductor wafer.

In addition, as a method for producing a laminated body in which two layers of release sheets 14 are laminated on both sides of the three-dimensional multilayer circuit manufacturing sheet 1, a coating solution can be applied to the aforementioned release sheet 14. A coating film is formed on the peeling surface, and it is dried to form a laminate composed of the adhesive layer 13 and the release sheet 14. The laminate is applied to the surface of the adhesive layer 13 which is opposite to the release sheet 14 and is applied. It is attached to the release surface of the other release sheet 14 to obtain a laminated body composed of the release sheet 14 / adhesive layer 13 / release sheet 14. The release sheet 14 of the laminate may be peeled as a process material, and the adhesive layer 13 may be protected until it is attached to the semiconductor wafer.

The plate 2 for manufacturing a three-dimensional bulk-layer circuit of the second embodiment can be manufactured in the same manner as the plate 2 for manufacturing a three-dimensional bulk-layer circuit. For example, the adhesive layer 13 and the release sheet 14 can be manufactured separately. The laminated body and the laminated body of the adhesive layer 12 and the base material 11 are laminated such that the adhesive layer 13 and the adhesive layer 12 are in contact with each other to obtain a manufacturing sheet 2.

The laminated body of the adhesive layer 13 and the release sheet 14 can be prepared by applying the aforementioned coating solution to form the adhesive layer 13 and applying the aforementioned coating method to the release surface of the release sheet 14. A coating film is formed, and this coating film is dried and obtained.

Examples of the solvent include organic solvents such as toluene, ethyl acetate, and methyl ethyl ketone. By formulating these organic solvents to a solution having an appropriate solid content concentration, the thickness (T2) deviation of the adhesive layer 13 can be suppressed, and the adhesive layer 13 having the aforementioned standard deviation is easily formed for the thickness (T2). . From the viewpoint of uniformly applying the coating liquid, the solid content concentration of the coating liquid is particularly preferably 5% by mass or more, and particularly preferably 10% by mass or more. From the same viewpoint, the solid content concentration is preferably 55% by mass or less, and more preferably 50% by mass or less. When the solid content concentration is 5% by mass or more, it is possible to suppress the occurrence of shrinkage and the like when forming the coating film, and at the same time, it is easy to sufficiently dry the solvent, and it is easier to suppress the thickness and the physical property deviation of the adhesive layer 13. In addition, when the solid content concentration is 55% by mass or less, it is possible to suppress the agglomeration of the filler in the coating liquid, facilitate the feeding of the coating liquid, and suppress the continuous generation of coating in a direction perpendicular to the coating direction. The cloth is uneven (transverse wave-like unevenness), and the occurrence of thickness deviation of the adhesive layer 13 can be suppressed. The viscosity of the coating liquid at 25 ° C measured with a B-type viscometer was 20 mPa. Above s is preferred, especially 25mPa. Above s is preferred. The viscosity is 500 mPa. Below s is preferred, especially 100mPa. The following s is preferred.

The laminated body of the adhesive layer 12 and the base material 11 can be prepared by preparing a coating liquid containing a material constituting the adhesive layer 12 and further containing a solvent or a dispersion medium as required, and applying the coating solution in accordance with the aforementioned coating method. A coating film is formed on one surface of the base material 11, and the coating film is obtained by drying. As another method for manufacturing a laminated body of the adhesive layer 12 and the base material 11, the adhesive layer 12 is formed on a release surface of a release sheet for a manufacturing process, and then the adhesive layer 12 is transferred to the base material. On one side of 11, the release sheet for a process is peeled from the adhesive layer 12 to obtain a laminated body of the adhesive layer 12 and the substrate 11.

[Manufacturing method of three-dimensional product volume layer circuit]

By using the three-dimensional multi-layered circuit manufacturing plates 1 and 2 of this embodiment, a three-dimensional multi-layered circuit can be manufactured. An example of the manufacturing method will be described below.

First, the three-dimensional bulk-layer circuit manufacturing plates 1 and 2 of this embodiment are attached to one side of a semiconductor wafer having a through electrode. Specifically, the surface on the side of the adhesive layer 13 of the three-dimensional bulk-layer circuit manufacturing plates 1 and 2 is attached to one surface of the semiconductor wafer. Here, the melt viscosity of the material constituting the adhesive layer 13 before curing at 90 ° C is 1.0 × 10 ⁰ to 5.0 × 10 ⁵ Pa. s, therefore, the plates 1 and 2 for manufacturing three-dimensional multi-layered multilayer circuits of this embodiment can well follow the unevenness caused by the through electrodes of the semiconductor wafer, and can suppress the generation of voids at the interface between the adhesive layer 13 and the semiconductor wafer. .

In addition, a semiconductor wafer having a through electrode may be weak. Therefore, the semiconductor wafer can be reinforced by being fixed to a support such as a support glass through a temporary fixing material. At this time, after the surface on the semiconductor wafer side of the multilayer body is bonded to the three-dimensional stacked volume circuit manufacturing plates 1 and 2, the support and the temporary fixing material are peeled off at the same time.

When the plate 1 for manufacturing a three-dimensional stacked bulk layer circuit of this embodiment is used, the cutting plate is further laminated. At this time, a dicing sheet may be attached to the semiconductor wafer, and then the manufacturing sheet 1 may be attached to a surface of the semiconductor wafer on the side opposite to the dicing sheet. Alternatively, a manufacturing wafer 1 may be attached to a semiconductor wafer, and then a dicing wafer may be attached to a surface of the semiconductor wafer opposite to the manufacturing wafer 1. Alternatively, the dicing sheet may be attached to the side of the manufacturing sheet 1 for a laminated body obtained by attaching the manufacturing sheet 1 to a semiconductor wafer. On the other hand, in the case of using the three-dimensional stacked bulk layer circuit manufacturing sheet 2 of the second embodiment, it is not necessary to further laminate the cutting sheets, and the following cutting steps can be performed on the manufacturing sheet 2.

Next, the semiconductor wafer is cut into individual wafers (dicing step). At this time, at the same time as the semiconductor wafer is cut, the adhesive layer 13 is also cut. The method of cutting the wafer is not particularly limited, and can be performed using various conventionally known cutting methods. For example, the method of cutting a semiconductor wafer using a dicing blade is mentioned. Alternatively, other cutting methods such as laser cutting may be used.

After the dicing step, the semiconductor wafer is picked up. At this time, the semiconductor wafer is picked up in a state where the singulated adhesive layer 13 is attached. That is, the semiconductor wafer to which the adhesive layer 13 is attached is peeled off from the adhesive layer of the dicing sheet or the adhesive layer 12 of the three-dimensional bulk layer circuit manufacturing sheet 2. When the adhesive layer 12 is composed of an energy ray-curable adhesive, it is preferable to irradiate the adhesive layer 12 with energy rays before picking up. Thereby, since the adhesive force of this adhesive agent is low, it becomes easy to pick up a semiconductor wafer. In addition, if necessary, before picking up, the expanded cutting plate or the three-dimensional multi-layer volume circuit manufacturing plate 2 is used to expand the interval between the semiconductor wafers.

Next, the semiconductor wafer with the adhesive layer was placed on a circuit board. The semiconductor wafer with the adhesive layer is placed on the circuit substrate so that the electrodes on the semiconductor wafer side and the electrodes on the circuit substrate face each other.

Next, the semiconductor wafer and the circuit board with the adhesive layer are heated. After pressurizing, cooling is performed. Thereby, the semiconductor wafer and the circuit substrate are bonded through the adhesive layer 13, and the electrodes of the semiconductor wafer and the electrodes on the wafer mounting portion of the circuit substrate are electrically bonded through solder bumps formed on the semiconductor wafer. The welding conditions also depend on the metal composition used. For example, when Sn-Ag is used, it is better to heat at 200 to 300 ° C for 1 to 30 seconds.

After soldering, the adhesive layer 13 between the semiconductor wafer and the circuit board is hardened. The hardening system can be performed, for example, by heating at 100 to 200 ° C for 1 to 120 minutes. Such a hardening step may be performed under pressure. In addition, in the case where the hardening of the adhesive layer 13 is completed in the aforementioned welding step, such a hardening step may be omitted.

Next, a semiconductor wafer with a new adhesive layer is laminated on the semiconductor wafer adhered to the circuit substrate as described above. At this time, the surface of the new semiconductor wafer with the adhesive layer on the side of the adhesive layer 13 and the surface of the semiconductor wafer laminated on the circuit substrate on the side opposite to the circuit substrate are contacted, and two The through electrodes of the semiconductor wafer are laminated in such a manner that they are electrically connected to each other. Subsequently, soldering is performed between the through electrodes of the newly laminated semiconductor wafer and the through electrodes of the semiconductor wafer laminated on the circuit substrate, and the adhesive layer 13 interposed between these semiconductor wafers is hardened. The welding and hardening of the adhesive layer 13 at this time can be performed using the method and conditions described above. Thereby, a laminated body in which two semiconductor wafers are laminated on a circuit board can be obtained.

Repeating the steps of laminating a semiconductor wafer with an adhesive layer, soldering, and curing the adhesive layer 13 on the semiconductor wafer laminated on the circuit substrate as described above, the cured product of the adhesive layer 13 can be obtained. A laminated circuit formed by a plurality of semiconductor wafers. In such a laminated circuit, since the average linear expansion coefficient of the cured product of the adhesive layer 13 is 45 ppm or less, it is possible to suppress stress from occurring between the semiconductor wafer and the cured product of the adhesive layer 13. Therefore, even if a long-term reliability test such as a temperature cycle test is provided, the connection resistance at the connection portion is not likely to change, and it becomes a person with high reliability.

Furthermore, in the method for manufacturing a multilayer circuit described above, one semiconductor wafer is laminated for each layer, and soldering and curing of the adhesive layer 13 are performed. However, in order to improve the efficiency of the process, a plurality of semiconductor wafers may be laminated. Finally, the welding between the semiconductor wafers and the hardening of the adhesive layer 13 between the semiconductor wafers are collectively performed.

The embodiments described above are described for easy understanding of the present invention, and are not described to limit the present invention. Therefore, each element disclosed in the above-mentioned embodiment is intended to include all design changes and equivalents belonging to the technical scope of the present invention.

[Example]

Hereinafter, the present invention will be described in more detail by revealing examples, test examples, and the like, but the present invention is not limited at all by the following test examples and the like.

[Examples 1 to 5, Comparative Example 1]

A composition containing the constituent components shown in Table 1 was diluted with methyl ethyl ketone so that the solid content concentration became 40% by mass to obtain a coating liquid. use The viscosity of the coating solution at a temperature of 25 ° C was 50 mPa with a B-type viscometer. s. This coating solution was coated on a silicone-treated release film (manufactured by LINTEC, SP-PET381031), and the obtained coating film was dried in an oven at 100 ° C. for 1 minute to obtain a thickness of 45 μm. The first laminated body composed of an adhesive layer and a release film.

100 parts by mass of an acrylic copolymer (weight average molecular weight: 700,000) (solid) obtained by copolymerizing 80 parts by mass of 2-ethylhexyl acrylate, 10 parts by mass of methyl acrylate, and 10 parts by mass of 2-hydroxyethyl acrylate Component conversion value; the same applies hereinafter), and 10 parts by mass of an isocyanate-based crosslinking agent (manufactured by Polyurethane Industries, CORONATE L) was mixed to prepare an adhesive composition.

The adhesive composition obtained as described above was applied to one surface of an ethylene-methacrylic acid copolymer (EMAA) film (thickness: 100 μm) as a base material to form a coating film. Subsequently, the coating film was dried at 100 ° C for 1 minute. Thereby, a second laminated body composed of an adhesive layer with a thickness of 10 μm and a substrate was obtained.

Next, a surface of the first multilayer body on the adhesive layer side and a surface of the second multilayer body on the adhesive layer side were bonded to obtain a three-dimensional bulk volume circuit manufacturing plate.

[Example 6]

The first laminated body was produced using a composition containing the constituent components shown in Table 1, and was produced three times in the same manner as in Example 1 except that polyethylene terephthalate (thickness: 100 μm) was used as the substrate. Element volume layer circuit manufacturing plate.

[Example 7]

A composition containing the constituent components shown in Table 1 was prepared using methyl ethyl ketone to It diluted so that solid content concentration might become 40 mass%, and obtained the coating liquid. The viscosity of the coating liquid at 25 ° C was 150 mPa using a B-type viscometer. s. An adhesive layer was formed using this coating solution, and the thickness of the substrate was changed as described in Table 2. Except that the same procedure as in Example 1 was performed to obtain a plate for manufacturing a three-dimensional bulk volume circuit. .

[Comparative Example 2]

A composition containing the constituent components shown in Table 1 was diluted with methyl ethyl ketone so that the solid content concentration became 55% by mass to obtain a coating liquid. The viscosity of the coating liquid at 25 ° C was 150 mPa using a B-type viscometer. s. Except having used this coating liquid to form an adhesive bond layer, it carried out similarly to Example 1, and obtained the board | substrate for manufacture of a three-dimensional bulk volume circuit.

[Comparative Example 3]

A composition containing the constituent components shown in Table 1 was diluted with methyl ethyl ketone so that the solid content concentration became 55% by mass to obtain a coating liquid. The viscosity of the coating liquid at 25 ° C was 150 mPa using a B-type viscometer. s. An adhesive layer was formed using this coating solution, and the thickness of the substrate was changed as described in Table 2. Except that the same procedure as in Example 1 was performed to obtain a plate for manufacturing a three-dimensional bulk volume circuit. .

The details of the constituent components shown in Table 1 are as follows.

High molecular weight ingredients

． Polyethylene acetal resin: glass transition temperature 86 ° C, weight average molecular weight 130,000

． Polyvinyl butyral resin: glass transition temperature 71 ° C, weight average molecular weight 110,000

． Polyester resin: glass transition temperature 83 ° C, weight average molecular weight 40,000

． Bisphenol A (BisA) type phenoxy resin: glass transition temperature of 84 ° C, weight average molecular weight 60,000

． Bisphenol A (BPA) / Bisphenol F (BPF) copolymerized phenoxy resin: manufactured by Toto Kasei Co., Ltd., product name "ZX-1356-2", glass transition temperature of 71 ° C, weight average molecular weight 60,000

． Polyacrylate: glass transition temperature -28 ° C, weight average molecular weight 800,000

Thermosetting component

． Bisphenol A (BisA) epoxy resin: epoxy equivalent 180-190g / eq

． Epoxy resin 1: Ginseng (hydroxyphenyl) methane type solid epoxy resin, manufactured by JAPAN EPOXY RESINS, product name "E1032H60", 5% weight reduction temperature 350 ° C, solid, melting point 60 ° C

． Epoxy resin 2: Bis-F type liquid epoxy resin, manufactured by JAPAN EPOXY RESINS, product name "YL-983U", epoxy equivalent 184

． Epoxy resin 3: Long chain Bis-F modified epoxy resin, made by JAPAN EPOXY RESINS, product name "YL-7175"

． Triphenylmethane type epoxy resin: Triphenylmethane type epoxy resin, manufactured by Nippon Kayaku Co., Ltd., product name "EPPN-502H", epoxy equivalent 168

Hardening catalyst

． 2PHZ-PW: 2-phenyl-4,5-dimethylol imidazole, manufactured by Shikoku Chemical Industry Co., Ltd., product name "2PHZ-PW", melting point 230 ° C

． 2MZA-PW: 2,4-diamino-6- [2'-methylimidazolyl- (1 ')]-ethyl-s-triazine, manufactured by Shikoku Chemical Industry Co., Ltd., product name "2MZA-PW ", Melting point 250 ℃ Flux composition

． 2-methylglutaric acid: manufactured by Wako Pure Chemical Industries, Ltd., melting point 80 ~ 82 ° C

． Adipic acid: manufactured by Wako Pure Chemical Industries, Ltd., melting point 152 ° C

． Rosin derivative: manufactured by Arakawa Chemical Industries, softening point: 124 ~ 134 ℃

Inorganic filler

． Surface-modified silicon oxide filler: ADMATECHS, product name "ADMANANO", average particle size 100nm, maximum particle size 450nm

Here, the glass transition temperature (Tg) of the high molecular weight component is measured using a DSC (PYRIS Diamond DSC) manufactured by Perkinelmer at a temperature rise and fall rate of 10 ° C / min. Confirm the point of inflection to obtain the glass transition temperature. The weight-average molecular weight (Mw) of the above constituents is a standard polystyrene-equivalent weight measured using a gel permeation chromatography device (manufactured by TOSOH Corporation, HLC-8020) under the following conditions (GPC measurement). Average molecular weight.

<GPC measurement conditions>

． Tube column: "TSK guard column HXL-L", "TSK gel G2500HXL", "TSK gel G2000HXL", "TSK gel G1000HXL" (Either are manufactured by TOSOH)

． Column temperature: 40 ℃

． Development solvent: tetrahydrofuran

． Flow rate: 1.0mL / min

． Detector: Differential refractometer

． Standard sample: polystyrene

[Test Example 1] Measurement of 90 ° C melt viscosity

By using the first laminates produced in the examples and comparative examples, a plurality of adhesive layers were laminated to produce a measurement sample having a thickness of 15 mm. About the obtained measurement sample, the melt viscosity was measured using the flow tester (made by Shimadzu Corporation, CFT-100D) under the conditions of a load of 50 kgf, a temperature range of 50 to 120 ° C, and a temperature increase rate of 10 ° C / min. Table 2 shows the values of the melt viscosity at 90 ° C.

[Test Example 2] Measurement of average linear expansion coefficient

The 1st laminated body manufactured by the Example and the comparative example was cut into 15 * 4.5 mm, and it was set as the sample for a measurement. The obtained sample was treated at 160 ° C for 1 hour to harden the adhesive layer. With respect to the obtained hardened material, a thermomechanical analysis device (manufactured by Bruker AXS, TMA4030SA) was used to measure the coefficient of linear expansion under conditions of a load of 2 g, a temperature range of 0 to 300 ° C, and a temperature increase rate of 5 ° C / min. From the obtained results, an average linear expansion coefficient of 0 to 130 ° C was calculated. The results are shown in Table 2.

[Test Example 3] Measurement of glass transition temperature of hardened material

The 1st laminated body manufactured by the Example and the comparative example was cut | disconnected to 5x20 mm, and it was set as the sample for a measurement. The obtained sample was treated at 160 ° C for 1 hour to harden the adhesive layer. The obtained cured product was measured using a dynamic viscoelasticity measuring device (manufactured by TA Instruments, DMA Q800) at a frequency of 11 Hz and an amplitude of 10 μm, and the temperature was raised from 0 ° C. to 300 ° C. at a heating rate of 3 ° C./minute. Based on the viscoelasticity obtained in the tensile mode, the temperature at the maximum point of tan δ (loss elastic modulus / storage elastic modulus) obtained from the measurement was taken as the glass transition temperature (Tg). The measurement results are shown in Table 2.

[Test Example 4] Measurement of 5% mass reduction temperature

The 1st laminated body manufactured by the Example and the comparative example was cut into 15 * 4.5 mm, and it was set as the sample for a measurement. The obtained sample was treated at 160 ° C for 1 hour to harden the adhesive layer. Regarding the obtained hardened material, differential heat was used in accordance with JIS K7120: 1987. Simultaneous thermogravimetric measurement device (DTG-60, manufactured by Shimadzu Corporation), using nitrogen as the inflow gas, and increasing the temperature from 40 ° C to 550 ° C at a gas inflow rate of 100 ml / min and a temperature increase rate of 20 ° C / min. A thermogravimetric measurement was performed. Based on the obtained thermogravimetric curve, a temperature at which the mass is reduced by 5% relative to the mass at a temperature of 100 ° C. (a temperature at which the mass is reduced by 5%) is determined. The results are shown in Table 2.

[Test Example 5] Measurement of the thickness of the adhesive layer and the standard deviation of the thickness

With respect to the first laminates produced in the examples and comparative examples, the thickness (T2) of the adhesive layer was measured at a total interval of 50 mm at 100 points. Based on the measurement results, the average value (μm) of the thickness (T2) and the standard deviation (μm) of the thickness (T2) were calculated. The results are shown in Table 2.

[Test Example 6] Measurement of storage elastic modulus at 23 ° C after the adhesive layer is hardened

From the measurement results of the viscoelasticity of the adhesive layer after the hardening in Test Example 3, the storage elastic modulus (MPa) at 23 ° C. after the adhesive layer was hardened was read. The results are shown in Table 2.

[Test Example 7] Measurement of storage elastic modulus of the adhesive layer at 23 ° C

The adhesive compositions prepared in Examples and Comparative Examples were applied to a silicone-treated release sheet film (manufactured by LINTEC, SP-PET381031). Then, the obtained coating film was dried to form an adhesive layer. Subsequently, a plurality of layers of the formed adhesive layer were laminated to obtain a laminated body of an adhesive layer having a thickness of 800 μm. The laminated body of this adhesive layer was punched into a circular shape with a diameter of 10 mm, and this was used as a measurement sample.

The storage elastic modulus (Pa) was measured using a dynamic viscoelasticity measuring device (manufactured by TA Instruments, ARES) under conditions of a frequency of 1 Hz, a measurement temperature range of -50 to 150 ° C, and a temperature increase rate of 3 ° C / min. The results are shown in Table 2.

[Test Example 8] Measurement of tensile elastic modulus of substrate at 23 ° C

The substrates used in the examples and comparative examples were cut into test pieces of 15 mm × 140 mm, and the tensile elastic modulus at 23 ° C. was measured in accordance with JIS K7127: 1999. Specifically, the above test piece was subjected to a tensile test at a speed of 200 mm / min using a tensile tester (manufactured by Shimadzu Corporation, AUTOGRAPH AG-IS 500N), the distance between chucks was set to 100 mm, and The tensile elastic modulus (MPa) was measured. The results are shown in Table 2.

[Experimental Example 9] Measurement of heating start temperature and heating peak temperature by differential scanning calorimetry

Using the first laminates produced in the examples and comparative examples, a plurality of adhesive layers were laminated to produce a measurement sample having a thickness of 15 mm. The obtained sample for measurement was heated from normal temperature to 300 ° C. at a temperature increase rate of 10 ° C./minute using a differential scanning calorimeter (Q2000, manufactured by TA Instruments). From the DSC curve thus obtained, the temperature at which the heat starts (heating start temperature) (TS) and the heat peak temperature (TP) are obtained. The results are shown in Table 2.

[Test Example 10] Temperature cycle test

Preparation for evaluation with bumps formed on one side and pads formed on the other side For the wafer, a fully-automatic multi-wafer mounter (manufactured by LINTEC, RAD-2700F / 12) was used, and the three-dimensional bulk-layer circuit manufacturing plates manufactured in the examples and comparative examples were attached to this evaluation The wafer has a surface on the side of the bump, and is fixed to the ring frame.

Next, a fully automatic dicing saw (Disco 651, manufactured by DISCO Corporation) was used to simultaneously cut the adhesive layer and the wafer for evaluation, and the wafers were sliced into wafers having a size of 7.3 mm × 7.3 mm in plan view.

Next, a flip-chip bonding machine (Toray Engineering, FC3000W) was used to pick up the sliced adhesive layer and wafer at the same time, and the flip-chip was bonded to the substrate. Subsequently, the second-layer wafer with the adhesive layer attached thereto is bonded to the first-layer wafer temporarily placed on the substrate. This step is repeated to manufacture a semiconductor device in which a total of five layers of wafers are stacked on a substrate.

The obtained semiconductor device was subjected to a temperature cycle test of 1000 cycles under an environment where -55 ° C, 10 minutes, and 125 ° C, 10 minutes were set as one cycle. For the semiconductor devices before and after the test, a digital multimeter was used to measure the connection resistance between the semiconductor wafers to determine the connection resistance of the semiconductor device after the test and the connection resistance of the semiconductor device before the test. The rate of change of the value. The splicing reliability was evaluated in accordance with the following evaluation criteria. The results are shown in Table 2.

○: The change rate of the connection resistance value is 20% or less.

×: The change rate of the connection resistance value is more than 20%.

[Experimental Example 11] Evaluation of Embeddedness

A plurality of semiconductor devices were manufactured by the method described in Test Example 10. Use a digital microscope to observe five semiconductors randomly selected from these semiconductor devices On the four sides of the device, the presence or absence of cracks in the bumps and the state in which the bumps were embedded in the adhesive layer were confirmed, and the thicknesses in the lamination directions of the respective faces were also measured. Based on these results, the embedding properties of the bumps of the three-dimensional bulk-layer circuit manufacturing sheet obtained in the examples and comparative examples were evaluated in accordance with the following evaluation criteria. The results are shown in Table 2.

○: In all of the five semiconductor devices, no cracks were generated in the bumps, and the bumps were well embedded in the adhesive layer, and the thickness in the lamination direction was the same across the four sides.

×: Among the five semiconductor devices, cracks were generated in the bumps, the bumps were not sufficiently embedded in the adhesive layer, or the thickness in the lamination direction was different between the four sides.

It can be known from Table 2 that the plate for manufacturing a three-dimensional multi-layered volume layer circuit obtained in the example has a good temperature cycle test result and a high connection reliability. In addition, the plate for manufacturing a three-dimensional multi-layered multilayer circuit obtained in the example also has excellent embeddedness of the bumps.

[Industrial availability]

The three-dimensional bulk-layer circuit manufacturing plate of the present invention has high connection reliability when connecting semiconductor wafers, so it can be suitably used for bonding various semiconductor wafers.

1‧‧‧Three-dimensional bulk layer circuit manufacturing plate

13‧‧‧ Adhesive layer

14‧‧‧ peeling sheet

Claims (15)

A plate for manufacturing a three-dimensional multi-layered multilayer circuit, which is interposed between a plurality of semiconductor wafers having a through electrode. The three-dimensional multi-layered circuit used in order to connect the plurality of semiconductor wafers to each other to form a three-dimensional multilayered circuit The bulk layer circuit manufacturing plate is characterized in that the aforementioned three-dimensional bulk volume circuit manufacturing plate has at least a hardening adhesive layer, and the material constituting the adhesive layer has a melt viscosity of 90 ° C before curing. It is 1.0 × 10 ⁰ ~ 5.0 × 10 ⁵ Pa. s. The average linear expansion coefficient of the hardened material at 0 to 130 ° C is 45 ppm or less. According to the three-dimensional bulk-layer circuit manufacturing sheet described in item 1 of the scope of the patent application, the hardened glass transition temperature of the material constituting the aforementioned adhesive layer is 150 ° C or higher and 350 ° C or lower. According to the three-dimensional bulk-layer circuit manufacturing sheet described in item 1 of the scope of the patent application, the 5% mass reduction temperature of the hardened material of the material constituting the aforementioned adhesive layer by thermogravimetry is 350 ° C or higher. According to the three-dimensional multi-layer bulk layer circuit manufacturing sheet described in item 1 of the scope of patent application, the standard deviation of the thickness (T2) of the aforementioned adhesive layer is 2.0 μm or less. According to the three-dimensional multi-layer bulk-layer circuit manufacturing sheet described in item 1 of the scope of patent application, the storage elastic modulus at 23 ° C. of the aforementioned adhesive layer after hardening is 1.0 × 10 ² MPa or more, 1.0 × 10 ⁵ MPa the following. According to the three-dimensional multi-layer volume layer circuit manufacturing plate described in the first patent application range, wherein the aforementioned adhesive layer is subjected to differential scanning calorimetry to The heating start temperature (TS) measured at a temperature rate of 10 ° C / min is in the range of 70 ° C ~ 150 ° C, and the heating peak temperature (TP) is TS + 5 ~ 60 ° C. According to the three-dimensional multi-layer bulk-layer circuit manufacturing sheet described in item 1 of the scope of the patent application, the material constituting the adhesive layer contains a thermosetting component, a high molecular weight component, a hardener, and a hardening catalyst. According to the three-dimensional bulk volume circuit manufacturing plate described in item 1 of the scope of patent application, the material constituting the aforementioned adhesive layer contains a flux component. According to the three-dimensional multi-layer bulk-layer circuit manufacturing sheet described in item 1 of the scope of the patent application, the material constituting the aforementioned adhesive layer contains an inorganic filler. The three-dimensional bulk-layer circuit manufacturing plate described in item 1 of the scope of the patent application, further comprising: an adhesive layer, which is laminated on one side of the aforementioned adhesive layer; and a substrate, which is laminated The surface of the adhesive layer is opposite to the surface of the adhesive layer. According to the three-dimensional multi-layer bulk-layer circuit manufacturing sheet described in item 10 of the scope of the patent application, the ratio (T2 / T1) of the thickness (T2) of the adhesive layer to the thickness (T1) of the substrate is 0.01 or more , Below 1.5. According to the three-dimensional multi-layer bulk layer circuit manufacturing sheet described in item 10 of the scope of patent application, the storage elastic modulus of the aforementioned adhesive at 23 ° C is 1 × 10 ³ Pa or more and 1 × 10 ⁹ Pa or less. According to the three-dimensional multi-layer bulk-layer circuit manufacturing sheet described in item 10 of the scope of the patent application, the tensile elastic modulus of the aforementioned substrate at 23 ° C is 100 MPa or more and 5000 MPa or less. According to the three-dimensional bulk volume circuit manufacturing plate described in item 10 of the scope of patent application, wherein the multilayer body composed of the aforementioned adhesive layer and the aforementioned substrate is Cutting plate. A method for manufacturing a three-dimensional voluminous layer circuit, which comprises the following steps: one side of the aforementioned adhesive layer of the plate for manufacturing a three-dimensional voluminous layer circuit as described in item 1 of the scope of patent application or a patent application The step of bonding the adhesive layer on the opposite side of the adhesive layer to at least one side of a semiconductor wafer having a through electrode; The aforementioned semiconductor wafer is cut simultaneously with the aforementioned adhesive layer of the aforementioned three-dimensional bulk-layer circuit manufacturing plate, so that the semiconductor wafer with the adhesive layer becomes a step of singulation; A step of obtaining a semiconductor wafer laminate by laminating a plurality of semiconductor wafers with an adhesive layer to electrically connect the through electrodes to each other and alternately disposing the adhesive layers and the semiconductor wafer to obtain a semiconductor wafer laminate; and The step of curing the aforementioned adhesive layer of the wafer laminate to adhere the aforementioned semiconductor wafers constituting the aforementioned semiconductor wafer laminate to each other.