TW201801263A - 扇出型晶圓級封裝結構 - Google Patents

扇出型晶圓級封裝結構 Download PDF

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TW201801263A
TW201801263A TW105120122A TW105120122A TW201801263A TW 201801263 A TW201801263 A TW 201801263A TW 105120122 A TW105120122 A TW 105120122A TW 105120122 A TW105120122 A TW 105120122A TW 201801263 A TW201801263 A TW 201801263A
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wafer
dielectric layer
fan
reinforcing member
traces
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TW105120122A
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TWI584425B (zh
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蘇庭鋒
周佳仁
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力成科技股份有限公司
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Priority to US15/469,594 priority patent/US9899287B2/en
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Publication of TW201801263A publication Critical patent/TW201801263A/zh

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Abstract

一種扇出型晶圓級封裝結構，包括晶片、包覆晶片的封裝膠體、配置在晶片與封裝膠體的一側的至少一線路層及至少一介電層。線路層包括多條走線。這些走線在晶片對介電層的投影的邊緣區域的走線寬度大於在其他區域的走線寬度。本發明更提供一種扇出型晶圓級封裝結構，包括晶片、包覆晶片的封裝膠體、配置在晶片與封裝膠體的一側的至少一線路層、至少一介電層及至少一補強件。線路層包括多條走線。補強件位在晶片對介電層的投影的邊緣區域。

Description

扇出型晶圓級封裝結構
本發明是有關於一種扇出型晶圓級封裝結構，且特別是有關於一種走線較不易斷裂的扇出型晶圓級封裝結構。
在半導體產業中，積體電路(Integrated Circuits, IC)的生產，主要可分為三個階段：積體電路設計（IC design）、積體電路的製作（IC process）及積體電路的封裝(IC package)等。因此，裸晶片（die）係經由晶圓(wafer)製作、電路設計、光罩製作以及切割晶圓等步驟而完成，而裸晶片則經由打線接合(wire bonding)或覆晶接合(flip chip bonding)等方式，將裸晶片電性連接至承載器(carrier)，例如導線架（leadframe）或介電層(substrate)等，使得裸晶片之接合墊(bonding pad)將可重佈線（redistribution）至晶片之周緣或晶片之主動表面的下方。再以封裝膠體（molding compound）包覆裸晶片，以保護裸晶片。
值得一提的是，當在晶片區域內無法做出需要的連結數量時，可以採用扇出型晶圓級封裝（Fan-Out Wafer Level Packaging，FOWLP）的形式，即從上方俯視時可以看到由晶片中心拉線出來向外散的「扇出」狀，以提供更具彈性的線路佈局。製作的方式可以是先將晶片上除了主動表面以外的區域以封裝膠體封裝，其後，在晶片的主動表面與封裝膠體上形成走線，以將晶片的接點透過走線拉出至封裝膠體，在晶片與封裝膠體上形成介電層、重配置線路層（RDL）與銲球接墊。最後將銲球配置在銲球接墊上已完成封裝。
在扇出型晶圓級封裝結構完成之後，會經過可靠度測試來測試扇出型晶圓級封裝結構是否能夠承受溫度變化。然而，由於晶片與封裝膠體之間的熱膨脹係數具有差異，在溫度變化下，封裝膠體的不同元件(例如晶片與封裝膠體)的冷縮熱脹程度不同，容易使得介電層上的走線在靠近晶片與封裝膠體的交界處(也就是晶片的邊緣處)的部位容易斷裂。
本發明提供一種扇出型晶圓級封裝結構，其走線較不易斷裂。
本發明的一種扇出型晶圓級封裝結構，包括：一晶片；一封裝膠體，包覆晶片；至少一線路層，配置在晶片與封裝膠體的一側，且包括多條走線；以及至少一介電層，配置於至少一線路層的一側，其中這些走線在該晶片對介電層的投影的邊緣區域的走線寬度大於在其他區域的走線寬度。
在本發明的一實施例中，上述的至少一線路層更包括多個接點，這些接點與這些走線位在同一平面或是不同平面。
在本發明的一實施例中，上述的介電層為一可撓性介電層。
本發明的一種扇出型晶圓級封裝結構，包括一晶片；一封裝膠體，包覆晶片；至少一線路層，配置在晶片與封裝膠體的一側，且包括多條走線；以及至少一介電層，配置於至少一線路層的一側；以及至少一補強件，配置在晶片與封裝膠體的一側，且位在晶片對介電層的投影的邊緣區域。
在本發明的一實施例中，上述的至少一補強件包括多個補強件，環繞地配置在介電層上的該晶片對介電層投影的邊緣區域
在本發明的一實施例中，上述的這些補強件的材質為導電材質，各走線配置在相鄰的兩補強件之間，這些補強件與這些走線共平面且與這些走線分隔開來。
在本發明的一實施例中，上述的這些補強件在介電層上的投影沿著晶片在介電層上的投影的邊緣輪廓延伸，而形成一不連續的口字型，不連續的口字型的外緣尺寸大於晶片的尺寸，且不連續的口字型的內緣尺寸小於晶片的尺寸。
在本發明的一實施例中，上述的至少一補強件為單一個補強件，補強件呈一封閉環形，補強件在介電層上的投影沿著晶片在介電層上的投影的邊緣輪廓延伸，而形成一口字型，口字型的外緣尺寸大於晶片的尺寸，口字型的內緣尺寸小於晶片的尺寸，補強件的材質為絕緣材料，且補強件覆蓋於走線的至少一部分。
在本發明的一實施例中，上述的補強件的材質為絕緣材料，且補強件覆蓋於走線的至少一部分。
在本發明的一實施例中，上述的至少一補強件為單一個補強件，補強件呈一封閉環形，補強件在介電層上的投影沿著晶片在介電層上的投影的邊緣輪廓延伸，而形成一口字型，口字型的外緣尺寸大於晶片的尺寸，口字型的內緣尺寸小於晶片的尺寸，至少一線路層包括兩線路層，其中一個線路層包括多個接點，另一個線路層包括這些走線，補強件與這些接點同平面且環繞這些接點。
在本發明的一實施例中，上述的介電層為一可撓性介電層。
基於上述，為了避免在溫度變化下，封裝膠體的晶片與封裝膠體的冷縮熱脹程度不同，而使得位在晶片對介電層的投影的邊緣區域附近的走線容易發生斷裂的狀況，本發明的扇出型晶圓級封裝結構藉由將走線設計為在晶片對介電層的投影的邊緣區域的走線寬度大於在其他區域的走線寬度，而使得位在晶片對介電層的投影的邊緣區域附近的走線能夠具有較佳的強度。或者，本發明的扇出型晶圓級封裝結構藉由配置補強件在介電層上晶片對介電層的投影的邊緣區域，而為位在晶片對介電層的投影的邊緣區域附近的走線提供更多支撐以分散晶片與封裝膠體的冷縮熱脹程度不匹配所產生之應力，進而降低此區域的走線因為受到溫度變化被晶片與封裝膠體拉扯而發生斷裂的機率。當然，上述的走線的設計或是補強件的配置也可以提昇扇出型晶圓級封裝結構的耐用性，而具有較佳的忍受碰撞的能力。
為讓本發明的上述特徵和優點能更明顯易懂，下文特舉實施例，並配合所附圖式作詳細說明如下。
圖1是依照本發明的一實施例的一種扇出型晶圓級封裝結構的剖面示意圖。請參閱圖1，本實施例的扇出型晶圓級封裝結構100包括一晶片120、一封裝膠體130、至少一線路層110、至少一介電層112、113、多個銲球140。
由於晶片120的尺寸小，晶片120的接點相當靠近彼此，在晶片區域內若無法做出需要的線路配置時，在本實施例中，透過將線路向外拉到封裝膠體130的下表面，而提供更具彈性的線路佈局。
製作時，可以先將封裝膠體130包封晶片120，且外露晶片120的主動表面。在本實施例中，封裝膠體130與晶片120的主動表面切齊。其後，再在晶片120的主動表面與封裝膠體130的下表面配置線路層110、介電層112、113與多個銲球接點118。其中，形成線路層110與銲球接點118的方式可以是在晶片120與封裝膠體130的下表面與介電層112分別電鍍導電層，再利用蝕刻的方式形成接點114、走線116與銲球接點118。在本實施例中，這些接點114與這些走線116位在同一平面。晶片的接點透過位在介電層112的上表面的接點114、走線116連接至位於介電層112的下表面的這些銲球接點118。此外，介電層112、113的材質包括聚醯亞胺(polyimide, PI)，但介電層112、113的材質並不以此為限制。
一般而言，由於扇出型晶圓級封裝結構100的晶片120的熱膨脹係數與封裝膠體130的熱膨脹係數存在差異，在溫度變化下，晶片120與封裝膠體130的冷縮熱脹程度不同，晶片120與封裝膠體130之接縫處會對介電層112產生一較大的應力，若介電層112的彈性模數較低，較多應力會由介電層112上的走線116支撐，可能容易使得走線116在靠近晶片120與封裝膠體130的交界處的部位(也就是走線116在靠近晶片120的邊緣處的部位)容易發生斷裂的狀況。為了降低上述狀況發生的機率，在本實施例中，特意調整了走線116在靠近晶片120與封裝膠體130的交界處的區段的局部寬度，以增加走線116在此區段的強度。 下面將對此進一步地介紹。
圖2是圖1的扇出型晶圓級封裝結構隱藏封裝膠體與晶片的俯視示意圖。需說明的是，為了清楚地表示出走線116的寬度變化，在圖2中特意隱藏了封裝膠體130與晶片120，並且，為了表示出走線116與晶片120之間的相對位置關係，僅以虛線簡單地表示出晶片120所在位置。此外，在圖2中，走線116在介電層112上的配置位置與不同區段的寬度變化的比率僅是示意性表示，並不以圖式為限制。
請參閱圖2，各走線116包括一第一部分116a與一第二部分116b，第一部分116a位在靠近晶片120對介電層112的投影的邊緣區域，第二部分116b位在遠離晶片120對介電層112的投影的邊緣區域。如圖2所示，這些走線116在晶片120對介電層112的投影的邊緣區域的走線寬度大於在其他區域的走線寬度。也就是說，走線116在第一部分116a的寬度大於在第二部分116b的寬度。本實施例的封裝膠體100透過將走線116較容易受到晶片120與封裝膠體130冷縮熱脹的體積變化而斷裂的區域加寬，此區域的走線116能夠具有較佳的強度。如此一來，位在晶片120對介電層112的投影的邊緣區域附近的走線116(也就是第一部分116a)便較不容易斷裂。
當然，能夠降低晶片120對介電層112的投影的邊緣區域附近的走線116斷裂的機率的方法並不以上述為限制。下面將繼續介紹其他的扇出型晶圓級封裝結構。
圖3至圖4分別是本發明的其他實施例的一種扇出型晶圓級封裝結構隱藏封裝膠體與晶片的俯視示意圖。同樣地，在圖3與圖4中特意隱藏了封裝膠體與晶片，以清楚地表示出補強件250、350的配置位置。請先參閱圖3，圖3與圖2的差異在於，在圖3的扇出型晶圓級封裝結構200中，各走線216的寬度是相同的，扇出型晶圓級封裝結構200更包括多個補強件250配置在介電層212與晶片(未繪示)以及介電層212與封裝膠體(未繪示)之間的位置，且位在晶片220對介電層212的投影的邊緣區域。
在本實施例中，這些補強件250環繞地配置在介電層212與晶片以及介電層212與封裝膠體之間的位置，且位在晶片220對介電層212投影的邊緣區域。這些走線216配置在相鄰的這些補強件250之間。也就是說，走線216位在兩相鄰的補強件250之間。這些補強件250的材質可以是導電材質，例如是與接點214及走線216相同的材質，接點214、走線216與補強件250可以是共平面而可以同時製造。補強件250並未提供電性導通，因此，補強件250與走線216分隔開來。此外，在圖3中，補強件250為條狀的形式，補強件250的延伸方向平行於相鄰的走線216，但補強件250的形式與延伸方向並不以此為限制。
同樣地，在溫度變化下，晶片220與封裝膠體的冷縮熱脹程度不同，晶片220與封裝膠體之接縫處會對介電層212產生一較大的應力，若介電層212的彈性模數較低，較多應力會由介電層212上的走線216支撐，介電層可能容易使得走線216在靠近晶片220與封裝膠體的交界處的部位（也就是走線216在靠近晶片220的邊緣處的部位）容易發生斷裂的狀況。在本實施例中，扇出型晶圓級封裝結構200透過補強件250來增加介電層212上對應於晶片220邊緣的區域的強度，而為位在晶片220對介電層212的投影的邊緣區域附近的走線216提供更多支撐以分散晶片220與封裝膠體的冷縮熱脹程度不匹配所產生之應力，進而降低此區域的走線216因為受到溫度變化被晶片220與封裝膠體拉扯而發生斷裂的機率。
請再參閱圖4，圖4的扇出型晶圓級封裝結構300與圖3的扇出型晶圓級封裝結構200的主要差異在於，在圖4中，補強件350的整體形狀與延伸方向接近於晶片320的邊緣輪廓，也就是說，這些補強件350在介電層312上的投影沿著晶片320在介電層312上的投影的邊緣輪廓延伸，而形成不連續的口字型。這些補強件350(也就是不連續的口字型)的外緣略大於晶片320的尺寸，且這些補強件350的內緣略小於晶片320的尺寸。補強件350覆蓋於晶片320與封裝膠體的交界處，補強件350的不連續部分用來供走線316通過。也就是說，各走線316形成在補強件350的不連續兩部分之間。當然，圖3與圖4僅是提供其中兩種補強件250、350的形狀，補強件250、350的形狀、配置方式與位置並不以此為限制。此外，補強件250、350的材質也可以是絕緣材質，絕緣的補強件同樣地也可以圖3與圖4的形式表示。
圖5是本發明的其他實施例的一種扇出型晶圓級封裝結構隱藏封裝膠體與晶片的俯視示意圖。請參閱圖5，圖5的扇出型晶圓級封裝結構400與圖4的扇出型晶圓級封裝結構300的差異在於，在本實施例中，補強件450呈一封閉環形且補強件450的材質為絕緣材質，因此，補強件450可以直接覆蓋在這些走線416上，而不會與走線416導通。補強件450設置在晶片420與封裝膠體的交界處。同樣地，補強件450位在這些接點414所在的介電層412與晶片(未繪示)以及介電層412與封裝膠體(未繪示)之間的位置，且位在晶片420對介電層412的投影的邊緣區域，也就是說，補強件450在介電層412上的投影沿著晶片420在介電層412上的投影的邊緣輪廓延伸，而形成一口字型，補強件450的外緣尺寸(也就是口字型的外緣尺寸)大於晶片420的尺寸，補強件450的內緣尺寸小於晶片420的尺寸，而為位在晶片420對介電層412的投影的邊緣區域附近的走線416提供更多支撐，以分散晶片420與封裝膠體的冷縮熱脹程度不匹配所產生之應力。
圖6是本發明的其他實施例的一種扇出型晶圓級封裝結構隱藏封裝膠體與晶片的立體示意圖。請參閱圖6，扇出型晶圓級封裝結構500包括多個線路層510與多個介電層512。如圖6所示，上層的線路層510包括多個接點514，下層的線路層510包括多條走線516。接點514與走線516之間可以透過貫穿於位在上方的介電層512的導通孔(未繪示)連接。走線516與補強件550之間被介電層512隔開而未電性連接。補強件550呈一封閉環形，補強件550與這些接點514位在同一平面且位在晶片520對介電層512的投影的邊緣區域，補強件550設置在晶片與封裝膠體的交界處，補強件550能夠為位在晶片520對介電層512的投影的邊緣區域附近的走線516提供更多支撐以分散晶片520與封裝膠體的冷縮熱脹程度不匹配所產生之應力介電層。
在本實施例中，補強件550的形狀與延伸方向接近於晶片520的邊緣輪廓，而呈現出完整的口字型，補強件550的外緣略大於晶片520，且補強件550的內緣略小於晶片520。此外，補強件550的材質可為導電材質，補強件550環繞在這些接點514之外且不與這些接點514連接。當然，在其他實施例中，補強件550的材質也可以是絕緣材質。
需說明的是，在其它如圖6所示的具有多層線路層的扇出型晶圓級封裝實施例中，也可以在與走線相同的平面(也就是下層線路層)上配置如圖3至圖5所示的補強件，補強件的位置並不限定只與接點(上層線路層)同平面。或者，也可以採取走線在晶片對介電層的投影的邊緣區域的走線寬度大於在其他區域的走線寬度的設計方案，並不僅以圖6所示為限制。
綜上所述，為了避免在溫度變化下，封裝膠體的晶片與封裝膠體的冷縮熱脹程度不同，而使得位在晶片對介電層的投影的邊緣區域附近的走線容易發生斷裂的狀況，本發明的扇出型晶圓級封裝結構藉由將走線設計為在晶片對介電層的投影的邊緣區域的走線寬度大於在其他區域的走線寬度，而使得位在晶片對介電層的投影的邊緣區域附近的走線能夠具有較佳的強度。或者，本發明的扇出型晶圓級封裝結構藉由配置補強件在介電層上晶片對介電層的投影的邊緣區域，而為位在晶片對介電層的投影的邊緣區域附近的走線提供更多支撐以分散晶片與封裝膠體的冷縮熱脹程度不匹配所產生之應力，進而降低此區域的走線因為受到溫度變化被晶片與封裝膠體拉扯而發生斷裂的機率。當然，上述的走線的設計或是補強件的配置也可以提昇扇出型晶圓級封裝結構的耐用性，而具有較佳的忍受碰撞的能力。
雖然本發明已以實施例揭露如上，然其並非用以限定本發明，任何所屬技術領域中具有通常知識者，在不脫離本發明的精神和範圍內，當可作些許的更動與潤飾，故本發明的保護範圍當視後附的申請專利範圍所界定者為準。
100、200、300、400、500‧‧‧扇出型晶圓級封裝結構
110‧‧‧線路層
112、113、212、312、412、512‧‧‧介電層
114、214、314、414、514‧‧‧接點
116、216、316、416、516‧‧‧走線
116a‧‧‧第一部分
116b‧‧‧第二部分
118‧‧‧銲球接點
120、220、320、420、520‧‧‧晶片
130‧‧‧封裝膠體
140‧‧‧銲球
250、350、450、550‧‧‧補強件
圖1是依照本發明的一實施例的一種扇出型晶圓級封裝結構的剖面示意圖。 圖2是圖1的扇出型晶圓級封裝結構隱藏封裝膠體與晶片的俯視示意圖。 圖3至圖4分別是本發明的其他實施例的一種扇出型晶圓級封裝結構隱藏封裝膠體與晶片的俯視示意圖。 圖5是本發明的其他實施例的一種扇出型晶圓級封裝結構隱藏封裝膠體與晶片的俯視示意圖。 圖6是本發明的其他實施例的一種扇出型晶圓級封裝結構隱藏封裝膠體與晶片的立體示意圖。
100‧‧‧扇出型晶圓級封裝結構
112‧‧‧介電層
114‧‧‧接點
116‧‧‧走線
116a‧‧‧第一部分
116b‧‧‧第二部分
120‧‧‧晶片

Claims (10)

  1. 一種扇出型晶圓級封裝結構，包括： 一晶片； 一封裝膠體，包覆該晶片； 至少一線路層，配置在該晶片與該封裝膠體的一側，且包括多條走線；以及 至少一介電層，配置於該至少一線路層的一側，其中該些走線在該晶片對該介電層的投影的邊緣區域的走線寬度大於在其他區域的走線寬度。
  2. 如申請專利範圍第1項所述的扇出型晶圓級封裝結構，其中該至少一線路層更包括多個接點，該些接點與該些走線位在同一平面或是不同平面。
  3. 如申請專利範圍第1項所述的扇出型晶圓級封裝結構，其中該介電層為一可撓性介電層。
  4. 一種扇出型晶圓級封裝結構，包括： 一晶片； 一封裝膠體，包覆該晶片； 至少一線路層，配置在該晶片與該封裝膠體的一側，且包括多條走線；以及 至少一介電層，配置於該至少一線路層的一側；以及 至少一補強件，配置在該晶片與該封裝膠體的一側，且位在該晶片對該介電層的投影的邊緣區域。
  5. 如申請專利範圍第4項所述的扇出型晶圓級封裝結構，其中該至少一補強件包括多個補強件，環繞地配置在該晶片對該介電層投影的邊緣區域。
  6. 如申請專利範圍第5項所述的扇出型晶圓級封裝結構，其中該些補強件的材質為導電材質，各該走線配置在相鄰的該兩補強件之間，該些補強件與該些走線共平面且與該些走線分隔開來。
  7. 如申請專利範圍第6項所述的扇出型晶圓級封裝結構，其中該些補強件在該介電層上的投影沿著該晶片在該介電層上的投影的邊緣輪廓延伸，而形成一不連續的口字型，該不連續的口字型的外緣尺寸大於該晶片的尺寸，且該不連續的口字型的內緣尺寸小於該晶片的尺寸。
  8. 如申請專利範圍第4項所述的扇出型晶圓級封裝結構，其中該至少一補強件為單一個補強件，該補強件呈一封閉環形，該補強件在該介電層上的投影沿著該晶片在該介電層上的投影的邊緣輪廓延伸，而形成一口字型，該口字型的外緣尺寸大於該晶片的尺寸，該口字型的內緣尺寸小於該晶片的尺寸，該補強件的材質為絕緣材料，且該補強件覆蓋於該走線的至少一部分。
  9. 如申請專利範圍第4項所述的扇出型晶圓級封裝結構，其中該至少一補強件為單一個補強件，該補強件呈一封閉環形，該補強件在該介電層上的投影沿著該晶片在該介電層上的投影的邊緣輪廓延伸，而形成一口字型，該口字型的外緣尺寸大於該晶片的尺寸，該口字型的內緣尺寸小於該晶片的尺寸，該至少一線路層包括兩線路層，其中一個該線路層包括多個接點，另一個該線路層包括該些走線，該補強件與該些接點同平面且環繞該些接點。
  10. 如申請專利範圍第4項所述的扇出型晶圓級封裝結構，其中該介電層為一可撓性介電層。
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