CN110739287B - 一种集成芯片封装结构 - Google Patents

一种集成芯片封装结构 Download PDF

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CN110739287B
CN110739287B CN201910985670.6A CN201910985670A CN110739287B CN 110739287 B CN110739287 B CN 110739287B CN 201910985670 A CN201910985670 A CN 201910985670A CN 110739287 B CN110739287 B CN 110739287B
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孙德瑞
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Jiangsu sensiton Electronic Technology Co.,Ltd.
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Abstract

本发明提供了一种集成芯片封装结构，本发明的集成芯片封装结构采用布线金属层的加厚部部或者测试焊盘防止布线金属层在裸芯与塑封材料层的交界面的断裂，可以实现封装良品率的提高，且工艺简单，最大程度的控制了成本。

Description

一种集成芯片封装结构
技术领域
本发明涉及半导体封装领域，具体涉及一种集成芯片封装结构。
背景技术
扇出型晶圆级封装是一种晶圆级加工的嵌入式芯片封装方法，是目前一种输入/输出端口(I/O)较多、集成灵活性较好的先进封装方法之一。扇出型晶圆级封装相较于常规的晶圆级封装具有其独特的优点：①I/O间距灵活，不依赖于芯片尺寸；②只使用有效裸片(die)，产品良率提高；③具有灵活的3D封装路径，即可以在顶部形成任意阵列的图形；④具有较好的电性能及热性能；⑤高频应用；⑥容易在重新布线层(RDL)中实现高密度布线。
目前，集成芯片封装结构如图5所示，参见图5(a)和5(b)，裸芯10通过塑封材料11进行塑封，通孔13电连接至所述裸芯10的焊盘12上，在所述塑封材料11上布置有金属布线层14，所述金属布线层14作为再分布层连接至通孔13，绝缘层15覆盖所述金属布线层14，并在凸块17和UBM 16的位置留有开口，并且在裸芯10的背面还设置有背面保护层18。在该种结构中，金属布线层14需要横跨所述裸芯10与塑封材料11的交界面位置，该封装体在交界面位置处的应力差较大，所述金属布线层14极易产生断裂，形成断裂部C，其大大降低了良品率，且不利于降低封装的成本。
发明内容
基于解决上述问题，本发明提供了一种集成芯片封装结构，其包括：
裸芯，在其顶面具有焊盘；
塑封材料层，覆盖所述裸芯的顶面和侧面；
通孔，嵌入于所述塑封材料层中且电连接所述焊盘；
布线金属层，其设置于所述塑封材料层上且电连接所述通孔；
绝缘层，其覆盖所述布线金属层，且具有露出所述布线金属层的一部分的开口；
凸块，形成于所述开口中；
其特征在于，所述布线金属层具有横跨所述裸芯与所述塑封材料层的交界面的加厚部。
其中，所述加厚部包括嵌入所述塑封材料层的第一部分，所述第一部分与所述布线金属层的其他部分一体成型，其采用例如CVD、PVD、溅射、电镀等方法形成。
其中，所述加厚部包括嵌入所述塑封材料层的第一部分，所述第一部分的材质区别于所述布线金属层的其他部分。
其中，所述第一部分为绝缘层材料，所述绝缘材料为弹性材料，所述弹性材料为橡胶或硅树脂材料。
其中，还包括凸块下金属层(UBM)，其形成于所述凸块与布线金属层之间。
本发明还提供了另一种集成芯片封装结构，其包括：
裸芯，在其顶面具有焊盘；
塑封材料层，覆盖所述裸芯的顶面和侧面；
通孔，嵌入于所述塑封材料层中且电连接所述焊盘；
布线金属层，其设置于所述塑封材料层上且电连接所述通孔；
绝缘层，其覆盖所述布线金属层，且具有露出所述布线金属层的一部分的开口；
凸块，形成于所述开口中；
其特征在于，在所述绝缘层中还具有焊盘，所述焊盘从所述绝缘层中露出且电连接所述布线金属层，所述焊盘横跨所述裸芯与所述塑封材料层的交界面。
其中，所述焊盘为硬质金属层，例如钨等。
其中，所述焊盘用作测试焊盘。
本发明的优点如下：
本发明的集成芯片封装结构采用布线金属层的加厚部部或者测试焊盘防止布线金属层在裸芯与塑封材料层的交界面的断裂，可以实现封装良品率的提高，且工艺简单，最大程度的控制了成本。
附图说明
图1为第一实施例的集成芯片封装结构的(a)剖视图和(b)俯视图；
图2为第二实施例的集成芯片封装结构的(a)剖视图和(b)俯视图；
图3为第三实施例的集成芯片封装结构的(a)剖视图和(b)俯视图；
图4为现有技术的集成芯片封装结构的(a)剖视图和(b)俯视图。
具体实施方式
本发明的集成芯片封装结构其可以防止布线金属层在裸芯与塑封材料层的交界面的断裂，以提高良品率，保证低成本。
第一实施例
参见图1(a)，该实施例集成芯片封装结构，其包括裸芯20，所述裸芯20可以是由晶圆单体切割得到单一芯片，在其顶面具有焊盘22；所述裸芯20的基体材料可以是硅、砷、砷化镓等材料，所述裸芯20的背面具有保护层28。塑封材料层21包覆所述裸芯20的侧面与顶面，其在上述裸芯20的顶面上具有一定的厚度，所述塑封材料层21一般为聚合物材料，例如环氧树脂、硅树脂、PI或PBO等。
在所述塑封材料层21中钻孔形成开口并填充金属形成通孔23，上述通孔23电连接所述焊盘。所述钻孔通过机械钻孔、激光钻孔方式实现，且所述通孔23的顶面与所述塑封材料层21的顶面齐平。
在塑封材料层21中形成另外开口29，并在所述塑封材料层21上沉积金属层，并经图案化形成布线金属层24，所述布线金属层24电连接所述通孔23且填充所述另外开口29以形成加厚部30；所述布线金属层24与凸块23的材质相同，均可以选自铜、铝、金、银、钨及其合金，其采用例如CVD、PVD、溅射、电镀等方法形成。参见图1(b)，所述加厚部30横跨所述裸芯20与所述塑封材料层21的交界面，所述加厚部30两边具有两个薄部24，所述薄部24与所述加厚部30的宽度相同。所述加厚部30可以承受更大的应力，其可以在具有一定裂纹的情况下保证电连接的可靠性。
其中，还包括绝缘层25，其覆盖所述布线金属层24，所述绝缘层25可以是聚合物材料或者无机材料；所述绝缘层25具有开口，所述开口露出所述布线金属层24的一部分。凸块下金属层(UBM)26，形成于所述开口中；凸块27形成于所述凸块下金属层26上。
第二实施例
参见图2(a)和图2(b)，在第二实施例中，填充于所述另外开口29内的材料需要额外的步骤，其与布线金属层24分别形成，且其两者的材料不同，在所述另外开口29内填充弹性材料形成加厚部31，所述弹性材料为橡胶或硅树脂材料，其可以缓冲边缘的应力，防止其应力差过大而导致的断开。所述布线金属层24与第一实施例相同。
第三实施例
参见图3(a)和图3(b)，该实施例与第一实施例类似，与之不同的是，所述加厚部不是形成在所述塑封材料层21内而是形成在绝缘层25中，所述绝缘层25可以是聚合物材料；在所述绝缘层25中还具有焊盘32，所述焊盘32从所述绝缘层25中露出且电连接所述布线金属层24，所述焊盘32横跨所述裸芯20与所述塑封材料层21的交界面。其中，所述焊盘32为硬质金属层，例如钨等。所述焊盘32用作测试焊盘，其用于接触测试探针，可以保护凸块27。
最后应说明的是：显然，上述实施例仅仅是为清楚地说明本发明所作的举例，而并非对实施方式的限定。对于所属领域的普通技术人员来说，在上述说明的基础上还可以做出其它不同形式的变化或变动。这里无需也无法对所有的实施方式予以穷举。而由此所引申出的显而易见的变化或变动仍处于本发明的保护范围之中。

Claims (4)

1.一种集成芯片封装结构，其包括：
裸芯，在其顶面具有焊盘；
塑封材料层，覆盖所述裸芯的顶面和侧面；
通孔，嵌入于所述塑封材料层中且电连接所述焊盘；
布线金属层，其设置于所述塑封材料层上且电连接所述通孔；
绝缘层，其覆盖所述布线金属层，且具有露出所述布线金属层的一部分的开口；凸块，形成于所述开口中；
其特征在于，所述布线金属层具有横跨所述裸芯与所述塑封材料层的交界面的加厚部；所述加厚部包括嵌入所述塑封材料层的第一部分，所述第一部分的材质区别于所述布线金属层的其他部分；所述第一部分直接接触所述其他部分，且所述第一部分为绝缘材料，所述绝缘材料为弹性材料，所述弹性材料为橡胶或硅树脂材料。
2.根据权利要求1所述的集成芯片封装结构，其特征在于：还包括凸块下金属层(UBM)，其形成于所述凸块与布线金属层之间。
3.一种集成芯片封装结构，其包括：
裸芯，在其顶面具有焊盘；
塑封材料层，覆盖所述裸芯的顶面和侧面；
通孔，嵌入于所述塑封材料层中且电连接所述焊盘；
布线金属层，其设置于所述塑封材料层上且电连接所述通孔；
绝缘层，其覆盖所述布线金属层，且具有露出所述布线金属层的一部分的开口；凸块，形成于所述开口中；
其特征在于，在所述绝缘层中还具有焊盘，所述焊盘从所述绝缘层中露出且直接物理和电连接所述布线金属层，所述焊盘横跨所述裸芯与所述塑封材料层的交界面，所述凸块和所述焊盘在垂直方向上的投影完全不重合，且所述焊盘用作测试焊盘。
4.根据权利要求3所述的集成芯片封装结构，其特征在于：所述焊盘为硬质金属层，所述硬质金属层为钨。
CN201910985670.6A 2019-12-06 2019-12-06 一种集成芯片封装结构 Active CN110739287B (zh)

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