TW201712879A - Semi-volatile embedded memory with between-fin floating-gate device and method - Google Patents
Semi-volatile embedded memory with between-fin floating-gate device and methodInfo
- Publication number
- TW201712879A TW201712879A TW105115991A TW105115991A TW201712879A TW 201712879 A TW201712879 A TW 201712879A TW 105115991 A TW105115991 A TW 105115991A TW 105115991 A TW105115991 A TW 105115991A TW 201712879 A TW201712879 A TW 201712879A
- Authority
- TW
- Taiwan
- Prior art keywords
- fin
- semi
- floating
- embedded memory
- fin structures
- Prior art date
Links
- 238000000034 method Methods 0.000 title abstract 2
- 239000000758 substrate Substances 0.000 abstract 3
- 239000004065 semiconductor Substances 0.000 abstract 2
Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
- G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/26—Sensing or reading circuits; Data output circuits
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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- H01L29/7881—Programmable transistors with only two possible levels of programmation
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- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/10—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the top-view layout
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- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/60—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates the control gate being a doped region, e.g. single-poly memory cell
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- G—PHYSICS
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- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
- G11C16/0433—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and one or more separate select transistors
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
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- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0207—Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
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- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
- H01L27/0886—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate including transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
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- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0642—Isolation within the component, i.e. internal isolation
- H01L29/0649—Dielectric regions, e.g. SiO2 regions, air gaps
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Composite Materials (AREA)
- Materials Engineering (AREA)
- Semiconductor Memories (AREA)
- General Engineering & Computer Science (AREA)
- Non-Volatile Memory (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/US2015/038079 WO2016209280A1 (en) | 2015-06-26 | 2015-06-26 | Semi-volatile embedded memory with between-fin floating-gate device and method |
Publications (1)
Publication Number | Publication Date |
---|---|
TW201712879A true TW201712879A (en) | 2017-04-01 |
Family
ID=57585918
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW105115991A TW201712879A (en) | 2015-06-26 | 2016-05-23 | Semi-volatile embedded memory with between-fin floating-gate device and method |
Country Status (6)
Country | Link |
---|---|
US (1) | US10355005B2 (zh) |
EP (1) | EP3314664A4 (zh) |
KR (1) | KR102395485B1 (zh) |
CN (1) | CN107750396B (zh) |
TW (1) | TW201712879A (zh) |
WO (1) | WO2016209280A1 (zh) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10304936B2 (en) * | 2016-05-04 | 2019-05-28 | International Business Machines Corporation | Protection of high-K dielectric during reliability anneal on nanosheet structures |
US10797142B2 (en) * | 2018-12-03 | 2020-10-06 | Silicon Storage Technology, Inc. | FinFET-based split gate non-volatile flash memory with extended source line FinFET, and method of fabrication |
US11114451B1 (en) | 2020-02-27 | 2021-09-07 | Silicon Storage Technology, Inc. | Method of forming a device with FinFET split gate non-volatile memory cells and FinFET logic devices |
CN111968978B (zh) * | 2020-08-27 | 2024-03-12 | 上海华力集成电路制造有限公司 | 一种双通道静态随机存储器 |
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US6958512B1 (en) * | 2004-02-03 | 2005-10-25 | Advanced Micro Devices, Inc. | Non-volatile memory device |
KR100621628B1 (ko) * | 2004-05-31 | 2006-09-19 | 삼성전자주식회사 | 비휘발성 기억 셀 및 그 형성 방법 |
TWI263310B (en) * | 2005-09-28 | 2006-10-01 | Powerchip Semiconductor Corp | Non-volatile memory and fabricating method thereof |
JP4791868B2 (ja) * | 2006-03-28 | 2011-10-12 | 株式会社東芝 | Fin−NAND型フラッシュメモリ |
US20070284650A1 (en) * | 2006-06-07 | 2007-12-13 | Josef Willer | Memory device and a method of forming a memory device |
KR20080075405A (ko) * | 2007-02-12 | 2008-08-18 | 삼성전자주식회사 | 폴리 실리콘 핀을 갖는 비휘발성 메모리 트랜지스터, 상기트랜지스터를 구비하는 적층형 비휘발성 메모리 장치, 상기트랜지스터의 제조방법 및 상기 장치의 제조방법 |
KR20080099460A (ko) * | 2007-05-09 | 2008-11-13 | 주식회사 하이닉스반도체 | 비휘발성 메모리 소자 및 그 제조방법 |
US7649779B2 (en) * | 2007-05-15 | 2010-01-19 | Qimonda Ag | Integrated circuits; methods for manufacturing an integrated circuit; memory modules; computing systems |
US8461640B2 (en) * | 2009-09-08 | 2013-06-11 | Silicon Storage Technology, Inc. | FIN-FET non-volatile memory cell, and an array and method of manufacturing |
CN102420232B (zh) | 2010-09-28 | 2014-08-13 | 中国科学院微电子研究所 | 一种闪存器件及其形成方法 |
KR20180070718A (ko) * | 2011-12-30 | 2018-06-26 | 인텔 코포레이션 | 집적 회로 구조물 및 집적 회로 구조물의 제조 방법 |
US8592889B1 (en) | 2012-05-21 | 2013-11-26 | United Microelectronics Corp. | Memory structure |
US8716803B2 (en) | 2012-10-04 | 2014-05-06 | Flashsilicon Incorporation | 3-D single floating gate non-volatile memory device |
US9406689B2 (en) * | 2013-07-31 | 2016-08-02 | Qualcomm Incorporated | Logic finFET high-K/conductive gate embedded multiple time programmable flash memory |
-
2015
- 2015-06-26 KR KR1020187002079A patent/KR102395485B1/ko active IP Right Grant
- 2015-06-26 US US15/576,269 patent/US10355005B2/en active Active
- 2015-06-26 EP EP15896566.5A patent/EP3314664A4/en not_active Withdrawn
- 2015-06-26 CN CN201580081243.5A patent/CN107750396B/zh active Active
- 2015-06-26 WO PCT/US2015/038079 patent/WO2016209280A1/en active Application Filing
-
2016
- 2016-05-23 TW TW105115991A patent/TW201712879A/zh unknown
Also Published As
Publication number | Publication date |
---|---|
KR20180020263A (ko) | 2018-02-27 |
KR102395485B1 (ko) | 2022-05-09 |
CN107750396A (zh) | 2018-03-02 |
WO2016209280A1 (en) | 2016-12-29 |
CN107750396B (zh) | 2022-02-11 |
EP3314664A1 (en) | 2018-05-02 |
EP3314664A4 (en) | 2019-02-20 |
US20180151578A1 (en) | 2018-05-31 |
US10355005B2 (en) | 2019-07-16 |
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