TW201711206A - 半導體記憶體裝置 - Google Patents

半導體記憶體裝置 Download PDF

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Publication number
TW201711206A
TW201711206A TW105104659A TW105104659A TW201711206A TW 201711206 A TW201711206 A TW 201711206A TW 105104659 A TW105104659 A TW 105104659A TW 105104659 A TW105104659 A TW 105104659A TW 201711206 A TW201711206 A TW 201711206A
Authority
TW
Taiwan
Prior art keywords
bit line
transistor
period
voltage
memory
Prior art date
Application number
TW105104659A
Other languages
English (en)
Chinese (zh)
Inventor
藤井通太
永尾理
Original Assignee
東芝股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 東芝股份有限公司 filed Critical 東芝股份有限公司
Publication of TW201711206A publication Critical patent/TW201711206A/zh

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Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/04Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
TW105104659A 2015-09-14 2016-02-17 半導體記憶體裝置 TW201711206A (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2015/076023 WO2017046850A1 (fr) 2015-09-14 2015-09-14 Dispositif de mémoire à semi-conducteurs

Publications (1)

Publication Number Publication Date
TW201711206A true TW201711206A (zh) 2017-03-16

Family

ID=58288380

Family Applications (1)

Application Number Title Priority Date Filing Date
TW105104659A TW201711206A (zh) 2015-09-14 2016-02-17 半導體記憶體裝置

Country Status (2)

Country Link
TW (1) TW201711206A (fr)
WO (1) WO2017046850A1 (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10868037B2 (en) 2019-03-18 2020-12-15 Toshiba Memory Corporation Non-volatile semiconductor memory device
TWI786733B (zh) * 2021-03-18 2022-12-11 日商鎧俠股份有限公司 半導體記憶裝置

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019200828A (ja) 2018-05-16 2019-11-21 東芝メモリ株式会社 半導体記憶装置
JP6901515B2 (ja) * 2019-04-04 2021-07-14 ウィンボンド エレクトロニクス コーポレーション 半導体装置

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011065708A (ja) * 2009-09-16 2011-03-31 Toshiba Corp 不揮発性半導体記憶装置
JP5198524B2 (ja) * 2010-09-10 2013-05-15 株式会社東芝 不揮発性半導体メモリ

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10868037B2 (en) 2019-03-18 2020-12-15 Toshiba Memory Corporation Non-volatile semiconductor memory device
TWI733137B (zh) * 2019-03-18 2021-07-11 日商東芝記憶體股份有限公司 半導體記憶裝置
TWI786733B (zh) * 2021-03-18 2022-12-11 日商鎧俠股份有限公司 半導體記憶裝置
US11749348B2 (en) 2021-03-18 2023-09-05 Kioxia Corporation Semiconductor storage device controlling a voltage applied at a start of a verify operation in each of plural loops included in a write sequence

Also Published As

Publication number Publication date
WO2017046850A1 (fr) 2017-03-23

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