TW201644188A - 具單端輸入之平衡差動轉阻抗放大器及平衡方法 - Google Patents

具單端輸入之平衡差動轉阻抗放大器及平衡方法 Download PDF

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TW201644188A
TW201644188A TW105110260A TW105110260A TW201644188A TW 201644188 A TW201644188 A TW 201644188A TW 105110260 A TW105110260 A TW 105110260A TW 105110260 A TW105110260 A TW 105110260A TW 201644188 A TW201644188 A TW 201644188A
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input
differential
impedance
circuit
amplifier
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TW105110260A
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English (en)
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羅伯 蒙洛 史密斯
查爾斯 菲利普 麥克萊
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太谷電子公司
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    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45566—Indexing scheme relating to differential amplifiers the IC comprising one or more dif stages in cascade with the dif amp
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45592—Indexing scheme relating to differential amplifiers the IC comprising one or more buffer stages other than emitter or source followers between the input signal leads and input leads of the dif amp, e.g. inverter stages
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45594—Indexing scheme relating to differential amplifiers the IC comprising one or more resistors, which are not biasing resistor
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45652—Indexing scheme relating to differential amplifiers the LC comprising one or more further dif amp stages, either identical to the dif amp or not, in cascade
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45682—Indexing scheme relating to differential amplifiers the LC comprising one or more op-amps
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45702—Indexing scheme relating to differential amplifiers the LC comprising two resistors

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Abstract

一種具單端輸入之平衡差動轉阻放大器係於廣泛變化的輸入訊號動態範圍上操作。一臨界電路係用以進行以下之一或其組合(1)產生變化決定臨界值，以確保在動態範圍的輸入電流訊號水平上進行適宜切片；及(2)產生供應至一跨阻抗級之一輸入的偏置電流與電壓，以抵銷該跨阻抗級電壓輸入對於該輸入電流訊號水平上的相關性。

Description

具單端輸入之平衡差動轉阻抗放大器及平衡方法 【相關申請】
本申請發明主張於2015年4月3日所申請之美國臨時申請案號No.62/142,558，以及在2015年7月30日所申請之美國非臨時申請專利案號No.14/814,080的利益，其完整揭示內容在此以參考方式加以整合。
本技術領域係有關於數位與類比電路及訊號，以及相關的放大技術有關。特別地是，本發明有關於一種用於放大數位與類比訊號的轉阻抗放大器有關。
在各種應用中，理想的是能進行電子數位與類比訊號的放大。在光電應用中，輸入電子訊號可能是一種例如由光二極體的所產生的電流。進一步理想的是以一種放大處理產生輸出電壓訊號。為了從一輸入電流訊號產生輸出電壓訊號，可以利用一轉阻抗放大器。
第一圖描繪利用雙極技術的單端轉阻抗放大器示例示意圖。雙極電晶體104係透過電壓源112與108所偏置。在從雙極電晶體104的輸出節點110至雙極電晶體104的輸入節點116之回授配置中的電阻器114則提供雙極電晶體104改良頻寬及其他放大特性。輸入電流102在輸入節點116 處提供至雙極電晶體104，其產生一跨越電阻器106的輸出電流(圖未示)，接著在節點110處產生一跨越電阻器106的輸出電壓。
一般來說，一轉阻抗放大器重要的是能夠將跨及廣泛頻率範圍的輸入訊號放大，而因此該放大器表現出寬頻。舉例而言，這在高速數位基頻通訊通道中係為有用的。增加轉阻抗放大器頻寬的一種方法則與在該放大器輸入處使用電流緩衝器有關，其在該放大器輸入處從該回授電阻解耦合出來源阻抗，該回授電阻傾向於主導該轉阻抗放大器的輸入阻抗。電流緩衝器可以明顯地降低該轉阻抗放大器的輸入阻抗，降低在該放大器頻寬上於該輸入處的電容負載效果。舉例而言，美國專利6,801,084敘述一種單端轉阻抗放大器，其中透過使用一輸入電流緩衝器的方法改良該放大器的操作頻寬。
然而，像是在第一圖中繪示的單端轉阻抗放大器並不通用於需要將跨及廣泛動態範圍的輸入訊號放大的應用，因為在節點110處的輸出電壓擺幅降低該裝置104的VCE。當輸入電流以及對應的輸出電壓變大時，該裝置104的VCE不再足夠保持A級線性操作，而產生輸出波形的扭曲。
在此的具體實施例描述一種具有單端輸入的平衡差動轉阻抗放大器，其包括一差動轉阻抗級、一輸入電流緩衝器級與一臨界電路，該差動轉阻抗級進一步包括一第一輸入與一第二輸入；其中該輸入電流緩衝器級的輸出係連接至該差動轉阻抗級的第一輸入；而該臨界電路用於產生平衡該差動轉阻抗級的臨界電壓，其中該臨界電路的輸出係連接至該差動轉阻抗級的第二輸入。
在此的具體實施例進一步描述一種具有單端輸入的平衡差動轉阻抗放大器，包括一轉阻抗級、一輸入電流緩衝器級與一臨界電路，該轉阻抗級包括一差動對，該差動對進一步包括一第一輸入、一第二輸入、一第一輸出與一第二輸出；其中該輸入電流緩衝器級的輸出係連接至該轉阻抗級的第一輸入；而該臨界電路進一步包括一電壓平均電路，其中該電壓平均電路的輸出係連接至該轉阻抗級的第二輸入，而該轉阻抗級的第一與第二輸出係分別連接至該電壓平均電路的第一與第二輸入。
在此的具體實施例進一步描述一種具有單端輸入的平衡差動轉阻抗放大器，包括一轉阻抗級、一輸入電流緩衝器級、一電流平均電路與一臨界電路，該轉阻抗級包括一差動對，該差動對進一步包括一第一輸入與一第二輸入；該輸入電流緩衝器級包括一第一輸入與一第二輸入，其中一輸入電流源係連接至該輸入電流緩衝器的第一輸入，而該輸入電流緩衝器的輸出係連接至該轉阻抗級的第一輸入；該電流平均電路串聯連接於該輸入電流源及該輸入電流緩衝器第二輸入之間，其中該電流平均電路接收該輸入電流源，並根據該輸入電流源產生一直流電(DC)時間平均訊號；而該臨界電路的輸出係連接至該轉阻抗級的第二輸入。
102‧‧‧輸入電流
104‧‧‧雙極電晶體
104(a)‧‧‧雙極電晶體
104(b)‧‧‧雙極電晶體
104(c)‧‧‧雙極電晶體
104(d)‧‧‧雙極電晶體
106‧‧‧電阻器
106(a)‧‧‧電阻器
106(b)‧‧‧電阻器
106(c)‧‧‧電阻器
106(d)‧‧‧電阻器
106(e)‧‧‧電阻器
106(f)‧‧‧電阻器
106(g)‧‧‧電阻器
108‧‧‧電壓源
110‧‧‧輸出節點
112‧‧‧電壓源
114‧‧‧電阻器
116‧‧‧輸入節點
200‧‧‧平衡差動轉阻抗放大器
202‧‧‧輸入電流
204‧‧‧輸入電流緩衝器
204(a)‧‧‧基本共基級
204(b)‧‧‧複製共基級
206‧‧‧臨界電路
208‧‧‧差動轉阻抗放大器
212(a)‧‧‧差動輸入
212(b)‧‧‧差動輸入
214(a)‧‧‧差動輸出
214(b)‧‧‧差動輸出
216‧‧‧輸出
218‧‧‧輸出
220‧‧‧緩衝器輸入
220(a)‧‧‧共射極
220(b)‧‧‧共射極
222‧‧‧單尾電流偏置源
302‧‧‧電流平均電路
304‧‧‧複製電流緩衝器
330(a)‧‧‧p通道場發射電晶體
330(b)‧‧‧p通道場發射電晶體
330(c)‧‧‧p通道場發射電晶體
330(d)‧‧‧p通道場發射電晶體
330(e)‧‧‧p通道場發射電晶體
330(f)‧‧‧p通道場發射電晶體
330(g)‧‧‧p通道場發射電晶體
330(h)‧‧‧p通道場發射電晶體
330(i)‧‧‧p通道場發射電晶體
330(j)‧‧‧p通道場發射電晶體
340‧‧‧共基級偏置鏡
342‧‧‧偵測器電流鏡
402‧‧‧電壓平均電路
422‧‧‧增益電路
424‧‧‧取樣電路
502‧‧‧輸入
504(a)‧‧‧輸入
504(b)‧‧‧輸入
506‧‧‧閥值電路
520‧‧‧偏置鏡
522‧‧‧偵測器電流鏡
第一圖描繪利用雙極技術之先前技術單端轉阻抗放大器的示例示意圖。
第二A圖為根據一具體實施例具有單端輸入的平衡差動轉阻抗放大器的方塊圖。
第二B圖為根據一具體實施例利用一適宜的臨界電壓之具 有單端輸入的平衡差動共射極轉阻抗放大器的示意圖。
第三A圖為根據一具體實施例利用一電流平均臨界電路之具有單端輸入的平衡差動轉阻抗放大器的方塊圖。
第三B圖為根據一具體實施例利用一電流平均臨界電路之具有單端輸入的平衡差動共射極轉阻抗放大器的示意圖。
第四A圖為根據一具體實施例利用一電壓平均臨界電路之具有單端輸入的平衡差動轉阻抗放大器的方塊圖。
第四B圖為根據一具體實施例利用一電壓平均臨界電路之具有單端輸入的平衡差動共射極轉阻抗放大器的示意圖。
第五A圖為根據一具體實施例利用用於控制一輸入電流緩衝器之偏置的電流平均電路與一固定臨界電路之具有單端輸入的平衡差動轉阻抗放大器的方塊圖。
第五B圖為根據一具體實施例利用用於控制一輸入電流緩衝器之偏置的電流平均電路與一固定臨界電路之具有單端輸入的平衡差動共射極轉阻抗放大器的示意圖。
第六A圖為根據一具體實施例利用用於控制一輸入電流緩衝器之偏置的電流平均電路與一電壓平均臨界電路兩者之具有單端輸入的平衡差動轉阻抗放大器的方塊圖。
第六B圖為根據一具體實施例利用用於控制一主要輸入電流緩衝器之偏置的一基本共基級輸入緩衝器的鏡像複製與一電壓平均臨界電路兩者之具有單端輸入的平衡差動共射極轉阻抗放大器的示意圖。
在此的描述係為具有單端輸入之平衡差動轉阻抗放大器的示例具體實施例，用以將跨及廣泛動態範圍的輸入訊號放大。
除了頻寬考量以外，在像是光電系統的某些應用中，一轉阻抗放大器能展現廣泛的動態範圍，俾使可以將跨及廣泛振幅範圍的輸入訊號放大是重要的。進一步的，由於對於像是高速資料通訊應用的差動訊號的固有訊號完整性與傳輸優點，理想的是運用一種差動轉阻抗放大器。舉例而言，光纖訊號的放大一般而言需要利用延伸小訊號雜訊/頻寬限制的動態範圍以及相對於傳統拓撲的大訊號過載能力兩者最大化。這直接轉換為降低光驅動功率需求，其理想的是減少功率耗費與增加可靠度，及/或增加傳輸距離。
第二A圖係根據一具體實施例所描繪的具有單端輸入之平衡差動轉阻抗放大器的方塊圖。平衡差動轉阻抗放大器200可以包括輸入電流緩衝器204、臨界電路206與差動轉阻抗放大器208。
差動轉阻抗放大器208藉由第一與第二差動輸入212(a)及212(b)接收一差動輸入訊號(未顯示於第二A圖)，以產生藉由差動輸出214(a)及214(b)的差動輸出訊號(未顯示於第二A圖)。典型的差動轉阻放大器208可以在差動輸入212(a)處接收一單端輸入電流。差動轉阻放大器208也可以在差動輸入212(b)處接收一直流電(DC)臨界電壓。根據一具體實施例，在輸入212(b)處接收的該DC臨界電壓可能與施加到差動輸入212(a)之輸入電流的DC平均值有關。為了回應施加至輸出212(a)及212(b)的輸入訊號，差動轉阻抗放大器產生一藉由差動輸出214(a)及214(b)的差動輸出電壓。
輸入電流緩衝器204，藉由例如從該放大器輸入阻抗本身解 耦出由該放大器的輸入之輸入來源阻抗，以改善差動轉阻抗放大器208的頻寬特性。請參考第二A圖，輸入電流緩衝器204藉由一緩衝器輸入220接收一輸入訊號202，並藉由電流緩衝器輸出218產生一輸出訊號(未顯示於第二A圖)。該電流緩衝器輸出218係連接至差動轉阻抗放大器208的第一差動輸入212(a)。
一般而言，差動轉阻抗放大器208係無法在輸入212(a)處容許一廣泛動態範圍的輸入訊號。根據一具體實施例，為了增加此操作範圍，該臨界電路206提供一用於差動轉阻抗放大器208的平衡操作，藉由判斷用於差動轉阻抗放大器208在一輸入訊號水平的廣泛範圍之上，提供一用於差動轉阻抗放大器208的平衡操作。特別是，對於第二A圖描繪的具體實施例而言，臨界電路206產生相對於該輸入訊號的一固定電壓訊號，其係被供應至差動轉阻抗放大器208的輸入212(b)。
臨界電路206藉由臨界電路輸出216產生一輸出訊號(未顯示於第二A圖)，該輸出訊號被提供至差動轉阻抗放大器208的輸入212(b)。同時，輸入電流緩衝器(未顯示於第二A圖)的輸出訊號也被提供至差動轉阻抗放大器208的第一輸入212(a)。
雖然如第二A圖描繪的具體實施例中繪示，於此實施例中，該臨界電路206並不接收任何輸入訊號，舉例而言，在臨界電路206產生相對於該輸入訊號的一固定電壓訊號，但在替代具體實施例中，臨界電路206為了執行一用於差動轉阻抗放大器208的平衡操作，可以接收一或多個輸入訊號。如在以下各種具體實施例中敘述，為了執行此平衡操作，臨界電路206可以執行一電流、電壓或某些其他內部或外部的平均，以平衡差動轉阻 抗放大器200。
舉例而言，根據在此敘述之具體實施例，臨界電路206可以接收包括內部或外部的電流或電壓訊號的輸入訊號，以平衡差動轉阻抗放大器200。臨界電路206接收一或多個輸入訊號的具體實施例示例則參考第三A圖至第四B圖與第六A圖至第六B圖敘述。
第二B圖為根據一具體實施例具有單端輸入的平衡差動共射極轉阻抗放大器的示意圖，其利用一適宜的臨界電壓。第二B圖繪示的具體實施例可以用於放大來自一光學訊號所產生的電流，像是由光電二極體所產生(未顯示於第二B圖)。如第二B圖描繪，轉阻抗放大器200可用於將一單端電流訊號202轉換為在輸出214a、214b處的差動輸出電壓，如應用在光纖接收器。然而，還可能有許多其他應用。第二B圖描繪的拓撲對於傳統單端回授轉阻抗放大器而言，具有許多優點，這將於以下敘述。
請參考第二B圖，平衡差動轉阻抗放大器200包括差動轉阻放大器208、輸入電流緩衝器204與臨界電路206。
根據一具體實施例，差動轉阻抗放大器208為一差動對，該差動對包括一第一共射極220(a)與一第二共射極220(b)。第一共射極220(a)包括雙極電晶體104(b)、回授電阻器106(d)與負載電阻器106(b)。第二共射極220(b)包括雙極電晶體104(c)、回授電阻器106(e)與負載電阻器106(c)。該兩共射極220(a)及220(b)共享一單尾電流偏置源222，並可操作為一線性或切換差動對。該差動對(220(a)及220(b))轉化成壓縮切換模式的能力，能去除當一轉阻抗放大器必須被維持在線性操作模式中所發生在跨阻抗增益/最大輸入訊號水平上的傳統限制。
如參考在此對於第二B圖描繪之具體實施例，以及如同在第三B圖、第四B圖、第五B圖與第六B圖中描繪的具體實施例，在該雙極裝置104(b)的基級處對該共射極220(a)的輸入係被稱做為驅動輸入，而在該雙極裝置104(c)的基級處對該共發射體220(b)的輸入係被稱做為非驅動輸入。
根據第二B圖繪示之具體實施例，輸入電流緩衝器204為一共基級。輸入電流緩衝器204從該差動轉阻抗放大器208的輸入阻抗解耦出與輸入源202相關的輸入來源阻抗，其傾向由該回授電阻器106(d)的數值所主導。輸入電流緩衝器204的運用允許能使用較大數值的回授電阻器，以改善受雜訊限制的敏感性，而不需要進行與輸入分路電容組合及輸入阻抗增加相關的通用頻寬縮減。
進一步的，根據第二B圖描繪的具體實施例，臨界電路206包括一固定電壓源108，其適當地在該驅動輸入處平衡所呈現的輸入訊號。此臨界電壓可由各種手段取得，包含在後面的具體實施例中的那些實例說明。
共射極220(a)係藉由輸入電流緩衝器204的輸出所驅動。另一方面，共射極220(b)則連接至臨界電路206(非驅動輸入)，其在此具體實施例中提供一固定電壓臨界值108至該第二共射極220(b)的輸入。
特別是，提供輸入電流訊號202至輸入電流緩衝器204(共基極級)的輸入。輸入電流緩衝器204產生一輸出訊號(未顯示於第二B圖)，其被提供以在該雙極電晶體104(b)的基級處驅動共射極220(a)的輸入。另一方面，臨界電路206產生透過電壓源108之一固定電壓訊號，其被提供至該共射極220(b)的輸入(基級)。
差動轉阻抗放大器208以在該雙極電晶體104(b)及104(c)的個別基級處所接收的差動輸入訊號為函數，產生跨節點214(a)及214(b)的差分輸出訊號。特別是，共射極220(a)在輸出節點214(a)處產生跨越負載電阻器106(b)的輸出電壓。同樣的，共射極220(b)在輸出節點214(b)處產生跨越負載電阻器106(c)的輸出電壓。
除了先前對於第二B圖中描繪之拓撲所敘述的優點以外，該共射極差動對從一線性至操作切換模式的轉換，能夠增加大訊號能力、提高動態範圍。此外，轉阻抗放大器208本身處理單端至差動的轉換，其一般而言需要額外的電路。
雖然第二B圖描繪雙極實作，但根據替代的具體實施例，第二B圖中繪示的示意圖也可以利用共閘級輸入緩衝器與差動共汲級實作於金氧半導體(MOS)技術中。
在某些應用中，輸入訊號202可以在該電路的操作動態範圍上於數個數量級上變化。因為在共射極220(a)中該經驅動雙極電晶體104(b)的平均基級電壓係直接正比於該平均輸入電流，因此如第二B圖中描繪不以適宜的處置而使用臨界電路206之一簡單固定臨界電壓108常常是不實際的。特別是使用固定電壓源108的限幅臨界值之決定可能造成受限的動態範圍及/或輸出電壓波形跨及差動輸出214(a)及214(b)的顯著扭曲。
為了緩和此潛在行為，如第三A圖至第六B圖描繪的各種具體實施例係可在廣泛範圍的預期平均輸入電流202操作，其特徵為在像是光電的各種應用中所能預期的操作動態範圍。
根據第三A圖至第四B圖中描繪之具體實施例中所敘述的解 決方法，產生變化決策臨界值以確保在廣泛範圍的輸入電流訊號水平進行適宜的限幅。
根據第五A圖至第五B圖中描繪之具體實施例中所敘述的另一解決方法，一偏置電流與一共基級的基級電壓係經操縱以抵銷該經驅動共射極裝置基級電壓於該輸入電流訊號水平上的相關性。此解決方法也可立即應用於MOS技術中，類似一共源級的閘電壓可被操縱以抵銷一經驅動共閘級的相關性。
第六A圖至第六B圖描述同時應用兩種解決方式的具體實施例。
第三A圖為根據一具體實施例具有單端輸入之一平衡差動轉阻抗放大器的方塊圖，其利用一電流平均臨界電路。如第三A圖描繪，平衡差動轉阻抗放大器200可以包括輸入電流緩衝器204、臨界電路206與差動轉阻抗放大器208。
在第三A圖描繪的具體實施例中，臨界電路206包括電流平均電路302與複製電流緩衝器304。輸入訊號202被提供至輸入電流緩衝器204，其在輸入電流緩衝器輸出218處產生輸出訊號(未顯示於第三A圖)，其接著通過輸入212(a)被提供至差動轉阻抗放大器208。
如第三A圖繪示，輸入訊號202被同時提供至臨界電路206，臨界電路206包括電流平均電路302與複製電流緩衝器304。根據一具體實施例，電流平均電路302可以過濾輸入訊號202以產生該輸入訊號202之一時間平均DC成分(未顯示於第三A圖)，其被提供至複製電流緩衝器304。根據一具體實施例，複製電流緩衝器304係為一電流緩衝器，其具有與輸入電流 緩衝器204相似或相同的特性(及拓撲)。複製電流緩衝器304產生通過閥值電路輸出216的輸出訊號，其被提供至差動轉阻抗放大器208的輸入212(b)。
差動轉阻抗放大器208如先前針對第二A圖敘述般操作。特別是，差動轉阻抗放大器208接收透過第一與第二差動輸入212(a)及212(b)的差動輸入訊號(未顯示於第二A圖)，以產生透過差動輸出214(a)及214(b)的差動輸出訊號(未顯示於第二A圖)。
根據一具體實施例，輸入電流緩衝器204與複製電流緩衝器304可被取為相同，而兩者都具有經過濾或未經過濾的相同輸入電流訊號202。因此，對於差動轉阻抗放大器208的輸入與因此差動轉阻抗放大器208的輸出(214(a)及214(b))本質上係為平衡，而造成在廣泛範圍輸入電流水平上的適宜操作。
第三B圖為根據一具體實施例具有單端輸入之一平衡差動轉阻抗放大器的示意圖，其利用一電流平均臨界電路。第三B圖繪示輸入電流202其可以例如從一光二極體(未顯示於第三B圖)所產生。根據此具體實施例，複製共基輸入級304與該平均輸入電流的鏡像複製(未顯示於第三B圖)係用於產生在共射極220(b)輸入(未驅動)處的臨界電壓，以設定差動對208的限幅臨界值，該限幅臨界值係位於以該輸入電流訊號202的中點處。
參考第三B圖，輸入電流緩衝器204係經實作如在此稱做為「基本共基級」，其包括雙極電晶體104(a)與電阻器106(f)。根據此具體實施例，複製電流緩衝器304在此被稱做為「複製共基級」，其經實作為如同 利用雙極電晶體104(d)與電阻器106(g)的共基級，其具有與基本共基級204(a)對應及個別元件為相同的大小及特徵，也就是與雙極電晶體104(a)與電阻器106(f)相同。
共基級偏置鏡340包括p通道場發射電晶體(PFET)330(b)、330(c)及330(d)，其與該電晶體104(a)及104(d)的共有基級電壓組合，使得基本共基級204與複製共基級304受到相同的偏置。
第三B圖也繪示偵測器電流鏡342，其包括p通道場發射電晶體330(a)與330(e)。偵測器電流鏡342將該輸入電流之DC時間平均數值的經過濾複製注入至複製共基級304。
根據一具體實施例，偵測器電流鏡342的p通道場發射電晶體係假設相較於由一輸入源(未顯示於第三B圖)所產生之輸入電流資料的最小資料頻率內容而言，為十分低的頻率響應，該輸入源用於產生輸入電流202。如果不是這種情況，偵測器電流鏡342p通道場發射電晶體裝置330(a)的閘極/汲極可經電容負載，以確保注入至複製共基級204(b)之中的電流係等於該輸入電流的DC平均數值，且交流電流(AC)內容係被有效濾除。
根據一具體實施例，差動轉阻抗放大器208係為一種包括第一共射極220(a)與第二共射極220(b)的差動對。第一共射極220(a)包括雙極電晶體104(b)、回授電阻器106(d)與負載電阻器106(b)。第二共射極220(b)包括雙極電晶體104(c)、回授電阻器106(e)與負載電阻器106(c)。
假設該輸入訊號202中例如由一光二極體產生輸入資料內容係為DC平衡，則進入複製共基級304的電流將等於由電流源202所提供之輸入電流擺幅的中點。這將造成至兩者共射極220(a)及220(b)之輸入訊號以及 輸出電壓214(a)及214(b)的平衡。據此，輸出電壓214(a)及214(b)將為對稱，並在廣泛範圍輸入電流振幅上良好平衡，且不管差動轉阻抗放大器208係以線性或切換模式操作。
雖然第三B圖描繪一雙極實作，但根據替代具體實施例，第三B圖中繪示的示意圖也可以實作於利用共閘級、複製共閘級與差動共源級的金氧半導體(MOS)技術中。
第四A圖為根據一具體實施例具有單端輸入的平衡差動轉阻抗放大器的方塊圖，其利用一電壓平均臨界電路。如第四A圖中繪示，平衡差動轉阻抗放大器200可以包括輸入電流緩衝器204、臨界電路206與差動轉阻抗放大器208。
差動轉阻抗放大器208如先前針對第二A圖敘述般操作。特別是，差動轉阻抗放大器208接收透過第一與第二差動輸入212(a)及212(b)的差動輸入訊號(未顯於第四A圖)，以產生透過差動輸出214(a)及214(b)的差動輸出訊號(未顯示於第二A圖)。
根據一具體實施例，臨界電路206可以包括電壓平均電路402，其允許產生被施加至差動轉阻抗放大器208的適宜變化決策臨界值，以確保在廣泛範圍的電流訊號水平上適宜限幅。根據一具體實施例，電壓平均電路402施行來自轉阻抗放大器208透過差動輸出214(a)及214(b)所接收之差動輸入訊號的平均操作。用於施行電壓平均的示例具體實施例與拓撲則針對第四B圖敘述。
差動轉阻抗放大器208的差分輸出訊號214(a)及214(b)係被提供至臨界電路206中的電壓平均電路402。電壓平均電路402於臨界電路 206的輸出216處產生平均電壓訊號(未顯示於第四A圖)，其接著被提供至差動轉阻抗放大器208的輸入212(b)，藉此建立用於放大輸入訊號202的適宜限幅臨界值。
輸入訊號202被提供至輸入電流緩衝器204，其在輸出218處產生一輸出訊號(未顯示於第四A圖)，其接著透過輸入212(a)被提供至差動轉阻抗放大器208。
第四B圖為根據一具體實施例具有單端輸入的平衡差動共射極轉阻抗放大器的示意圖，其利用一電壓平均臨界電路。如之前針對第二B圖與第三B圖敘述，差動轉阻抗放大器208可被實作為一差動對，其包括第一共射極220(a)與第二共射極220(b)。第一共射極220(a)包括雙極電晶體104(b)、回授電阻器106(d)與負載電阻器106(b)。第二共射極220(b)包括雙極電晶體104(c)、回授電阻器106(e)與負載電阻器106(c)。
如第四B圖中繪示，臨界電路206在共射極220(b)(未驅動)處產生一可變臨界電壓，以在廣泛範圍輸入訊號水平上保持差動對208的中心限幅水平。
根據一具體實施例，臨界電路206包括位於低頻回授回路中的一或多個放大器以產生適宜的臨界電壓，以維持一平衡輸出。具體來說，根據第四B圖繪示之具體實施例，臨界電路206包括取樣電路424與增益電路422。取樣電路424可以包括一高阻抗操作放大器，其接收差動輸入訊號並產生單端輸出訊號。選擇性的增益電路422包括任何數量的增益級，其也可實作為差動放大器，像是可能需用於利用有效的輸入電壓振幅呈現取樣電路424，以在共射極220(b)(未驅動)輸入處產生一適宜的臨界電壓。
如果臨界電路206係被實作為如第四B圖中描繪可能包括取樣電路424與增益電路422的一或多個操作放大器，那麼臨界電路206將試圖建立一輸出電壓，該輸出電壓將其輸入214(a)、214(b)之間的差異驅動為零。只要所述包括構成臨界電路206之操作放大器的頻率響應係比在輸入訊號202中最小資料頻率內容為低，那麼臨界電路206將只對在其輸入214(a)、214(b)處的時間變化電壓訊號的DC平均數值進行反應。利用此佈置，臨界電路206包括一低頻回授回路將對於廣泛範圍輸入訊號水平202建立差動對208的適宜中點臨界/限幅電壓以及在共射極220(a)(未驅動)輸入處的輸入電壓。
第五A圖為根據一具體實施例具有單端輸入的平衡差動轉阻抗放大器的方塊圖，其利用用於控制一輸入電流緩衝器之偏置的電流平均電路與一固定臨界電路。根據此具體實施例，電流平均電路302係如同先前針對第三A圖敘述般作用，並針對輸入電流緩衝器204佈置，以取消在差動轉阻抗放大器208處對於輸入訊號202之振幅或平均數值的任何相關性。
特別是，參考第五A圖，輸入訊號202被供應至電流平均電路302的輸入502，其施行輸入訊號電流202的平均。電流平均電路302的輸出506係連接至輸入電流緩衝器的輸入504(a)。根據一具體實施例，輸入504(a)可用於控制與輸入電流緩衝器204相關的一偏置源。輸入電流緩衝器204的輸出218係連接至差動轉阻抗放大器208的輸入212(a)。臨界電路206包括固定臨界電路506，其例如可為一固定電壓源。
輸入訊號202也供應至輸入電流緩衝器204的輸入504(b)。根據如第五A圖中描繪般電流平均電路302與輸入電流緩衝器204的連接佈 置，在差動轉阻抗放大器208輸入212(a)處的輸入訊號(未顯示於第五A圖)的呈現係與輸入訊號電流202平均(共同模式)數值的變化無關。
在差動轉阻抗放大器208的驅動輸入212(a)之輸入振幅的平均數值的範圍係與輸入訊號電流202平均數值無關，便可以有效消除如先前針對第二A圖與第二B圖所討論關於動態範圍使用一固定電壓臨界的限制。
第五B圖為根據一具體實施例具有單端輸入的平衡差動共射極轉阻抗放大器的示意圖，其利用用於控制一輸入電流緩衝器之偏置的電流平均電路與一固定臨界電路。如在第五B圖中反映的輸入電流202在此稱做為IIN。在第五B圖繪示的具體實施例利用該基本共基級204(a)的複製共基級204(b)，以控制該基本共基級204(a)的基級電壓/偏置。為了對於廣泛範圍輸入電流202水平維持例如由一光二極體所產生的固定平均電流與輸出電壓，增加正比於輸入電流IIN之DC(或平均AC)的額外電流至複製共基級204(b)的偏置。特別是，根據第五B圖繪示的具體實施例，複製共基級204(b)係利用如由該電流平均電路302所提供之一固定DC成分以及正比於輸入電流IIN之DC平均的成分兩者進行偏置。如在此將被討論的，正比於輸入電流IIN之DC平均的額外成分係透過偵測器電流鏡522引入。
如先前針對第二B圖、第三B圖及第四B圖敘述，差動轉阻抗放大器208可被實作為一差動對，其包括第一共射極220(a)與第二共射極220(b)。第一共射極220(a)包括雙極電晶體104(b)、回授電阻器106(d)與負載電阻器106(b)。第二共射極220(b)包括雙極電晶體104(c)、回授電阻器106(e)與負載電阻器106(c)。
基本共基級204(a)包括雙極電晶體104(a)與電阻器106(a)。複 製共基級204(b)包括雙極電晶體104(d)與電阻器106(e)。包括PFET 330(g)、330(h)及330(i)的偏置鏡520使得基本共基級204(a)與複製共基級204(b)以相同的DC電流偏置而不進行輸出。PFET 330(h)及330(i)操作為一鏡像電流源。包括PFET 330(f)及330(j)的偵測器電流鏡522提供正比於如由電流平均電路302所產生之平均DC輸入電流202(IIN)的額外輸入電流至複製共基級204(b)。如第五B圖繪示，臨界電路206包括一固定電壓源108。
如果缺乏引入偵測器電流鏡522，根據 I' BIAS = I BIAS - I IN ，該基本共基級204(a)中雙極電晶體104(a)中的平均電流，將隨著增加DC或平均瞬變輸入電流而下降。這將造成來自鏡像電流源330(h)固定電流流至共射極220(a)之輸入的部分增加，造成輸入電壓上升。這將造成差動對208的失衡，除非臨界電流206中臨界電壓108增加以進行補償。
為了補償根據第五B圖描繪之具體實施例的可能失衡，利用引入偵測器電流鏡522的方式，將正比於電流IIN之DC(或平均AC)成分的額外電流被引入至複製共基級204(b)的偏置。偵測器電流鏡522用以下方式增加複製共基級204(b)雙極電晶體104(d)中的偏置電流： I" BIAS = I BIAS + I IN
因為複製共基級204(b)中雙極電晶體104(d)設定基本共基級204(a)中雙極電晶體104(a)的基級電壓，因此其將試圖在雙極電晶體104(a)中的電流偏置設定為 I BIAS + I IN 。偵測器電流鏡522與偏置鏡520的操作係為線性，因此該組合效果為兩者的疊加，因此在基本共基級204(a)雙極電晶體104(a)中的淨電流為： I' BIAS = I" BIAS - I IN = I BIAS + I IN - I IN = I BIAS
因此，引入偵測器電流鏡522使得基本共基級204(a)雙極電 晶體104(a)中的平均電流與電流202(IIN)的DC或AC振幅無關。據此，呈現至差動轉阻抗放大器208之共射極220(a)(未驅動)輸入的輸出電壓的呈現也與該平均電流202(IIN)無關。這允許在共射極220(b)輸入(未驅動輸入)處利用由臨界電路206所產生的固定臨界電壓108，而由於非中心限幅水平消除如關於第二A圖至第二B圖所敘述之具體實施例所標註的限制，而不受到電路動態範圍的限制或造成扭曲。
如對於第三B圖所討論，電流平均電路302中的PFET 330(f)係假定具有比起輸入電流訊號202(IIN)的最小資料頻率內容，為十分低的頻率響應。如果不是這種情況，電流平均電路302中PFET裝置330(f)的閘極/汲極可經電容負載，以確保注入至複製共基級204(b)之中的電流係等於該輸入電流IIN的DC平均數值。
複製共基級204(b)中雙極裝置104(d)與電阻器106(e)的特性與大小可被設定為與基本共基級204(a)中個別對應的裝置104(a)及106(a)相同，或可以以相等比例縮放，以在該偏置鏡520與偵測鏡522中的PFET 330(i)及330(j)與也分別相對於330(h)及330(f)以相等比例縮放時，能以較少的負荷電流及/或功率下，產生相同的行為。雖然第五B圖中描繪的具體實施例係利用雙極互補MOS(BICMOS)技術實作，但其也可以利用互補MOS(CMOS)或只以雙極裝置實作。
第六A圖為根據一具體實施例具有單端輸入的平衡差動轉阻抗放大器的方塊圖，其利用用於控制一輸入電流緩衝器204之偏置的電流平均電路302與一電壓平均臨界電路402兩者。將電流平均電路302與電壓平均電路402兩者結合提供在非理想裝置存在下維持精確臨界電壓/限幅水平 的優點，並也降低在操作放大器回路上的追蹤範圍需求。這些優點將從第六B圖與相關的敘述變的清楚。
特別是，參考第六A圖，輸入訊號202被供應至電流平均電路302的輸入502，該電流平均電路302執行輸入訊號電流202的平均。電流平均電路302的輸出506連接至輸入電流緩衝器204的輸入504(a)。根據一具體實施例，輸入504(a)可用於控制與輸入電流緩衝器204關聯的偏置訊號。輸入電流緩衝器204的輸出218連接至差動轉阻抗放大器208的輸入212(a)。
臨界電路206包括電壓平均電路402，其允許施加至差動轉阻抗放大器208的適宜變化決策臨界值產生，以確保對廣泛範圍電流訊號水平的適宜限幅。根據一具體實施例，電壓平均電路402執行來自轉阻抗放大器208透過差動輸出214(a)及214(b)所接收的差動輸出訊號平均。執行電壓平均的示例拓撲則於第四B圖中描繪。
差動轉阻抗放大器208的差動輸出訊號214(a)及214(b)係被提供至臨界電路206中的電壓平均電路402。電壓平均電路402在臨界電路206輸出216處產生平均電壓訊號(未顯示於第四A圖)，其接著被提供至差動轉阻抗放大器208的輸入212(b)，藉此建立用於放大輸入訊號202的適宜限幅臨界值。
輸入訊號202也被供應至輸入電流緩衝器204的輸入504(b)。根據如第六A圖描繪電壓平均電路402與輸入電流緩衝器204的結合佈置，在差動轉阻抗放大器208輸入212(a)處的輸入訊號(未顯示於第六A圖)的呈現，係與輸入訊號電流202的平均(共同模式)數值的變化無關。
第六B圖為根據一具體實施例具有單端輸入的平衡差動共 射極轉阻抗放大器的示意圖，其利用用於控制一主要輸入電流緩衝器之偏置的一基本共基級輸入緩衝器的鏡像複製與一電壓平均臨界電路兩者。特別是，第六B圖描繪的具體實施例組合一共基級緩衝器的鏡像複製，以使關於輸入電流水平的電壓變化最小化，這與對於第五B圖所敘述之具體實施例類似。此外，第六B圖描繪的具體實施例運用一操作放大器低頻回授回路，以在存在不理想裝置時產生適宜的臨界電壓/限幅水平，這與對於第四B圖所敘述之具體實施例類似。
與第五B圖繪示的具體實施例類似，第六B圖描繪的具體實施例利用該基本共基級204(a)的複製共基級204(b)控制該基本共基級204(a)的基級電壓/偏置。為了對於廣泛範圍輸入電流202水平維持例如由一光二極體所產生的固定平均電流與輸出電壓，複製共基級204(b)係利用一固定DC成分與正比於如由電流平均電路302所提供之輸入電流DC平均的成分兩者所偏置。
此外，與第四B圖描繪的具體實施例類似，第六B圖描繪的具體實施例運用臨界電路206，其在共射極220(b)(未驅動)的輸入處產生一可變臨界電壓，以在廣泛範圍輸入訊號水平上保持差動對208的一中心限幅水平。
根據一具體實施例，臨界電路206包括在一低頻回授回路中的一或多個放大器，以產生一適宜臨界電壓，以為持一平衡輸出。具體來說，與第四B圖繪示的具體實施例類似，第六B圖的臨界電路206可以包括取樣電路424與增益電路422。取樣電路424可以包括一高阻抗操作放大器，其接收一差動輸入訊號並產生一單端輸出訊號。選擇性的增益電路422包括任 何數量的增益級，其也可實作為差動放大器，像是可能需利用足夠的輸入電壓振幅呈現取樣電路424，以在共射極220(b)(未驅動)輸入處產生一適宜的臨界電壓。
雖然本發明已經參考如圖式中所描繪的較佳模式特別繪示及敘述，但該領域技術人員將可瞭解到在不背離由該等申請專利範圍所定義之本發明精神與範圍下，可以進行各種細節改變。
200‧‧‧平衡差動轉阻抗放大器
202‧‧‧輸入電流
204‧‧‧輸入電流緩衝器
206‧‧‧臨界電路
208‧‧‧差動轉阻抗放大器
212(a)‧‧‧差動輸入
212(b)‧‧‧差動輸入
214(a)‧‧‧差動輸出
214(b)‧‧‧差動輸出
216‧‧‧輸出
218‧‧‧輸出
220‧‧‧共射極

Claims (20)

  1. 一種具有單端輸入的平衡差動轉阻抗放大器，包括：a)一差動轉阻抗級，該差動轉阻抗級進一步包括一第一輸入與一第二輸入；b)一輸入電流緩衝器級，其中該輸入電流緩衝器級的輸出係連接至該差動轉阻抗級的第一輸入；及c)一臨界電路，用於產生平衡該差動轉阻抗級的臨界電壓，其中該臨界電路的一輸出係連接至該差動轉阻抗級的第二輸入。
  2. 如申請專利範圍第1項之平衡差動轉阻抗放大器，其中該臨界電路接收至少一輸入訊號，並對該至少一輸入訊號執行一平均操作，以產生該臨界電路的輸出。
  3. 如申請專利範圍第1項之平衡差動轉阻抗放大器，其中該臨界電壓為一固定電壓。
  4. 如申請專利範圍第1項之平衡差動轉阻抗放大器，其中該輸入電流緩衝器級係為一共基級與一共閘級之一。
  5. 如申請專利範圍第1項之平衡差動轉阻抗放大器，其中該差動對包括一共射極與共源極差動對之一。
  6. 如申請專利範圍第1項之平衡差動轉阻抗放大器，其中該輸入電流緩衝器級係經佈置，以將與該差動轉阻抗級相關的阻抗及與一輸入電流源相關的電容解耦。
  7. 如申請專利範圍第1項之平衡差動轉阻抗放大器，其中該臨界電路進一步包括一平均電路與一複製電流緩衝器，該平均電路係與該複製電 流緩衝器串聯連接，而該複製電流緩衝器係與該轉阻抗級的第二輸入串聯連接。
  8. 如申請專利範圍第7項之平衡差動轉轉阻抗放大器，其中該電流平均電路接收一輸入訊號，並產生以該輸入訊號為函數的直流電(DC)時間平均訊號。
  9. 一種具有單端輸入的平衡差動轉阻抗放大器，包括：a)一轉阻抗級，該轉阻抗級包括一差動對，該差動對進一步包括一第一輸入、一第二輸入、一第一輸出與一第二輸出；b)一輸入電流緩衝器級，其中該輸入電流緩衝器級的輸出係連接至該差動轉阻抗級的第一輸入；及c)一臨界電路，其進一步包括一電壓平均電路，其中該電壓平均電路的輸出係連接至該轉阻抗級的第二輸入，而該轉阻抗級的第一與第二輸出係分別連接至該電壓平均電路的第一與第二輸入。
  10. 如申請專利範圍第9項之平衡差動轉阻抗放大器，其中該電壓平均電路進一步包括一取樣電路與一增益電路。
  11. 如申請專利範圍第10項之平衡差動轉阻抗放大器，其中該取樣電路包括一高阻抗操作放大器，其接收一差分輸入訊號，並產生一單端輸出訊號。
  12. 如申請專利範圍第10項之平衡差動轉阻抗放大器，其中該增益電路包括複數個增益級，其實作成為差動放大器。
  13. 如申請專利範圍第9項之平衡差動轉阻抗放大器，其中該差動對包括一共射極差動對。
  14. 如申請專利範圍第9項之平衡差動轉阻抗放大器，其中該輸入電流緩衝器級係經佈置，以將與該轉阻抗級相關的阻抗及與一輸入電流源相關的電容解耦。
  15. 一種具有單端輸入的平衡差動轉阻抗放大器，包括：a)一轉阻抗級，該轉阻抗級包括一差動對，該差動對進一步包括一第一輸入與一第二輸入；b)一輸入電流緩衝器級，其包括一第一輸入與一第二輸入，其中一輸入電流源係連接至該輸入電流緩衝器的第一輸入，而該輸入電流緩衝器的輸出係連接至該轉阻抗級的第一輸入；c)一電流平均電路，其串聯連接於該輸入電流源及該輸入電流緩衝器第二輸入之間，其中該電流平均電路接收該輸入電流源，並根據該輸入電流源產生一直流電(DC)時間平均訊號；及d)一臨界電路，其中該臨界電路的輸出係連接至該轉阻抗級的第二輸入。
  16. 如申請專利範圍第15項之平衡差動轉阻抗放大器，其中該臨界電路為一固定臨界電路。
  17. 如申請專利範圍第15項之平衡差動轉阻抗放大器，其中該臨界電路為一電壓平均電路。
  18. 如申請專利範圍第17項之平衡差動轉阻抗放大器，其中該電壓平均電路接收該轉阻抗級第一與第二電壓輸出，並根據該第一與第二電壓輸出產生一平均電壓訊號。
  19. 如申請專利範圍第15項之平衡差分跨阻抗放大器，其中該差分對為一 共發射差分對與一共來源差分對之一。
  20. 如申請專利範圍第15項之平衡跨阻抗放大器，其中該電流緩衝器級係經佈置，以將與該跨阻抗級相關的阻抗及與該輸入來源相關的電容解耦。
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