TW201637536A - 以介電質直接貼件之內埋電子元件電路板製造方法 - Google Patents

以介電質直接貼件之內埋電子元件電路板製造方法 Download PDF

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TW201637536A
TW201637536A TW104111751A TW104111751A TW201637536A TW 201637536 A TW201637536 A TW 201637536A TW 104111751 A TW104111751 A TW 104111751A TW 104111751 A TW104111751 A TW 104111751A TW 201637536 A TW201637536 A TW 201637536A
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layer
electronic component
dielectric layer
circuit
dielectric
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TW104111751A
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TWI618462B (zh
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Ming-Yi Ye
Shun-Yue Xu
Kun-Qi Chen
Hong-Ming Chen
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Unitech Printed Circuit Board Corp
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Abstract

本發明係一種以介電質直接貼件之內埋電子元件電路板製造方法，其係提供一銅箔層基材；貼覆一第一介電層於該銅箔層基材上，該第一介電層具有黏性；於該第一介電層與該銅箔層基材上製作複數個導通孔，該等導通孔位置係與預定設置於該第一介電層上之至少一電子元件之電極一一對應；本案上述特徵能使得後續置入電子元件時，該電子元件與該等導通孔可精準定位，並且利用具有黏性的第一介電層，在其上直接貼置電子元件，能節省先前技術需使用膠材或金屬導電膏的成本，本發明在產業上具有很大之利用價值，可改良習用技術之缺點，增進效益及效率。

Description

以介電質直接貼件之內埋電子元件電路板製造方法
本發明係一種電路板之製造方法，尤指關於一種以介電質直接貼件之內埋電子元件電路板製造方法。
按，快速及高密度兩項要求一直是高科技發展之驅動力，目的是除了可以降低生產成本外，最重要的還是要滿足消費者需求，因而電子產品與行動通訊產品朝著輕薄短小、多功能、高可靠度與低價化，正以每三、五年一個世代的速度進行著；順應這個趨勢，在電子產品的電路設計中，面積佔據最大的電子元件也正在進行一整合化的革命。
在印刷電路板上，電子元件的體積所占用的面積是產品小型化最大的限制，再加上過多的焊接點除了降低系統的可靠度，也增加了產品製造成本，在強調高功能、小體積、重量輕的需求下，進一步希望能在有限的印刷電路板基板面積中，創造出更大的空間並提升模組的多功能性，因此，電子元件的整合及內埋化成重要發展趨勢。
為解決上述課題，如中華民國專利公告：第518616號「製作內嵌被動元件之多層電路板方法」，係以整合製成多種膜狀電子元件於一多層電路板中；其關鍵除了是將電路板內埋此類厚膜或薄膜電子元件的製程能力，該電子元件在整合於多層電路板中後，如何保持其良好的電性精確度，及如何將與原先設計值之間的差異降到最小，並且其電子元件需使用膠材或金屬導電膏才能貼覆於介電層上，其成本較高且製程較複雜，該技術仍存有若干缺失。
緣此，本發明人有鑑於習知電路板製造上之缺失問題，及其 方法上未臻理想之事實，本案發明人即著手研發構思其解決方案，希望能開發出一種更具製造精準性、效率性及品質穩定性的內埋電子元件電路板製造方法，以促進此業之發展，遂經多時之構思而有本發明之產生。
發明人有鑑於上述製法於實施時之缺失，爰精心研究，再進一步發展出本案一種以介電質直接貼件之內埋電子元件電路板製造方法。
本創作之目的在提供一種以介電質直接貼件之內埋電子元件電路板製造方法，其係在內埋電子元件之前先設置複數個導通孔，該等導通孔位置係與預定設置之至少一電子元件之電極一一對應，使得後續置入電子元件時，該電子元件與該等導通孔可精準定位；並且利用具有黏性的第一介電層，在其上直接貼置電子元件，能節省先前技術需使用膠材或金屬導電膏的成本。
本創作為達上述目的所採用之技術手段係包括：一銅箔層基材，該銅箔層基材包括有一銅箔層；貼覆一第一介電層於該銅箔層基材上，該第一介電層具有黏性；於該第一介電層與該銅箔層基材上製作複數個導通孔，該等導通孔位置係與預定設置於該第一介電層上之至少一電子元件之電極一一對應；置放該至少一電子元件於該第一介電層上，使得該電子元件電極位置係與該等導通孔一一對應；續置放一具有可容納該電子元件開槽之線路基板於該電子元件兩側，使該電子元件容納於該開槽內，該線路基板具有一第二介電層與設於該第二介電層下方的一第二電路層與設於該第二介電層上方的一第三電路層；續於該電子元件及該線路基板上疊合一第三介電層及一該第三介電層上方的增層電路層，然後壓合該第三介電層與該增層電路層於該電子元件及該線路基板上，且該第三介電層係具有可塑性，如此即完成一基礎電路板。
前述構成，其中該銅箔層基材上設有一第一電路層。
前述構成，其中該銅箔層基材進一步包括有聚亞醯胺或玻璃 纖維膠片所構成之基板，且該銅箔層係貼覆於該基板上。
前述構成，其中該第一介電層、第二介電層、第三介電層係為具有高樹脂含量之聚酯膠片(Prepreg)、介電薄膜(Dielectric Film)以及聚酯膠片與介電薄膜組合之其中之一。
前述構成，其中該第一介電層、第二介電層或第三介電層係由複數層相疊合而成。
前述構成，其於壓合該增層電路層於該基礎電路板上並壓合一第三介電層於該電子元件及該線路基板上後，續對該等導通孔進行化銅、通孔電鍍之程序，並透過機械鑽孔鑽出貫通整個電路板之貫穿孔，且對該貫穿孔進行化銅、通孔電鍍之程序。
前述構成，其於對該等導通孔進行化銅、通孔電鍍之程序，並透過機械鑽孔鑽出貫通整個電路板之貫穿孔，且對該貫穿孔進行化銅、通孔電鍍之程序後，續對該增層電路層、第一電路層、第二電路層、第三電路層線路化，即將其藉由壓膜、曝光、顯影、蝕刻方式製作完成線路化。
前述構成，其中該電子元件為主動電子元件、被動電子元件或發光元件。
前述構成，其中該電子元件為發光元件，該發光元件為發光二極體。
前述構成，其於進行後續該基礎電路板上增設增層電路層時，該增層電路層相對於該發光元件位置設有一開口，以使該發光元件露出，而不被遮住。
20‧‧‧銅箔層基材
21‧‧‧第一電路層
22‧‧‧第一介電層
24‧‧‧導通孔
26‧‧‧電子元件
262‧‧‧電極
27‧‧‧被動電子元件
28‧‧‧主動電子元件
29‧‧‧發光元件
30‧‧‧線路基板
31‧‧‧第二介電層
32‧‧‧第二電路層
34‧‧‧第三電路層
36‧‧‧第三介電層
38‧‧‧增層電路層
39‧‧‧開槽
40‧‧‧電鍍層
42‧‧‧貫穿孔
52‧‧‧開口
第1圖為本發明之主要實施方式之第一步驟。
第2圖為本發明之主要實施方式之第二步驟。
第3A~3C圖為本發明之主要實施方式之第三步驟。
第4A圖為本發明之主要實施方式之第四步驟。
第4B圖為本發明之線路基板係預先進行切割加工示意圖。
第5圖為本發明之主要實施方式之第五步驟。
第6圖為本發明之主要實施方式之第六步驟。
第7圖為本發明之另一實施例示意圖。
請參照第1~6圖所示，其係本發明一種以介電質直接貼件之內埋電子元件電路板製造方法之主要實施方式，其製造方法包括有：如第1圖所示，提供一銅箔層基材20，該銅箔層基材20包括有一銅箔層；貼覆一第一介電層22於該銅箔層基材20上，該第一介電層22具有黏性；其中，該銅箔層基材20上設有一第一電路層21，該第一電路層21並於該銅箔層上藉由壓膜、曝光、顯影、蝕刻方式製作完成線路化；如第2圖所示，續於該第一介電層22與該銅箔層基材20上製作複數個導通孔24，該等導通孔24位置係與預定設置於該第一介電層22上之至少一電子元件26之電極262(請參第3A圖)一一對應；如第3A圖所示，續利用該等導通孔24之位置，對位置放該至少一電子元件26於該第一介電層22上，使得該電子元件26之電極262位置係與該等導通孔24一一對應；其中，該電子元件26可為主動電子元件28(如晶片)、被動電子元件27(如電阻、電容、電感)，或為發光元件29(如發光二極體等)，或為前述之組合，該電子元件26之種類與數量並無限制，於本實施例中，係以一個主動電子元件28與2個被動電子元件27舉例說明，此例可看出該電子元件26之電極262位置係很精準的與該等導通孔24的位置一一對應，使得該電子元件26與該第一電路層21訊號的傳遞也十分精準；如第3B圖所示，係為該電子元件26為被動電子元件27之情況；如第3C圖所示，係為該電子元件26為主動電子元件28之情況；如第4A圖所示，續置放一具有可容納該電子元件26開槽39之線路基板30於該電子元件26兩側，使該電子元件26容納於該開槽39內，該 線路基板30具有一第二介電層31與設於該第二介電層31下方的一第二電路層32與設於該第二介電層31上方的一第三電路層34；如第4B圖所示，其中該線路基板30係預先進行加工，使該線路基板30產生具有可容納該電子元件26的開槽39，而可置放於該電子元件26兩側，該加工係預先設置製作，其並不在電路板上製作，實際上其係為平行製造，另行以工具進行加工，此加工工具可依精度之需求選擇不同之加工方式，例如以CNC、沖模或雷射等工具進行切割加工，可降低生產成本並提高生產效率；如第4A圖所示，續於該電子元件26及該線路基板30上疊合一第三介電層36及一該第三介電層36上方的增層電路層38(銅箔層)，然後壓合該第三介電層36與該增層電路層38於該電子元件26及該線路基板30上，且該第三介電層36係具有可塑性，如此即完成一基礎電路板；如第5圖所示，續進行金屬化導通該電子元件26與外層線路，即對該等導通孔24進行化銅、通孔電鍍之程序，並透過機械鑽孔鑽出貫通整個電路板之貫穿孔42，且對該貫穿孔42進行化銅、通孔電鍍之程序，使該電子元件26與該基礎電路板呈電導通並且使該電子元件26與該增層電路層38、第一電路層21、第二電路層32、第三電路層34呈電導通，即增加一電鍍層40使信號能電導通；如第6圖所示，續對該增層電路層38、第一電路層21、第二電路層32、第三電路層34線路化，即將其藉由壓膜、曝光、顯影、蝕刻方式製作完成線路化；如第7圖所示，當該電子元件26亦可為發光元件29(如發光二極體)時，其與主動電子元件、被動電子元件製造方法略有不同：係於該基礎電路板上增設增層電路層38之增層時，該增層電路層38相對於該發光元件29位置設有一開口52，以使該發光元件29露出，而不被遮住；上述之內埋電子元件之多層電路板製造方法：其中，該第一介電層22、第二介電層31、第三介電層36於本實施例係呈一片狀體，亦可以單層或複數層片體相疊合而成，並且其為具有可塑性之材質所構成，如高 樹脂含量之聚酯膠片(Prepreg)、介電薄膜(Dielectric Film)以及聚酯膠片與介電薄膜組合之其中之一；如此，藉由該第三介電層36之可塑性質可以緊密填塞與該電子元件26與該線路基板30間之空隙，增加該電子元件26之固定強度；同樣地，於進行增層電路層38時，可增加受壓時之緩衝力道，並避免於製作過程中內埋之電子元件26因重力壓合而損壞。
本發明之以介電質直接貼件之內埋電子元件電路板製造方法，其係在內埋電子元件26之前先設置複數個導通孔24，該等導通孔24位置係與預定設置之至少一電子元件26之電極262一一對應，使得後續置入電子元件26時，該電子元件26與該等導通孔24可精準定位，並且利用具有黏性的第一介電層22，在其上直接貼置電子元件26，能節省先前技術需使用膠材或金屬導電膏的成本，本發明在產業上具有很大之利用價值，可改良習用技術之缺點，增進效益及效率，充份符合發明專利之要件。
綜上所述，本發明確實為一相當優異之創思，爰依法提出發明專利申請；惟上述說明之內容，僅為本發明之較佳實施例而已，舉凡依本發明之技術手段所延伸之變化，理應落入本發明之專利申請範圍。
20‧‧‧銅箔層基材
21‧‧‧第一電路層
22‧‧‧第一介電層
262‧‧‧電極
27‧‧‧被動電子元件
28‧‧‧主動電子元件
30‧‧‧線路基板
31‧‧‧第二介電層
32‧‧‧第二電路層
34‧‧‧第三電路層
36‧‧‧第三介電層
38‧‧‧增層電路層
39‧‧‧開槽
40‧‧‧電鍍層
42‧‧‧貫穿孔

Claims (10)

  1. 一種以介電質直接貼件之內埋電子元件電路板製造方法，其係提供：一銅箔層基材，該銅箔層基材包括有一銅箔層；貼覆一第一介電層於該銅箔層基材上，該第一介電層具有黏性；於該第一介電層與該銅箔層基材上製作複數個導通孔，該等導通孔位置係與預定設置於該第一介電層上之至少一電子元件之電極一一對應；置放該至少一電子元件於該第一介電層上，使得該電子元件電極位置係與該等導通孔一一對應；續置放一具有可容納該電子元件開槽之線路基板於該電子元件兩側，使該電子元件容納於該開槽內，該線路基板具有一第二介電層與設於該第二介電層下方的一第二電路層與設於該第二介電層上方的一第三電路層；續於該電子元件及該線路基板上疊合一第三介電層及一該第三介電層上方的增層電路層，然後壓合該第三介電層與該增層電路層於該電子元件及該線路基板上，且該第三介電層係具有可塑性，如此即完成一基礎電路板。
  2. 如申請專利範圍第1項所述之以介電質直接貼件之內埋電子元件電路板製造方法，其銅箔層基材上設有一第一電路層。
  3. 如申請專利範圍第1項所述之以介電質直接貼件之內埋電子元件電路板製造方法，其銅箔層基材進一步包括有聚亞醯胺或玻璃纖維膠片所構成之基板，且該銅箔層係貼覆於該基板上。
  4. 如申請專利範圍第1項所述之以介電質直接貼件之內埋電子元件電路板製造方法，其第一介電層、第二介電層、第三介電層係為具有高樹脂含量之聚酯膠片(Prepreg)、介電薄膜(Dielectric Film)以及聚酯膠片與介電薄膜組合之其中之一。
  5. 如申請專利範圍第1項所述之以介電質直接貼件之內埋電子元件電路板製造方法，其第一介電層、第二介電層或第三介電層係由複數層相疊合而成。
  6. 如申請專利範圍第2項所述之以介電質直接貼件之內埋電子元件電路板 製造方法，於壓合該增層電路層於該基礎電路板上並壓合一第三介電層於該電子元件及該線路基板上後，續對該等導通孔進行化銅、通孔電鍍之程序，並透過機械鑽孔鑽出貫通整個電路板之貫穿孔，且對該貫穿孔進行化銅、通孔電鍍之程序。
  7. 如申請專利範圍第6項所述之以介電質直接貼件之內埋電子元件電路板製造方法，於對該等導通孔進行化銅、通孔電鍍之程序，並透過機械鑽孔鑽出貫通整個電路板之貫穿孔，且對該貫穿孔進行化銅、通孔電鍍之程序後，續對該增層電路層、第一電路層、第二電路層、第三電路層線路化，即將其藉由壓膜、曝光、顯影、蝕刻方式製作完成線路化。
  8. 如申請專利範圍第1項所述之以介電質直接貼件之內埋電子元件電路板製造方法，其電子元件為主動電子元件、被動電子元件或發光元件。
  9. 如申請專利範圍第8項所述之以介電質直接貼件之內埋電子元件電路板製造方法，其電子元件為發光元件，該發光元件為發光二極體。
  10. 如申請專利範圍第9項所述之以介電質直接貼件之內埋電子元件電路板製造方法，其於進行後續該基礎電路板上增設增層電路層時，該增層電路層相對於該發光元件位置設有一開口，以使該發光元件露出，而不被遮住。
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