TW201630493A - 將一構件作電接觸的方法及構件複合體 - Google Patents

將一構件作電接觸的方法及構件複合體 Download PDF

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Publication number
TW201630493A
TW201630493A TW104142928A TW104142928A TW201630493A TW 201630493 A TW201630493 A TW 201630493A TW 104142928 A TW104142928 A TW 104142928A TW 104142928 A TW104142928 A TW 104142928A TW 201630493 A TW201630493 A TW 201630493A
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Taiwan
Prior art keywords
component
circuit carrier
compensating element
conductive layer
connection
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TW104142928A
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English (en)
Chinese (zh)
Inventor
烏爾立希 沙夫
克里斯提娜 貝爾蕭
魯本 法爾
安德亞斯 庫格勒
恩諾 羅倫斯
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羅伯特博斯奇股份有限公司
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Application filed by 羅伯特博斯奇股份有限公司 filed Critical 羅伯特博斯奇股份有限公司
Publication of TW201630493A publication Critical patent/TW201630493A/zh

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/82Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L24/23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L24/24Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H01L2224/2401Structure
    • H01L2224/2402Laminated, e.g. MCM-L type
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H01L2224/2405Shape
    • H01L2224/24051Conformal with the semiconductor or solid-state device
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    • H01L2224/24221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
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    • H01L2224/24227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the HDI interconnect not connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the semiconductor or solid-state body being mounted in a cavity or on a protrusion of the item
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    • H01L2224/82102Forming a build-up interconnect by additive methods, e.g. direct writing using jetting, e.g. ink jet
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    • H01L2224/82Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
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    • H01L2224/92Specific sequence of method steps
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    • H01L2924/10Details of semiconductor or other solid state devices to be connected
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    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • H01L2924/143Digital devices
    • H01L2924/1433Application-specific integrated circuit [ASIC]
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    • H01L2924/181Encapsulation
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    • H01L2924/30Technical effects
    • H01L2924/37Effects of the manufacturing process
    • H01L2924/37001Yield

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
TW104142928A 2014-12-22 2015-12-21 將一構件作電接觸的方法及構件複合體 TW201630493A (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE102014226773.0A DE102014226773A1 (de) 2014-12-22 2014-12-22 Verfahren zum elektrischen Kontaktieren eines Bauteils und Bauteileverbund

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Publication Number Publication Date
TW201630493A true TW201630493A (zh) 2016-08-16

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Application Number Title Priority Date Filing Date
TW104142928A TW201630493A (zh) 2014-12-22 2015-12-21 將一構件作電接觸的方法及構件複合體

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DE (1) DE102014226773A1 (de)
TW (1) TW201630493A (de)
WO (1) WO2016102166A1 (de)

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4228274C2 (de) * 1992-08-26 1996-02-29 Siemens Ag Verfahren zur Kontaktierung von auf einem Träger angeordneten elektronischen oder optoelektronischen Bauelementen
US5637922A (en) * 1994-02-07 1997-06-10 General Electric Company Wireless radio frequency power semiconductor devices using high density interconnect
FR2818801B1 (fr) * 2000-12-21 2003-04-04 Gemplus Card Int Interconnexion par organe d'isolation decoupe et cordon de conduction
AT503191B1 (de) * 2006-02-02 2008-07-15 Austria Tech & System Tech Leiterplattenelement mit wenigstens einem eingebetteten bauelement sowie verfahren zum einbetten zumindest eines bauelements in einem leiterplattenelement
DE102013201926A1 (de) 2013-02-06 2014-08-07 Robert Bosch Gmbh Verfahren zum elektrischen Kontaktieren eines Bauteils und Bauteilverbund

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DE102014226773A1 (de) 2016-06-23

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