TW201535487A - 防止銅擴散的介電／金屬阻障集成 - Google Patents

防止銅擴散的介電／金屬阻障集成 Download PDF

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TW201535487A
TW201535487A TW104103440A TW104103440A TW201535487A TW 201535487 A TW201535487 A TW 201535487A TW 104103440 A TW104103440 A TW 104103440A TW 104103440 A TW104103440 A TW 104103440A TW 201535487 A TW201535487 A TW 201535487A
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layer
metal
dielectric layer
cobalt
low
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He Ren
Mehul B Naik
Yong Cao
Mei-Yee Shek
Ya-Na Cheng
Sree Rangasai V Kesapragada
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Applied Materials Inc
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Abstract

本文描述一種用於半導體元件的互連件結構與製造該互連件結構之方法。該方法包括將基板定位於真空處理腔室中。該基板具有暴露的銅表面與暴露的低k介電表面。金屬層形成於該銅表面上但不形成於該低k介電表面上。以金屬為基礎的介電層形成於該金屬層與該低k介電層上。

Description

防止銅擴散的介電/金屬阻障集成
本發明之態樣大體上關於用於半導體元件中的互連件結構(interconnect structure)與形成此類結構的方法。
近數十年來，積體電路上部件的特徵尺寸已逐漸減少。隨著特徵尺寸已減少，電腦已變得愈來愈強大且對消費者而言較不昂貴。為了該減少的趨勢能持續，環繞互連件的介電阻障物之厚度也必須減少。互連件連接積體電路上的不同部件。較薄的介電阻障物與介電阻障物的較低的介電常數相關，也與環繞該互連件的較低電容(以下稱線間(interline)電容)相關。習知的互連件由銅製成，銅是因為銅相較於其他金屬具高導電性而選。然而，銅擴散進入習知的介電阻障物，最終引發元件失效。遺憾的是，銅的擴散率隨著介電阻障物的厚度減少而放大。
因此，本技術中需要的是一種改良的互連件結構與形成此類結構的方法。
本發明之實施例涉及一種互連件結構與製造該互連件結構之方法。該方法包括將基板定位於真空處理腔室中。該基板具有暴露的銅表面與暴露的低k介電表面。金屬層沉積於該銅表面上。例如，該金屬層可選擇性地沉積於該銅表面上。該金屬層可包括鈷化合物。以金屬為基礎的介電層沉積於該金屬層上及沉積於至少部分的該介電表面上。該以金屬為基礎的介電層可包括鋁化合物。
該互連件結構包括低k介電層。該低k介電層具有溝槽，該溝槽於該低k介電層中經圖案化而成。銅層至少部分填充該溝槽。金屬層形成於該銅層上且包括鈷化合物。以金屬為基礎的介電層形成於該金屬層上與該低k介電層上。該以金屬為基礎的介電層可包括鋁化合物。
100‧‧‧製程
102-116‧‧‧方塊
200‧‧‧基板
210‧‧‧介電層
211‧‧‧側壁
212‧‧‧溝槽
213‧‧‧底板
214‧‧‧襯裡層
216‧‧‧銅層
218‧‧‧金屬層
220‧‧‧以金屬為基礎的介電層
藉由參考實施例(一些實施例說明於附圖中)，可獲得於上文中簡要總結的本發明之更特定的說明，而能詳細瞭解上述的本發明之特徵。然而應注意附圖僅說明此發明的典型實施例，因而不應將該等附圖視為限制本發明之範疇，因為本發明可容許其他等效實施例。
第1圖是用於形成互連件結構的製程的流程圖；以及第2A圖至第2G圖繪示第1圖之製程的不同階段的互連件結構。
為了助於瞭解，如可能則已使用相同的元件符號指定各圖共通的相同元件。應考量一個實施例的元件與特徵可 有利地併入其他實施例而無需進一步記敘。
雖前述內容涉及本發明之實施例，但可不背離本發明之基本範疇設計本發明之其他與進一步之實施例，且本發明之範疇由隨後的申請專利範圍決定。
如在本文中所用，真空處理系統包括一工具，在該工具內，基板可於兩個或更多個真空處理腔室中處理而不破真空，即不將基板暴露至周圍環境。代表性的真空處理系統是群集工具。如在本文中所用，真空處理腔室包括蝕刻腔室、清潔腔室、或沉積腔室。該沉積腔室可例如為化學氣相沉積反應器(CVD)、原子層沉積反應器(ALD)、物理氣相沉積反應器(PVD)、或其他適合用於沉積介電層(諸如低k介電層)、金屬層、及/或金屬氧化物、金屬氮化物、或金屬氮氧化物層的腔室。如在本文所用，低k介電材料是介電常數低於二氧化矽之介電常數(或低於4.0)的材料，且包括碳摻雜的氧化矽與其他適合的材料，例如可購自位在美國加州Santa Clara的應用材料公司的BLACK DIAMOND®低k介電質。如在本文所用，「鈷化合物」包括金屬鈷以及多種包含鈷與一種其他元素的化合物，諸如(舉例而言)磷化鈷鎢、氮化鈷鎢、或磷氮化鈷鎢。如在本文所用，「鋁化合物」包括多種含有鋁與至少一種其他元素的化合物，諸如(舉例而言)，氧化鋁、氮化鋁、與氮氧化鋁。如在本文所用，「銅」包括金屬銅與銅合金。「前驅物」之用語是用於指參與反應以從表面移除或沉積材料的任何製程氣體。
藉由依序於銅層上方形成金屬層與以金屬為基礎的介電層，可製造薄的集成介電阻障物，且該集成介電阻障物具有減少的線間電容與對銅的低擴散率。該金屬層可沉積於互連件結構的暴露銅表面上，但不沉積於該互連件結構的暴露介電表面上。該金屬層可以是鈷或對銅有良好附著力的其他金屬。該金屬層藉由良好地附著至銅，而抗電遷移且助於防止銅擴散。該以金屬為基礎的介電層可由鋁化合物構成，諸如氧化鋁、氮化鋁、及/或氮氧化鋁。該以金屬為基礎的介電層提供元件整體性、防止銅擴散、且作為介電阻障物。該集成結構之對於銅擴散率的阻力是驚人的，所述集成結構包括：金屬層，包括鈷化合物；以及以金屬為基礎的介電層，包括鋁化合物。該集成結構的對銅擴散的阻力實質上高於相結合的該金屬層與該以金屬為基礎的介電層之擴散阻力的總和。
第1圖是製程流程圖，第1圖總結用於形成具有複數層的互連件結構的製程100。第2A圖至第2G圖是互連件結構在製程100之不同階段的剖面視圖。在方塊102，在真空處理腔室中(諸如，在真空處理系統的真空處理腔室中)將介電層210形成於基板200上。該基板200提供一表面，在該表面上可形成元件，利用形成在該等元件上方的互連件結構而使該等元件選擇性地連接。就此而言，基板可以是半導體材料(諸如矽、鍺、或化合物半導體)、介電材料(諸如玻璃、陶瓷、或塑膠)、或導電材料(諸如鋁或另外的金屬)。介電層210可沉積達約200Å至約1000Å的厚度。介電層210 可由低k介電材料構成。
在方塊104，溝槽212形成於介電層210中。該溝槽212可例如藉由將介電層210上的光阻層圖案化及使用適合的蝕刻製程而形成。該溝槽212可延伸至基板210(如第2B圖所示)或可在將要到基板210之前終止。該溝槽212具有側壁211與底板213。側壁211可垂直基板210(如圖所示)或可呈傾斜。
在視情況任選的方塊106與如第2C圖所示，襯裡層214形成遍及溝槽212之側壁211與底板213上。該襯裡層214可作為阻障層。襯裡層214可正形地(conformally)形成遍及側壁211與底板213上。襯裡層214可沉積達例如約10至約40的厚度。襯裡層214可例如為鉭、氮化鉭、鈷、釕、或其他適合的材料。
在方塊108，銅層216形成於襯裡層214上。銅層216至少部分填充溝槽212。銅層216可僅部分填充溝槽212、可完整填充溝槽212、或且可完整填充溝槽212且覆於介電層210的一部分上(如第2D圖所示)。銅層216可藉由電鍍或其他適合技術沉積。
在視情況任選的方塊110與如第2E圖所示，移除銅層216與襯裡層214的多個部分，以暴露介電層210之表面、襯裡層214之表面、與銅層216之表面。可使用化學機械研磨移除銅層216、襯裡層214、與介電層210的該等部分。方塊110之後，介電層210、襯裡層214、與銅層216的上表面可實質上共平面。
在視情況任選的方塊112，可預清潔銅層216。該預清潔製程從銅表面移除污染物，諸如銅氧化物。銅氧化物可透過將基板200暴露至還原劑而化學還原。該預清潔製程可將基板200於熱製程或電漿製程期間暴露至還原劑。該還原劑可具有液態、氣態、電漿態、或前述態之組合。可用於預清潔製程期間的還原劑包括例如氫(例如H2或原子H)、氨(NH3)、與氫及氨之混合物(H2/NH3)。
於方塊114，金屬層218形成於銅層216之暴露表面上。金屬層218可沉積成使得介電層210無金屬或實質上無金屬，如第2F圖中所示。可在方塊112與方塊114之間不破真空的方式執行方塊114。藉由防止基板暴露至真空處理系統外側的周圍環境，可完整地或實質上無氧化形成銅層216。金屬層218可由鈷化合物或金屬鋁構成。該鈷化合物可例如為鈷(Co)、磷化鈷鎢(CoWP)、氮化鈷鎢(CoWN)、磷氮化鈷鎢(CoWPN)、或前述物質之混合物。金屬層218可具有範圍從5Å至約100Å之厚度，例如從約17Å至約50Å，諸如約20Å。
可使用ALD、CVD、PVD、旋轉塗佈技術、或其他適合的技術沉積金屬層218。ALD可用於其中金屬層218沉積在銅層216上但不沉積在介電層210上的實施例，這是藉由將基板暴露至與銅層216反應但不與介電層210反應的前驅物而達成。在其中金屬層218包括鈷的實施例中，可將含鈷前驅物引入真空處理腔室中。其中金屬層218包括鈷與鎢的實施例中，可將含鈷前驅物與含鎢前驅物引入真空處理腔 室中。氮及/或磷可透過在處理期間將含氮及/或磷之摻雜劑引入真空處理腔室而引入金屬層218。
使用CVD或ALD沉積製程的代表性處理條件包括下述者。溫度可介於約50℃至約300℃之間，諸如約100℃至約200℃之間。真空處理腔室的壓力可維持在約100毫托至約5托之間，諸如約1托至約2托之間。含鈷前驅物與任何含鎢前驅物、任何摻雜劑之流速範圍可從約50sccm至約5000sccm，諸如約500sccm至約2500sccm之間。
適合的含鈷前驅物包括諸如下述之鈷前驅物：甲基環戊二烯基鈷雙羰基(MeCpCo(CO)2)、乙基環戊二烯基鈷雙羰基(EtCpCo(CO)2)、二鈷八羰基(Co2(CO)8)、與亞硝醯基鈷三羰基((ON)Co(CO)3)。適合的含鈷前驅物也包括鈷羰基化合物或錯合物，諸如環戊二烯基鈷雙羰基(CpCo(CO)2)、三羰基烯丙基鈷((CO)3Co(CH2CH-CH2))、二鈷六羰基丁基乙炔(CCTBA，(CO)6Co2(HC≡CtBu))、二鈷六羰基甲基丁基乙炔((CO)6Co2(MeC≡CtBu))、與二鈷六羰基苯基乙炔((CO)6Co2(HC≡CPh))。適合的含鈷前驅物也包括鈷脒鹽或鈷醯胺基錯合物，諸如雙(二(丁基二甲基矽烷基)醯胺基)鈷(((BuMe2Si)2N)2Co)、雙(二(乙基二甲基矽烷基)醯胺基)鈷(((EtMe2Si)2N)2Co)、雙(二(丙基二甲基矽烷基)醯胺基)鈷(((PrMe2Si)2N)2Co)、與雙(二(三甲基矽烷基)醯胺基)鈷(((Me3Si)2N)2Co)。
適合的含鎢前驅物包括W(CO)6。適合的含鎢前驅物也包括鎢之鹵化物(WX6，其中X是鹵素)。適合的氮摻雜 劑包括NF3、NH3、N2、N2H4。適合的磷摻雜劑包括例如PH3。
在方塊116，以金屬為基礎的介電層220形成於介電層210與金屬層218之頂部上。該以金屬為基礎的介電層220可形成於該介電層210之暴露表面的至少部分上，諸如該介電層210的整個暴露表面上(如第2G圖所示)。以金屬為基礎的介電層220可具有約10Å至約100Å的厚度，諸如約20Å至約40Å。可在方塊114與方塊116之間不破真空地執行方塊116。藉由防止基板200暴露至真空處理系統外側的周圍環境，可完整地或實質上無氧化形成金屬層218。例如，若破真空，則鈷金屬層218之表面5至10Å可為CoO。若不破真空，則鈷金屬層218的表面5至10Å可為純鈷。
該以金屬為基礎的介電層220可由氧化鋁、氮化鋁、氮氧化鋁、或前述物質之混合物構成。以金屬為基礎的介電層220可使用PVD沉積。代表性的PVD處理條件可包括下述者。靶材可以為氧化鋁、氮化鋁、氮氧化鋁、或前述物質之混合物。溫度可介於約100℃至約400℃之間，諸如約150℃至約350℃之間，例如200℃。壓力可介於約3毫托至約400毫托之間，諸如約50毫托至100毫托之間，諸如70毫托。可使用氬搭載電漿，且源電力可介於約500瓦至約3000瓦之間，諸如約1000瓦至約2000瓦，諸如約1500瓦。
在視情況任選的方塊118，若要求基板200上有額外的互連件，則可將第二介電層210’(圖中未示)形成於以金屬為基礎的介電層220之頂部上，且可重複方塊102、104、106、108、110、112、114、與116之製程。一個實施例中， 第二介電層210’直接形成於以金屬為基礎的介電層220上方。透過重複該製程任何期望的次數，而可提供任何數目的互連件。
範例
為了沉積鈷金屬層218於銅層216的暴露表面上，可於類似ALD的製程中依序將甲基環戊二烯基鈷雙羰基(MeCpCo(CO)2)與NH3引入真空處理腔室中。可與氬載氣一併將甲基環戊二烯基鈷雙羰基以200sccm的流速引入真空處理腔室中，同時該處理腔室維持在1.5托。之後該腔室可排空且以氬沖淨。隨後可與氬載氣一併將氨以300sccm之流速引入真空處理腔室中，同時該真空處理腔室維持在120毫托。於引入甲基環戊二烯基鈷雙羰基與氨兩者期間，處理腔室可維持在150℃。
為了使用PVD製程將氮化鋁之以金屬為基礎的介電層220沉積於金屬層218及介電層210上，基板可定位於真空處理腔室內，該真空處理腔室維持在5毫托與200℃。可使用鋁金屬靶材，且可由1000瓦的源電力生成N2/Ar電漿。
前述實施例具有許多優點，包括所揭露的介電阻障物的實施例具有減少的線間電容、比習知技術低的銅擴散率；並且可比習知技術更薄。舉例而言，於20nm之製程節點(N20)，已證實本文揭露的介電阻障物相較於習知介電阻障物在線間電容中有大約5%的減少。證實本文揭露的實施例有約160pF的線間電容，然而習知技術證實有約152pF的線間電容。線間電容中此般劇烈的減少是令人驚訝的，因為先 前努力嘗試減少線間電容，只勉強減少線間電容甚至2%而已。此外，本文揭露的介電阻障物比習知阻障物更薄，同時證實有低的銅擴散率。本文揭露的實施例可實質上於整體37Å或更低的厚度處防止銅擴散。例如，當銅基板頂部上形成17Å的包括鈷化合物之金屬層與20Å的氮化鋁層時，銅擴散的活化能與介電阻障物的崩潰電壓實質上相同。再者，線對線的漏損也與厚度500Å的習知SiN阻障物相當。前述優點為說明性質而非限制性質。對於本發明的所有實施例而言不必然具有本發明的所有優點或實現本發明的所有目的。
雖前述內容涉及本發明之實施例，但可不背離本發明之基本範疇設計本發明之其他與進一步之實施例，且本發明之範疇由隨後的申請專利範圍決定。
100‧‧‧製程
102-116‧‧‧方塊

Claims (20)

  1. 一種用於形成互連件結構的方法，該方法包括以下步驟：將一基板定位在一真空處理腔室中，其中該基板包括一銅層與一低k介電層，該銅層具有一暴露表面，且該低k介電層具有一暴露表面；將一金屬層形成於該暴露的銅表面上，其中該金屬層包括一鈷化合物；及將一以金屬為基礎的介電層形成於該金屬層上及形成於至少部分的該暴露的低k介電表面上，其中該以金屬為基礎的介電層包括一鋁化合物。
  2. 如請求項1所述之方法，其中該鈷化合物包括鈷、磷化鈷鎢、氮化鈷鎢、或磷氮化鈷鎢。
  3. 如請求項2所述之方法，其中該金屬層的該厚度是從約17Å至約50Å。
  4. 如請求項3所述之方法，其中該鋁化合物包括氧化鋁、氮化鋁、或氮氧化鋁。
  5. 如請求項4所述之方法，其中該以金屬為基礎的介電層之該厚度是從約10Å至約100Å。
  6. 如請求項1所述之方法，其中該金屬層與該以金屬為基 礎的介電層是在不露至空氣的情況下(airbreak)形成。
  7. 如請求項1所述之方法，其中該鋁化合物包括氧化鋁、氮化鋁、或氮氧化鋁。
  8. 如請求項7所述之方法，其中該以金屬為基礎的介電層是藉由物理氣相沉積形成。
  9. 如請求項1所述之方法，其中該金屬層不形成於該低k介電層的該暴露表面上。
  10. 如請求項1所述之方法，進一步包括下述步驟：直接於該以金屬為基礎的介電層上形成一第二低k介電層；於該低k介電層中形成一溝槽；以及至少部分以銅填充該溝槽。
  11. 一種用於形成互連件結構的方法，該方法包括下述步驟：將一基板定位於一真空處理腔室中，其中該基板包括具有一暴露表面的一銅層以及具有一暴露表面的一低k介電層；將一金屬層形成於該暴露的銅表面上但不形成於該暴露的介電表面上，其中該金屬層包括鈷、磷化鈷鎢、氮化鈷鎢、或磷氮化鈷鎢，其中該金屬層具有約17Å至約50Å的厚度，且其中該以金屬為基礎的介電層是透過物理氣相沉積形成； 將一以金屬為基礎的介電層形成於該暴露的介電表面上與該金屬層上，其中該以金屬為基礎的介電層包括氧化鋁、氮化鋁、或氮氧化鋁，且其中該以金屬為基礎的介電層具有約10Å至約100Å的厚度；其中該金屬層與該以金屬為基礎的介電層是在不露至空氣的情況下形成；直接於該以金屬為基礎的介電層上形成一第二低k介電層；於該第二低k介電層中形成一溝槽；以及至少部分以銅填充該溝槽。
  12. 一種互連件結構，包括：一低k介電層，其中該低k介電層經圖案化而有一溝槽；一銅層，至少部分填充該溝槽；一金屬層，其中該金屬層配置於該銅層上，且其中該金屬層由鈷化合物構成；以及一以金屬為基礎的介電層，配置在該金屬層與該低k介電層上，其中該以金屬為基礎的介電層由鋁化合物構成。
  13. 如請求項12所述之結構，其中該鈷化合物包括鈷、磷化鈷鎢、氮化鈷鎢、或磷氮化鈷鎢。
  14. 如請求項13所述之結構，其中該金屬層的厚度是從約17Å至約50Å。
  15. 如請求項14所述之結構，其中該鋁化合物包括氧化鋁、氮化鋁、或氮氧化鋁。
  16. 如請求項15所述之結構，其中該以金屬為基礎的介電層的厚度是從約10Å至約100Å。
  17. 如請求項12所述之結構，其中該鋁化合物包括氧化鋁、氮化鋁、或氮氧化鋁。
  18. 如請求項12所述之結構，其中該金屬層實質上無氧化。
  19. 如請求項12所述之結構，進一步包括：一第二低k介電層，直接配置於該以金屬為基礎的介電層上，其中該第二低k介電層經圖案化而有一溝槽；以及一第二銅層，至少部分填充該第二低k介電層的該溝槽。
  20. 如請求項12所述之結構，其中該金屬層不配置於該低k介電層上。
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