TW201519391A - 半導體元件及其製造方法 - Google Patents

半導體元件及其製造方法 Download PDF

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TW201519391A
TW201519391A TW103116346A TW103116346A TW201519391A TW 201519391 A TW201519391 A TW 201519391A TW 103116346 A TW103116346 A TW 103116346A TW 103116346 A TW103116346 A TW 103116346A TW 201519391 A TW201519391 A TW 201519391A
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Taiwan
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carrier
spacer
metal member
hole portion
semiconductor device
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TW103116346A
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TWI578471B (zh
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Ying-Ju Chen
Hsien-Wei Chen
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Taiwan Semiconductor Mfg
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Abstract

一種包括一載體及一金屬結構之半導體元件，該金屬結構包括一金屬構件、一墊片及一通孔部分；其中該金屬構件係置放於該載體內部，該墊片經組態用於接納一焊料凸塊且置放於該載體之一表面上，該通孔部分經組態用於電連接該金屬構件及該墊片，且該通孔部分置放接近該墊片之一端。此外，一種製造一種半導體元件之方法，包括提供一載體，移除該載體之一部分用於形成一自該載體之一表面延伸至該載體之一內部之通孔，藉由一導電材料填滿該通孔，且置放該導電材料於該載體之該表面上，其中該通孔置放接近該導電材料之一端部分。

Description

半導體元件及其製造方法
本揭露關於一種半導體元件及一種製造一種半導體元件之方法。
日常生活中包含半導體裝置之電子設備是不可或缺的。隨著電子科技之進展，電子設備及在該等電子設備內之此等半導體裝置在尺寸上越來越小，而在功能上卻增加。該等半導體裝置在尺寸上之相當減小及在功能上之相當增加必須完成在該等半導體裝置之一小區域中之一種信號路由。
在晶圓級封裝(WLP)中一種扇之技術已經受到青睞且被廣泛地應用。此技術提供具有高功能及性能之該等半導體裝置，但減小該等半導體裝置之尺寸的一種晶圓級製造。對於在該等半導體裝置之一小區域內輸入/輸出(I/O)之信號路由數目在晶圓級封裝中該扇之技術有不同種類之操作，例如，細線電路之製造、該等線之間的該等空間中之一縮減、用於電互連經由數個相鄰層之溝渠或通孔的數目之刺穿等等。
然而，在該半導體裝置之此一小且密集區域中電互連結構之製造係複雜的，因為其牽涉許多的製造操作且這些操作係應用於包括許多具有不同性質之不同種類的材料之小半導體裝置上。材料上之差異將增加製造之複雜性且產生半導體裝置之損失，例如，元件之間的劣 黏結性、通孔之劣可靠性、該電互連結構之裂開或脫層等等。如此，存在一種持續的需求以改良該電互連結構及用於製造該電互連結構之方法，且解決上述之缺陷。
一種半導體元件係藉由多個操作而製造。在製造期間，在一印刷電路板(PCB)中橫跨數個絕緣層之數個導電金屬構件之間形成一電互連結構。該等導電金屬構件係藉由刺穿自該絕緣層至另一絕緣層之至少一通孔而彼此連接。
採用一種墊片中之通孔(VIP)用以形成在該PCB內部配置於該PCB上之一墊片正下方之一通孔。該通孔係藉由蝕刻穿過該等絕緣層之至少一者而形成。接著以一導電材料覆蓋或填滿該通孔，使得該等導電金屬構件經由以該導電材料填滿之通孔橫跨該等絕緣層而電連接。
該半導體元件係藉由將在一晶粒上之一墊片與在該PCB上之該墊片附接而形成。然而，在藉由一焊料接合將在該PCB上之一墊片與一晶粒之一墊片連接之後，裂痕時常立即發生於墊片中之通孔中。因為接近該PCB之該墊片上之該通孔有高應力，所以該等裂痕被發現於相鄰於該PCB上之該墊片的該焊料接合。在隨後之操作期間，該裂痕可擴散穿過該焊料接合而進一步削弱該焊料接合及在該PCB之該墊片與該晶粒之該墊片之間的電連接，且最終導致該半導體元件之故障。
本揭露之實施例的製造及使用會於下文中詳細討論。然而，應當理解的是該等實施例提供許多可應用之發明概念而可以各種具體情況而實施。可以理解的是以下揭露內容提供實施各種實施例之不同特徵的許多實施例或範例。以下特定的元件示例以及組合方法係用以簡化本揭露，該些特定的元件示例以及組合方法僅為範例，而本揭露的範圍並不局限於此。
繪示於圖式中之實施例或範例將使用特定用語。然而，可以理 解該等實施例及範例並不局限於此。在所揭露之實施例中的任何改變或修改，以及揭露於此文件中的原理之任何進一步應用，對於本揭露所屬技術領域具有通常知識者而言將會考慮為通常會發生。
再者，可以理解僅可簡短地描述一裝置之數個處理步驟及/或特徵。同時，可加入額外的處理步驟及/或特徵，且可移除或改變隨後之處理步驟及/或特徵，而仍可實行本揭露之請求項。因此，以下之敘述應可理解為僅表示範例，而非建議一或多個步驟或特徵係必須的。
此外，本揭露可重複使用元件標號及/或文字符號於不同的實施例中。該重複使用之目的在於簡化與明確敘述內容，而不具決定不同實施例中特定元件或組合的關係。
100‧‧‧半導體元件
101‧‧‧載體
101a‧‧‧表面
101b‧‧‧邊緣
101c‧‧‧角落
102‧‧‧金屬結構
102a‧‧‧金屬構件
102a-1‧‧‧周圍表面
102b‧‧‧墊片
102b-1,102b-2‧‧‧周圍表面
102c‧‧‧通孔部分
102c-1,102c-2‧‧‧周圍表面
102d‧‧‧表面
102e,102g,102h‧‧‧端
102f‧‧‧中心軸
102j‧‧‧通孔
103‧‧‧載體
103a‧‧‧UBM墊片
103b‧‧‧頂部金屬
103c‧‧‧重分佈層
103d‧‧‧伸長表面
103e‧‧‧凹陷部分
104‧‧‧焊料凸塊
104a‧‧‧表面
105‧‧‧中心軸
106‧‧‧導電材料
107‧‧‧凹陷
106a‧‧‧頂表面
200‧‧‧半導體封裝
H1‧‧‧高度
S1,S2‧‧‧距離
W1,W2,W3‧‧‧寬度
圖1係依據本揭露之一些實施例之一半導體元件之一示意圖；圖2A係依據本揭露之一些實施例之一具有一圓柱形通孔部分之半導體元件之一示意圖；圖2B係依據本揭露之一些實施例之一具有一鄰接一墊片之一端的側壁及一金屬構件之半導體元件之一示意圖；圖2C係依據本揭露之一些實施例之一具有一凸出通孔部分之半導體元件之一示意圖；圖3A係依據本揭露之一些實施例之一墊片及以圓形呈現之一通孔部分之一示意圖；圖3B係依據本揭露之一些實施例之一墊片及以橢圓形呈現之一通孔部分之一示意圖；圖3C係依據本揭露之一些實施例之一墊片及以四邊形呈現之一通孔部分之一示意圖；圖4係依據本揭露之一些實施例之一半導體元件之一示意圖； 圖5係依據本揭露之一些實施例之一包括一第一載體及一第二載體之半導體元件之一示意圖；圖6A係依據本揭露之一些實施例之一半導體封裝之一示意圖；圖6B係依據本揭露之一些實施例之一半導體封裝的一部分之一示意圖；圖6C係依據本揭露之一些實施例之一半導體封裝的一部分之一示意圖；圖7係依據本揭露之一些實施例之一具有4個通孔部分之半導體元件之一示意圖；圖8係依據本揭露之一些實施例之一具有靠近半導體元件之一邊緣的數個通孔部分之半導體元件之一示意圖；圖9係依據本揭露之一些實施例的一製造一半導體元件之方法之一流程圖；圖9A係依據本揭露之一些實施例之一第一載體之一示意圖；圖9B係依據本揭露之一些實施例之一具有一凹陷之第一載體之一示意圖；圖9C係依據本揭露之一些實施例之一具有一金屬構件之第一載體之一示意圖；圖9D係依據本揭露之一些實施例之在一第一載體內之具有一金屬構件之第一載體之一示意圖；圖9E係依據本揭露之一些實施例之一具有一通孔之第一載體之一示意圖；圖9F係依據本揭露之一些實施例之一具有一通孔部分之第一載體之一示意圖；圖9G係依據本揭露之一些實施例之一具有一墊片之第一載體之一示意圖； 圖9H係依據本揭露之一些實施例之一第一載體及一第二載體之一示意圖；圖9I係依據本揭露之一些實施例之一第一載體與一第二載體結合之一示意圖。
在本揭露中，揭示一種具有一改良組態之半導體元件。該半導體元件包括一載體及配置於該載體中且接近該載體的一墊片之一端之一通孔部分，使得在該載體之該墊片上之一應力及用於連接該載體之該墊片與一晶粒之一墊片的一焊料凸塊或焊錫膏最小化，或甚至避免在焊料接合內部裂痕之形成，如此以改良該半導體元件之可靠性。
圖1係一種半導體元件100之一實施例。半導體元件100包括一載體101及部分配置於載體101中之一金屬結構102。在某些實施例中，載體101係一種印刷電路板(PCB)，其用於支撐數個組件及藉由嵌入於載體101中之一電路而連接該等組件。
在某些實施例中，載體101包括水平延伸橫跨載體101之數個層。每層包括介電材料或導電材料。介電材料及導電材料係間隔地配置，使得在一層中之導電材料藉由介電材料而與另一層隔離。在某些實施例中，載體101包括各種材料，諸如金屬、塑膠、玻璃或其他等等。
在某些實施例中，金屬結構102包括一金屬構件102a，一墊片102b及一通孔部分102c。金屬結構102經組態用於電連接在載體101內部之一電路與在載體101外部之一電路，例如一晶粒之一電路。在某些實施例中，金屬結構102係部分地在載體101內部且部分地配置於載體101之一表面101a上。在某些實施例中，金屬結構包括金、銀、銅、鎳、鎢、鋁、鈀及/或其合金。
在某些實施例中，金屬構件102a係配置於載體101內部。藉由載 體101之某些層而圍繞金屬構件102a。在某些實施例中，金屬構件102a沿載體101之該等層之一者而水平地延伸。在某些實施例中，金屬構件102a平行於載體101之表面101a而延伸。在某些實施例中，金屬構件102a之一表面102d平行於載體101之表面101a。在某些實施例中，金屬構件102a包括金、銀、銅、鎳、鎢、鋁、鈀及/或其合金。
在某些實施例中，墊片102b係配置於載體101之表面101a上。墊片102b係配置於載體101外部。在某些實施例中，墊片102b沿平行於載體101之表面102d的載體表面101a而水平地延伸。在某些實施例中，墊片102b經組態用於接納一焊料凸塊、一焊料球或焊錫膏。墊片102b與該焊料凸塊結合，使得該焊料凸塊經組態用於附接於另一載體，例如一晶粒之一墊片上。在某些實施例中，墊片102b包括金、銀、銅、鎳、鎢、鋁、鈀及/或其合金。
在某些實施例中，通孔部分102c係配置於載體101內部之金屬構件102a與墊片102b之間。通孔部分102c自載體101之表面101a延伸至金屬構件102a之表面102d，以使得電連接金屬構件102a與墊片102b。通孔部分102c通過載體101之至少一層以電連接載體101內部之金屬構件102a與載體101外部之電路。在某些實施例中，通孔部分102c包括金、銀、銅、鎳、鎢、鋁、鈀及/或其合金。
在某些實施例中，通孔部分102c係配置接近於墊片102b之一端102e。在某些實施例中，通孔部分102c係自通過墊片102b之一中心的一中心軸102f而偏移。通孔部分102c係配置遠離墊片102b之中心且接近墊片102b之端102e。在某些實施例中，通孔部分102c係配置於接近金屬構件102a之一端102g。在某些實施例中，通孔部分102c耦接墊片102b之端102e與金屬構件102a之端102g。
在某些實施例中，通孔部分102c係如圖1中之錐形組態。通孔部分102c係在金屬構件102a與墊片102b之間而為錐形。通孔部分102c以 一角度延伸，使得通孔部分102c之一端之寬度較通孔部分102c之相對另一端之寬度為窄。在某些實施例中，通孔部分102c係如圖2A中之一圓柱形組態。在某些實施例中，通孔部分102c係一圓柱形，使得通孔部分102c之兩端之寬度實質上相同。
在如圖2B中之某些實施例中，通孔部分102c係配置於墊片102b之端102e與金屬構件102a之端102g處。墊片102b之一周圍表面102b-1與金屬構件102a之一周圍表面102a-1係與通孔部分102c之一周圍表面102c-1的一部分對準。
在某些實施例中，墊片102b之周圍表面102b-1的該部分、金屬構件102a之周圍表面的該部分及通孔部分102c之周圍表面102c-1的該部分形成一側壁。該側壁自墊片102b之端102e延伸至金屬構件102a之端102g。在某些實施例中，金屬構件102a、墊片102b及通孔部分102c係整體地形成，使得金屬構件102以一C形呈現。
在如圖2C中之某些實施例中，通孔部分102c係配置於近接墊片102b之端102e，且通孔部分102c之一部分自墊片102b之端102e與金屬構件102a之端102g突出。通孔部分102c之該突出部分沒有被墊片102b及金屬構件102a而限制。通孔部分102c之周圍表面102c-1沒有與墊片102b之周圍表面102b-1的該部分及金屬構件102a之周圍表面102a-1的該部分對準。
在某些實施例中，通孔部分102c之一頂部橫截面以各種形狀呈現。在如圖3A中之某些實施例中，在通孔部分102c與墊片102b之間之一介面以一圓形呈現。從通孔部分102c俯視，通孔部分102c具有一圓形橫截面。在如圖3B中之某些實施例中，在通孔部分102c與墊片102b之間之該介面以一橢圓形呈現。從通孔部分102c俯視，通孔部分102c具有一橢圓形橫截面。在如圖3C中之某些實施例中，在通孔部分102c與墊片102b之間之該介面以一四邊形呈現。從通孔部分102c俯 視，通孔部分102c具有一四邊形橫截面。
在如圖3A、3B及3C中之某些實施例中，通孔部分102c與墊片102b係以一通孔在墊片(via in pad VIP)組態呈現，從通孔部分102c俯視，通孔部分102c之該頂部橫截面係在墊片102b之一橫截面內。
在如圖4中之某些實施例中，通孔部分102c係以自墊片102b之一近端102e之一距離S1而配置。距離S1係在墊片102b之周圍表面102b-1與通孔部分102c之周圍表面102c-1之間的一最短距離。在某些實施例中，通孔部分102c係以自墊片102b之一遠端102h之一距離S2而配置。距離S2係在相對於周圍表面102b-1之墊片102b之一周圍表面102b-2與相對於周圍表面102c-1之通孔部分102c之一周圍表面102c-2之間的一最短距離。
在某些實施例中，自通孔部分102c至墊片102b之近端102e之最短距離S1與自通孔部分至墊片102b之遠端102h之最短距離S2之一差異係以一對於墊片102b之一寬度W1的一比例呈現。在某些實施例中，最短距離S1與最短距離S2之該差異係大於墊片102b之寬度W1的三分之一。
在某些實施例中，通孔部分102c具有在墊片102b與金屬構件102a之間的一高度H1。在某些實施例中，高度H1係大約10微米至大約30微米。在某些實施例中，高度H1係大約5微米至大約40微米。
在某些實施例中，墊片102b之寬度W1係墊片102b之一直徑。在某些實施例中，在金屬構件102a與通孔部分102c之間的一介面具有一寬度W2。在某些實施例中，寬度W2係鄰接金屬構件102a之通孔部分102c的一端表面之一直徑。在某些實施例中，在墊片102b與通孔部分102c之間的一介面具有一寬度W3。在某些實施例中，寬度W3係鄰接墊片102b之通孔部分102c的一端表面之一直徑。
在某些實施例中，寬度W2係大約20微米至大約30微米。在某些 實施例中，寬度W2係大約10微米至大約35微米。在某些實施例中，寬度W2係小於寬度W3。在某些實施例中，通孔部分102c之寬度W2與寬度W3係以一比例呈現。在某些實施例中，寬度W2與寬度W3之該比例係大約1：1.5至大約1：2。在某些實施例中，寬度W2與寬度W3之該比例係大約1：1.2至大約1：3。
在某些實施例中，寬度W2係大於寬度W3。在某些實施例中，寬度W2與寬度W3之該比例係大約2：1至大約1.5：1。在某些實施例中，寬度W2與寬度W3之該比例係大約3：1至大約1.3：1。
圖5係一種半導體元件100之一實施例。半導體元件100包括一第一載體101及一第二載體103。在某些實施例中，第一載體101包括一金屬結構102。金屬結構102包括一金屬構件102a、一墊片102b及電連接金屬構件102a與墊片102b之一通孔部分102c。在某些實施例中，墊片102b經組態用於接納第二載體103之一焊料凸塊104。
在某些實施例中，第二載體103係一晶粒，其包括在該晶粒內之一電路。在某些實施例中，第二載體103包括配置於第二載體103之一表面上之一凸塊底層冶金(UBM)墊片103a。在某些實施例中，UBM墊片103a經組態用於接納焊料凸塊104。
在某些實施例中，UBM墊片103a係配置於一重分佈層(RDL)103c之一伸長表面103d上。在某些實施例中，RDL 103c具有鄰接伸長表面103d之一端的一凹陷部分103e。凹陷部分103e通過第二載體103之至少一層且以在第二載體103內之一頂部金屬103b連接在伸長表面103d上之UBM墊片103a。
在某些實施例中，第一載體101係經由焊料凸塊104與第二載體103附接。焊料凸塊104係配置於墊片102b與UBM墊片103a之間。當第一載體101與第二載體103附接時，第一載體101之金屬結構102係經由RDL 103c、UBM墊片103a及焊料凸塊104與頂部金屬103b附接。如 此，第一載體101之電路與第二載體103之電路連接。在某些實施例中，在通孔部分102c與焊料凸塊104之間的一介面係以一圓形或一橢圓形呈現。
圖6A係一種半導體封裝200之一實施例。半導體封裝200包括一第一載體101及一第二載體103。第一載體101係附接於第二載體103上。在某些實施例中，半導體封裝200係對於一中心軸105而對稱地組態。
在某些實施例中，第一載體101包括在第一載體101之一表面101a上之數個第一墊片102b。在某些實施例中，第一載體101包括在第一載體101內之數個通孔部分102c。在某些實施例中，鄰接第一載體101之一邊緣101b之第一墊片102b包括一通孔部分102c。通孔部分102c係自第一墊片102b延伸。
在某些實施例中，通孔部分102c經組態靠近如圖6B及圖6C之增大視圖所示之個別第一墊片102b之一端。在某些實施例中，第二載體103包括數個第二墊片103a。每一第二墊片103a係經由該等焊料凸塊104之一者與該等第一墊片102b之一者電連接。
在某些實施例中，該等第一墊片102b之至少一者具有靠近該個別焊料凸塊104之一最外部表面104a之通孔部分102c。在某些實施例中，通孔部分102c係置放於鄰接遠離半導體封裝200之中心軸105(參見圖6A)之第一載體101之邊緣101b。
在如圖6B中之某些實施例中，通孔部分102c係置放於靠近半導體封裝200之一左側，使得通孔部分102c靠近遠離中心軸105(參見圖6A)之邊緣101b。在如圖6C中之某些實施例中，通孔部分102c係置放於靠近半導體封裝200之一右側，使得通孔部分102c靠近遠離中心軸105(參見圖6A)之邊緣101b。
圖7係一種半導體元件100之一實施例之一俯視圖。半導體元件 100包括一第一載體101。數個墊片102b置放於第一載體101之一表面101a上。在某些實施例中，墊片102b係以一陣列配置。墊片102b在第一載體101之表面101a上以行與列彼此校準。在某些實施例中，每一墊片102b係以一實質上相同距離而彼此間隔開。
在某些實施例中，鄰接第一載體101之一角落101c之墊片102b包括置放於墊片102b上之一通孔部分102c。通孔部分102c係自墊片102b延伸且穿過第一載體101。在某些實施例中，通孔部分102c係徑向地置放遠離第一載體101之一中心。
在某些實施例中，分別置放於第一載體101之四個角落之該等墊片102b具有徑向地偏移遠離第一載體101之一中心100a之一通孔部分102c。通孔部分102c係置放於該個別墊片102b上一最遠離中心100a之位置處。例如，在第一載體101之一右下角落之墊片102b具有置放於墊片102b之一右下區域處之通孔部分102c。
在某些實施例中，置放於第一載體101之一邊緣101b處之該等墊片102b之至少一者具有徑向地置放遠離第一載體101之中心100a之通孔部分102c。如圖8所示，鄰接邊緣101b之該等墊片102b個別具有通孔部分102c。該等通孔部分102c個別置放更遠離中心100a且接近邊緣101b。在某些實施例中，該等墊片102b及通孔部分102c係對於通過載體101之中心100a之載體101之一中心軸100b對稱地配置。
在本案中，也揭示一種製造一半導體元件之方法。在某些實施例中，藉由一方法200而形成一半導體元件。方法200包括多個操作及敘述及繪示，此不視為該等操作之序列之一限制。
圖9係一種製造一半導體元件之方法200之一實施例。方法200包括多個操作(201，202，203，204，205，206，207，208，209)。
在操作201中，如圖9A所示，提供一第一載體101。在某些實施例中，第一載體101係一印刷電路板，其包括在該印刷電路板中之一 電路。第一載體101經組態用以接納另一載體及與包括至少一晶粒之另一載體電連接。
在操作202中，如圖9B所示，移除第一載體101之一部分。在某些實施例中，朝向第一載體101之一底部蝕刻第一載體101之頂部部分以形成一凹陷107。凹陷107平行於第一載體101之一表面101a而延伸。在某些實施例中，藉由蝕刻或光微影等等移除第一載體101之該部分。
在操作203中，如圖9C所示，置放一導電材料106至第一載體101之凹陷107中。在某些實施例中，導電材料106填滿凹陷107，使得導電材料106之一頂表面106a係在與第一載體101之表面101a實質上相同之一位準。
在操作204中，如圖9D所示，置放一材料於導電材料106上方。在某些實施例中，置放該材料以覆蓋導電材料106且成為第一載體101之一頂部。在某些實施例中，該材料包括介電材料，例如旋塗式玻璃(SOG)、二氧化矽、氮氧化矽、氮化矽或類似物。接著置放導電材料106於第一載體101中。
在操作205中，如圖9E所示，移除第一載體101之一頂部以形成一通孔102j。在某些實施例中，通孔102j自第一載體101之該頂部垂直地延伸至金屬構件102a。在某些實施例中，通孔102j係置放鄰接金屬構件102a之一端102g。在某些實施例中，通孔102j係朝向金屬構件102a而逐漸變尖。在某些實施例中，藉由蝕刻蝕刻或光微影等等移除通孔102j。
在操作206中，如圖9F所示，置放一導電材料至通孔102j中以形成一通孔部分102c。在某些實施例中，該導電材料填滿通孔102j以形成在金屬構件102a上之一通孔部分102c，使得通孔部分102c與金屬構件102a電連接。在某些實施例中，藉由電鍍或濺鍍等等置放該導電材 料。在某些實施例中，該通孔部分包括金、銀、銅、鎳、鎢、鋁、鈀及/或其合金。
在操作207中，如圖9G所示，置放一墊片102b於通孔部分102c上方。在某些實施例中，墊片102b係置放於第一載體101之表面101a上，且平行表面101a而延伸。墊片102b與第一載體101之通孔部分102c電連接。
如圖9G所示，在某些實施例中，通孔部分102c係置放於接近墊片102b之一端102e。在某些實施例中，墊片102b經由通孔部分102c與金屬構件102a電連接。在某些實施例中，墊片102b經組態用於接納一焊料凸塊以將金屬構件102a經由通孔部分102c、墊片102b及該焊料凸塊與第一載體101外部之一電路電連接。在某些實施例中，墊片102b包括金、銀、銅、鎳、鎢、鋁、鈀及/或其合金。
在操作208中，如圖9H所示，提供一第二載體103。在某些實施例中，第二載體103係一晶粒，其包括在該晶粒中之一電路。第二載體103包括置放於第二載體103之一表面上之一UBM墊片103a。UBM墊片103a經組態用於接納焊料凸塊104。在某些實施例中，焊料凸塊104經組態用於與第一載體101之墊片102b附接。在某些實施例中，焊料凸塊104係一焊料球或一焊料膏等等。
在操作209中，如圖9I所示，第一載體101係附接於第二載體103上。在某些實施例中，第一載體101經由焊料凸塊104與第二載體103結合。在附接第一載體101於第二載體103上之後，第一載體101之墊片102b立即連接第二載體103之UBM墊片103a。第二載體103之該電路經由UBM墊片103a、焊料凸塊104、墊片102b及通孔部分102c與金屬構件102a電連接。
在某些實施例中，一半導體元件包括一載體及一包括一金屬構件、一墊片及一通孔部分之金屬結構，該金屬構件係置放於該載體內 部，該墊片經組態用於接納一焊料凸塊且置放於該載體之一表面上，該通孔部分經組態用於電連接該金屬構件及該墊片，及該通孔部分係置放接近該墊片之一端。
在某些實施例中，該通孔部分係自一通過該墊片之一中心之一中心軸而偏移。在某些實施例中，該通孔部分在該金屬構件與該墊片之間以錐形組態呈現。在某些實施例中，該載體係一印刷電路板(PCB)。在某些實施例中，該通孔部分耦接該墊片之該端與該金屬構件之一端。
在某些實施例中，在該通孔部分與該墊片之間之一介面係以一圓形或一橢圓形呈現。在某些實施例中，在該墊片與該焊料凸塊之間之一介面係以一圓形或一橢圓形呈現。
在某些實施例中，在該通孔部分與該墊片之該端之間的一第一最短距離及在該通孔部分與該墊片之另一端之間的一第二最短距離的差異大於該墊片之一寬度的三分之一。在某些實施例中，在該金屬構件與該墊片之間的該通孔部分之一高度係大約10微米至大約30微米。在某些實施例中，在該金屬構件與該通孔部分之間的一介面具有一大約20微米至大約30微米之一寬度。
在某些實施例中，一半導體封裝包括一第一載體，其包括在該第一載體之一表面上之複數個第一墊片及在該第一載體內個別地自該複數個第一墊片延伸之複數個通孔部分，以及一第二載體，其包括藉由複數個焊料凸塊與該複數個第一墊片電連接之複數個第二墊片。該複數個第一墊片之至少一者具有該通孔部分，其置放接近該個別第一墊片之一端。
在某些實施例中，該複數個第一墊片之該至少一者具有一接近該個別焊料凸塊之一最外部表面之通孔部分。在某些實施例中，在該半導體封裝之一角落處之該複數個第一墊片之該至少一者具有徑向地 置放遠離該第一載體之一中心之該通孔部分。
在某些實施例中，置放於鄰接該半導體封裝之一邊緣之該複數個第一墊片之該至少一者具有徑向地置放遠離該第一載體之一中心之該通孔部分。在某些實施例中，分別置放於該半導體封裝之四個角落處之該複數個第一墊片之四者具有徑向地偏移遠離該半導體封裝之一中心之個別四個通孔部分。
在某些實施例中，一種製造一半導體元件之方法包括提供一載體，移除該載體之一部分用於形成一延伸該載體之一表面至該載體之一內部之通孔，藉由一導電材料填滿該通孔，置放該導電材料於該載體之該表面上。該通孔係置放於接近該導電材料之一端部分。
在某些實施例中，該方法進一步包括在該載體內形成一金屬構件，其與該通孔部分耦接且平行於該載體之該表面延伸。
在某些實施例中，形成於該載體之該表面上之該墊片經組態用於接納一焊料凸塊。在某些實施例中，該通孔部分及該墊片係以一種墊片中之通孔(VIP)組態呈現，其中該通孔部分之一頂部橫截面係在該墊片之一頂部橫截面內。在某些實施例中，藉由蝕刻形成該通孔部分。
本揭露之方法及特徵已充分地描述於上述之範例及說明中。應瞭解在不背離本揭露之精神內之任何修改或改變將包含於本揭露之保護範圍中。
此外，本揭露之範圍並未局限於描述於說明說中之處理、機器、製造、物件之合成、構件、方法及步驟之特定實施例。從本揭露之內容，如本揭露所屬技術領域具有通常知識者將可理解根據本揭露利用現存或之後將被發展之處理、機器、製造、物件之合成、構件、方法及步驟，而執行如此處所描述之相對應的實施例之實質上相同的功能或達成實質上相同的結果
因此，後附之請求項係用以將例如處理、機器、製造、物件之合成、構件、方法及步驟包括於其範圍內。此外，每一請求項構成一分別的實施例，且各種請求項及實施例之組合係在本揭露之範圍內。
100‧‧‧半導體元件
101‧‧‧載體
102a‧‧‧金屬構件
102b‧‧‧墊片
102b-1,102b-2‧‧‧周圍表面
102c‧‧‧通孔部分
102c-1,102c-2‧‧‧周圍表面
102e,102g,102h‧‧‧端
H1‧‧‧高度
S1,S2‧‧‧距離
W1,W2,W3‧‧‧寬度

Claims (10)

  1. 一半導體元件，包含：一載體；及一金屬結構，其包括一金屬構件、一墊片及一通孔部分；其中該金屬構件係置放於該載體內部，該墊片經組態用於接納一焊料凸塊且置放於該載體之一表面上，該通孔部分經組態用於電連接該金屬構件及該墊片，及該通孔部分係置放於接近該墊片之一端。
  2. 如請求項第1項之半導體元件，其中該通孔部分係自通過該墊片之一中心之一中心軸而偏移，或其中該通孔部分在該金屬構件與該墊片之間係以一錐形組態呈現。
  3. 如請求項第1項之半導體元件，其中該通孔部分耦接該墊片之該端與該金屬構件之一端，或其中在該金屬構件與該通孔部分之間的一介面具有一大約20微米至大約30微米之一寬度。
  4. 如請求項第1項之半導體元件，其中在該通孔部分與該墊片之間之一介面係以一圓形或一橢圓形呈現，或其中在該墊片與該焊料凸塊之間之一介面係以一圓形或一橢圓形呈現。
  5. 如請求項第1項之半導體元件，其中在該通孔部分與該墊片之該端之間的一第一最短距離及在該通孔部分與該墊片之另一端之間的一第二最短距離的差異大於該墊片之一寬度的三分之一。
  6. 一半導體封裝，包含：一第一載體，其包括在該第一載體之一表面上之複數個第一墊片及在該第一載體內個別地自該複數個第一墊片延伸之複數個通孔部分；一第二載體，其包括藉由複數個焊料凸塊與該複數個第一墊 片個別電連接之複數個第二墊片；其中該複數個第一墊片之至少一者具有該通孔部分，其置放於接近該個別第一墊片之一端。
  7. 如請求項第6項之半導體封裝，其中該複數個第一墊片之該至少一者具有接近該個別焊料凸塊之一最外部表面之該通孔部分，或其中在該半導體封裝之一角落處之該複數個第一墊片之該至少一者具有徑向地置放遠離該第一載體之一中心之該通孔部分。
  8. 如請求項第6項之半導體封裝，其中置放於鄰接該半導體封裝之一邊緣之該複數個第一墊片之該至少一者具有徑向地置放遠離該第一載體之一中心之該通孔部分，或其中分別置放於該半導體封裝之四個角落處之該複數個第一墊片之四者具有徑向地偏移遠離該半導體封裝之一中心之個別四個通孔部分。
  9. 一種製造一半導體元件之方法，包含：提供一載體；移除該載體之一部分，用於形成一延伸該載體之一表面至該載體之一內部之通孔；藉由一導電材料填滿該通孔以形成一通孔部分；置放該導電材料於該載體之該表面上以形成一墊片，其中該通孔部分係置放於接近該墊片之一端。
  10. 如請求項第9項之方法，進一步包括在該載體內形成一金屬構件，其與該通孔部分耦接且平行於該載體之該表面延伸。
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