TW201504460A - 用於接合應用之銅線 - Google Patents
用於接合應用之銅線 Download PDFInfo
- Publication number
- TW201504460A TW201504460A TW103115651A TW103115651A TW201504460A TW 201504460 A TW201504460 A TW 201504460A TW 103115651 A TW103115651 A TW 103115651A TW 103115651 A TW103115651 A TW 103115651A TW 201504460 A TW201504460 A TW 201504460A
- Authority
- TW
- Taiwan
- Prior art keywords
- wire
- line
- core
- annealing
- diameter
- Prior art date
Links
Classifications
-
- C—CHEMISTRY; METALLURGY
- C22—METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
- C22C—ALLOYS
- C22C9/00—Alloys based on copper
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01B—CABLES; CONDUCTORS; INSULATORS; SELECTION OF MATERIALS FOR THEIR CONDUCTIVE, INSULATING OR DIELECTRIC PROPERTIES
- H01B5/00—Non-insulated conductors or conductive bodies characterised by their form
- H01B5/02—Single bars, rods, wires, or strips
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/43—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/741—Apparatus for manufacturing means for bonding, e.g. connectors
- H01L24/745—Apparatus for manufacturing wire connectors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05617—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/05624—Aluminium [Al] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05644—Gold [Au] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/43—Manufacturing methods
- H01L2224/432—Mechanical processes
- H01L2224/4321—Pulling
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/43—Manufacturing methods
- H01L2224/43985—Methods of manufacturing wire connectors involving a specific sequence of method steps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/4501—Shape
- H01L2224/45012—Cross-sectional shape
- H01L2224/45014—Ribbon connectors, e.g. rectangular cross-section
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/4501—Shape
- H01L2224/45012—Cross-sectional shape
- H01L2224/45015—Cross-sectional shape being circular
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45147—Copper (Cu) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/4554—Coating
- H01L2224/45565—Single coating layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/4554—Coating
- H01L2224/45599—Material
- H01L2224/456—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45639—Silver (Ag) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/4554—Coating
- H01L2224/45599—Material
- H01L2224/456—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45644—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/4554—Coating
- H01L2224/45599—Material
- H01L2224/456—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45663—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/45664—Palladium (Pd) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/4554—Coating
- H01L2224/45599—Material
- H01L2224/456—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45663—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/45669—Platinum (Pt) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/485—Material
- H01L2224/48505—Material at the bonding interface
- H01L2224/48599—Principal constituent of the connecting portion of the wire connector being Gold (Au)
- H01L2224/486—Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/48617—Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950 °C
- H01L2224/48624—Aluminium (Al) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/485—Material
- H01L2224/48505—Material at the bonding interface
- H01L2224/48599—Principal constituent of the connecting portion of the wire connector being Gold (Au)
- H01L2224/486—Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/48638—Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/48644—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/485—Material
- H01L2224/48505—Material at the bonding interface
- H01L2224/48799—Principal constituent of the connecting portion of the wire connector being Copper (Cu)
- H01L2224/488—Principal constituent of the connecting portion of the wire connector being Copper (Cu) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/48817—Principal constituent of the connecting portion of the wire connector being Copper (Cu) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950 °C
- H01L2224/48824—Aluminium (Al) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/485—Material
- H01L2224/48505—Material at the bonding interface
- H01L2224/48799—Principal constituent of the connecting portion of the wire connector being Copper (Cu)
- H01L2224/488—Principal constituent of the connecting portion of the wire connector being Copper (Cu) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/48838—Principal constituent of the connecting portion of the wire connector being Copper (Cu) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/48844—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/852—Applying energy for connecting
- H01L2224/85201—Compression bonding
- H01L2224/85205—Ultrasonic bonding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/859—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector involving monitoring, e.g. feedback loop
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00011—Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12041—LED
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Mechanical Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Wire Bonding (AREA)
Abstract
本發明係關於包括具有表面之核心之接合線,其中該核心包括銅作為主要組份,其中該核心中之晶粒之平均大小係介於2.5μm與30μm之間,且其中該接合線之屈服強度係小於120MPa。
Description
本發明係關於包括具有表面之核心之接合線,其中該核心包括銅作為主要組份,其中該核心中之晶粒之平均大小介於2.5μm與30μm之間,且其中該接合線之屈服強度小於120MPa。
本發明另外係關於一種模組,其包括第一接合墊、第二接合墊及本發明線,其中本發明線藉助球接合連結至至少一個接合墊。
本發明另外係關於製造本發明線之方法。
使用接合線來製造半導體裝置以用於在半導體裝置製作期間使積體電路及印刷電路板電互連。另外,將接合線用於電力電子應用中以電連結電晶體、二極體及諸如此類與外殼之墊或插針。儘管最初自金來製備接合線,但當前使用較便宜材料,例如銅。儘管銅線提供極良好之電及熱傳導性,但銅線之球接合以及楔接合具有難題。另外,銅線易於氧化。
就線幾何形狀而言,最常用者係具有圓形橫截面之接合線及具有大致矩形橫截面之接合帶。兩種類型之線幾何形狀皆具有使其可用於特定應用之優點。因此,兩種幾何形狀類型均已在市場中佔有份額。舉例而言,接合帶具有用於給定橫截面積之較大接觸面積。然而,帶彎曲受限且在接合時必須觀察到帶定向以在帶與所接合元件之間達成可接受電接觸。轉向接合線,該等接合線可更靈活地彎曲。然而,接合涉及線在接合製程中之焊接及較大變形,此可引起危害或甚至破壞所接合元件之接合墊及下伏電結構。
對於本發明而言,術語接合線包括所有形狀之橫截面及所有常用線直徑,但具有圓形橫截面及細直徑之接合線較佳。
一些最新研發涉及具有銅核心之接合線。作為核心材料,因高導電性而選擇銅。已尋找銅材料之不同摻雜劑以優化接合性質。舉例而言,US 7,952,028 B2闡述若干具有大量不同摻雜劑及各種濃度之基於銅之不同測試線。然而,就接合線本身及接合製程而言,持續需要進一步改良接合線技術。
因此,本發明之一目標係提供改良之接合線。
因此,本發明之另一目標係提供具有良好處理性質且在互連時並無特定需要之接合線,由此節約成本。
另外,本發明之一目標係提供具有極佳電及熱傳導性之接合線。
本發明之另一目標係提供展現改良之可靠性之接合線。
本發明之另一目標係提供展現極佳接合性之接合線。
本發明之另一目標係提供展示關於球接合之改良之接合性之接合線。
本發明之另一目標係提供如下接合線:其展示關於第一接合(為球接合)之改良之接合性,同時第二接合(為楔接合)之接合性能至少足夠。
本發明之另一目標係提供在接合之前線核心展示增加之柔軟性之接合線。
本發明之另一目標係提供具有改良之抗腐蝕性及/或抗氧化性之接合線。
另一目標係提供擬與標準晶片及接合技術一起使用之用於接合電子裝置之系統或模組,該系統或模組展示至少關於第一接合之減小之故障率。
另一目標係提供製造本發明接合線之方法,該方法基本上展示與已知方法相比並不增加製造成本。
令人吃驚地,發現本發明線可解決至少一個上述目標。另外,發現製造該等線之製程可克服製造線之至少一個難題。另外,發現包括本發明線之系統及模組在本發明線與其他電元件(例如印刷電路板、墊/插針等)之間之界面處更為可靠。
由形成類之申請專利範圍(category-forming claim)之標的物提供
對至少一個上述目標之解決方案的貢獻,藉此形成類之獨立申請專利範圍之從屬子申請專利範圍代表本發明之較佳態樣,其標的物對解決至少一個上述目標作出貢獻。
本發明之第一態樣係接合線,其包括:具有表面之核心,其中核心包括銅作為主要組份,其中核心中之晶粒之平均大小介於2.5μm與30μm之間,且其中接合線之屈服強度小於120MPa。
本發明之該線具有關於其機械及接合性質之優化晶體結構。
若並未提供其他具體定義,則組份之所有含量或份數在本文中皆係以重量份數形式給出。特定而言,以百分比形式給出之份數應理解為重量-%,且以ppm(百萬份數)形式給出之份數應理解為重量-ppm。
線核心定義為表面下方之本體材料之均質區域。因任一本體材料基本上具有在一定程度上擁有不同性質之表面區域,故線核心之性質應理解為此本體材料區域之性質。本體材料區域之表面可在形態、組成(例如氧含量)或其他特徵方面有所不同。在較佳實施例中,表面可為本發明線之外表面。在其他實施例中,線核心之表面可提供為線核心與疊置於線核心上之塗層之間的界面區域形式。
對於晶粒之平均晶粒大小而言,藉由使用標準金相技術來測定晶粒大小。橫切線核心之試樣且然後蝕刻。在本發明情形下,使用存於200ml去離子水中之2g FeCl3及6ml濃HCl之溶液來進行蝕刻。量測晶粒大小並藉由截線原理進行計算。本文所用之常用定義如下:晶粒大小為定義為通過晶粒之直線之所有線段中之最長者。
通常較佳地,線核心直徑與平均晶粒大小之間之比率介於2.5與5之間。甚至更佳地,該比率介於2.5與4之間。此使得可在一定範圍之不同線直徑內優化線性質。特定而言,較佳比率可有益於細線之性質。
在考慮各別線直徑下,如下所述來具體優化選擇有利平均晶粒大小:線核心直徑介於15μm與28μm之間且平均晶粒大小介於2.5μm與6μm之間;或線核心直徑介於28μm與38μm之間且平均晶粒大小介於3μm與10μm之間;或線核心直徑介於38μm與50μm之間且平均晶粒大小介於7μm與15μm之間;或線核心直徑介於50μm與80μm之間且平均晶粒大小介於10μm與30μm之間。
特定而言,線係用於微電子裝置中之接合之接合線。線較佳係一體式物件。
若組份之份數超過參考材料之所有其他組份,則此組份係「主要組份」。較佳地,主要組份佔材料總重量之至少50%。
對於屈服強度之定義而言,參照常用理解。在工程及材料科學中,材料之「屈服強度」定義為材料開始塑性變形時之應力。在開始塑性變形之前,材料將發生彈性變形且在去除所施加應力時將返回其
原始形狀。
通常較佳地,本發明接合線之屈服強度小於110MPa且更佳地小於90MPa。最佳地,屈服強度不超過80MPa。作為一般原理,若屈服強度減小,則有利於本發明線之接合性質。
本發明線之屈服強度之下限較佳地大於50MPa且最佳地大於65MPa。此尤其得到用於本發明接合線之屈服強度之較佳及有利範圍。本發明接合線較佳地具有在一或多個以下範圍中之屈服強度:50-120MPa、50-110MPa、65-110MPa、65-90MPa或65-80MPa。
在本發明之一較佳實施例中,線之楊氏模量(Young’s modulus)小於100GPa。更佳地,楊氏模量小於95GPa。針對楊氏模量來優化線有益於其機械性質亦及其在接合製程中之行為。
可計及楊氏模量之下限以防止不利效應。結果顯示,最佳化線之楊氏模量應不低於75GPa、較佳地不低於80GPa。本發明接合線較佳地具有在一或多個以下範圍中之楊氏模量:75-100GPa、75-95GPa或80-95GPa。
對於楊氏模量之定義而言,參照常用理解。楊氏模量亦稱為拉伸模量或彈性模量,其係彈性材料之勁度之量度且係用於表徵材料之量。其定義為在胡克定律(Hooke's law)所支持之應力範圍內沿軸之應力與沿該軸之應變的比率。
為維持本發明線之良好接合特性,通常較佳地,線核心之銅之總量為至少97%。更佳地,銅量為至少98%。
在本發明之一較佳實施例中,線核心由純銅組成。較佳地,純度為至少3N級銅(>=99.9% Cu),最佳為4N級銅(>=99.99% Cu)。純銅線通常展示良好傳導性及良好接合性質。
在一較佳實施例中,線核心中之硼含量小於100ppm。因已知硼會影響基於銅之線之晶體結構,故保持硼量低於某些臨限值較為有
利。由純銅組成之線核心尤其如此。在另一較佳實施例之情形下,以介於10ppm與100ppm之間之量之受控方式提供硼。
在又一較佳實施例中,線核心中之磷含量小於200ppm。其可提供為儘可能地避免磷(痕量),但在一些實施例中,可提供少量磷。在該等情形下,磷之較佳量介於10ppm與200ppm之間。
在另一較佳實施例中,線核心以介於0.5%與3%之間、更佳地介於1.0%與2.5%之間之量含有鈀。在甚至更佳之優化實施例中,鈀含量介於1.2%與2.5%之間,且最佳地介於1.2%與2.0%之間。在一尤佳實施例中,鈀份數介於1.2%與1.3%之間。實驗展示,小份數之鈀並不減小本發明之有益效應,而該鈀含量通常有助於線抵抗腐蝕之穩定性且具有其他有益效應。
另外較佳地,本發明之該等含Pd線展示在85 HV至95 HV(0.010N/5s)之範圍內之線核心的顯微硬度。在甚至更優化之實施例中,線核心中硬度與鈀含量之間之比率介於60 HV(0.01N/5s)/wt.-%與120 HV(0.01N/5s)/wt.-%之間。應理解,可(例如)藉助退火程序獨立於某些範圍內之所選鈀含量來調節線核心之硬度。
在又一較佳實施例中,線核心以介於45ppm與900ppm之間之量含有銀。在一較佳實施例中,銀含量介於100ppm與900ppm之間,甚至更佳地介於100ppm與700ppm之間。在一極佳實施例中,銀含量在100ppm至400ppm之範圍內,由此獲得線之顯著有利性質。在又一優化實施例中,核心之銀含量介於100ppm與300ppm之間,最佳地介於200ppm與250ppm之間。通常,在線核心中具有小份數銀之該等實施例展示良好FAB(無空氣球)形成及用於球接合之大接合窗。
對於含銀線而言通常較佳地,線核心中除Cu及Ag外之組份之總量小於1000ppm、甚至更佳地小於100ppm。此提供線性質之良好再現性。
在本發明線之其他較佳實施例中,以介於45ppm與900ppm之間之份數量提供Au。更佳地,Au量介於100ppm與700ppm之間,最佳地介於100ppm與300ppm之間。
應注意,上述份數Pd、Au、Ag、P及B中之兩者或多者可同時提供於本發明線中。最佳地,將一種上述份數量之Pd與一種分別為上述份數量之選自Au、Ag、P或B之群者組合。
通常較佳地,本發明線之線核心中具體元素之不期望污染含量之有益上臨限值如下:Ag:<35ppm;Ni:<15ppm;在每一情形下,Pd、Au、Pt、Cr、Ca、Ce、Mg、La、Al、B、Zr、Ti:<2ppm;P:<6ppm;Fe:<10ppm;S、Mn:<15ppm。
應指出,元素Pd、Ag、Au、B及P之上述一般臨限值僅對本發明實施例有效,其中該等元素並不明確地以其他界定量含有。
每一上述具體污染物限值意欲為本發明之單獨特徵。
本發明尤其係關於細接合線。所觀察效應具體而言有益於細線,特定而言涉及晶粒大小之控制。在本發明情形下,術語「細線」定義為直徑在8μm至80μm之範圍內之線。尤佳地,本發明細線具有在12μm至55μm之範圍內之直徑。在該等細線中,本發明組成及退火尤其幫助達成有益性質。
在本發明線之一較佳實施例中,在接合步驟之前,在至少580℃之溫度下將線核心退火至少0.1s之時間。此確保足夠退火並達成所需晶粒大小,尤其在細線情形下。甚至更佳地,退火時間為至少0.2s及
最佳地0.25s。本發明線之尤其高之退火溫度通常使得可調節較大平均晶粒大小。在最佳情形下,選擇退火溫度高於600℃。
特定而言,可在考慮線直徑下優化線退火。在該等優化實施例中,選擇如下最小退火溫度:
在本發明之通常較佳態樣中,線在退火之後之伸長率值不超過最大伸長率值之92%。更佳地,伸長率值不超過最大伸長率值之85%及最佳地不超過80%。在又一較佳情形下,在至少高於藉由退火達成最大伸長率值之溫度10℃之溫度下將線退火。更佳地,溫度至少高於最大伸長率溫度50℃,且最佳地溫度至少高於最大伸長率溫度80℃。
最大伸長率值定義如下:在基於銅之接合線之一般情形下,可藉由最終退火步驟來調節線伸長率。此情形中之「最終」意指,然後並無確立之對線形態具有重大影響之產生步驟。在選擇退火參數時,通常選擇一組參數。在線退火之簡單情形下,在給定長度之烘箱中調節恆定溫度,其中使線以恆定速度通過烘箱。此將線之每一點暴露於一定溫度下給定時間,此溫度及此退火時間係退火程序之兩個相關參數。在其他情形下,可使用烘箱之特點溫度特徵曲線,由此向系統增加其他參數。
在任一情形下,可選擇一個參數作為變量。另外,取決於此變量之線之所接受伸長率值得到通常具有局部最大值之圖形。此定義為線在本發明意義中之最大伸長率值。在變量為退火溫度之情形下,該圖形通常稱為「退火曲線」。
在先前技術中,通常將任一線退火至關於變量參數之該最大伸長率值,此乃因局部最大值之存在提供尤其穩定之製造條件。
對於本發明而言,令人吃驚地,結果顯示,退火至小於最大伸長率值之不同值可得到有益線性質,此乃因可以正性方式影響線形態。若選擇退火溫度作為變量參數,且將退火時間設定為恆定值,則將退火溫度選擇為高於最大伸長率之退火溫度之值尤其有益。特定而言,可使用此製造原理將線之平均晶粒大小調節至(例如)較大晶粒大小。藉由此調節,可以正性方式影響其他性質,例如線柔軟性、球接合行為等。
在本發明之可能進一步研發中,將塗層疊置於核心表面上。應理解,該塗層可能係但並非必需係本發明線之特徵。為最小化該塗層之材料對接合製程之影響,塗層質量較佳地不超過線核心質量之3%。最佳地,塗層質量不超過線核心質量之1.0%。有利地是,塗層包括Pd、Au、Pt及Ag之群中之至少一者作為主要組份。
本發明背景中之術語「疊置」係用於闡述第一物項(例如銅核心)關於第二物項(例如塗層)之相對位置。其他物項(例如中間層)可能配置於第一物項與第二物項之間。較佳地,第二物項係至少部分地疊置於第一物項上,例如相對於第一物項之總表面的至少30%、50%、70%或至少90%。最佳地,第二物項完全疊置於第一物項上。本發明背景中之術語「中間層」係線在銅核心與塗層之間之區域。在此區域中,核心中之材料以及塗層中之材料組合存在。
在本發明之一較佳實施例之情形下,線核心在接合之前之硬度不大於95.00 HV(0.010N/5s)。更佳地,硬度不超過93 HV(0.010N/5s)。線核心之該柔軟性幫助防止在接合過程中損壞敏感性基板。實驗亦展示,本發明之該等軟線展現極良好無空氣球(FAB)性質。若機械敏感性結構在接合墊下方對準,則線硬度之該限制尤其有益。若接合墊由
軟材料(例如鋁或金)組成,則尤其如此。敏感性結構可(例如)包括一個或若干個(特定而言)介電常數小於2.5之多孔二氧化矽層。該多孔且由此較弱之材料變得愈加常用,此乃因其可幫助增加裝置性能。因此,優化本發明接合線之機械性質以避免弱層之破裂或其他損壞。
使用具有Vickers壓頭之Fischer scope H100C測試儀來量測硬度。若並未給出不同值,則施加10mN力(F)(5s停留時間),使用136°方形金剛石壓頭壓印。根據製造商推薦基於Vickers壓印之充分確立之基本程序在橫切試樣之平坦面上進行硬度測試程序。使用掃描電子顯微鏡(SEM)量測線橫切表面上之壓印對角線(d)並使用式
(其中F係以kgf表示且d係以mm表示)計算。
本發明之另一態樣係模組,其包括第一接合墊、第二接合墊及本發明線,其中線藉助球接合連結至一個接合墊。
該模組可包括任一藉助接合線電連結之特定電子裝置。特定而言,裝置可為積體電路、發光二極體(LED)、顯示裝置或諸如此類。
在本發明模組之一較佳實施例中,在將20μm直徑線接合至鋁接合墊之情形下,用於球接合之製程窗面積具有至少120g*mA之值。更佳地,該值為至少130g*mA,且最佳地,該值為至少140g*mA。
藉由標準程序量測球接合窗面積之該等值。使用KNS-iConn接合器工具接合測試線。業內已知接合線之製程窗面積之定義且廣泛用於比較不同線。原則上,其為用於接合之超音波能與用於接合之力之乘積,其中所得接合符合某些拉力測試規定,例如3克之拉力、在墊上無不沾性等。給定線之製程窗面積之實際值另外取決於線直徑以及接合墊材料。為得到本發明線之性質之具體定義,所主張製程窗值係基於20μm=0.8密耳之線直徑,其中接合墊由鋁(Al、Al-0.5 Cu、Al-1 Si-0.5 Cu等)組成。本發明系統之範圍並不限於此直徑之線及由鋁製
得之接合墊,但提出此數據僅用於定義目的。
本發明之又一態樣係製造本發明接合線之方法,其包括以下步驟:a.提供具有所需組成之銅核心前體;b.牽拉前體直至達到線核心之最終直徑為止;c.在界定溫度下將所牽拉線退火最小退火時間。
在一尤佳實施例中,藉由股線退火實施退火,從而使得快速產生具有高再現性之線。股線退火意指,以動態方式進行退火,同時使線移動穿過退火烘箱並在離開烘箱之後纏繞於捲軸上。
所有測試及量測皆下在T=20℃及50%之相對濕度下實施。
在量測晶粒之平均晶粒大小時,藉由使用標準金相技術來測定晶粒大小。橫切線核心之試樣且然後蝕刻。在本發明情形下,使用存於200ml去離子水中之2g FeCl3及6ml濃HCl之溶液來進行蝕刻。量測晶粒大小並藉由截線原理進行計算。沿縱向方向(其係線軸方向)量測晶粒大小。
藉由標準程序來量測球接合製程窗面積。使用KNS-iConn接合器工具接合測試線。業內已知接合線之製程窗面積之定義且廣泛用於比較不同線。原則上,其為超音波能(USG)與用於接合之力之乘積,其中所得接合符合某些拉力測試規定,例如3克之拉力、在墊上無不沾性等。給定線之製程窗面積之實際值另外取決於線直徑以及接合墊材料。為得到本發明線之性質之具體定義,製程窗值在本發明中係基於20μm=0.8密耳之線直徑,其中接合墊由鋁(Al、Al-0.5 Cu、Al-1 Si-0.5 Cu等)組成。藉由克服以下兩種主要故障模式來衍生製程窗之4個角:
(1)過低力及USG之供應引起FAB之接合墊不黏(NSOP),及(2)過高力及USG之供應引起接合墊凹坑。
另外藉由實例來例示本發明。該等實例用於實例性闡明本發明且並不意欲以任一方式限制本發明或申請專利範圍之範圍。
將一定量之至少99.99%純度之銅材料(「4N銅」)在坩堝中熔化。並不向熔體添加中其他物質。然後自熔體澆注線核心前體。
使用感應偶合電漿(ICP)儀器(Perkin Elmer ICP-OES 7100DV)控制Cu線之化學組成。將Cu線溶於濃硝酸中且將溶液用於ICP分析。設備製造商根據用於本體Cu之熟知技術來確立測試高純Cu線之方法。
然後在若干個牽拉步驟中牽拉線核心前體以形成具有指定直徑之線核心2。為證實用於不同直徑之本發明之有益效應,製造所選具有不同直徑之線。下表1展示不同線直徑之列表:
表1另外展示線核心之伸長率值及平均晶粒大小之範圍。該等範圍較佳地用於各別直徑之線,其中下文進一步闡述根據本發明來調節該等值。另外,在右側之後兩行中,增加線核心之伸長率與平均晶粒大小之間之比率的計算值,且增加無空氣球(FAB)之伸長率與平均晶粒大小之間之比率的計算值,如在標準條件下所產生。
線核心2之橫截面基本上係圓形。線直徑並不視為高度準確,此乃因橫截面之形狀有所波動或諸如此類。在本發明意義中,若線定義為具有(例如)20μm之直徑,則該直徑應理解為在19.5μm至20.5μm之範圍內。
然後在最終退火步驟中將線退火以進一步調節參數,例如伸長率、硬度、晶體結構及諸如此類。以動態方式根據股線退火藉由使線1以界定速度行經界定長度及溫度之退火烘箱24來實施退火(參見圖15)。將線自第一捲軸25退繞並由滑輪26引導。在離開烘箱24之後,將線纏繞於第二捲軸上用於封裝。
在本發明實例中,退火時間(其係移動線之給定片段保持於加熱烘箱24內之暴露時間)為約0.3s(對於所有線直徑而言)。在20μm直徑線之情形下,退火溫度選擇為600℃。在烘箱區內,調節恆定溫度。
在原則上,退火時間可根據退火溫度及/或線直徑而有所變化。無論如何,若選擇股線退火作為退火方法,則需要線之某一最小速度以獲得合理通量。因此,退火時間較佳地選擇在介於0.1秒與1秒之間之區域中,此使得容易提供足夠長度之烘箱。另一方面,此需要足夠高之退火溫度。下表2展示用於不同範圍之線直徑之較佳最小退火溫度:
量測所選線試樣之平均晶粒大小。結果展示於下表3中。
圖6展示本發明實例1之4N銅線之若干實例性退火曲線。該等線僅其直徑有所不同,其中展示20μm、33μm及50μm直徑之線。藉由調節移動線之速度來選擇退火時間為恆定值。退火溫度係x軸之變量參數。圖形展示線之斷裂負荷(BL)及伸長率(EL)之量測值隨溫度之變化。伸長率展現每一情形下之典型局部最大值。
對於三種實例性線直徑而言,可如下所述自退火曲線來估計最大伸長率值:
並非在最大伸長率之各別溫度下將本發明線退火,而是在較高溫度下。
對於20μm線而言,所選退火溫度為600℃,其比表4之最大伸長率下之溫度高80℃。此得到約11.8%之伸長率值(參見下表5),其比15.8%之最大伸長率值低25%。
對於33μm線而言,所選退火溫度為615℃,其比表3之最大伸長率下之溫度高95℃。此得到約13.3%之伸長率值,其比18.0%之最大伸長率值低26%。
對於50μm線而言,所選退火溫度為630℃,其比表3之最大伸長率下之溫度高105℃。此得到約18.5%之伸長率值,其比24.1%之最大伸長率值低23%。
退火曲線之最大值之高溫側下之該退火意味著就製程參數而言在材料之極敏感性範圍中工作。為使結果具有良好再現性,必須嚴格監測整組參數。
下表5展示來自表3之本發明線之其他機械及電性質之量測結果:
來自表5之結果展示,本發明線具有與通常自4N銅線已知一樣低之電阻率值。
如所預計,屈服強度並不與線直徑相關。在每一情形下,本發明線之值遠低於120MPa,且甚至遠低於80MPa。在大約最大伸長率值下退火之典型先前技術4N銅線具有大於160MPa之屈服強度。
楊氏模量亦獨立於線直徑且具有遠低於100GPa之值。典型先前技術4N銅線具有約125GPa之楊氏模量。
拉伸強度亦如所預期係獨立於線直徑,其大約為225MPa。應注意,已量測得典型先前技術4N銅線之拉伸強度大約為245MPa。本發明線之拉伸強度通常低於標準線之值幾個百分比。預期此係歸因於本發明線之柔軟性。無論如何,拉伸強度之該小的降低不會為標準接合程序及/或標準接合設備應用帶來負面效應。
使用Instron-5300儀器測試線之拉伸性質。以1英吋/min速度在10英吋標距長度內測試線。根據ASTM標準F219-96獲取斷裂負荷及伸長率。藉由製造商所確立之以下方法獲得細線之楊氏模量及屈服負荷(屈服強度):沿拉伸圖線之彈性區域繪製切向線。量測直線之斜率,其代表線之楊氏模量。在塑性區域開始時所量測之負荷定義屈服強度。由製造商研發之「Bluehill軟體」能夠自拉伸圖線直接獲得屈服負荷及楊氏模量。使用下式計算屈服強度(工程強度):屈服強度=屈服負荷/線橫截面面積。藉由稱重方法根據ASTM標準F205來量測直徑。
第一實例之線之其他結果及對比展示於圖7、8及9中。
在圖7中,25μm線之針腳拉力對比展示,本發明線具有遠大於先前技術線之針腳拉力值。實例1之本發明線之結果展示於右側並記為「軟Cu」。
在圖8中,展示20μm線及25μm線之硬度對比。在每一情形下,顯示先前技術線(「習用」)及實例1之本發明線(「軟Cu」)之所量測Vickers硬度(10mN/5s)。顯而易見,本發明線具有顯著較低之Vickers硬度,對於該等直徑而言其在低於90 HV 10mN/5s之範圍內。
在圖9中,顯示先前技術線(「習用」)及實例1之本發明線(「軟Cu」)之球接合之接合製程窗。線直徑選擇為20μm,且在鋁接合墊上
實施測試接合。顯而易見,本發明線之製程窗顯著大於習用線之窗。
圖13a展示25μm 4N Cu線試樣之熱老化實驗。量測球接合試樣之球拉力值,其中將試樣在熱暴露及175℃下老化1000小時。結果展示線具有極良好老化行為。結果亦證明,本發明線適用於高溫及/或高能量應用。
儘管上述實例涉及自純銅(4N純度)製得之線,但本發明並不限於該純度之線。控制較大晶粒生長並調節至較低伸長率值之高溫退火之基本本發明概念可轉移至任一適宜基於銅之線系統。下表6之系統尤佳,但並不限制本發明範圍:
所有份數之所列示元素應理解為存在於線核心中。表6之系統涉及線核心之可選塗層,可選塗層可另外提供於每一情形下。
若並未給出元素份數(「-」),則元素不應以高於可容許痕量之量存在。應理解,可能具有除彼等在表6中給出之元素組合之其他元素組合。特定而言,表6中元素份數之其他組合可視為(例如)一定份數銀與一定份數金之組合等。另外,可有利地添加除彼等陳述於表6中之元素之其他元素。
通常較佳地,線核心中銅之總量並不遠低於97%,此提供本發明之良好適應性。
在下文中,詳細闡述本發明線之其他實例。該等實例在核心中包括少量銀且由此與表6中之所建議3號系統相關,但並不限於表6中給予此系統之具體元素份數組。
將一定量之至少99.99%純度之銅材料(「4N銅」)在坩堝中熔化。向熔體中添加少量銀(Ag)且提供所添加組份在銅熔體中之均勻分佈。然後自熔體澆注線核心前體。
然後在若干個牽拉步驟中牽拉線核心前體以形成具有本發明之20μm指定直徑之線核心2。線核心2之橫截面基本上係圓形。應理解,線直徑並不視為高度準確,此乃因橫截面之形狀有所波動或諸如此類。在本發明意義中,若線定義為具有(例如)20μm之直徑,則該直徑應理解為在19.5μm至20.5μm之範圍內。
藉助此程序,製造本發明線及對比線之若干不同試樣。
上表7展示20μm直徑之本發明線之1-5號不同試樣之組成。線之銀含量分別為45ppm、110ppm、225ppm、350ppm及900ppm。
添加由4N純度銅組成之對比線。
然後在最終退火步驟中將線退火以進一步調節參數,例如伸長率、硬度、晶體結構及諸如此類。以動態方式根據股線退火藉由使線1以界定速度行經界定長度及溫度之退火烘箱24來實施退火(參見圖15)。將線自第一捲軸25退繞並由滑輪26引導。在離開烘箱24之後,將線纏繞於第二捲軸上用於封裝。
在本發明實例中,退火時間(其係移動線之給定片段保持於加熱烘箱24內之暴露時間)為約0.3s。在20μm直徑線之情形下,退火溫度選擇為640℃。在烘箱區內,調節恆定溫度。
圖10展示摻雜銀之20μm銅線之實例性退火曲線。藉由調節移動線之速度來選擇退火時間為恆定值。退火溫度係x軸之變量參數。圖形展示線之斷裂負荷(BL)及伸長率(EL)之量測值。伸長率在所示實例中展現約14.5%之典型局部最大值,此係在大約460℃之退火溫度下達成。
此處,並不在最大伸長率之此溫度下將試樣1-5之本發明線退火,而是在640℃下進行,其比圖10之最大伸長率之溫度高180℃。此得到約10%之伸長率值,其比最大伸長率值低30%以上。
如同在實例1中,退火曲線之高溫側下之該退火意味著就製程參數而言在材料之極敏感性範圍中工作。為使結果具有良好再現性,必須嚴格監測整組參數。
量測1-5號線試樣之平均晶粒大小。每一情形下之結果在3μm至6μm之範圍內。對於3號試樣而言,平均晶粒大小為5μm。
線核心之平均晶粒大小主要受退火步驟影響,且另外受銀含量影響。
其他實驗展示,對於直徑在15-28μm之範圍內之線而言,可達成在3-6μm之範圍內之平均晶粒大小且較佳用於整個範圍之銀含量
(亦即45ppm至900ppm)。
下表8展示對球接合性能之評估結果。測試上文所定義之本發明線試樣1-5以及純銅線之對比實例之球接合,如上文在「測試方法」下所闡述。
製程窗面積定義為超音波能之上下邊界間之各別差與所施加力之乘積。
所有本發明線皆得到充分適用於工業應用之製程窗。特定而言,本發明線試樣2、3及4展示大於120mA*g及更大之值,此係與4N Cu線相比之特有改良。因此,球接合製程窗之改良至少存在於100-350ppm Ag含量之範圍中。
應理解,本發明線之有益性質並不限於單一參數,例如球接合製程窗。其他性質係(例如)FAB形狀及再現性、FAB硬度、線在接合之前之柔軟性、在接合之後接合區(球及頸)中之線之柔軟性、線導電性、針腳拉力強度、老化行為及更多。
圖11展示3號線試樣(225ppm銀含量)與對比4N銅試樣之針腳拉力值之對比。本發明線展示改良之針腳拉力值。量測係根據圖5進行。
圖12展示3號線試樣與本發明實例1之4N銅試樣(記為「軟4N Cu」)之硬度值(HV 15mN/10s)之對比。第二實例之本發明線之硬度遠低於第一實例之線,但量測之誤差棒具有一定重疊。
圖13b展示3號線試樣之熱老化實驗。量測球接合試樣之球拉力值,其中將試樣在熱暴露下老化長達1000小時。結果展示線具有極良好老化行為。
圖14展示本發明實例2之摻雜Ag之3號線試樣及20μm 4N-Cu線之所量測平均晶粒大小之對比。根據本發明如上文在「實例1」下所闡述將4N-Cu線退火。將4N-Cu線記為「軟4N Cu」。量測之誤差棒具有強烈重疊,但可估計往往在摻雜Ag之線之情形下具有較大晶粒大小。
參照上文針對20μm直徑線所闡述之實例2結果,本發明線之較佳及優化形式具有在45-900ppm之範圍內之銀含量。接合線之所有其他檢驗直徑範圍亦似乎如此。
基於銀含量之此範圍,優化其他直徑線之平均晶粒大小、線核心之柔軟性及球接合行為。
對於33μm直徑之線而言,發現優化退火溫度為650℃。與實例1之線相比,製造線之其他參數及方法保持不變。
其他實驗展示,對於直徑在28-38μm之範圍內之線而言,可達成在4-10μm之範圍內之平均晶粒大小且較佳用於整個變化範圍之銀含量(亦即45ppm至900ppm)。
對於具有33μm直徑及225ppm銀含量之線而言,藉由在650℃下進行退火來達成6μm之平均晶粒大小。
對於50μm直徑之線而言,發現優化退火溫度為670℃。與實例1之線相比,製造線之其他參數及方法保持不變。
其他實驗展示,對於直徑在38-50μm之範圍內之線而言,可達成在8-15μm之範圍內之平均晶粒大小且較佳用於整個變化範圍之銀含量(亦即45ppm至900ppm)。
對於具有50μm直徑及225ppm銀含量之線而言,藉由在670℃下
進行退火來達成15μm之平均晶粒大小。
將一定量之至少99.99%純度之銅材料(「4N銅」)在坩堝中熔化。向熔體中添加少量鈀(Pd)且提供所添加組份在銅熔體中之均勻分佈。然後,藉由連續且緩慢地將熔體澆注至直徑介於2mm與25mm之間之桿中來產生線核心前體。
然後在若干個牽拉步驟中牽拉線核心前體以形成具有本發明之20μm指定直徑之線核心2。將牽拉實施為室溫下之冷牽拉。
對於線核心2之橫截面形狀而言,參照上述實例之陳述。
藉助此程序,製造本發明線之若干不同試樣。在第一變化形式中,將銅中之鈀量調節至0.89%。在第二、最佳變化形式中,將鈀量調節至1.25%。
對於其他元素之臨限值而言,參照本發明之上述第二實例,參見表7。應注意,在第三實例之情形下,銀含量較佳地低於25ppm。無論如何,結果顯示,在含有鈀之本發明銅線之情形下,極高銀量可容許或甚至可具有有益效應。特定而言,參照第一實例之上表6,其中提及含Pd線之若干實例。該等組合應理解為本發明之第三實例之線之較佳其他變化形式。
然後在最終退火步驟中將線退火以進一步調節參數,例如伸長率、硬度、晶體結構及諸如此類。以動態方式根據股線退火藉由使線1以界定速度行經界定長度及溫度之退火烘箱24來實施退火(參見圖15)。將線自第一捲軸25退繞並由滑輪26引導。在離開烘箱24之後,將線纏繞於第二捲軸上用於封裝。
在本發明實例中,退火時間(其係移動線之給定片段保持於加熱烘箱24內之暴露時間)為約0.3s。在20μm直徑含Pd線之情形下,退火溫度選擇為800℃。在烘箱區內,調節恆定溫度。
圖16展示第一變化形式之20μm銅線(1.25%鈀合金化)之實例性退火曲線。藉由調節移動線之速度來選擇退火時間為恆定值。退火溫度係x軸之變量參數。圖形展示線之斷裂負荷(BL)及伸長率(EL)之量測值。伸長率在圖10之所示實例中展現約17.9%之典型局部最大值,此係在大約570℃之退火溫度下達成。
此處,並不在最大伸長率之此溫度下將第三試樣之本發明線退火,而是在750℃下進行,其比圖16之最大伸長率之溫度高180℃。此得到約14%之伸長率值,其比17.9%之最大伸長率值低22%以上。
下表9展示本發明之第三實例之20μm線之一些量測值:
應注意,增加本發明之第一實例之對比線(「4N Cu」),其已列示於上表5中。
來自表9之值展示,如所預計,Pd合金化線之電阻率略高於純銅線。另一方面,自Pd合金化獲得有益效應(例如改良之抗腐蝕性)。表另外展示,若實施本發明之退火程序,則含Pd線可達成與純銅線(4N Cu)極類似之機械性質。在表9中,在標準球形成程序之後,在線核心(左側值)及無空氣球(FAB)上實施硬度量測並平均化。1.25% Pd合金化20μm線之其他詳細硬度量測可參見圖18。此圖展示隨距無空氣球之距離增加在線表面上之多個量測。在FAB區域附近看到硬度小幅降
低。
第三實例之線之其他變化形式列示於下表10中:
顯而易見,線之伸長率值隨線直徑增加。然而,在所有不同實例及線直徑中維持退火至伸長率值低於各別最大值之本發明原理。
分別在20μm直徑線之試樣上量測圖16至21中之數據。
可自圖17得出,經Pd合金化及退火之線之平均晶粒大小類似於純銅線之晶粒大小。
圖19展示,Pd合金化線之球接合製程窗略大於本發明之純銅線,且窗極為類似。
圖20展示,在第二接合製程窗之情形下,本發明之Pd合金化試樣關於超音波能以及力值展現顯著較大窗。
圖21展示在175℃之溫度下經長達2000小時之熱老化行為。在此時間範圍內,並未看到線在高溫儲存下發生顯著熱老化。
通常,各別實施例之具體特徵可根據各別需要彼此組合。若適宜,則可將其他特徵(例如線核心之塗層)添加至任一具體實施例中。
1‧‧‧線
2‧‧‧銅核心
3‧‧‧塗層
10‧‧‧電裝置
11‧‧‧元件/接合墊
15‧‧‧表面
17‧‧‧拉鉤
19‧‧‧角度
20‧‧‧基板
21‧‧‧接合點
22‧‧‧角度
23‧‧‧中心
24‧‧‧烘箱
25‧‧‧第一捲軸
26‧‧‧滑輪
L‧‧‧直線
本發明之標的物例示於圖中。然而,圖並不意欲以任一方式限制本發明或申請專利範圍之範圍。
在圖1中,繪示線1。
圖2展示線1之剖面圖。在剖面圖中,銅核心2位於剖面圖之中部。銅核心2由塗層3環繞。在銅線2之邊界上,定位銅核心之表面15。在穿過線1之中心23之直線L上,銅核心2之直徑展示為直線L與表面15之交叉點之間的端至端距離。線1之直徑為穿過中心23之直線L與線1外邊界之交叉點之間的端至端距離。另外,繪示塗層3之厚度。塗層3之厚度在圖2中係放大的。若提供塗層3,則其典型厚度與核心直徑相比極小,例如小於核心直徑之1%。
應理解,在本發明情形下,線1之塗層3係可選的。對於最佳實施例而言,在線核心上並不提供塗層。
圖3展示製造本發明線之製程。
圖4繪示呈電裝置10形式之模組,其包括兩個元件11及線1。線1電連結兩個元件11。虛線意指連結元件11與環繞元件11之封裝裝置之外部線路之其他連結或電路。元件11可包括接合墊、引腳、積體電
路、LED或諸如此類。
圖5展示線拉力測試之草圖。線1以45°之角度19在接合點21處接合至基板20。拉鉤17牽拉線1。在拉鉤17牽拉線1時所形成之角度22為90°。
圖6展示本發明之第一實例之不同直徑線之一組退火曲線。此實例包括由4N銅核心組成且並無塗層之線。
圖7展示第一實例之25μm線與習用純銅線相比之針腳拉力量測圖。
圖8展示第一實例之20μm及25μm線與各別習用純銅線相比之硬度量測圖。
圖9展示第一實例中25μm線之楔接合之第2接合處理窗與習用25μm純銅線之接合窗的對比。
圖10展示本發明之第二實例之20μm線之退火曲線。在此實例中,線核心之銅含有少量銀。
圖11展示第二實例之線與對比線之針腳拉力對比。
圖12展示第二實例之線與對比線之硬度對比。
圖13a展示第一實例之線之熱老化行為。
圖13b展示第二實例之線之熱老化行為。
圖14展示本發明之第一實例及第二實例之不同20μm直徑線之平均晶粒大小的對比。
圖15展示股線退火裝置之示意圖。
圖16展示本發明之第三實例之20μm線之退火曲線。在此第三實例中,線核心之銅含有少量鈀。
圖17展示顯示第三實例之20μm線之平均晶粒大小之圖。左側之數據點係在線上量測且右側之數據點係在線之無空氣球上量測。
圖18展示線核心之顯微硬度圖,其係在距位於0μm處之無空氣
球之不同距離處所量測。頸部區域在無空氣球與未受影響線區域之間以及直至未受影響線區域中約200μm。顯而易見,線具有在85 HV(0.010N/5s)至95 HV(0.010N/5s)之範圍內之顯微硬度。
圖19展示本發明之20μm線之球接合處理窗。一個處理窗係關於本發明之第一實例之線(稱為「4N軟Cu」),且另一處理窗係關於本發明之第三實例之線(稱為「Pd合金化1N Cu」)。
圖20展示本發明之20μm線之第二接合(「針線接合」)處理窗。一個處理窗係關於本發明之第一實例之線(稱為「4N軟Cu」),且另一處理窗係關於本發明之第三實例之線(稱為「Pd合金化1N Cu」)。
圖21展示本發明之第三實例之20μm線之熱老化行為。
1‧‧‧線
2‧‧‧銅核心
3‧‧‧塗層
15‧‧‧表面
23‧‧‧中心
L‧‧‧直線
Claims (20)
- 一種接合線,其包括:具有表面之核心(2),其中該核心(2)包括銅作為主要組份,其中該核心中之晶粒之平均大小係介於2.5μm與30μm之間,且其中該接合線之屈服強度係小於120MPa。
- 如前述請求項中任一項之線,其中該線之楊氏模量(Young’s modulu)係小於100GPa。
- 如前述請求項中任一項之線,其中該線核心(2)之直徑與該平均晶粒大小之間之比率係介於2.5與6之間。
- 如前述請求項中任一項之線,其中該線核心(2)之銅之總量為至少97%。
- 如前述請求項中任一項之線,其中該線核心包含介於0.5%與3%之間之量的鈀。
- 如前述請求項中任一項之線,其中該線核心包含介於45ppm與900ppm之間之量的銀。
- 如前述請求項中任一項之線,其中該線(1)具有在8μm至80μm之範圍內之直徑。
- 如前述請求項中任一項之線,其中在接合步驟之前將該線核心在至少580℃之溫度下退火至少0.1s之時間。
- 如前述請求項中任一項之線,其中該線(1)在退火之後之伸長率值不超過最大伸長率值之92%。
- 如請求項9之線,其中將該線(1)在比藉由退火達成該最大伸長率值之溫度高至少10℃之溫度下退火。
- 如前述請求項中任一項之線,其中將塗層(3)疊置於該核心(2)之該表面上。
- 如請求項11之線,其中該塗層之質量不超過該線核心(2)之質量之3%。
- 如請求項11或12之線,其中該塗層(3)包括Pd、Au、Pt及Ag之群中之至少一者作為主要組份。
- 如前述請求項中任一項之線,其中該線核心(2)在接合之前之硬度不大於95.0 HV(0.010N/5s)。
- 如前述請求項中任一項之線,其中該線核心中硼之含量係小於100ppm。
- 如前述請求項中任一項之線,其中該線核心之直徑係介於15μm與28μm之間且該平均晶粒大小係介於2.5μm與6μm之間;或該線核心之直徑係介於28μm與38μm之間且該平均晶粒大小係介於3μm與10μm之間;或該線核心之直徑係介於38μm與50μm之間且該平均晶粒大小係介於7μm與15μm之間;或該線核心之直徑係介於50μm與80μm之間且該平均晶粒大小係介於10μm與30μm之間。
- 一種模組,其包括第一接合墊(11)、第二接合墊(11)及如前述請求項中任一項之線(1),其中該線(1)係藉助球接合連結至該等接合墊(11)中之一者。
- 如請求項17之模組,其中在將20μm直徑之線接合至鋁接合墊之情形下,用於該球接合之製程窗面積具有至少120g*mA之值。
- 一種製造如請求項1至16中任一項之接合線之方法,其包括以下步驟: a.提供具有所需組成之銅核心前體;b.牽拉該前體直至達到該線核心之最終直徑為止;c.在界定溫度下將該所牽拉線(1)退火一段最小退火時間。
- 如請求項19之方法,其中藉由股線退火實施該退火。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP13002359 | 2013-05-03 | ||
EP20130002674 EP2768019A3 (en) | 2013-02-15 | 2013-07-15 | Copper bond wire and method of making the same |
Publications (2)
Publication Number | Publication Date |
---|---|
TW201504460A true TW201504460A (zh) | 2015-02-01 |
TWI512121B TWI512121B (zh) | 2015-12-11 |
Family
ID=51843783
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW103115651A TWI512121B (zh) | 2013-05-03 | 2014-04-30 | 用於接合應用之銅線 |
Country Status (7)
Country | Link |
---|---|
US (1) | US20160078980A1 (zh) |
JP (1) | JP6462665B2 (zh) |
KR (1) | KR101989799B1 (zh) |
CN (1) | CN105393352B (zh) |
SG (1) | SG11201508519YA (zh) |
TW (1) | TWI512121B (zh) |
WO (1) | WO2014178792A1 (zh) |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP3188222B1 (en) * | 2014-08-29 | 2022-03-16 | Nippon Micrometal Corporation | Cylindrical formed body for cu pillars for semiconductor connection |
SG10201408586XA (en) * | 2014-12-22 | 2016-07-28 | Heraeus Materials Singapore Pte Ltd | Corrosion and moisture resistant bonding wire |
SG10201508104TA (en) * | 2015-09-29 | 2017-04-27 | Heraeus Materials Singapore Pte Ltd | Alloyed silver wire |
SG10201509634UA (en) * | 2015-11-23 | 2017-06-29 | Heraeus Oriental Hitec Co Ltd | Coated wire |
SG10201509913XA (en) * | 2015-12-02 | 2017-07-28 | Heraeus Materials Singapore Pte Ltd | Silver alloyed copper wire |
SG10201600329SA (en) * | 2016-01-15 | 2017-08-30 | Heraeus Materials Singapore Pte Ltd | Coated wire |
CN106363034B (zh) * | 2016-08-26 | 2018-11-20 | 远东电缆有限公司 | 一种中间态高导电铝单线及其制造方法 |
DE112017000346T5 (de) | 2017-12-28 | 2019-08-29 | Nippon Micrometal Corporation | Bonddraht für Halbleiterbauelement |
TWI727586B (zh) * | 2019-02-28 | 2021-05-11 | 日商Jx金屬股份有限公司 | 銅電極材料 |
JP2020155559A (ja) * | 2019-03-19 | 2020-09-24 | キオクシア株式会社 | 半導体装置 |
WO2020218968A1 (en) * | 2019-04-26 | 2020-10-29 | Heraeus Materials Singapore Pte. Ltd. | Coated wire |
CN111519227B (zh) * | 2020-03-30 | 2021-02-23 | 安徽广宇电子材料有限公司 | 一种键合线制备用铜丝材料的抗氧化处理设备 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4818311A (en) * | 1987-01-21 | 1989-04-04 | American Telephone And Telegraph Company, At&T Technologies Inc. | Methods of and apparatus for heating a moving metallic strand material |
JP2004064033A (ja) * | 2001-10-23 | 2004-02-26 | Sumitomo Electric Wintec Inc | ボンディングワイヤー |
CN101828255B (zh) * | 2007-12-03 | 2011-11-09 | 新日铁高新材料株式会社 | 半导体装置用接合线 |
JP4904252B2 (ja) * | 2007-12-03 | 2012-03-28 | 新日鉄マテリアルズ株式会社 | 半導体装置用ボンディングワイヤ |
EP2239766B1 (en) * | 2008-01-25 | 2013-03-20 | Nippon Steel & Sumikin Materials Co., Ltd. | Bonding wire for semiconductor device |
US20100052174A1 (en) * | 2008-08-27 | 2010-03-04 | Agere Systems Inc. | Copper pad for copper wire bonding |
SG177358A1 (en) * | 2009-06-24 | 2012-02-28 | Nippon Steel Materials Co Ltd | Copper alloy bonding wire for semiconductor |
CN102226991B (zh) * | 2011-06-12 | 2012-11-28 | 徐云管 | 铜钯合金单晶键合丝及其制造方法 |
-
2014
- 2014-04-04 KR KR1020157034478A patent/KR101989799B1/ko active IP Right Grant
- 2014-04-04 US US14/888,827 patent/US20160078980A1/en not_active Abandoned
- 2014-04-04 CN CN201480037851.1A patent/CN105393352B/zh active Active
- 2014-04-04 JP JP2016511710A patent/JP6462665B2/ja active Active
- 2014-04-04 WO PCT/SG2014/000151 patent/WO2014178792A1/en active Application Filing
- 2014-04-04 SG SG11201508519YA patent/SG11201508519YA/en unknown
- 2014-04-30 TW TW103115651A patent/TWI512121B/zh active
Also Published As
Publication number | Publication date |
---|---|
KR20160013057A (ko) | 2016-02-03 |
WO2014178792A1 (en) | 2014-11-06 |
CN105393352A (zh) | 2016-03-09 |
KR101989799B1 (ko) | 2019-06-17 |
US20160078980A1 (en) | 2016-03-17 |
CN105393352B (zh) | 2018-11-16 |
JP6462665B2 (ja) | 2019-01-30 |
JP2016524811A (ja) | 2016-08-18 |
TWI512121B (zh) | 2015-12-11 |
SG11201508519YA (en) | 2015-11-27 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TWI512121B (zh) | 用於接合應用之銅線 | |
JP5246314B2 (ja) | 半導体用銅合金ボンディングワイヤ | |
EP2927956A1 (en) | Copper bond wire and method of making the same | |
US20220122937A1 (en) | Palladium-coated copper bonding wire, manufacturing method of palladium-coated copper bonding wire, semiconductor device using the same, and manufacturing method thereof | |
CN103155130A (zh) | Ag-Au-Pd三元合金接合线 | |
WO2012169067A1 (ja) | 高強度、高伸び率金合金ボンディングワイヤ | |
JP2014222725A (ja) | 高速信号用ボンディングワイヤ | |
TWI744220B (zh) | 用於接合應用的經塗佈銅(Cu)線 | |
KR20150140405A (ko) | 반도체 장치용 본딩 와이어 및 그 제조 방법 | |
WO2016030050A1 (en) | Silver bonding wire and method of manufacturing the same | |
WO2014137288A1 (en) | Palladium coated copper wire for bonding applications | |
CN115803856A (zh) | 半导体装置用接合线 | |
WO2016091718A1 (en) | Improved coated copper wire for bonding applications | |
TWI579392B (zh) | 用於接合應用之粗銅線的製造方法 | |
US20150137390A1 (en) | Aluminum coated copper ribbon | |
WO2006134824A1 (ja) | 高い初期接合性、高い接合信頼性、圧着ボールの高い真円性、高い直進性および高い耐樹脂流れ性を有するボンディングワイヤ用金合金線 | |
WO2014137287A1 (en) | Palladium coated copper wire for bonding applications | |
EP3230482B1 (en) | Copper based bonding wire for a semiconductor device | |
JP4947670B2 (ja) | 半導体素子用ボンディングワイヤの熱処理方法 | |
TW201711150A (zh) | 球焊用銅合金細線 | |
WO2014137286A1 (en) | Palladium coated copper wire for bonding applications |