TW201326435A - Copper-palladium alloy wire formed by solid phase diffusion reaction and the manufacturing method thereof - Google Patents

Copper-palladium alloy wire formed by solid phase diffusion reaction and the manufacturing method thereof Download PDF

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TW201326435A
TW201326435A TW102105756A TW102105756A TW201326435A TW 201326435 A TW201326435 A TW 201326435A TW 102105756 A TW102105756 A TW 102105756A TW 102105756 A TW102105756 A TW 102105756A TW 201326435 A TW201326435 A TW 201326435A
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palladium
wire
copper
solid phase
phase diffusion
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TWI413702B (en
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Truan-Sheng Lui
Fei-Yi Hung
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Truan-Sheng Lui
Fei-Yi Hung
Feng Ching Metal Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/43Manufacturing methods
    • H01L2224/438Post-treatment of the connector
    • H01L2224/43848Thermal treatments, e.g. annealing, controlled cooling
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45147Copper (Cu) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/4554Coating
    • H01L2224/45565Single coating layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond

Abstract

The invention relates to a copper-palladium alloy wire formed by a solid phase diffusion reaction and the manufacturing method thereof. Primarily, the method comprises the following steps: a palladium-containing coating layer is formed on a surface of a core wire made of copper or copper alloy; the core wire is proceeded with vacuum heat treatment so that the palladium-containing coating layer is diffused to a base of the core wire; and a uniform copper-palladium alloy layer is form in the organization of the core wire. Accordingly, comparing to a known bonding wire without proceeding with vacuum heat treatment, it has not only better hardness of the center of the sphere, yield strength of the neck and interface tensile strength but also can pass the stricter high temperature storage test to further improve the reliability of the subsequent burning, molding and wire-processing process for the bonding wire.

Description

固相擴散反應銅鈀合金線及其製造方法 Solid phase diffusion reaction copper-palladium alloy wire and manufacturing method thereof

本發明係有關於一種固相擴散反應銅鈀合金線及其製造方法,尤其是指一種以真空熱處理製程將含鈀被覆層完全擴散至芯線基地上,以具有較佳之球心硬度、頸部降伏强度以及界面接合抗拉強度,進而提高整體之產出率與良率,同時可通過較嚴苛之高溫保存試驗,提昇接合線後續的燒球成型以及打線處理製程之可靠度,使得本發明之接合線具有良好之銲接成球性與接合性者。 The invention relates to a solid phase diffusion reaction copper-palladium alloy wire and a manufacturing method thereof, in particular to a method for completely diffusing a palladium-containing coating layer onto a core wire base by a vacuum heat treatment process, so as to have better spherical core hardness and neck relief. The strength and the interface joint tensile strength, thereby improving the overall yield and yield, and at the same time, through the more stringent high temperature preservation test, improving the reliability of the subsequent ball forming and wire bonding process of the bonding wire, so that the present invention The bonding wires have good soldering properties and bonding properties.

按,半導體封裝在打線接合(Wire-Bonding,WB)製程使用的線材一直以金線為主,例如以高純度4N系(純度>99.99mass%)的黃金與其他微量金屬元素製成的金線作為封裝製程之接合線;然,隨著金價不斷地上漲,近年已達到每盎司1600美元的高價,導致半導體後段封裝廠家在考量材料成本下紛紛導入銅線製程以尋求獲利空間;相對金或銀線而言,銅線不僅有成本上的優勢,且具高導電性與導熱性,並在高溫下有優異可靠度等優點;然而銅線的硬度較高且易氧化的問題仍是封裝製程上最大的問題,舉例而言,使用銅導線時,由於封裝用樹脂與導線的熱膨脹係數差異過大,隨著半導體晶片啟動後溫度上升,因熱形成之體積膨脹對形成迴路的銅接合線產生外部應力,特別是對暴露於嚴酷的熱循環條件下的半導體元件,更容易使銅接合線發生界面剝離與斷線問題;因此,針 對上述缺失,雖有業者針對封裝用之接合銅線改良,請參閱中華民國發明專利公開第201207129號所揭露之『封裝用之接合銅線及其製造方法』,其中揭露一種封裝用之接合銅線,成分包括有銀(Ag)、添加物、以及銅(Cu);其中,銀含量係0.1~3wt%;添加物係至少一選自由鎳(Ni)、鉑(Pt)、鈀(Pd)、錫(Sn)、及金(Au)所組成之群組,且添加物之含量係0.1~3wt%;再者,銅與銀共晶相體積率佔全部體積的0.1~8%,且接合銅線抗拉強度250MPa以上,導電率在70%IACS以上;藉此,不僅使得阻抗和傳統金線相當或甚至更低(>70%IACS),可達到更佳導電率,且硬度適中並易於銲接,更能進行球型銲接,於耐熱循環之嚴苛條件下亦能使用。 According to the semiconductor package, the wire used in the wire-bonding (WB) process has always been dominated by gold wires, such as gold wires made of high-purity 4N (purity >99.99 mass%) gold and other trace metal elements. As the bonding line of the packaging process; of course, as the price of gold continues to rise, it has reached a high price of 1,600 US dollars per ounce in recent years, leading to the semiconductor rear-end packaging manufacturers to introduce copper wire process to consider the profit of space; In terms of silver wire, copper wire not only has cost advantages, but also has high conductivity and thermal conductivity, and has excellent reliability at high temperatures; however, the problem of high hardness and easy oxidation of copper wire is still the packaging process. The biggest problem, for example, is that when a copper wire is used, since the difference in thermal expansion coefficient between the resin for sealing and the wire is too large, as the temperature rises after the semiconductor wafer is started, the volume expansion due to heat is generated externally to the copper bonding wire forming the circuit. Stress, especially for semiconductor components exposed to severe thermal cycling conditions, makes it easier to cause interfacial peeling and wire breakage problems in copper bond wires; Needle For the above-mentioned deficiencies, please refer to the "Joint Copper Wire for Packaging and Its Manufacturing Method" disclosed in the Republic of China Invention Patent Publication No. 201207129, which discloses a joint copper for packaging. a wire comprising: silver (Ag), an additive, and copper (Cu); wherein the silver content is 0.1 to 3 wt%; and the additive is at least one selected from the group consisting of nickel (Ni), platinum (Pt), and palladium (Pd). a group consisting of tin (Sn) and gold (Au), and the content of the additive is 0.1 to 3 wt%; further, the volume ratio of the copper to silver eutectic phase is 0.1 to 8% of the total volume, and the bonding The tensile strength of copper wire is above 250MPa, and the conductivity is above 70% IACS; thus, not only the impedance is equivalent to or even lower than the traditional gold wire (>70% IACS), but the conductivity is better, the hardness is moderate and easy. Welding, more spherical welding, can also be used under the harsh conditions of heat cycle.

然,上述之接合銅線雖能滿足成本與銲接的要求,但卻有易氧化、壽命短的缺失,因此有業者進一步藉由一表面塗層,其能為積體電路封裝,提供更佳之引線接合性能;請參閱中華民國發明專利公告第480292號所揭露之『適用於引線接合之鈀表面塗層及形成鈀表面塗層之方法』,其表面塗層係形成於一基板之上,包含一鈀層與一種或多種材料層;該一種或多種材料層係夾在基板與鈀層之間;當至少一種材料之硬度少於250(KHN50)時,該鈀層之硬度少於大約500(KHN50);其中該鈀層之厚度最好大於0.075微米,以避免氧化物在其下材料層上形成;上述之基板材料可包含有銅或銅合金,藉由鍍鈀銅線來取代金線,不但可以節省約七成的材料成本,而且鍍鈀銅線被使用時的可靠度(如耐高溫、高濕能力)也能符合要求;此外,亦請一併參閱新日鐵高新材料股份有限公司與日鐵微金屬股份有限公司所申請一系列有關半導體裝置用合接線之中華民國發明專利,公告第I342809所揭露之『半導體裝置用合接線』、公告第I364806所揭露之『半導體裝置用合接線』、公告第I364806所揭露之『半導體用接合導線』、公開第2 01107499之『半導體用銅合金接合線』、公開第201140718之『半導體用銅接合線及其接合構造』以及公開第201230903之『複數層銅接合線的接合構造』;上述前案之接合線結構大抵皆係於一芯材(可為銅、金、銀等金屬所構成)表面設有一表皮層(可為鈀、釕、銠、鉑,以及銀所構成),導致上述之接合線於實際實施使用時常產生下述缺失:(a)因鍍鈀銅線(芯材)的表面具有一鈀層(表皮層),使得硬度偏高,且製程電流控制不易,常導致鍍鈀層厚度不均,造成封裝過程整體產出率差、良率偏低;(b)銅或銅合金鍍上鈀層於燒球成型(electric frame off,EFO)時,因表面之鈀層使得成球(free air ball,FAB)之球心硬度過硬,造成銲球上方頸部之強度不足,於打線(wire bonding,WB)後,常發生頸部斷裂問題,進而導致接合界面剝離的問題發生;(c)銅或銅合金上形成的表面塗層在高溫下(160℃,24小時)的保存試驗不佳,易導致表面起泡的現象,造成接合強度降低,由可靠性的觀點來看,存有問題;以及(d)成球後,鈀元素幾乎於頸部區域偏析,對抑制金屬間化合物(Intermetallic Compound,IMC)成長不彰。 However, although the above-mentioned bonded copper wire can meet the requirements of cost and soldering, it has the defects of easy oxidation and short life. Therefore, the manufacturer further provides a better lead for the integrated circuit package by a surface coating. Bonding performance; please refer to the "Method for Applying Wire Bonded Palladium Surface Coating and Forming Palladium Surface Coating" as disclosed in the Chinese Patent Publication No. 480292, the surface coating of which is formed on a substrate, including a a palladium layer and one or more material layers; the one or more material layers are sandwiched between the substrate and the palladium layer; and when the hardness of the at least one material is less than 250 (KHN50), the palladium layer has a hardness of less than about 500 (KHN50) Wherein the thickness of the palladium layer is preferably greater than 0.075 microns to prevent oxide formation on the underlying material layer; the substrate material may comprise copper or a copper alloy, and the palladium-plated copper wire is substituted for the gold wire, not only It can save about 70% of the material cost, and the reliability of the palladium-plated copper wire when it is used (such as high temperature resistance and high humidity capacity) can also meet the requirements; in addition, please also refer to Nippon Steel High-tech Materials Co., Ltd. Nippon Steel Micro Metals Co., Ltd. has applied for a series of wirings for semiconductor devices, such as the Republic of China invention patent, the "Wiring for semiconductor devices" disclosed in the announcement No. I342809, and the wiring for semiconductor devices disclosed in the announcement No. I364806. "Secondary bonding wire for semiconductors" disclosed in the announcement No. I364806, the second disclosure The "copper alloy bonding wire for semiconductors" of 01107499, the "copper bonding wire for semiconductors and bonding structure thereof" of the publication No. 201140718, and the "joining structure of a plurality of copper bonding wires" of the Japanese Patent No. 201230903; All of them are provided on a surface of a core material (which may be composed of a metal such as copper, gold or silver), and are provided with a skin layer (which may be composed of palladium, rhodium, iridium, platinum, and silver), so that the above-mentioned bonding wire is actually used. The following defects are often caused: (a) Since the surface of the palladium-plated copper wire (core material) has a palladium layer (skin layer), the hardness is high, and the process current control is not easy, often resulting in uneven thickness of the palladium plating layer, resulting in The overall yield of the packaging process is poor, and the yield is low; (b) When the palladium layer is plated on the copper or copper alloy in the electric frame off (EFO), the palladium layer on the surface makes the ball (free air ball, The ball hardness of FAB) is too hard, resulting in insufficient strength of the neck above the solder ball. After wire bonding (WB), the neck fracture problem often occurs, which leads to the problem of joint interface peeling; (c) copper or copper The surface coating formed on the alloy is at high temperature (16 0 ° C, 24 hours) poor storage test, easy to cause surface foaming, resulting in reduced joint strength, from the point of view of reliability, there are problems; and (d) after the ball, the palladium element is almost the neck The segregation in the area is not conducive to the growth of Intermetallic Compound (IMC).

今,發明人即是鑑於上述現有半導體封裝用之鍍鈀銅線在實際實施上仍具有多處之缺失,於是乃一本孜孜不倦之精神,並藉由其豐富之專業知識及多年之實務經驗所輔佐,而加以改善,並據此研創出本發明。 Nowadays, the inventor is in view of the fact that the palladium-plated copper wire used in the conventional semiconductor package still has many defects in practical implementation, so it is a tireless spirit, and with its rich professional knowledge and many years of practical experience. The invention was assisted and improved, and the present invention was developed based on this.

本發明主要目的為提供一種固相擴散反應銅鈀合金線的製備方法,係主要包含有下述步驟:首先,準備一銅或銅合金所製成之芯線;接著,將一含鈀被覆層以例如濺鍍、蒸鍍或沈積的方式形成於芯線之表面;最後,將上述芯線進行真空熱處理,使含鈀被覆層完全擴散至芯線之基地(matrix)上,並於 芯線之組織中形成均勻銅鈀合金層;藉此,以真空熱處理製程將含鈀被覆層完全擴散至芯線基地上,使得所製備之半導體封裝接合線於燒球成型後,不僅符合真圓度之要求,且亦具有較佳之球心硬度以及頸部降伏强度,並於打線接合封裝製程後產生較優異之界面接合抗拉強度;此外,所製備之接合線亦可通過嚴苛之高溫保存試驗,提昇接合線後續的燒球成型以及打線處理製程之可靠度。 The main object of the present invention is to provide a method for preparing a solid phase diffusion reaction copper-palladium alloy wire, which mainly comprises the following steps: first, preparing a core wire made of copper or a copper alloy; and then, a palladium-containing coating layer is used. For example, sputtering, evaporation or deposition is formed on the surface of the core wire; finally, the core wire is subjected to vacuum heat treatment to completely diffuse the palladium-containing coating layer onto the matrix of the core wire, and A uniform copper-palladium alloy layer is formed in the structure of the core wire; thereby, the palladium-containing coating layer is completely diffused onto the core wire base by a vacuum heat treatment process, so that the prepared semiconductor package bonding wire not only conforms to the roundness after the ball is formed. Requires, and also has better core hardness and neck relief strength, and produces better interfacial joint tensile strength after the wire bonding process; in addition, the prepared bonding wire can also pass the severe high temperature preservation test. Improve the reliability of the subsequent ball forming and wire bonding process of the bonding wire.

再者,於上述之製備步驟中,真空熱處理之溫度範圍介於300℃~500℃之間,且處理時間為1~3小時之間;此外,形成於芯線表面之含鈀被覆層之厚度係不大於120奈米。 Furthermore, in the above preparation step, the temperature range of the vacuum heat treatment is between 300 ° C and 500 ° C, and the treatment time is between 1 and 3 hours; in addition, the thickness of the palladium-containing coating layer formed on the surface of the core wire is Not more than 120 nm.

本發明之另一目的為提供一種以上述製備方法製得之半導體封裝接合線;其中,固相擴散反應銅鈀合金線於燒球成型後之球心硬度係不大於50Hv,且頸部降伏强度係不小於140MPa;而接合線於燒球成型、打線處理後,其界面接合之抗拉強度係不小於7.0g;藉此,本發明之半導體封裝接合線具有良好之銲接成球性與接合性,符合市場殷切需求之產出率以及良率者。 Another object of the present invention is to provide a semiconductor package bonding wire obtained by the above preparation method; wherein the solid phase diffusion reaction copper-palladium alloy wire has a spherical core hardness of not more than 50 Hv after the ball is formed, and the neck strength is reduced. The tensile strength of the interface bonding is not less than 7.0 g after the bonding wire is formed by the ball forming and wire bonding; thereby, the semiconductor package bonding wire of the present invention has good soldering and bonding properties. , in line with the market's strong demand for output rate and yield.

(S1)‧‧‧步驟一 (S1)‧‧‧Step one

(S2)‧‧‧步驟二 (S2)‧‧‧Step 2

(S3)‧‧‧步驟三 (S3) ‧ ‧ Step 3

(1)‧‧‧接合線 (1)‧‧‧ Bonding wire

(11)‧‧‧銲球 (11)‧‧‧ solder balls

(12)‧‧‧頸部 (12)‧‧‧ neck

(2)‧‧‧零件表面 (2) ‧‧‧Part surface

(3)‧‧‧固定裝置 (3) ‧‧‧Fixed devices

(4)‧‧‧拉伸裝置 (4) ‧‧‧ stretching device

第一圖:本發明固相擴散反應銅鈀合金線其製備方法步驟流程圖 First: Flow chart of the preparation method of the solid phase diffusion reaction copper-palladium alloy wire of the present invention

第二圖:本發明步驟二完成後,其含鈀被覆層形成於芯線表面之顯微鏡照片圖 Second: after the completion of step 2 of the present invention, a photomicrograph of the palladium-containing coating layer formed on the surface of the core wire

第三圖:本發明步驟三完成後,其含鈀被覆層完全擴散至芯線基地之顯微鏡照片圖 The third picture: the micrograph of the palladium-containing coating layer completely diffused to the core base after the completion of the third step of the present invention

第四圖:本發明之接合線於燒球成型後,測試頸部降伏强度示意圖 Figure 4: Schematic diagram of testing the neck drop strength after the bonding wire of the present invention is formed by burning balls

第五圖:本發明之接合線於燒球成型、打線處理後,測試界面接合抗拉強度示意圖 Fig. 5 is a schematic view showing the tensile strength of the test interface joint after the bonding wire of the present invention is formed by the ball forming and wire bonding

第六圖:傳統未進行真空熱處理之鍍鈀接合線於160℃,24小時之保存試驗後,表面起泡之顯微鏡照片圖 Figure 6: Micrograph of the surface blistering after a 24-hour storage test at 160 ° C for a conventional palladium-free bonding wire without vacuum heat treatment

第七圖:本發明進行真空熱處理之鍍鈀接合線於160℃,24小時保存試驗後之顯微鏡照片圖 Figure 7: Micrograph of the palladium bonding wire subjected to vacuum heat treatment of the present invention at 160 ° C for 24 hours storage test

本發明之目的及其結構功能上的優點,將依據以下圖面所示之結構,配合具體實施例予以說明,俾使審查委員能對本發明有更深入且具體之瞭解。 The object of the present invention and its structural and functional advantages will be explained in conjunction with the specific embodiments according to the structure shown in the following drawings, so that the reviewing committee can have a more in-depth and specific understanding of the present invention.

首先,本發明製造方法所製成之固相擴散反應銅鈀合金線可例如適用於印刷電路板之電路、IC封裝、ITO基板、IC卡等之電子工業零件之端子或電路表面;請參閱第一圖所示,為本發明固相擴散反應銅鈀合金線之製備方法步驟流程圖,係包括有下述步驟:步驟一:準備一銅或銅合金所製成之芯線;步驟二:將一含鈀被覆層形成於芯線之表面;其中,含鈀被覆層可以一濺鍍、一蒸鍍或一沈積的方式形成於芯線之表面,在此並不限定;再者,含鈀被覆層之厚度較佳係不大於120奈米;以及步驟三:將具含鈀被覆層之芯線進行真空熱處理,使含鈀被覆層完全擴散至芯線之基地上,並於芯線之金相組織中形成均勻銅鈀合金層,亦即於芯線表面無先前技術中所述之表皮層;其中,真空熱處理之溫度範圍可介於300℃~500℃之間,且處理時間為1~3小時之間。 First, the solid phase diffusion reaction copper-palladium alloy wire produced by the manufacturing method of the present invention can be applied, for example, to a terminal or circuit surface of an electronic industrial part such as a printed circuit board circuit, an IC package, an ITO substrate, an IC card, or the like; 1 is a flow chart showing the steps of preparing a solid phase diffusion reaction copper-palladium alloy wire according to the present invention, which comprises the following steps: Step 1: preparing a core wire made of copper or copper alloy; Step 2: The palladium-containing coating layer is formed on the surface of the core wire; wherein the palladium-containing coating layer can be formed on the surface of the core wire by sputtering, vapor deposition or deposition, which is not limited thereto; further, the thickness of the palladium-containing coating layer Preferably, it is not more than 120 nm; and Step 3: vacuum-treating the core wire with the palladium-containing coating layer to completely diffuse the palladium-containing coating layer onto the base of the core wire, and form uniform copper palladium in the metallographic structure of the core wire. The alloy layer, that is, the surface layer of the core wire, has no skin layer as described in the prior art; wherein the temperature range of the vacuum heat treatment may be between 300 ° C and 500 ° C, and the treatment time is between 1 and 3 hours.

接著,為使 貴審查委員能進一步瞭解本發明之目的、特徵以及所達成之功效,以下茲舉本發明所製備出固相擴散反應銅鈀合金線一些具體實際實施例,並進一步證明本發明之製造方法可實際應用之範圍,但不意欲以任何形式限制本發明之範圍:首先,準備一線徑(φ)為20μm之銅芯線;接著,於芯線表面鍍上一厚度分別為30奈米、70奈米以及120奈米之 含鈀被覆層,請參閱第二圖所示,係含鈀被覆層形成於芯線表面之顯微鏡照片圖;然後,將此3種樣品分別於250℃~500℃之不同溫度下進行2小時的真空熱處理,下表所示為芯線表面殘留之含鈀被覆層厚度之結果整理表: Next, in order to enable the reviewing committee to further understand the object, features, and effects achieved by the present invention, some specific practical examples of the solid phase diffusion reaction copper-palladium alloy wire prepared by the present invention are exemplified below, and the present invention is further proved. The manufacturing method can be applied in a practical range, but it is not intended to limit the scope of the invention in any form: first, a copper core wire having a wire diameter (φ) of 20 μm is prepared; and then, a thickness of 30 nm, 70 is respectively plated on the surface of the core wire. For nanometer and 120 nm palladium-coated coating, please refer to the second photo, which is a photomicrograph of the palladium-coated coating on the surface of the core wire; then, the three samples are different at 250 ° C ~ 500 ° C Vacuum heat treatment was carried out for 2 hours at the temperature. The table below shows the results of the thickness of the palladium-containing coating remaining on the surface of the core wire:

由上表可知,芯線表面之含鈀被覆層厚度越厚,在相同之熱處理時間下,所需之熱處理溫度必須越高,其含鈀被覆層才能完全擴散至芯線基地;舉例而言,當含鈀被覆層之厚度為70奈米時,於350℃,2小時的真空熱處理下,含鈀被覆層才能完全擴散至芯線基地,請一併參閱第三圖所示,為含鈀被覆層完全擴散至芯線基地之顯微鏡照片圖;此外,本發明之接合線(1)製備完成並於打線接合封裝實際實施使用時,一般係以打線機將上述接合線(1)之端部燒球成型為一銲球(11),請一併參閱第四、五圖所示,再將銲球(11)以超音波熱壓方式於印刷電路板之電路、IC晶片、ITO基板、IC卡等電子工業零件表面(2),即可完成所需之打線接合封裝製程;而下表所述即為上述3種樣品分別於250℃~500℃之不同溫度下進行2小時的真空熱處理後,其銲球(11)之真圓度結果,由表中可清楚得知,以本發明製備方法產生之銅鈀合金線其燒球性皆符合真圓度之要求。 It can be seen from the above table that the thicker the palladium-containing coating layer on the surface of the core wire, the higher the heat treatment temperature required for the same heat treatment time, and the palladium-containing coating layer can be completely diffused to the core base; for example, when When the thickness of the palladium coating layer is 70 nm, the palladium-containing coating layer can be completely diffused to the core base at 350 ° C for 2 hours under vacuum heat treatment. Please refer to the third figure for complete diffusion of the palladium-containing coating layer. In addition, when the bonding wire (1) of the present invention is prepared and used in the actual implementation of the wire bonding package, the end portion of the bonding wire (1) is generally formed into a ball by a wire bonding machine. For the solder ball (11), please refer to the fourth and fifth figures, and then solder the ball (11) to the printed circuit board circuit, IC chip, ITO substrate, IC card and other electronic industrial parts by ultrasonic hot pressing. Surface (2), the required wire bonding process can be completed; and the following table shows the solder balls of the above three samples after vacuum heat treatment for 2 hours at different temperatures from 250 ° C to 500 ° C ( 11) The true roundness result can be cleared from the table Chu knows that the copper-palladium alloy wire produced by the preparation method of the invention has the ball-burning property in accordance with the requirement of roundness.

接著,請再參閱第四圖所示,為本發明之接合線於燒球成型後,測試頸部降伏强度示意圖,其測試方法係將接合線(1)之頸部(12)以一固定裝置(3)夾掣,並於接合線(1)對應銲球(11)之另一端以一拉伸裝置(4)朝遠離銲球(11)方向進行拉伸,藉以測試接合線(1)其頸部(12)之降伏强度,其7個不同熱處理狀態下試驗樣品的測試結果如下表所述;其中,樣品A為於芯線表面鍍上30奈米厚度之含鈀被覆層,且未進行真空熱處理、樣品B係於芯線表面鍍上30奈米厚度之含鈀被覆層,且於300℃下進行真空熱處理2小時、樣品C為於芯線表面鍍上70奈米厚度之含鈀被覆層,且未進行真空熱處理、樣品D則於芯線表面鍍上70奈米厚度之含鈀被覆層,且於350℃下進行真空熱處理2小時、樣品E係具120奈米厚度之含鈀被覆層,且未進行真空熱處理、樣品F具120奈米厚度之含鈀被覆層,且於250℃下進行真空熱處理2小時、樣品G具120奈米厚度之含鈀被覆層,且於500℃下進行真空熱處理2小時;由表中之結果可清楚得知,當含鈀被覆層完全擴散至芯線之基地,並於芯線之金相組織中形成均勻銅鈀合金層時(亦即含鈀被覆層厚度為0之樣品為B、D以及G),其頸部降伏强度明顯大於未進行真空熱處理,以及含鈀被覆層未完全擴散至芯線基地之樣品,且整體而言,以本發明製備方法所製得之接合線(1),於燒球成型後,其頸部降伏强度較佳係不小於140MPa;請再參閱第五圖所示,為本發明之接合線於燒球成型、打線處理後,測試界面接合抗拉強度示意圖,其測試方法係於接合線(1)完成打線接合製程後,於接合線(1)對應零件表面(2)另一端以一拉伸裝置(4)朝遠離接合面方向進行拉伸,藉以測 試接合線(1)之界面接合抗拉強度,其試驗結果如下表所述;由表中清楚得知,樣品B、D以及G之界面接合抗拉強度明顯大於未進行真空熱處理,或含鈀被覆層未完全擴散至芯線基地之樣品,其界面接合抗拉強度較佳係不小於7.0g;此外,本發明亦量測上述7個樣品其銲球(11)球心硬度,結果顯示樣品B、D以及G明顯小於未進行真空熱處理,或含鈀被覆層未完全擴散至芯線基地之樣品,可理解地,當含鈀被覆層未擴散或未完全擴散至芯線基地時,接合線(1)之端部於燒球成型為銲球(11)後,銲球(11)所含的鈀金屬大多聚積於靠近頸部(12)處,造成鈀偏析,導致頸部(12)成為接合線(1)結構強度之相對弱點,而易於此處發生斷裂問題;反觀本發明完全擴散至芯線基地之接合線(1),其鈀金屬係均勻分佈於銲球(11),因此球心硬度明顯較小,以便打線製程後,可避免如傳統常發生於頸部(12)斷裂問題,進而導致接合界面剝離的問題發生,且應理解地,較小之球心硬度亦有關於如上所述之較佳頸部降伏强度與界面接合抗拉強度。 Next, please refer to the fourth figure, which is a schematic diagram of testing the neck drop strength after the ball is formed by the bonding wire of the present invention, and the test method is to fix the neck (12) of the bonding wire (1) as a fixing device. (3) clamping and stretching at the other end of the bonding wire (1) corresponding to the solder ball (11) by a stretching device (4) away from the solder ball (11), thereby testing the bonding wire (1) The strength of the neck (12), the test results of the test samples in seven different heat treatment conditions are as follows: wherein the sample A is coated with a palladium-coated layer of 30 nm thickness on the surface of the core wire, and no vacuum is applied. The heat treatment and the sample B were plated on the surface of the core wire with a palladium-coated layer having a thickness of 30 nm, and subjected to vacuum heat treatment at 300 ° C for 2 hours, and the sample C was plated with a palladium-coated layer having a thickness of 70 nm on the surface of the core wire, and Without vacuum heat treatment, sample D was plated with a palladium-coated layer having a thickness of 70 nm on the surface of the core wire, and subjected to vacuum heat treatment at 350 ° C for 2 hours, and sample E was provided with a palladium-coated layer having a thickness of 120 nm, and Vacuum heat treatment, sample F with a palladium coating of 120 nm thickness, and at 250 ° C Vacuum-heat treatment for 2 hours, sample G with a thickness of 120 nm of palladium-containing coating layer, and vacuum heat treatment at 500 ° C for 2 hours; from the results in the table, it is clear that when the palladium-containing coating layer is completely diffused to the core wire At the base, when a uniform copper-palladium alloy layer is formed in the metallographic structure of the core wire (that is, the samples having a palladium-coated coating layer having a thickness of 0 are B, D, and G), the neck drop strength is significantly greater than that without vacuum heat treatment, and The sample containing the palladium-coated coating layer is not completely diffused to the core base, and as a whole, the joint line (1) obtained by the preparation method of the present invention preferably has a neck drop strength of not less than 140 MPa after the ball is formed. Please refer to the fifth figure again, which is a schematic diagram of the tensile strength of the test interface joint after the bonding wire of the present invention is formed by the ball forming and wire bonding, and the test method is after the bonding wire (1) completes the wire bonding process, The bonding wire (1) corresponds to the other surface of the part (2) and is stretched away from the joint surface by a stretching device (4), thereby measuring Test the bonding strength of the interface bonding wire (1), the test results are as follows: It is clear from the table that the tensile strength of the interface bonding of samples B, D and G is significantly greater than that without vacuum heat treatment, or palladium The sample with the coating layer not completely diffused to the core base has a tensile strength of interfacial bonding of preferably not less than 7.0 g; in addition, the present invention also measures the hardness of the ball (11) of the above seven samples, and the result shows that the sample B , D and G are significantly smaller than the sample which is not subjected to vacuum heat treatment, or the palladium-containing coating layer is not completely diffused to the core base. It is understood that when the palladium-containing coating layer is not diffused or not completely diffused to the core base, the bonding wire (1) After the end of the ball is formed into a solder ball (11), the palladium metal contained in the solder ball (11) is mostly accumulated near the neck portion (12), causing segregation of palladium, causing the neck portion (12) to become a bonding wire ( 1) The relative weakness of the structural strength, and the breakage problem occurs easily here; in contrast, the present invention completely diffuses to the bonding wire (1) of the core base, and the palladium metal is uniformly distributed on the solder ball (11), so the hardness of the spherical core is significantly higher. Small, so that after the line process, you can avoid (12) born neck fracture, leading to peeling of the bonding interface problems, and it is understood, the smaller the hardness of the spherical center of the neck portion described above preferably also on the interface between the bonding tensile strength and yield strength.

最後,請再參閱下表係將上述C、D樣品進行保存試驗之比較表,可明顯看出未進行真空熱處理之樣品C於160℃,24小時的保存條件下,芯線表面之含鈀被覆層將出現起泡現象(如第六圖所示),此勢必影響後續之燒球成型以及打線封裝製程;反觀本發明以350℃下進行真空熱處理2小時之樣品 D,因含鈀被覆層完全擴散至芯線之基地,即可通過160℃,24小時的保存試驗(如第七圖所示),進而提高接合線後續製程以及實施使用之可靠度。 Finally, please refer to the following table for the comparison table of the above C and D samples. It is obvious that the sample C without vacuum heat treatment has a palladium-coated layer on the surface of the core wire under the storage condition of 160 ° C for 24 hours. Foaming will occur (as shown in the sixth figure), which will inevitably affect the subsequent ball forming and wire-wrapping process; in contrast, the present invention performs vacuum heat treatment at 350 ° C for 2 hours. D, because the palladium-containing coating layer is completely diffused to the base of the core wire, it can pass the storage test at 160 ° C for 24 hours (as shown in the seventh figure), thereby improving the subsequent process of the bonding wire and the reliability of the implementation.

由上述之實施說明可知,本發明與現有技術相較之下,本發明具有以下優點: It can be seen from the above description that the present invention has the following advantages compared with the prior art:

1.本發明將具含鈀被覆層之芯線進行真空熱處理,於芯線之組織中形成均勻銅鈀合金層,與習知未進行真空熱處理之接合線相較下,本發明因具有較佳之球心硬度、頸部降伏强度以及界面接合抗拉強度,不僅可避免習知接合線於實施使用時常造成頸部斷裂,導致接合界面剝離的問題發生外,且由於本發明之含鈀被覆層完全擴散至芯線基地上,亦可解決習知因鍍鈀層厚度不均,造成封裝過程整體產出率差、良率偏低的問題。 1. The present invention heat-treats a core wire having a palladium-containing coating layer to form a uniform copper-palladium alloy layer in the structure of the core wire. Compared with a conventional bonding wire which is not subjected to vacuum heat treatment, the present invention has a better spherical core. Hardness, neck strength, and interfacial tensile strength can not only avoid the problem that the conventional bonding wire often causes neck fracture during use, resulting in the problem of peeling of the joint interface, and since the palladium-containing coating layer of the present invention completely diffuses to On the core wire base, it is also possible to solve the problem that the thickness of the palladium plating layer is uneven, resulting in poor overall output rate and low yield of the packaging process.

2.本發明之固相擴散反應銅鈀合金線因含鈀被覆層已完全擴散至芯線之基地,可通過較嚴苛之高溫保存試驗(160℃,24小時),進而提高接合線後續的燒球成型以及打線處理製程之可靠度,使得本發明之接合線具有良好之銲接成球性與接合性。 2. The solid phase diffusion reaction copper-palladium alloy wire of the present invention has been completely diffused to the base of the core wire by the palladium-containing coating layer, and can be subjected to a relatively high temperature storage test (160 ° C, 24 hours) to further improve the subsequent burning of the bonding wire. The ball forming and the reliability of the wire bonding process make the bonding wire of the present invention have good soldering properties and bonding properties.

綜上所述,本發明之固相擴散反應銅鈀合金線及其製造方法,的確能藉由上述所揭露之實施例,達到所預期之使用功效,且本發明亦未曾公開於申請前,誠已完全符合專利法之規定與要求。爰依法提出發明專利之申請,懇請惠予審查,並賜准專利,則實感德便。 In summary, the solid phase diffusion reaction copper-palladium alloy wire of the present invention and the method for producing the same can indeed achieve the intended use efficiency by the above-disclosed embodiments, and the present invention has not been disclosed before the application. It has fully complied with the requirements and requirements of the Patent Law.爰Issuing an application for a patent for invention in accordance with the law, and asking for a review, and granting a patent, is truly sensible.

惟,上述所揭之圖示及說明,僅為本發明之較佳實施例,非為限定本發明之保護範圍;大凡熟悉該項技藝之人士, 其所依本發明之特徵範疇,所作之其它等效變化或修飾,皆應視為不脫離本發明之設計範疇。 The illustrations and descriptions of the present invention are merely preferred embodiments of the present invention, and are not intended to limit the scope of the present invention; those who are familiar with the art, Other equivalent changes or modifications made by the present invention within the scope of the invention are considered to be within the scope of the invention.

(S1)‧‧‧步驟一 (S1)‧‧‧Step one

(S2)‧‧‧步驟二 (S2)‧‧‧Step 2

(S3)‧‧‧步驟三 (S3) ‧ ‧ Step 3

Claims (8)

一種固相擴散反應銅鈀合金線製造方法,係包括有下述步驟:步驟一:準備一銅或銅合金所製成之芯線;步驟二:將一含鈀被覆層形成於該芯線之表面;以及步驟三:將具含鈀被覆層之芯線進行真空熱處理,使該含鈀被覆層完全擴散至該芯線之基地上,並於該芯線之組織中形成均勻銅鈀合金層。 A solid phase diffusion reaction copper-palladium alloy wire manufacturing method comprises the following steps: Step 1: preparing a core wire made of copper or copper alloy; Step 2: forming a palladium-containing coating layer on the surface of the core wire; And step 3: vacuum-treating the core wire with the palladium-containing coating layer to completely diffuse the palladium-containing coating layer onto the base of the core wire, and forming a uniform copper-palladium alloy layer in the structure of the core wire. 如申請專利範圍第1項所述之固相擴散反應銅鈀合金線製造方法,其中該含鈀被覆層係以一濺鍍、一蒸鍍或一沈積的方式形成於該芯線之表面。 The method for producing a solid phase diffusion reaction copper-palladium alloy wire according to claim 1, wherein the palladium-containing coating layer is formed on the surface of the core wire by sputtering, vapor deposition or deposition. 如申請專利範圍第1項所述之固相擴散反應銅鈀合金線製造方法,其中該真空熱處理之溫度範圍介於300℃~500℃之間,且處理時間為1~3小時之間。 The method for manufacturing a solid phase diffusion reaction copper-palladium alloy wire according to claim 1, wherein the vacuum heat treatment temperature ranges from 300 ° C to 500 ° C, and the treatment time is between 1 and 3 hours. 如申請專利範圍第1項所述之固相擴散反應銅鈀合金線製造方法,其中該含鈀被覆層之厚度係不大於120奈米。 The method for producing a solid phase diffusion reaction copper-palladium alloy wire according to claim 1, wherein the palladium-containing coating layer has a thickness of not more than 120 nm. 一種藉由如申請專利範圍第1至4項中任一項所述之方法製備之固相擴散反應銅鈀合金線。 A solid phase diffusion reaction copper-palladium alloy wire prepared by the method according to any one of claims 1 to 4. 如申請專利範圍第5項所述之固相擴散反應銅鈀合金線,其中接合線於燒球成型後之球心硬度係不大於50Hv。 The solid phase diffusion reaction copper-palladium alloy wire according to claim 5, wherein the bonding wire has a spherical core hardness of not more than 50 Hv after the ball molding. 如申請專利範圍第5項所述之固相擴散反應銅鈀合金線,其中接合線於燒球成型後之頸部降伏强度係不小於140MPa。 The solid phase diffusion reaction copper-palladium alloy wire according to claim 5, wherein the neck line after the fire ball is formed has a neck drop strength of not less than 140 MPa. 如申請專利範圍第5項所述之固相擴散反應銅鈀合金線,其中接合線於燒球成型、打線處理後,其界面接合之抗拉強度係不小於7.0g。 The solid phase diffusion reaction copper-palladium alloy wire according to claim 5, wherein the bonding wire has a tensile strength of not less than 7.0 g after the ball forming and wire bonding treatment.
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Cited By (4)

* Cited by examiner, † Cited by third party
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CN104517687A (en) * 2013-09-30 2015-04-15 吕传盛 Non-coated copper wire with function of electromagnetic shielding and manufacturing method thereof
TWI500788B (en) * 2013-12-10 2015-09-21 Truan Sheng Lui Unplated copper wire with wear resistance corrosion resistance properties and manufacturing method thereof
CN104778992B (en) * 2014-01-09 2016-10-19 吕传盛 Wear-resisting erosion resistance is without coating copper cash and manufacture method thereof
CN111719064A (en) * 2015-08-12 2020-09-29 日铁新材料股份有限公司 Bonding wire for semiconductor device

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US7820913B2 (en) * 2005-01-05 2010-10-26 Nippon Steel Materials Co., Ltd. Bonding wire for semiconductor device
TW201205695A (en) * 2010-07-16 2012-02-01 Nippon Steel Materials Co Ltd Bonding wire for semiconductor

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104517687A (en) * 2013-09-30 2015-04-15 吕传盛 Non-coated copper wire with function of electromagnetic shielding and manufacturing method thereof
CN104517687B (en) * 2013-09-30 2017-01-04 吕传盛 The copper cash without coating of tool ELECTROMAGNETIC OBSCURANT and manufacture method thereof
TWI500788B (en) * 2013-12-10 2015-09-21 Truan Sheng Lui Unplated copper wire with wear resistance corrosion resistance properties and manufacturing method thereof
CN104778992B (en) * 2014-01-09 2016-10-19 吕传盛 Wear-resisting erosion resistance is without coating copper cash and manufacture method thereof
CN111719064A (en) * 2015-08-12 2020-09-29 日铁新材料股份有限公司 Bonding wire for semiconductor device

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