TW201312809A - 發光二極體封裝及其方法 - Google Patents

發光二極體封裝及其方法 Download PDF

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TW201312809A
TW201312809A TW101131613A TW101131613A TW201312809A TW 201312809 A TW201312809 A TW 201312809A TW 101131613 A TW101131613 A TW 101131613A TW 101131613 A TW101131613 A TW 101131613A TW 201312809 A TW201312809 A TW 201312809A
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Wen-Kun Yang
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King Dragon Internat Inc
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/58—Optical field-shaping elements
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    • H—ELECTRICITY
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    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/64—Heat extraction or cooling elements
    • H01L33/647—Heat extraction or cooling elements the elements conducting electric current to or from the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
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    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H01L2933/0066—Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/483—Containers
    • H01L33/486—Containers adapted for surface mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/64—Heat extraction or cooling elements
    • H01L33/641—Heat extraction or cooling elements characterized by the materials

Abstract

一種發光二極體封裝包含基板，其具有貫穿上述基板之預形成的P型通孔及N型通孔；反射層，其形成於上述基板之上表面上；發光二極體晶粒，其具有與上述P型通孔及上述N型通孔對準之P型墊及N型墊；其中上述發光二極體晶粒係形成於上述基板之上表面上；回填材料，其係在上述P型通孔及上述N型通孔之內，藉以從上述P型墊及上述N型墊形成電性連結；以及透鏡，其形成於上述基板之上表面上。

Description

發光二極體封裝及其方法
本發明係有關於發光二極體封裝，特定而言係有關於具有通孔結構且經改良散熱之發光二極體封裝。
高效能積體電路封裝在本領域中係廣為人知。工業需求驅動了積體電路封裝的改進，以求達到更高的散熱及電性表現，與更小之尺寸及更少之製造成本。在發光二極體元件的領域中，發光二極體需要如積體電路元件般進行封裝。隨著元件尺寸不斷地縮小，晶粒密度也不斷地提高。在如此之高密度元件中封裝的技術需求也必須要提高以滿足上述情況。傳統上，在覆晶連接方法(flip-chip attachment method)中，一焊錫凸塊陣列形成於晶粒的表面上。上述焊錫凸塊的形成可以藉由使用一焊錫複合材料(solder composite material)，經過一阻焊遮罩(solder mask)來製造出所要的焊錫凸塊圖案。晶片封裝的功能包含功率散佈(power distribution)、訊號散佈(signal distribution)、散熱(heat dissipation)、保護與支撐等等。當半導體變的更複雜，傳統的封裝技術，例如導線架封裝(lead frame package)、軟性封裝(flex package)、剛性封裝技術(rigid package technique)，已無法滿足在一個更小的晶片上製造高密度元件之需求。
上述封裝可具有一核芯，其由一常見材料例如玻璃纖維環氧樹脂(glass epoxy)所製成，且可具有附加的層堆疊 至核芯上。金屬或導電層中可透過不同的蝕刻程序例如濕蝕刻建立圖樣，上述濕蝕刻在本領域為廣為人知故此處不進一步敘述。輸出入功能一般係利用多個層之間的金屬導線達成。每一導線係藉由其在封裝上之幾何關係及位置予以產生。由於製造技術與材料要求，具有堆疊層之封裝通常在金屬層中包含了數個排氣孔。排氣孔得以允許氣體在封裝製程期間被蒸發，藉此不會有氣泡形成於封裝中。導線可安排於排氣孔之上方或之下方或鄰近排氣孔或以上之組合。由於上述導線並非位於封裝上的同一位置，且會通過金屬層中之排氣孔所造成的若干個非金屬區域，故上述導線會具有阻抗變化或不匹配。這些附加層亦稱為「堆疊」層。這些堆疊層一般係從介電材料及導電材料的交替層所形成。
第一圖係顯示一習知之發光二極體封裝。其包含基板4，基板4具有龐大的散熱器(heat sink)2用以進行散熱。散射塊6係形成於基板4之上。發光二極體晶粒8係形成於散熱塊6之內且連接至導線16。螢光材料10係塗佈於晶粒上，樹脂成型部12係塗佈於螢光材料10之上以用於保護。最後，透鏡14係設置於晶粒上。如此領域所熟知，上述發光二極體晶粒之P型及N型接點係形成於發光側的側邊上，由於所發射出的電子可能會被發光二極體之P型或N型接點所阻擋，故上述結構將會造成光損失。其發光效率因此被上述結構所影響。再者，習知技術之散熱器太過龐大以至於無法縮減封裝尺寸。
是故，本發明提供具有P型、N型通孔之發光二極體結構，以使得P型、N型墊表面與發光表面不同，藉此改良發光效率並縮減元件尺寸且改善散熱效能。
本發明之一目的係為以低成本、高效能及高可靠度封裝提供具有較短導線之發光二極體封裝。
本發明之另一目的係為提供一便利、具有成本效益的用以製造發光二極體封裝(晶片組件)之方法。
於一觀點中，發光二極體封裝包含基板，其具有貫穿上述基板之預形成的P型通孔及N型通孔；反射層，其形成於上述基板之上表面上；發光二極體晶粒，其具有與上述P型通孔及上述N型通孔對準之P型墊及N型墊；其中上述發光二極體晶粒係形成於上述基板之上表面上；回填材料，其係在上述P型通孔及上述N型通孔之內，藉以從上述P型墊及上述N型墊形成電性連結；以及透鏡，其形成於上述基板之上表面上。
上述發光二極體封裝更包含P型終端墊，其係在上述基板之下方且透過上述P型通孔耦合至上述P型墊；N型終端墊，其係在上述基板之下方且透過上述N型通孔耦合至上述N型墊；主動區域終端墊，其係在上述基板之下方且耦合至上述發光二極體晶粒之上述主動區域。
透明黏著層形成於上述反射層上。反射層係藉由濺鍍或電鍍銀或鋁或金等而形成。發光二極體晶粒包含藍寶石基板且沒有反射層。上述回填材料係由鋁、鈦、銅、鎳或 銀所形成。
本發明將以本發明之較佳實施例加以詳細敘述。然而，應得以領會者為，本發明之較佳實施例係用以說明本發明。除說明書中所明確敘述者以外，本發明可實行於廣大範圍之其他實施例中，且本發明之範圍除了後附申請專利範圍所明定者之外在文義上並不受限。如第二圖所示，本發明係揭露發光二極體封裝組件，其包含發光二極體晶粒、導線及金屬互連部份。
第二圖係為基板20之剖面圖，基板20具有預定通孔22形成於其中。基板20可為金屬、玻璃、陶瓷、矽、塑膠、雙馬來醯亞胺-三氮雜苯樹脂(BT，Bismaleimide Triacine)、印刷電路板(PCB，printed circuit board)或聚醯亞胺(Polyimide，PI)。基板20之厚度大約40-200微米。其可為單層或多層(配線電路(wiring circuit))基板。導電層24係沿著基板20之上表面形成，且/或塗佈於通孔22之側壁上。接著，具有高透光性之黏著層26係接續形成於基板20之上表面上且於導電層24之上。導電層24可為銀(Ag)、銅(Cu)、鋁(Al)、鈦(Ti)、金(Au)及其任何組合，以作為反射層。即使黏著層26形成於其上，反射層24仍可反射晶粒所發出之光線，乃因黏著層係以具有高透光性之材料形成。因此，本發明可改善發光效率。
具有藍寶石基板之發光二極體元件28接續藉由黏著層26黏著於基板20之上表面上。黏著層26可僅僅覆蓋晶 片尺寸區域。如第三圖所示，P型墊22a及N型墊24a係各自對準於預先決定在基板20內之通孔22。P型墊22a係指用於發光二極體之P型導電材料的焊墊，而N型墊24a係指用於發光二極體之N型導電材料的焊墊。如第三圖所示，發光二極體元件28向下朝向基板20，且使得P型墊22a及N型墊24a兩者經由通孔22向下暴露出。之後，濺鍍程序係從基板之背側實施，以將導電層沈積於基板20之下表面上且進入通孔22，藉此亦在N型墊及P型墊上形成導電層，以作用為用於發光二極體元件28之反射層29。反射性導電層可為銀(Ag)、銅(Cu)、鋁(Al)、鈦(Ti)、金(Au)及其任何組合。
接續，光阻(photo-resist)層(未顯示)係藉由光微影蝕刻程序予以圖樣化，以在基板20之背側表面上形成期望之電路圖樣，而通孔係經由光阻層暴露出。回填材料30係接著形成於通孔內且填滿通孔。如第七圖所示，終端墊30a(作為散熱墊)亦定義於基板之背側表面上，其中某些可連接至回填材料30。在定義導線之後，光阻層係藉由溶劑剝除。回填材料30的沈積較佳係藉由本領域所熟知之電鍍程序所形成。接著，請參照第五圖，用於發光二極體元件28之透鏡32係附著於基板20之上表面上，以覆蓋整個發光二極體元件28。
上述通孔可藉由雷射、機械鑽孔或蝕刻形成於基板20之內。P型墊22a及N型墊24a可透過回填材料30耦合至終端墊44、42。如圖式中所示，回填材料(亦稱為互連結 構)30係耦合至N型墊、P型墊及終端墊30a。導線(未顯示)可設置於基板20之下表面或上表面上。習知技術之龐大散熱器在本發明中並不存在，故可縮小封裝尺寸。於一實例中，螢光材料係形成於發光二極體晶粒之第二表面上；P型墊、N型墊係形成於發光二極體之第一表面上，上述第一表面與第二表面不同。因此，所發出之光線不會被P型墊22a、N型墊24a所阻擋。
第六圖係顯示從第五圖之底側所視得之示意圖。發光二極體元件28之下(第一)表面包含主動區域，其具有由P型通孔所暴露之P型墊22a以及由N型通孔所暴露之N型墊24a。主動區域係指具有發光二極體之P-N層的區域。發光二極體元件28係收容於基板20之陰影內。P型終端墊42係形成於基板20之下，且透過回填插栓(plug)(通孔)及P型終端墊42的連接結構42a而連接至P型墊；N型終端墊44亦形成於基板20之下，且透過回填通孔及N型終端墊44的連接結構44a而各自連接至N型墊。另一散熱終端墊40係提供於基板20之內且於發光二極體元件之主動區域之下方。如此之安排與設置可提供用於發光二極體之較短訊號導線，且可透過終端墊42、44及40有效地將發光二極體所產生之熱排出到元件之外，藉此改善散熱效能。
本發明可利用習知之具有藍寶石基板的發光二極體，而在發光二極體下方沒有反射層。無需研發新類型的裝置。反射層24將形成於基板20之上表面上且可藉由用於 發光二極體封裝之濺鍍程序、單純的材料及低成本所形成之高透光黏著層26加以暴露出。通孔中的回填材料及終端墊可提供較短距離以用於訊號傳輸且可提供較佳之熱傳導係數。所發出之光線可完全地從發光二極體輻射出來，故可達到較少之反射損失。散熱金屬墊係易於形成；散熱金屬墊係在發光二極體晶粒之鈍化層(二氧化矽)之上，其提供較低之熱阻抗。另則，藉由電鍍形成之回填材料可藉由濺鍍、電鍍銅/鎳/金而形成。
雖已敘述本發明之較佳實施例，但此領域之具通常知識者將得以領會，本發明不應限於上述較佳實施例。反之，凡熟悉此領域之技藝者，在如下述之申請專利範圍所定義之本發明的精神及範圍內，可作若干更動及潤飾。
2‧‧‧散熱器
4‧‧‧基板
6‧‧‧散熱塊
8‧‧‧發光二極體晶粒
10‧‧‧螢光材料
12‧‧‧樹脂成型部
14‧‧‧透鏡
16‧‧‧導線
20‧‧‧基板
22‧‧‧通孔
22a‧‧‧P型墊
24‧‧‧導電層(反射層)
24a‧‧‧N型墊
26‧‧‧黏著層
28‧‧‧發光二極體元件
29‧‧‧反射層
30‧‧‧回填材料
30a‧‧‧終端墊
32‧‧‧透鏡
40‧‧‧(散熱)終端墊
42‧‧‧(P型)終端墊
42a‧‧‧連接結構
44‧‧‧(N型)終端墊
44a‧‧‧連接結構
第一圖係根據習知技術顯示半導體晶片組件之剖面圖。
第二圖係根據本發明顯示發光二極體晶片及基板之剖面圖。
第三圖係根據本發明之一實施例顯示濺鍍程序之剖面圖。
第四圖係根據本發明之一實施例顯示電鍍程序之剖面圖。
第五圖係根據本發明之另一實施例顯示發光二極體透鏡之剖面圖。
第六圖係根據本發明之一實施例顯示底視圖。
第七圖係根據本發明之一實施例顯示終端墊之剖面圖。
20‧‧‧基板
22a‧‧‧P型墊
24‧‧‧導電層(反射層)
24a‧‧‧N型墊
26‧‧‧黏著層
28‧‧‧發光二極體元件
30‧‧‧回填材料
30a‧‧‧終端墊
40‧‧‧(散熱)終端墊
42‧‧‧(P型)終端墊
44‧‧‧(N型)終端墊

Claims (10)

  1. 一種發光二極體封裝，包含：一基板，具有貫穿該基板之預形成的P型通孔及N型通孔；一反射層，形成於該基板之上表面上；一發光二極體晶粒，具有與該P型通孔及該N型通孔對準之P型墊及N型墊；該P型墊及該N型墊係形成於該發光二極體晶粒之第一表面上；其中該發光二極體晶粒係形成於該基板之該上表面上；以及一回填材料，其係在該P型通孔及該N型通孔之內，藉以從該P型墊及該N型墊形成電性連結。
  2. 如請求項1所述之發光二極體封裝，更包含一透鏡，其形成於該基板之該上表面上。
  3. 如請求項1所述之發光二極體封裝，更包含一P型終端墊，其係在該基板之下方且透過該P型通孔耦合至該P型墊，以及一N型終端墊，其係在該基板之下方且透過該N型通孔耦合至該N型墊。
  4. 如請求項1所述之發光二極體封裝，更包含一 主動區域終端墊，其係在該基板之下方且耦合至該發光二極體晶粒之該主動區域。
  5. 如請求項1所述之發光二極體封裝，更包含一透明黏著層，其形成於該反射層上。
  6. 如請求項5所述之發光二極體封裝，其中該反射層係藉由濺鍍或電鍍銀或鋁或金而形成。
  7. 如請求項1所述之發光二極體封裝，其中該發光二極體晶粒包含藍寶石基板且在第二表面上沒有反射層。
  8. 如請求項7所述之發光二極體封裝，其中螢光材料係形成於該發光二極體晶粒之該第二表面上；該第一表面不同於該第二表面。
  9. 如請求項1所述之發光二極體封裝，其中該回填材料係由鋁、鈦、銅、鎳或銀所形成。
  10. 如請求項9所述之發光二極體封裝，其中該回填材料係由銅/鎳/金所形成。
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