TW201226920A - Voltage drop detection circuit - Google Patents

Abstract

A voltage drop detection circuit includes a reference voltage generating circuit, a comparison circuit, a lock circuit, a display circuit, and a reset circuit. The reference voltage generating circuit generates a reference voltage. The comparison circuit compares the reference voltage and an output voltage from an electronic device, and outputs a comparison signal correspondingly. The locking circuit outputs a control signal according to the comparison signal and locks the control signal. The display circuit is activated according to the control signal. The reset circuit is configured to unlock the locking circuit.

Description

201226920 VI. Description of the Invention: [Technical Field of the Invention] [0001] The present invention relates to a voltage drop detecting circuit. [Prior Art] [0002] = Down test is the function test of the power supply circuit of the electronic product - the system to be tested is added at the specified load: the instantaneous change of the shape, and the measurement of the waveform is the most gamma ^ capture power supply magic wave ο No voltage drop. Due to the difficulty of the measurement, the method is completed. To the weight can not be promoted to [invention] [0003] Xin in the above content is necessary to provide a convenient detection circuit

[0006] [0007] [0007] 099144876 ~ kind of power drop detection circuit, comprising: ~ reference voltage generating circuit for generating - reference voltage value; ~ comparison circuit, the first input is used for - the power supply circuit of the electronic product to be tested is connected for receiving the voltage of the output voltage of the power supply circuit, and the second input terminal is for receiving the reference voltage value. The comparison circuit is for comparing the reference voltage value with an electron to be tested The output voltage value of the power supply circuit of the product outputs a comparison signal according to the comparison result; the latch circuit blocks the output signal based on the comparison signal and controls the round signal; the display circuit is used according to the Control signal operation; and form number Α0ΗΗ Page 3/12 pages [0008] 201226920 [0009] A reset circuit for releasing the latch state of the latch circuit. [0010] The voltage drop detection circuit passes through the comparison circuit and the latch circuit, so that when the output of the power supply circuit does not meet the requirement, the display circuit prompts the tester and latches the state, thereby avoiding testing with an oscilloscope. Time-consuming operations. Embodiments of the present invention include a reference voltage generating circuit 10, a comparing circuit 12, a latch circuit 15, a reset circuit 16, and a first embodiment. Display circuit 18. [0012] The first input end of the comparison circuit 12 is connected to the power supply circuit of the electronic product to be tested for receiving the voltage output by the power supply circuit of the electronic product to be tested when the specified load is added. The second input of the comparison circuit 12 is coupled to the reference voltage generating circuit 10 for receiving a reference voltage. The comparison circuit 12 is configured to compare the voltage value outputted by the power supply circuit with the reference voltage value, and output a comparison signal to the latch circuit 15 according to the comparison result. The latch circuit 15 outputs a control signal to the display circuit 18 according to the comparison signal to control the display circuit 18 to prompt the tester when the power supply circuit of the electronic product to be tested fails to meet the required voltage drop phenomenon, and latch the state. . [0013] The reset circuit 16 is connected to the latch circuit 15 for erasing the latch state of the latch circuit 15 for the next test. Referring to FIG. 2 together, the reference voltage generating circuit 10 includes a precision voltage regulator diode D and a sliding varistor Ra. The cathode of the precision voltage regulator diode D is connected to a power source VI through a resistor R1. The anode is grounded. The sliding resistance is 099144876 Form No. A0101 Page 4 / Total 12 Page 0992077485-0 201226920 [0015] [0017] [0018] [0019] ° ° /, fine start, voltage regulator D parallel The sliding end of the sliding varistor Ra is connected to the second input end of the 4 comparison circuit, and is also grounded through the two capacitors C1 and C2, respectively. . The comparison circuit 12 includes a comparator Μ, and the comparator positive input terminal is connected to the supply end of the electronic product to be tested as the first-input terminal of the comparison circuit 12, and is used for receiving the power supply circuit of the electronic product to be tested. The output voltage value is connected, and the inverting input end of the comparator U1 is connected to the sliding end of the sliding varistor Ra as the second wheel end of the comparator n for receiving the reference voltage value. The power terminal of the comparator U1 is connected to the power source V1, and is also grounded via the capacitor C3. The ground terminal of the comparator U1 is grounded. The flip-flop circuit 15 includes a D flip-flop U2 and a field effect transistor. In the embodiment, the D flip-flop U2 is of the type SN74LVC2G74. The gate of the field effect transistor Τ1 is connected to the output terminal of the comparator ul, and is also connected to another power source V2 through a resistor R2. The source of the field effect transistor T1 is grounded and connected to the ground of the comparator 透过 through a resistor R3. The drain of the field effect transistor T1 is connected to the power supply through a resistor R4 and is also directly connected to the timing terminal CLK of the D flip-flop U2. The data terminal D of the D flip-flop U2 is connected to the power source V2 through a resistor r5. The ground terminal GND is grounded. The power terminal Vcc is connected to the power supply μ. The preset terminal is connected to the power supply terminal Vcc through a resistor R8. The first output terminal Q is connected to the display circuit 18, and the first output terminal is placed. 16 includes a switch SW1 'the first end of which is grounded, also through a 099144876 form nickname A0101 page 5 / total 12 pages 0992077485-0 201226920

The capacitor C4 is connected to the power source V2, and is connected to the power source V2 through the second terminal of the CLR and the clearing resistor R6 of the D flip-flop U2. [0022] The display circuit 18 includes a light-emitting diode (10) and a field-effect transistor τ2. The anode of the light-emitting diode LED is connected to the power source ν2 through a resistor R7, and the cathode and the field effect electric The secret of the crystal T2 is connected, the gate of the field effect transistor ^ is connected to the first output terminal Q of the D flip-flop U2, and the source is grounded. The working principle of the voltage drop detecting circuit will be described below: In this embodiment, the adjustable voltage suppresses the reference voltage value of the inverter to the inverting input terminal of the comparator U1. It is assumed that when the specified load is added, the voltage output from the power supply circuit of the electronic product to be tested is lower than the voltage, and the voltage drop phenomenon of the power supply circuit is not satisfied. Then the reference voltage value is set to V0. [0023] When the specified load is added, the voltage output from the power supply circuit of the electronic product to be tested is output to the non-inverting input terminal of the comparator U1. The comparator w compares the voltage value with the reference electric dragon. When the voltage value of the power supply circuit is less than the reference voltage value (in this case, the power supply circuit of the electronic product to be tested does not meet the requirement), the comparator Output a low level signal. At this time, the field effect transistor T1 is turned off, so that the timing terminals of the D flip-flops receive a level signal of a rising edge. According to the specification of the D flip-flop U2, when the preset terminal, the clear terminal and the data terminal D are both high level, if the timing terminal CLK receives the level signal of the rising edge, the output terminal Q rotates the high level signal. And the turn is latched until it clears ____

CLR 099144876 Form No. A0101 Page 6 of 12 0992077485-0 201226920 This latched state is released when a high level signal is received. [0024] In this way, the field effect transistor T2 is turned on, and the LED of the LED is electrically illuminated to remind the tester that the power supply circuit of the electronic product to be tested does not meet the requirements. And since the output terminal Q of the D flip-flop U2 is latched, that is, it always outputs a high level signal, the light emitting diode LED is directly illuminated. [0025] When the tester needs to erase the latched state for the next test, it is only necessary to turn off the switch SW1. At this time, the clearing end of the D flip-flop U2 is connected.

The CLR receives the low level signal, which clears the output of its output terminal Q. [0026] The voltage drop detecting circuit passes through the comparator U1 and the D flip-flop U2 so that when the output of the power supply circuit does not meet the requirement, the LED of the LED starts to emit light, and the state is latched, thereby avoiding A cumbersome operation when testing with an oscilloscope. [0027] In summary, the present invention complies with the requirements of the invention patent, and submits a patent application according to law. However, the above description is only the preferred embodiment of the present invention, and equivalent modifications or variations made by those skilled in the art of the present invention should be included in the following claims. BRIEF DESCRIPTION OF THE DRAWINGS [0028] FIG. 1 is a block diagram of a preferred embodiment of a voltage drop detecting circuit of the present invention. 2 is a circuit diagram of the voltage drop detecting circuit of FIG. 1. [Main component symbol description] [0030] Reference voltage generation circuit: 10 [0031] Comparison circuit: 12 099144876 Form number A0101 Page 7/Total 12 page 0992077485-0 201226920 [0032] Latch circuit: 15 [0033] Reset Circuit: 1 6 [0034] Display Circuit: 1 8 [0035] Resistor: R1-R8 [0036] Capacitor: C1-C4 [0037] Switch: SW1 [0038] Field Effect Transistor: ΤΙ, T2 [0039] Precision Stable Voltage diode: D [0040] Light-emitting diode: LED [0041] Comparator: U1 [0042] D-trigger: U2 099144876 Form number A0101 Page 8 / Total 12 pages 0992077485-0

Claims (1)

201226920 VII. Patent application scope: 1. A voltage drop detecting circuit, comprising: a reference voltage generating circuit for generating a reference voltage value; a comparing circuit, the first input end of which is used for an electronic product to be tested The power supply circuit is connected to receive the output voltage value of the power supply circuit, the second input end is configured to receive the reference voltage value, and the comparison circuit is configured to compare the reference voltage value with an output voltage value of the power supply circuit of the electronic product to be tested And outputting a comparison signal according to the comparison result; a latch circuit for outputting a control signal according to the comparison signal and latching the output signal; a display circuit for operating according to the control signal; and a weight A circuit for releasing the latched state of the latch circuit. 2. The voltage drop detecting circuit according to claim 1, wherein the reference voltage generating circuit comprises a precision voltage stabilizing diode and a sliding rheostat, and the cathode of the precision voltage stabilizing diode is transmitted through a resistor and A first power source is connected, the anode is grounded, and the sliding varistor is connected in parallel with the precision voltage stabilizing diode. The sliding end of the sliding varistor is connected to the second input end of the comparison circuit. The voltage drop detection circuit of claim 1, wherein the comparison circuit comprises a comparator, the first input of the comparator is used as the first input of the comparison circuit and is to be tested The power supply circuit of the electronic product is connected to receive a voltage value output by the power supply circuit of the electronic product to be tested; the second input end of the comparator is connected to the reference voltage generating circuit as a second input end of the comparator for receiving The reference voltage value, the output of the comparator outputs the comparison signal. 4. The voltage drop detecting circuit according to claim 1, wherein the lock 099144876 form number A0101 page 9 / total 12 page 0992077485-0 201226920 memory circuit comprises a D flip-flop and a first field effect electric a crystal, a gate of the first field effect transistor is connected to an output end of the comparison circuit, and is further connected to a second power source through a first resistor, and a source of the first field effect transistor is grounded, the first field The drain of the effect transistor is connected to the second power source through a third resistor, and is also directly connected to the timing end of the D flip-flop. The data terminal of the D flip-flop is connected to the second power source through a fourth resistor. The terminal is connected to the power terminal through a fifth resistor, the first output terminal is connected to the display circuit, the second output terminal is vacant, and the clear terminal is connected to the reset circuit. 5. The voltage drop detecting circuit of claim 1, wherein the reset circuit comprises a switch having a first end grounded, a second end connected to the latch circuit, and a sixth resistor A second power source is connected. 6. The voltage drop detecting circuit of claim 1, wherein the display circuit comprises a light emitting diode and a second field effect transistor, and the anode of the light emitting diode is transmitted through a seventh resistor A second power source is connected, the cathode is connected to the drain of the second field effect transistor, the gate of the second field effect transistor is connected to the latch circuit, and the source is grounded. 099144876 Form No. A0101 Page 10 of 12 0992077485-0