TW201443446A - Negative voltage detector - Google Patents
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本發明係有關一種電壓檢知裝置,特別是關於一種應用於多組電源系統之負電壓檢知裝置。 The present invention relates to a voltage detecting device, and more particularly to a negative voltage detecting device applied to a plurality of sets of power supply systems.
為了進一步提升電子電路系統的安全性與可靠性,通常都會於系統中設計有電壓檢測電路,且其通常具備有過電壓或低電壓檢知功能,以防止電源電壓超出工作電壓所造成的破壞,抑或是避免因電壓暫時的供電電壓下降或過壓而引起的元件崩潰。然而,大部分的電壓檢測電路皆是檢測正電壓,不管是低電壓或是過電壓皆是如此。 In order to further improve the safety and reliability of the electronic circuit system, a voltage detection circuit is usually designed in the system, and usually has an overvoltage or low voltage detection function to prevent the power supply voltage from exceeding the damage caused by the working voltage. Or avoid component collapse caused by a temporary voltage drop or overvoltage of the voltage. However, most voltage detection circuits detect positive voltages, whether they are low voltage or over voltage.
另一方面,在一般情況下,研究、設計、開發與生產應用均需要可電源供應電流的設備,以連接開發中或測試中的裝置。這些應用亦必須監控由裝置所耗用的電壓與電流,以根據其裝置行為或測試得出最適宜的處理方式。再者,為針對需要電源供應作更精確量測的應用,通常會讀取各種電壓、電流數值來作進一步的評估。然而,目前普遍僅能輕易取得正電壓及正電流來進行檢知,些微的負電流則通常直接忽略它;或是僅能透過交流訊號來量測負電流,以利用方波取得所需之負電流,但此種利用方波取得的負電流相當不準確。尤其是在具有多組電源的交換機或是工業用電源裝置等設備上,負電流仍會影響到裝置性能與穩定性,因此,如能有效且準確地取得負電流之數值,提供評估或計算使用,當有利於性能的改善與效能的提升。 On the other hand, in general, research, design, development, and production applications require equipment that can supply current to connect devices under development or testing. These applications must also monitor the voltage and current consumed by the device to derive the most appropriate treatment based on its device behavior or testing. Furthermore, for applications that require a more accurate measurement of the power supply, various voltage and current values are typically read for further evaluation. However, it is generally easy to obtain positive voltage and positive current for detection. Some negative currents are usually ignored directly; or only negative signals can be measured by AC signals to obtain the required negative voltage by using square waves. Current, but this negative current using square waves is quite inaccurate. Especially in devices with multiple sets of power supplies or industrial power supply devices, negative current still affects device performance and stability. Therefore, if the negative current value can be obtained effectively and accurately, it can be used for evaluation or calculation. When it is beneficial to performance improvement and performance improvement.
有鑑於此,本發明遂提出一種負電壓檢知裝置,可以有效檢測出負電壓。 In view of the above, the present invention proposes a negative voltage detecting device capable of effectively detecting a negative voltage.
本發明之主要目的係在提供一種負電壓檢知裝置,其係可準確讀取到負電壓,並取得非常準確的負電流,進而可準確得知負電流功率,提供後續評估所需之準確數值。 The main object of the present invention is to provide a negative voltage detecting device which can accurately read a negative voltage and obtain a very accurate negative current, thereby accurately knowing the negative current power and providing an accurate value for subsequent evaluation. .
本發明之另一目的係在提供一種負電壓檢知裝置,其係可應用於具有多組電源之交換機、工業用電源裝置或是資訊用電源裝置等設備中,扮演一個有效檢知負電壓之角色者。 Another object of the present invention is to provide a negative voltage detecting device which can be applied to a device having multiple sets of power sources, an industrial power supply device, or an information power supply device, and plays an effective role in detecting a negative voltage. Role player.
為達到上述目的,本發明提出之一種負電壓檢知裝置係包括有:一取樣電路係電性連接一正電壓接地端與一負電壓接地端,以根據此二接地端的壓差產生一跨壓,並產生一取樣電流;一比流器係電性連接取樣電路與一負電壓參考節點,以控制在此跨壓產生時相對輸出取樣電流;一第一分壓取樣電阻係電性連接至正電壓參考節點與一連接節點,另有一第二分壓取樣電阻係電性連接至負電壓參考節點與連接節點,且比流器電性連接至第二分壓取樣電阻,以根據比流器輸出的取樣電流經第二分壓取樣電阻而於連接節點產生一負感測電壓。如此,即可有效利用本發明之檢知裝置,有效取得精確的負電壓,進而取得負電流或是其功率。 In order to achieve the above object, a negative voltage detecting device according to the present invention includes: a sampling circuit electrically connected to a positive voltage ground terminal and a negative voltage ground terminal to generate a voltage across the pressure difference between the two ground terminals; And generating a sampling current; a comparator is electrically connected to the sampling circuit and a negative voltage reference node to control the relative output sampling current when the voltage is generated; a first voltage dividing sampling resistor is electrically connected to the positive The voltage reference node and a connection node, another second voltage-sampling resistor is electrically connected to the negative voltage reference node and the connection node, and the current comparator is electrically connected to the second voltage-sampling resistor to be output according to the current divider The sampling current is generated by the second voltage dividing resistor to generate a negative sensing voltage at the connection node. In this way, the detecting device of the present invention can be effectively utilized to effectively obtain an accurate negative voltage, thereby obtaining a negative current or a power thereof.
底下藉由具體實施例配合所附的圖式詳加說明,當更容易瞭解本發明之目的、技術內容、特點及其所達成之功效。 The purpose, technical contents, features and effects achieved by the present invention will be more readily understood by the detailed description of the embodiments and the accompanying drawings.
10‧‧‧取樣電路 10‧‧‧Sampling circuit
12‧‧‧比流器 12‧‧‧ current comparator
14‧‧‧第一分壓取樣電阻 14‧‧‧First voltage divider resistor
16‧‧‧第二分壓取樣電阻 16‧‧‧Second voltage sampling resistor
18‧‧‧緩衝器 18‧‧‧ buffer
20‧‧‧第一穩壓單元 20‧‧‧First voltage regulator unit
22‧‧‧第二穩壓單元 22‧‧‧Second voltage regulator
A‧‧‧正電壓參考節點 A‧‧‧ positive voltage reference node
B‧‧‧負電壓慘考節點 B‧‧‧Negative voltage mistaken node
C‧‧‧連接節點 C‧‧‧ Connection node
D1、D2‧‧‧二極體 D1, D2‧‧‧ diode
Gnd‧‧‧正電壓接地端 Gnd‧‧‧positive voltage ground
Gnd1‧‧‧負電壓接地端 Gnd1‧‧‧Negative voltage ground
OP‧‧‧運算放大器 OP‧‧‧Operational Amplifier
Q‧‧‧電晶體 Q‧‧‧Optocrystal
R1‧‧‧第一電阻 R1‧‧‧first resistance
R2‧‧‧第二電阻 R2‧‧‧second resistance
R3‧‧‧第三電阻 R3‧‧‧ third resistor
R4、R5、R6、R7、R8‧‧‧電阻 R4, R5, R6, R7, R8‧‧‧ resistors
Rs‧‧‧限流電阻 Rs‧‧‧ current limiting resistor
Rv‧‧‧補償電阻 Rv‧‧‧compensation resistor
+Vcc‧‧‧正電壓端 +Vcc‧‧‧positive voltage terminal
-Vcc‧‧‧負電壓端 -Vcc‧‧‧negative voltage terminal
第一圖為本發明之電路示意圖。 The first figure is a schematic diagram of the circuit of the present invention.
第二圖為本發明於感應產生負電流之電路示意圖。 The second figure is a schematic diagram of a circuit for inducing a negative current in the present invention.
第一圖為本發明之電路示意圖,如圖所示,一種負電壓檢知裝置主要包括有一取樣電路10、比流器12、第一分壓取樣電阻14、第二分壓取樣電阻16以及一緩衝器18;另外,本發明亦可同時搭配一第一穩壓單元20及一第二穩壓單元22來穩定電壓。 The first figure is a schematic circuit diagram of the present invention. As shown in the figure, a negative voltage detecting device mainly includes a sampling circuit 10, a current comparator 12, a first voltage dividing sampling resistor 14, a second voltage dividing sampling resistor 16, and a The buffer 18; in addition, the present invention can also be combined with a first voltage stabilizing unit 20 and a second voltage stabilizing unit 22 to stabilize the voltage.
請參閱第一圖所示,取樣電路10分別電性連接一正電壓接地端Gnd與一負電壓接地端Gnd1,以根據此正電壓接地端Gnd與負電壓接地端Gnd1的壓差產生一跨壓Vs,並產生一取樣電流Is;一比流器12電性連接此取樣電路10以及負電壓參考節點B,以根據此跨壓Vs來決定是否輸出此取樣電流Is;一第一分壓取樣電阻14係電性連接至正電壓參考節點A與一連接節點C;另有一第二分壓取樣電阻16,其係電性連接至負電壓參考節點B與連接節點C,且比流器12亦電性連接至第二分壓取樣電阻16,以根據取樣電流的產生而於連接節點C產生一負感測電壓,其中第一分壓取樣電阻14之電阻值等於第二分壓取樣電阻16之電阻值,使其在無跨壓產生時,連接節點C之電壓仍夠保持為0;以及一緩衝器18係電性連接此連接節點C、正電壓參考節點A、正電壓接地端Gnd,以緩衝輸出對應負感測電壓之負感測電流Isense。此外,為提供穩定的電壓,第一穩壓單元20之一端電性連接至負電壓接地端Gnd1與取樣電路10之間,另一端則連接至負電壓參考節點B,且第二穩壓單元之一端電性連接至正電壓接地端Gnd與比流器10之間,另一端則連接至正電壓參考節點A。再者,負電壓參考節點B更利用一第二電阻R2電性連接至一負電壓端-Vcc(負電壓源),正電壓參考節點A則利用一第三電阻R3電性連接至一正電壓端+Vcc(正電壓源)。 Referring to the first figure, the sampling circuit 10 is electrically connected to a positive voltage ground terminal Gnd and a negative voltage ground terminal Gnd1, respectively, to generate a voltage across the voltage difference between the positive voltage ground terminal Gnd and the negative voltage ground terminal Gnd1. Vs, and generates a sampling current Is; a current comparator 12 is electrically connected to the sampling circuit 10 and the negative voltage reference node B to determine whether to output the sampling current Is according to the voltage across the voltage Vs; a first voltage dividing sampling resistor The 14 series is electrically connected to the positive voltage reference node A and a connection node C; and a second voltage dividing sampling resistor 16 is electrically connected to the negative voltage reference node B and the connection node C, and the comparator 12 is also electrically Connected to the second voltage dividing sampling resistor 16 to generate a negative sensing voltage at the connection node C according to the generation of the sampling current, wherein the resistance value of the first voltage dividing sampling resistor 14 is equal to the resistance of the second voltage dividing sampling resistor 16 The value is such that when no voltage is generated, the voltage of the connection node C is still maintained at 0; and a buffer 18 is electrically connected to the connection node C, the positive voltage reference node A, and the positive voltage ground terminal Gnd to buffer The output corresponds to the negative of the negative sensing voltage Sensing current Isense. In addition, in order to provide a stable voltage, one end of the first voltage stabilizing unit 20 is electrically connected between the negative voltage ground terminal Gnd1 and the sampling circuit 10, and the other end is connected to the negative voltage reference node B, and the second voltage stabilizing unit One end is electrically connected to the positive voltage ground terminal Gnd and the current transformer 10, and the other end is connected to the positive voltage reference node A. Furthermore, the negative voltage reference node B is electrically connected to a negative voltage terminal -Vcc (negative voltage source) by a second resistor R2, and the positive voltage reference node A is electrically connected to a positive voltage by a third resistor R3. Terminal + Vcc (positive voltage source).
續參閱第一圖所示,詳言之,此取樣電路10包括有一限流電阻Rs,其二端係分別連接正電壓接地端Gnd與負電壓接地端Gnd1,一第一 電阻R1之一端電性連接至負電壓接地端Gnd1,另一端則連接至二串聯之二極體D1、D2。比流器12則包括有一運算放大器OP,其正端係電性連接取樣電路10之限流電阻Rs,負端則電性連接至第一電阻R1與二極體D1之間;以及一電晶體Q,通常使用PNP電晶體,其基極連接運算放大器OP之輸出端,射極連接取樣電路10之二極體D2,以及集極連接至第二分壓取樣電阻16,此運算放大器OP可根據跨壓Vs的產生與否來控制電晶體Q的導通與否,以決定是否輸出取樣電流,另有一電阻R8連接至運算放大器OP與電晶體Q之間以及負電壓參考節點B。第一分壓取樣電阻14係採用至少一電阻R4連接正電壓參考節點A和連接節點C;第二分壓取樣電阻16則包括有數個串聯之電阻,包括電阻R5、R6、R7以及一補償電阻Rv,電阻R5一端連接至連接節點C,另一端連接補償電阻Rv,補償電阻Rv之另一端則連接至電阻R6之一端,電阻R6之另一端連接至電阻R7,電阻R7另一端則連接負電壓參考節點B,且電晶體Q5之集極亦連接至電阻R6與電阻R7之間。其中,無負電壓產生時,即無跨壓產生,此時電阻R4之電阻值必須與電阻R5、R6、R7及補償電阻Rv之電阻值總和相等(R4=R5+R6+R7+Rv),以確保連接節點C之電壓維持為0;但是,由於製程差異或其他因素而導致連接節點C二側之電阻值不均等,此時可輕易藉由補償電阻Rv來調整至所需之電阻值,相當方便,並可有效利用補償電阻Rv來維持連接節點C之電壓保持為0,以避免有非感測之負電壓產生。 Referring to the first figure, in detail, the sampling circuit 10 includes a current limiting resistor Rs, and the two ends thereof are respectively connected with a positive voltage ground terminal Gnd and a negative voltage ground terminal Gnd1, a first One end of the resistor R1 is electrically connected to the negative voltage ground terminal Gnd1, and the other end is connected to the two series diodes D1, D2. The current transformer 12 includes an operational amplifier OP having a positive terminal electrically connected to the current limiting resistor Rs of the sampling circuit 10, and a negative terminal electrically connected between the first resistor R1 and the diode D1; and a transistor Q, usually using a PNP transistor, the base thereof is connected to the output terminal of the operational amplifier OP, the emitter is connected to the diode D2 of the sampling circuit 10, and the collector is connected to the second voltage dividing sampling resistor 16, the operational amplifier OP can be The voltage across the voltage Vs is controlled to control whether the transistor Q is turned on or not to determine whether to output the sampling current, and another resistor R8 is connected between the operational amplifier OP and the transistor Q and the negative voltage reference node B. The first voltage-sampling resistor 14 is connected to the positive voltage reference node A and the connection node C by using at least one resistor R4; the second voltage-sampling resistor 16 includes a plurality of resistors connected in series, including resistors R5, R6, R7 and a compensation resistor. Rv, one end of the resistor R5 is connected to the connection node C, the other end is connected to the compensation resistor Rv, the other end of the compensation resistor Rv is connected to one end of the resistor R6, the other end of the resistor R6 is connected to the resistor R7, and the other end of the resistor R7 is connected to the negative voltage Reference node B, and the collector of transistor Q5 is also connected between resistor R6 and resistor R7. Wherein, when no negative voltage is generated, no cross voltage is generated, and the resistance value of the resistor R4 must be equal to the sum of the resistance values of the resistors R5, R6, R7 and the compensation resistor Rv (R4=R5+R6+R7+Rv), To ensure that the voltage of the connection node C is maintained at 0; however, due to process differences or other factors, the resistance values on the two sides of the connection node C are not uniform, and the compensation resistor Rv can be easily adjusted to the required resistance value. It is quite convenient, and the compensation resistor Rv can be effectively utilized to maintain the voltage of the connection node C at 0 to avoid non-sensing negative voltage generation.
當有負電流產生時,限流電阻Rs上會有一跨壓Vs產生,此時,經由第一電阻R1會產生一取樣電流Is流經二極體D1、D2,如第二圖所示,同時,運算放大器OP會根據此跨壓Vs而產生輸出,使電晶體Q導通,此時取樣電流得以經過電晶體Q而流至第二分壓取樣電阻16,進而在連接節點C產生一負感測電壓Vsense,此負感測電壓Vsense經過緩衝器18之後,隨 即產生一感測負電流Isense輸出,相當準確。 When a negative current is generated, a voltage across the current limiting resistor Rs is generated. At this time, a sampling current Is is generated to flow through the diodes D1 and D2 via the first resistor R1, as shown in the second figure. The operational amplifier OP generates an output according to the voltage across the voltage Vs to turn on the transistor Q. At this time, the sampling current flows through the transistor Q to the second voltage dividing sampling resistor 16, thereby generating a negative sensing at the connection node C. Voltage Vsense, after the negative sense voltage Vsense passes through the buffer 18, That is, a sense negative output Isense output is generated, which is quite accurate.
綜上所述,本發明之負電壓檢知裝置可準確讀取到負電壓,並取得非常準確的負電流,進而可準確得知負電流功率,有效且正確地提供後續評估所需之準確數值,故可廣泛應用於各領域,尤其是具有多組電源之交換機、工業用電源裝置或是資訊用電源裝置等設備中,以確實扮演一個有效檢知負電壓之角色者。 In summary, the negative voltage detecting device of the present invention can accurately read the negative voltage and obtain a very accurate negative current, thereby accurately knowing the negative current power, and effectively and correctly providing the accurate value required for subsequent evaluation. Therefore, it can be widely used in various fields, especially in switches with multiple sets of power supplies, industrial power supply devices, or information power supply devices, etc., to truly play a role in effectively detecting negative voltage.
以上所述之實施例僅係為說明本發明之技術思想及特點,其目的在使熟習此項技藝之人士能夠瞭解本發明之內容並據以實施,當不能以之限定本發明之專利範圍,即大凡依本發明所揭示之精神所作之均等變化或修飾,仍應涵蓋在本發明之專利範圍內。 The embodiments described above are merely illustrative of the technical spirit and the features of the present invention, and the objects of the present invention can be understood by those skilled in the art, and the scope of the present invention cannot be limited thereto. That is, the equivalent variations or modifications made by the spirit of the present invention should still be included in the scope of the present invention.
10‧‧‧取樣電路 10‧‧‧Sampling circuit
12‧‧‧比流器 12‧‧‧ current comparator
14‧‧‧第一分壓取樣電阻 14‧‧‧First voltage divider resistor
16‧‧‧第二分壓取樣電阻 16‧‧‧Second voltage sampling resistor
18‧‧‧緩衝器 18‧‧‧ buffer
20‧‧‧第一穩壓單元 20‧‧‧First voltage regulator unit
22‧‧‧第二穩壓單元 22‧‧‧Second voltage regulator
A‧‧‧正電壓參考節點 A‧‧‧ positive voltage reference node
B‧‧‧負電壓慘考節點 B‧‧‧Negative voltage mistaken node
C‧‧‧連接節點 C‧‧‧ Connection node
D1、D2‧‧‧二極體 D1, D2‧‧‧ diode
Gnd‧‧‧正電壓接地端 Gnd‧‧‧positive voltage ground
Gnd1‧‧‧負電壓接地端 Gnd1‧‧‧Negative voltage ground
OP‧‧‧運算放大器 OP‧‧‧Operational Amplifier
Q‧‧‧電晶體 Q‧‧‧Optocrystal
R1‧‧‧第一電阻 R1‧‧‧first resistance
R2‧‧‧第二電阻 R2‧‧‧second resistance
R3‧‧‧第三電阻 R3‧‧‧ third resistor
R4、R5、R6、R7、R8‧‧‧電阻 R4, R5, R6, R7, R8‧‧‧ resistors
Rs‧‧‧限流電阻 Rs‧‧‧ current limiting resistor
Rv‧‧‧補償電阻 Rv‧‧‧compensation resistor
+Vcc‧‧‧正電壓端 +Vcc‧‧‧positive voltage terminal
-Vcc‧‧‧負電壓端 -Vcc‧‧‧negative voltage terminal
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CN106526273A (en) * | 2016-10-24 | 2017-03-22 | 上海华力微电子有限公司 | Precise bleeder circuit for negative voltage measurement |
CN107942177A (en) * | 2017-12-27 | 2018-04-20 | 四川福润得数码科技有限责任公司 | A kind of active information component test device and test method |
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US10139454B2 (en) * | 2016-01-20 | 2018-11-27 | Test Research, Inc. | Test device and alternating current power detection method of the same |
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JPH11312392A (en) * | 1998-04-28 | 1999-11-09 | Nec Corp | Level detecting circuit |
US6278327B1 (en) * | 1999-08-13 | 2001-08-21 | Xilinx, Inc. | Negative voltage detector |
TW200813444A (en) * | 2006-09-13 | 2008-03-16 | Advanced Analog Technology Inc | Negative voltage detector |
TW200849790A (en) * | 2007-06-13 | 2008-12-16 | Himax Tech Ltd | Negative voltage detection circuit for synchronous rectifier MOSFET |
JP5634280B2 (en) * | 2011-01-27 | 2014-12-03 | Fdk株式会社 | Polarity detection circuit |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106526273A (en) * | 2016-10-24 | 2017-03-22 | 上海华力微电子有限公司 | Precise bleeder circuit for negative voltage measurement |
CN107942177A (en) * | 2017-12-27 | 2018-04-20 | 四川福润得数码科技有限责任公司 | A kind of active information component test device and test method |
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